Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arrays

The arrays are never modified, declare them as const.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Laurent Pinchart and committed by
Linus Walleij
44a45b55 f41a1efe

+11 -11
+1 -1
drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
··· 1272 1272 #define R8A73A4_PIN_IO_PU_PD(pin) SH_PFC_PIN_CFG(pin, __IO | __PUD) 1273 1273 #define R8A73A4_PIN_O(pin) SH_PFC_PIN_CFG(pin, __O) 1274 1274 1275 - static struct sh_pfc_pin pinmux_pins[] = { 1275 + static const struct sh_pfc_pin pinmux_pins[] = { 1276 1276 R8A73A4_PIN_IO_PU_PD(0), R8A73A4_PIN_IO_PU_PD(1), 1277 1277 R8A73A4_PIN_IO_PU_PD(2), R8A73A4_PIN_IO_PU_PD(3), 1278 1278 R8A73A4_PIN_IO_PU_PD(4), R8A73A4_PIN_IO_PU_PD(5),
+1 -1
drivers/pinctrl/sh-pfc/pfc-r8a7740.c
··· 1543 1543 #define R8A7740_PIN_O(pin) SH_PFC_PIN_CFG(pin, __O) 1544 1544 #define R8A7740_PIN_O_PU_PD(pin) SH_PFC_PIN_CFG(pin, __O | __PUD) 1545 1545 1546 - static struct sh_pfc_pin pinmux_pins[] = { 1546 + static const struct sh_pfc_pin pinmux_pins[] = { 1547 1547 /* Table 56-1 (I/O and Pull U/D) */ 1548 1548 R8A7740_PIN_IO_PD(0), R8A7740_PIN_IO_PD(1), 1549 1549 R8A7740_PIN_IO_PD(2), R8A7740_PIN_IO_PD(3),
+2 -2
drivers/pinctrl/sh-pfc/pfc-r8a7778.c
··· 1260 1260 */ 1261 1261 #define PIN_NUMBER(row, col) (1000+((row)-1)*25+(col)-1) 1262 1262 1263 - static struct sh_pfc_pin pinmux_pins[] = { 1263 + static const struct sh_pfc_pin pinmux_pins[] = { 1264 1264 PINMUX_GPIO_GP_ALL(), 1265 1265 1266 1266 /* Pins not associated with a GPIO port */ ··· 2104 2104 SH_PFC_FUNCTION(vin1), 2105 2105 }; 2106 2106 2107 - static struct pinmux_cfg_reg pinmux_config_regs[] = { 2107 + static const struct pinmux_cfg_reg pinmux_config_regs[] = { 2108 2108 { PINMUX_CFG_REG("GPSR0", 0xfffc0004, 32, 1) { 2109 2109 GP_0_31_FN, FN_IP1_14_11, 2110 2110 GP_0_30_FN, FN_IP1_10_8,
+1 -1
drivers/pinctrl/sh-pfc/pfc-r8a7779.c
··· 1410 1410 PINMUX_IPSR_MODSEL_DATA(IP12_17_15, SCK4_B, SEL_SCIF4_1), 1411 1411 }; 1412 1412 1413 - static struct sh_pfc_pin pinmux_pins[] = { 1413 + static const struct sh_pfc_pin pinmux_pins[] = { 1414 1414 PINMUX_GPIO_GP_ALL(), 1415 1415 }; 1416 1416
+2 -2
drivers/pinctrl/sh-pfc/pfc-r8a7790.c
··· 1731 1731 #define PIN_NUMBER(r, c) (((r) - 'A') * 31 + (c) + 200) 1732 1732 #define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c) 1733 1733 1734 - static struct sh_pfc_pin pinmux_pins[] = { 1734 + static const struct sh_pfc_pin pinmux_pins[] = { 1735 1735 PINMUX_GPIO_GP_ALL(), 1736 1736 1737 1737 /* Pins not associated with a GPIO port */ ··· 4237 4237 SH_PFC_FUNCTION(vin3), 4238 4238 }; 4239 4239 4240 - static struct pinmux_cfg_reg pinmux_config_regs[] = { 4240 + static const struct pinmux_cfg_reg pinmux_config_regs[] = { 4241 4241 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) { 4242 4242 GP_0_31_FN, FN_IP3_17_15, 4243 4243 GP_0_30_FN, FN_IP3_14_12,
+2 -2
drivers/pinctrl/sh-pfc/pfc-r8a7791.c
··· 1674 1674 PINMUX_IPSR_MODSEL_DATA(IP16_11_10, CAN1_RX_B, SEL_CAN1_1), 1675 1675 }; 1676 1676 1677 - static struct sh_pfc_pin pinmux_pins[] = { 1677 + static const struct sh_pfc_pin pinmux_pins[] = { 1678 1678 PINMUX_GPIO_GP_ALL(), 1679 1679 }; 1680 1680 ··· 3056 3056 SH_PFC_FUNCTION(usb1), 3057 3057 }; 3058 3058 3059 - static struct pinmux_cfg_reg pinmux_config_regs[] = { 3059 + static const struct pinmux_cfg_reg pinmux_config_regs[] = { 3060 3060 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) { 3061 3061 GP_0_31_FN, FN_IP1_22_20, 3062 3062 GP_0_30_FN, FN_IP1_19_17,
+1 -1
drivers/pinctrl/sh-pfc/pfc-sh7372.c
··· 844 844 #define SH7372_PIN_O(pin) SH_PFC_PIN_CFG(pin, __O) 845 845 #define SH7372_PIN_O_PU_PD(pin) SH_PFC_PIN_CFG(pin, __O | __PUD) 846 846 847 - static struct sh_pfc_pin pinmux_pins[] = { 847 + static const struct sh_pfc_pin pinmux_pins[] = { 848 848 /* Table 57-1 (I/O and Pull U/D) */ 849 849 SH7372_PIN_IO_PD(0), SH7372_PIN_IO_PD(1), 850 850 SH7372_PIN_O(2), SH7372_PIN_I_PD(3),
+1 -1
drivers/pinctrl/sh-pfc/pfc-sh73a0.c
··· 1179 1179 */ 1180 1180 #define PIN_NUMBER(row, col) (1000+((row)-1)*34+(col)-1) 1181 1181 1182 - static struct sh_pfc_pin pinmux_pins[] = { 1182 + static const struct sh_pfc_pin pinmux_pins[] = { 1183 1183 /* Table 25-1 (I/O and Pull U/D) */ 1184 1184 SH73A0_PIN_I_PD(0), 1185 1185 SH73A0_PIN_I_PU(1),