···368368369369/**370370 * i915_gem_restore_fences - restore fence state371371- * @dev: DRM device371371+ * @dev_priv: i915 device private372372 *373373 * Restore the hw fence state to match the software tracking again, to be called374374 * after a gpu reset and on resume. Note that on runtime suspend we only cancel375375 * the fences, to be reacquired by the user later.376376 */377377-void i915_gem_restore_fences(struct drm_device *dev)377377+void i915_gem_restore_fences(struct drm_i915_private *dev_priv)378378{379379- struct drm_i915_private *dev_priv = to_i915(dev);380379 int i;381380382381 for (i = 0; i < dev_priv->num_fence_regs; i++) {···450451451452/**452453 * i915_gem_detect_bit_6_swizzle - detect bit 6 swizzling pattern453453- * @dev: DRM device454454+ * @dev_priv: i915 device private454455 *455456 * Detects bit 6 swizzling of address lookup between IGD access and CPU456457 * access through main memory.457458 */458459void459459-i915_gem_detect_bit_6_swizzle(struct drm_device *dev)460460+i915_gem_detect_bit_6_swizzle(struct drm_i915_private *dev_priv)460461{461461- struct drm_i915_private *dev_priv = to_i915(dev);462462 uint32_t swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN;463463 uint32_t swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN;464464···471473 */472474 swizzle_x = I915_BIT_6_SWIZZLE_NONE;473475 swizzle_y = I915_BIT_6_SWIZZLE_NONE;474474- } else if (INTEL_INFO(dev)->gen >= 6) {476476+ } else if (INTEL_GEN(dev_priv) >= 6) {475477 if (dev_priv->preserve_bios_swizzle) {476478 if (I915_READ(DISP_ARB_CTL) &477479 DISP_TILE_SURFACE_SWIZZLING) {
+1-1
drivers/gpu/drm/i915/i915_suspend.c
···114114115115 mutex_lock(&dev->struct_mutex);116116117117- i915_gem_restore_fences(dev);117117+ i915_gem_restore_fences(dev_priv);118118119119 if (IS_GEN4(dev_priv))120120 pci_write_config_word(pdev, GCDGMBUS,