Merge tag 'perf_urgent_for_v6.1_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull perf fixes from Borislav Petkov:

- Rename a perf memory level event define to denote it is of CXL type

- Add Alder and Raptor Lakes support to RAPL

- Make sure raw sample data is output with tracepoints

* tag 'perf_urgent_for_v6.1_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/mem: Rename PERF_MEM_LVLNUM_EXTN_MEM to PERF_MEM_LVLNUM_CXL
perf/x86/rapl: Add support for Intel Raptor Lake
perf/x86/rapl: Add support for Intel AlderLake-N
perf: Fix missing raw data on tracepoint events

Changed files
+7 -2
arch
x86
events
include
uapi
linux
kernel
events
+1 -1
arch/x86/events/amd/ibs.c
··· 801 801 /* Extension Memory */ 802 802 if (ibs_caps & IBS_CAPS_ZEN4 && 803 803 ibs_data_src == IBS_DATA_SRC_EXT_EXT_MEM) { 804 - data_src->mem_lvl_num = PERF_MEM_LVLNUM_EXTN_MEM; 804 + data_src->mem_lvl_num = PERF_MEM_LVLNUM_CXL; 805 805 if (op_data2->rmt_node) { 806 806 data_src->mem_remote = PERF_MEM_REMOTE_REMOTE; 807 807 /* IBS doesn't provide Remote socket detail */
+4
arch/x86/events/rapl.c
··· 806 806 X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &model_skl), 807 807 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &model_skl), 808 808 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &model_skl), 809 + X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &model_skl), 809 810 X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &model_spr), 811 + X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &model_skl), 812 + X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &model_skl), 813 + X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &model_skl), 810 814 {}, 811 815 }; 812 816 MODULE_DEVICE_TABLE(x86cpu, rapl_model_match);
+1 -1
include/uapi/linux/perf_event.h
··· 1337 1337 #define PERF_MEM_LVLNUM_L3 0x03 /* L3 */ 1338 1338 #define PERF_MEM_LVLNUM_L4 0x04 /* L4 */ 1339 1339 /* 5-0x8 available */ 1340 - #define PERF_MEM_LVLNUM_EXTN_MEM 0x09 /* Extension memory */ 1340 + #define PERF_MEM_LVLNUM_CXL 0x09 /* CXL */ 1341 1341 #define PERF_MEM_LVLNUM_IO 0x0a /* I/O */ 1342 1342 #define PERF_MEM_LVLNUM_ANY_CACHE 0x0b /* Any cache */ 1343 1343 #define PERF_MEM_LVLNUM_LFB 0x0c /* LFB */
+1
kernel/events/core.c
··· 9846 9846 9847 9847 perf_sample_data_init(&data, 0, 0); 9848 9848 data.raw = &raw; 9849 + data.sample_flags |= PERF_SAMPLE_RAW; 9849 9850 9850 9851 perf_trace_buf_update(record, event_type); 9851 9852