Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/armada: make variant a CRTC thing

Move the variant pointer into the armada_crtc structure, and update for
the resulting changes.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

+25 -25
+2 -2
drivers/gpu/drm/armada/armada_510.c
··· 79 79 const struct armada_variant armada510_ops = { 80 80 .has_spu_adv_reg = true, 81 81 .spu_adv_reg = ADV_HWC32ENABLE | ADV_HWC32ARGB | ADV_HWC32BLEND, 82 - .crtc_init = armada510_crtc_init, 83 - .crtc_compute_clock = armada510_crtc_compute_clock, 82 + .init = armada510_crtc_init, 83 + .compute_clock = armada510_crtc_compute_clock, 84 84 };
+12 -15
drivers/gpu/drm/armada/armada_crtc.c
··· 332 332 static bool armada_drm_crtc_mode_fixup(struct drm_crtc *crtc, 333 333 const struct drm_display_mode *mode, struct drm_display_mode *adj) 334 334 { 335 - struct armada_private *priv = crtc->dev->dev_private; 336 335 struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); 337 336 int ret; 338 337 339 338 /* We can't do interlaced modes if we don't have the SPU_ADV_REG */ 340 - if (!priv->variant->has_spu_adv_reg && 339 + if (!dcrtc->variant->has_spu_adv_reg && 341 340 adj->flags & DRM_MODE_FLAG_INTERLACE) 342 341 return false; 343 342 344 343 /* Check whether the display mode is possible */ 345 - ret = priv->variant->crtc_compute_clock(dcrtc, adj, NULL); 344 + ret = dcrtc->variant->compute_clock(dcrtc, adj, NULL); 346 345 if (ret) 347 346 return false; 348 347 ··· 490 491 struct drm_display_mode *mode, struct drm_display_mode *adj, 491 492 int x, int y, struct drm_framebuffer *old_fb) 492 493 { 493 - struct armada_private *priv = crtc->dev->dev_private; 494 494 struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); 495 495 struct armada_regs regs[17]; 496 496 uint32_t lm, rm, tm, bm, val, sclk; ··· 534 536 } 535 537 536 538 /* Now compute the divider for real */ 537 - priv->variant->crtc_compute_clock(dcrtc, adj, &sclk); 539 + dcrtc->variant->compute_clock(dcrtc, adj, &sclk); 538 540 539 541 /* Ensure graphic fifo is enabled */ 540 542 armada_reg_queue_mod(regs, i, 0, CFG_PDWN64x66, LCD_SPU_SRAM_PARA1); ··· 556 558 dcrtc->v[1].spu_v_porch = tm << 16 | bm; 557 559 val = adj->crtc_hsync_start; 558 560 dcrtc->v[1].spu_adv_reg = val << 20 | val | ADV_VSYNCOFFEN | 559 - priv->variant->spu_adv_reg; 561 + dcrtc->variant->spu_adv_reg; 560 562 561 563 if (interlaced) { 562 564 /* Odd interlaced frame */ ··· 565 567 dcrtc->v[0].spu_v_porch = dcrtc->v[1].spu_v_porch + 1; 566 568 val = adj->crtc_hsync_start - adj->crtc_htotal / 2; 567 569 dcrtc->v[0].spu_adv_reg = val << 20 | val | ADV_VSYNCOFFEN | 568 - priv->variant->spu_adv_reg; 570 + dcrtc->variant->spu_adv_reg; 569 571 } else { 570 572 dcrtc->v[0] = dcrtc->v[1]; 571 573 } ··· 580 582 armada_reg_queue_set(regs, i, dcrtc->v[0].spu_v_h_total, 581 583 LCD_SPUT_V_H_TOTAL); 582 584 583 - if (priv->variant->has_spu_adv_reg) { 585 + if (dcrtc->variant->has_spu_adv_reg) { 584 586 armada_reg_queue_mod(regs, i, dcrtc->v[0].spu_adv_reg, 585 587 ADV_VSYNC_L_OFF | ADV_VSYNC_H_OFF | 586 588 ADV_VSYNCOFFEN, LCD_SPU_ADV_REG); ··· 824 826 { 825 827 struct drm_device *dev = crtc->dev; 826 828 struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); 827 - struct armada_private *priv = crtc->dev->dev_private; 828 829 struct armada_gem_object *obj = NULL; 829 830 int ret; 830 831 831 832 /* If no cursor support, replicate drm's return value */ 832 - if (!priv->variant->has_spu_adv_reg) 833 + if (!dcrtc->variant->has_spu_adv_reg) 833 834 return -ENXIO; 834 835 835 836 if (handle && w > 0 && h > 0) { ··· 876 879 { 877 880 struct drm_device *dev = crtc->dev; 878 881 struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); 879 - struct armada_private *priv = crtc->dev->dev_private; 880 882 int ret; 881 883 882 884 /* If no cursor support, replicate drm's return value */ 883 - if (!priv->variant->has_spu_adv_reg) 885 + if (!dcrtc->variant->has_spu_adv_reg) 884 886 return -EFAULT; 885 887 886 888 mutex_lock(&dev->struct_mutex); ··· 1047 1051 } 1048 1052 1049 1053 int armada_drm_crtc_create(struct drm_device *dev, struct resource *res, 1050 - int irq) 1054 + int irq, const struct armada_variant *variant) 1051 1055 { 1052 1056 struct armada_private *priv = dev->dev_private; 1053 1057 struct armada_crtc *dcrtc; ··· 1070 1074 return -ENOMEM; 1071 1075 } 1072 1076 1077 + dcrtc->variant = variant; 1073 1078 dcrtc->base = base; 1074 1079 dcrtc->num = dev->mode_config.num_crtc; 1075 1080 dcrtc->clk = ERR_PTR(-EINVAL); ··· 1104 1107 return ret; 1105 1108 } 1106 1109 1107 - if (priv->variant->crtc_init) { 1108 - ret = priv->variant->crtc_init(dcrtc, dev->dev); 1110 + if (dcrtc->variant->init) { 1111 + ret = dcrtc->variant->init(dcrtc, dev->dev); 1109 1112 if (ret) { 1110 1113 kfree(dcrtc); 1111 1114 return ret;
+4 -1
drivers/gpu/drm/armada/armada_crtc.h
··· 32 32 armada_reg_queue_mod(_r, _i, 0, 0, ~0) 33 33 34 34 struct armada_frame_work; 35 + struct armada_variant; 35 36 36 37 struct armada_crtc { 37 38 struct drm_crtc crtc; 39 + const struct armada_variant *variant; 38 40 unsigned num; 39 41 void __iomem *base; 40 42 struct clk *clk; ··· 75 73 }; 76 74 #define drm_to_armada_crtc(c) container_of(c, struct armada_crtc, crtc) 77 75 78 - int armada_drm_crtc_create(struct drm_device *, struct resource *, int); 76 + int armada_drm_crtc_create(struct drm_device *, struct resource *, int, 77 + const struct armada_variant *); 79 78 void armada_drm_crtc_gamma_set(struct drm_crtc *, u16, u16, u16, int); 80 79 void armada_drm_crtc_gamma_get(struct drm_crtc *, u16 *, u16 *, u16 *, int); 81 80 void armada_drm_crtc_disable_irq(struct armada_crtc *, u32);
+4 -5
drivers/gpu/drm/armada/armada_drm.h
··· 61 61 struct armada_variant { 62 62 bool has_spu_adv_reg; 63 63 uint32_t spu_adv_reg; 64 - int (*crtc_init)(struct armada_crtc *, struct device *); 65 - int (*crtc_compute_clock)(struct armada_crtc *, 66 - const struct drm_display_mode *, 67 - uint32_t *); 64 + int (*init)(struct armada_crtc *, struct device *); 65 + int (*compute_clock)(struct armada_crtc *, 66 + const struct drm_display_mode *, 67 + uint32_t *); 68 68 }; 69 69 70 70 /* Variant ops */ 71 71 extern const struct armada_variant armada510_ops; 72 72 73 73 struct armada_private { 74 - const struct armada_variant *variant; 75 74 struct work_struct fb_unref_work; 76 75 DECLARE_KFIFO(fb_unref, struct drm_framebuffer *, 8); 77 76 struct drm_fb_helper *fbdev;
+3 -2
drivers/gpu/drm/armada/armada_drv.c
··· 85 85 static int armada_drm_load(struct drm_device *dev, unsigned long flags) 86 86 { 87 87 const struct platform_device_id *id; 88 + const struct armada_variant *variant; 88 89 struct armada_private *priv; 89 90 struct resource *res[ARRAY_SIZE(priv->dcrtc)]; 90 91 struct resource *mem = NULL; ··· 129 128 if (!id) 130 129 return -ENXIO; 131 130 132 - priv->variant = (struct armada_variant *)id->driver_data; 131 + variant = (const struct armada_variant *)id->driver_data; 133 132 134 133 INIT_WORK(&priv->fb_unref_work, armada_drm_unref_work); 135 134 INIT_KFIFO(priv->fb_unref); ··· 161 160 if (irq < 0) 162 161 goto err_kms; 163 162 164 - ret = armada_drm_crtc_create(dev, res[n], irq); 163 + ret = armada_drm_crtc_create(dev, res[n], irq, variant); 165 164 if (ret) 166 165 goto err_kms; 167 166 }