tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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b43: handle BCMA in bus switches

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

authored by

Rafał Miłecki and committed by
John W. Linville 42c9a458 6cbab0d9

+90
+68
drivers/net/wireless/b43/main.c
··· 1155 1155 } 1156 1156 } 1157 1157 1158 + #ifdef CONFIG_B43_BCMA 1159 + static void b43_bcma_wireless_core_reset(struct b43_wldev *dev, bool gmode) 1160 + { 1161 + u32 flags = 0; 1162 + 1163 + if (gmode) 1164 + flags = B43_BCMA_IOCTL_GMODE; 1165 + flags |= B43_BCMA_IOCTL_PHY_CLKEN; 1166 + flags |= B43_BCMA_IOCTL_PHY_BW_20MHZ; /* Make 20 MHz def */ 1167 + b43_device_enable(dev, flags); 1168 + 1169 + /* TODO: reset PHY */ 1170 + } 1171 + #endif 1172 + 1158 1173 static void b43_ssb_wireless_core_reset(struct b43_wldev *dev, bool gmode) 1159 1174 { 1160 1175 struct ssb_device *sdev = dev->dev->sdev; ··· 1203 1188 u32 macctl; 1204 1189 1205 1190 switch (dev->dev->bus_type) { 1191 + #ifdef CONFIG_B43_BCMA 1192 + case B43_BUS_BCMA: 1193 + b43_bcma_wireless_core_reset(dev, gmode); 1194 + break; 1195 + #endif 1206 1196 #ifdef CONFIG_B43_SSB 1207 1197 case B43_BUS_SSB: 1208 1198 b43_ssb_wireless_core_reset(dev, gmode); ··· 2651 2631 mask |= 0x0010; /* FIXME: This is redundant. */ 2652 2632 2653 2633 switch (dev->dev->bus_type) { 2634 + #ifdef CONFIG_B43_BCMA 2635 + case B43_BUS_BCMA: 2636 + bcma_cc_write32(&dev->dev->bdev->bus->drv_cc, BCMA_CC_GPIOCTL, 2637 + (bcma_cc_read32(&dev->dev->bdev->bus->drv_cc, 2638 + BCMA_CC_GPIOCTL) & mask) | set); 2639 + break; 2640 + #endif 2654 2641 #ifdef CONFIG_B43_SSB 2655 2642 case B43_BUS_SSB: 2656 2643 gpiodev = b43_ssb_gpio_dev(dev); ··· 2678 2651 struct ssb_device *gpiodev; 2679 2652 2680 2653 switch (dev->dev->bus_type) { 2654 + #ifdef CONFIG_B43_BCMA 2655 + case B43_BUS_BCMA: 2656 + bcma_cc_write32(&dev->dev->bdev->bus->drv_cc, BCMA_CC_GPIOCTL, 2657 + 0); 2658 + break; 2659 + #endif 2681 2660 #ifdef CONFIG_B43_SSB 2682 2661 case B43_BUS_SSB: 2683 2662 gpiodev = b43_ssb_gpio_dev(dev); ··· 2766 2733 u32 tmp; 2767 2734 2768 2735 switch (dev->dev->bus_type) { 2736 + #ifdef CONFIG_B43_BCMA 2737 + case B43_BUS_BCMA: 2738 + tmp = bcma_read32(dev->dev->bdev, BCMA_IOCTL); 2739 + if (on) 2740 + tmp |= B43_BCMA_IOCTL_MACPHYCLKEN; 2741 + else 2742 + tmp &= ~B43_BCMA_IOCTL_MACPHYCLKEN; 2743 + bcma_write32(dev->dev->bdev, BCMA_IOCTL, tmp); 2744 + break; 2745 + #endif 2769 2746 #ifdef CONFIG_B43_SSB 2770 2747 case B43_BUS_SSB: 2771 2748 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); ··· 3026 2983 b43_mac_phy_clock_set(dev, true); 3027 2984 3028 2985 switch (dev->dev->bus_type) { 2986 + #ifdef CONFIG_B43_BCMA 2987 + case B43_BUS_BCMA: 2988 + /* FIXME: 0xE74 is quite common, but should be read from CC */ 2989 + b43_write16(dev, B43_MMIO_POWERUP_DELAY, 0xE74); 2990 + break; 2991 + #endif 3029 2992 #ifdef CONFIG_B43_SSB 3030 2993 case B43_BUS_SSB: 3031 2994 b43_write16(dev, B43_MMIO_POWERUP_DELAY, ··· 3557 3508 u32 tmp; 3558 3509 3559 3510 switch (dev->dev->bus_type) { 3511 + #ifdef CONFIG_B43_BCMA 3512 + case B43_BUS_BCMA: 3513 + b43err(dev->wl, 3514 + "Putting PHY into reset not supported on BCMA\n"); 3515 + break; 3516 + #endif 3560 3517 #ifdef CONFIG_B43_SSB 3561 3518 case B43_BUS_SSB: 3562 3519 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); ··· 4459 4404 4460 4405 /* Enable IRQ routing to this device. */ 4461 4406 switch (dev->dev->bus_type) { 4407 + #ifdef CONFIG_B43_BCMA 4408 + case B43_BUS_BCMA: 4409 + bcma_core_pci_irq_ctl(&dev->dev->bdev->bus->drv_pci, 4410 + dev->dev->bdev, true); 4411 + break; 4412 + #endif 4462 4413 #ifdef CONFIG_B43_SSB 4463 4414 case B43_BUS_SSB: 4464 4415 ssb_pcicore_dev_irqvecs_enable(&dev->dev->sdev->bus->pcicore, ··· 4895 4834 4896 4835 /* Get the PHY type. */ 4897 4836 switch (dev->dev->bus_type) { 4837 + #ifdef CONFIG_B43_BCMA 4838 + case B43_BUS_BCMA: 4839 + /* FIXME */ 4840 + have_2ghz_phy = 1; 4841 + have_5ghz_phy = 0; 4842 + break; 4843 + #endif 4898 4844 #ifdef CONFIG_B43_SSB 4899 4845 case B43_BUS_SSB: 4900 4846 if (dev->dev->core_rev >= 5) {
+22
drivers/net/wireless/b43/phy_n.c
··· 609 609 return; 610 610 611 611 switch (dev->dev->bus_type) { 612 + #ifdef CONFIG_B43_BCMA 613 + case B43_BUS_BCMA: 614 + tmp = bcma_read32(dev->dev->bdev, BCMA_IOCTL); 615 + if (force) 616 + tmp |= BCMA_IOCTL_FGC; 617 + else 618 + tmp &= ~BCMA_IOCTL_FGC; 619 + bcma_write32(dev->dev->bdev, BCMA_IOCTL, tmp); 620 + break; 621 + #endif 612 622 #ifdef CONFIG_B43_SSB 613 623 case B43_BUS_SSB: 614 624 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); ··· 975 965 b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0); 976 966 977 967 switch (dev->dev->bus_type) { 968 + #ifdef CONFIG_B43_BCMA 969 + case B43_BUS_BCMA: 970 + bcma_chipco_gpio_control(&dev->dev->bdev->bus->drv_cc, 971 + 0xFC00, 0xFC00); 972 + break; 973 + #endif 978 974 #ifdef CONFIG_B43_SSB 979 975 case B43_BUS_SSB: 980 976 ssb_chipco_gpio_control(&dev->dev->sdev->bus->chipco, ··· 3630 3614 (sprom->boardflags_lo & B43_BFL_EXTLNA) && 3631 3615 (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) { 3632 3616 switch (dev->dev->bus_type) { 3617 + #ifdef CONFIG_B43_BCMA 3618 + case B43_BUS_BCMA: 3619 + bcma_cc_set32(&dev->dev->bdev->bus->drv_cc, 3620 + BCMA_CC_CHIPCTL, 0x40); 3621 + break; 3622 + #endif 3633 3623 #ifdef CONFIG_B43_SSB 3634 3624 case B43_BUS_SSB: 3635 3625 chipco_set32(&dev->dev->sdev->bus->chipco,