tjh.dev / kernel
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MIPS: Alchemy: remove SOC_AU1X00 in favor of MIPS_ALCHEMY

Remove the CONFIG_SOC_AU1X00 Kconfig symbol since its job can also be done
by MACH_ALCHEMY, now renamed to MIPS_ALCHEMY.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/1461/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by

Manuel Lauss and committed by
Ralf Baechle 42a4f17d 745aef5d

+33 -51
+10 -1
arch/mips/Kconfig
··· 23 23 prompt "System type" 24 24 default SGI_IP22 25 25 26 - config MACH_ALCHEMY 26 + config MIPS_ALCHEMY 27 27 bool "Alchemy processor based machines" 28 + select 64BIT_PHYS_ADDR 29 + select CEVT_R4K_LIB 30 + select CSRC_R4K_LIB 31 + select IRQ_CPU 32 + select SYS_HAS_CPU_MIPS32_R1 33 + select SYS_SUPPORTS_32BIT_KERNEL 34 + select SYS_SUPPORTS_APM_EMULATION 35 + select GENERIC_GPIO 36 + select ARCH_WANT_OPTIONAL_GPIOLIB 28 37 select SYS_SUPPORTS_ZBOOT 29 38 30 39 config AR7
+1 -18
arch/mips/alchemy/Kconfig
··· 11 11 12 12 choice 13 13 prompt "Machine type" 14 - depends on MACH_ALCHEMY 14 + depends on MIPS_ALCHEMY 15 15 default MIPS_DB1000 16 16 17 17 config MIPS_MTX1 ··· 132 132 133 133 config SOC_AU1000 134 134 bool 135 - select SOC_AU1X00 136 135 select ALCHEMY_GPIOINT_AU1000 137 136 138 137 config SOC_AU1100 139 138 bool 140 - select SOC_AU1X00 141 139 select ALCHEMY_GPIOINT_AU1000 142 140 143 141 config SOC_AU1500 144 142 bool 145 - select SOC_AU1X00 146 143 select ALCHEMY_GPIOINT_AU1000 147 144 148 145 config SOC_AU1550 149 146 bool 150 - select SOC_AU1X00 151 147 select ALCHEMY_GPIOINT_AU1000 152 148 153 149 config SOC_AU1200 154 150 bool 155 - select SOC_AU1X00 156 151 select ALCHEMY_GPIOINT_AU1000 157 - 158 - config SOC_AU1X00 159 - bool 160 - select 64BIT_PHYS_ADDR 161 - select CEVT_R4K_LIB 162 - select CSRC_R4K_LIB 163 - select IRQ_CPU 164 - select SYS_HAS_CPU_MIPS32_R1 165 - select SYS_SUPPORTS_32BIT_KERNEL 166 - select SYS_SUPPORTS_APM_EMULATION 167 - select GENERIC_GPIO 168 - select ARCH_WANT_OPTIONAL_GPIOLIB
+2 -2
arch/mips/alchemy/Platform
··· 1 1 # 2 2 # Core Alchemy code 3 3 # 4 - platform-$(CONFIG_MACH_ALCHEMY) += alchemy/common/ 4 + platform-$(CONFIG_MIPS_ALCHEMY) += alchemy/common/ 5 5 6 6 7 7 # ··· 106 106 # compiler picks the board one. If they don't, it will make sure 107 107 # the alchemy generic gpio header is picked up. 108 108 109 - cflags-$(CONFIG_MACH_ALCHEMY) += -I$(srctree)/arch/mips/include/asm/mach-au1x00 109 + cflags-$(CONFIG_MIPS_ALCHEMY) += -I$(srctree)/arch/mips/include/asm/mach-au1x00
+1 -1
arch/mips/boot/compressed/Makefile
··· 40 40 41 41 ifdef CONFIG_DEBUG_ZBOOT 42 42 vmlinuzobjs-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART16550) += $(obj)/uart-16550.o 43 - vmlinuzobjs-$(CONFIG_MACH_ALCHEMY) += $(obj)/uart-alchemy.o 43 + vmlinuzobjs-$(CONFIG_MIPS_ALCHEMY) += $(obj)/uart-alchemy.o 44 44 endif 45 45 46 46 targets += vmlinux.bin
+1 -2
arch/mips/configs/db1000_defconfig
··· 8 8 # 9 9 # Machine selection 10 10 # 11 - CONFIG_MACH_ALCHEMY=y 11 + CONFIG_MIPS_ALCHEMY=y 12 12 # CONFIG_AR7 is not set 13 13 # CONFIG_BCM47XX is not set 14 14 # CONFIG_BCM63XX is not set ··· 64 64 # CONFIG_MIPS_PB1550 is not set 65 65 # CONFIG_MIPS_XXS1500 is not set 66 66 CONFIG_SOC_AU1000=y 67 - CONFIG_SOC_AU1X00=y 68 67 CONFIG_LOONGSON_UART_BASE=y 69 68 CONFIG_RWSEM_GENERIC_SPINLOCK=y 70 69 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+1 -2
arch/mips/configs/db1100_defconfig
··· 8 8 # 9 9 # Machine selection 10 10 # 11 - CONFIG_MACH_ALCHEMY=y 11 + CONFIG_MIPS_ALCHEMY=y 12 12 # CONFIG_AR7 is not set 13 13 # CONFIG_BCM47XX is not set 14 14 # CONFIG_BCM63XX is not set ··· 64 64 # CONFIG_MIPS_PB1550 is not set 65 65 # CONFIG_MIPS_XXS1500 is not set 66 66 CONFIG_SOC_AU1100=y 67 - CONFIG_SOC_AU1X00=y 68 67 CONFIG_LOONGSON_UART_BASE=y 69 68 CONFIG_RWSEM_GENERIC_SPINLOCK=y 70 69 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+1 -2
arch/mips/configs/db1200_defconfig
··· 8 8 # 9 9 # Machine selection 10 10 # 11 - CONFIG_MACH_ALCHEMY=y 11 + CONFIG_MIPS_ALCHEMY=y 12 12 # CONFIG_AR7 is not set 13 13 # CONFIG_BCM47XX is not set 14 14 # CONFIG_BCM63XX is not set ··· 64 64 # CONFIG_MIPS_PB1550 is not set 65 65 # CONFIG_MIPS_XXS1500 is not set 66 66 CONFIG_SOC_AU1200=y 67 - CONFIG_SOC_AU1X00=y 68 67 CONFIG_LOONGSON_UART_BASE=y 69 68 CONFIG_RWSEM_GENERIC_SPINLOCK=y 70 69 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+1 -2
arch/mips/configs/db1500_defconfig
··· 8 8 # 9 9 # Machine selection 10 10 # 11 - CONFIG_MACH_ALCHEMY=y 11 + CONFIG_MIPS_ALCHEMY=y 12 12 # CONFIG_AR7 is not set 13 13 # CONFIG_BCM47XX is not set 14 14 # CONFIG_BCM63XX is not set ··· 64 64 # CONFIG_MIPS_PB1550 is not set 65 65 # CONFIG_MIPS_XXS1500 is not set 66 66 CONFIG_SOC_AU1500=y 67 - CONFIG_SOC_AU1X00=y 68 67 CONFIG_LOONGSON_UART_BASE=y 69 68 CONFIG_RWSEM_GENERIC_SPINLOCK=y 70 69 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+1 -2
arch/mips/configs/db1550_defconfig
··· 8 8 # 9 9 # Machine selection 10 10 # 11 - CONFIG_MACH_ALCHEMY=y 11 + CONFIG_MIPS_ALCHEMY=y 12 12 # CONFIG_AR7 is not set 13 13 # CONFIG_BCM47XX is not set 14 14 # CONFIG_BCM63XX is not set ··· 64 64 # CONFIG_MIPS_PB1550 is not set 65 65 # CONFIG_MIPS_XXS1500 is not set 66 66 CONFIG_SOC_AU1550=y 67 - CONFIG_SOC_AU1X00=y 68 67 CONFIG_LOONGSON_UART_BASE=y 69 68 CONFIG_RWSEM_GENERIC_SPINLOCK=y 70 69 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+1 -2
arch/mips/configs/mtx1_defconfig
··· 8 8 # 9 9 # Machine selection 10 10 # 11 - CONFIG_MACH_ALCHEMY=y 11 + CONFIG_MIPS_ALCHEMY=y 12 12 # CONFIG_AR7 is not set 13 13 # CONFIG_BCM47XX is not set 14 14 # CONFIG_BCM63XX is not set ··· 64 64 # CONFIG_MIPS_PB1550 is not set 65 65 # CONFIG_MIPS_XXS1500 is not set 66 66 CONFIG_SOC_AU1500=y 67 - CONFIG_SOC_AU1X00=y 68 67 CONFIG_LOONGSON_UART_BASE=y 69 68 CONFIG_RWSEM_GENERIC_SPINLOCK=y 70 69 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+1 -2
arch/mips/configs/pb1100_defconfig
··· 8 8 # 9 9 # Machine selection 10 10 # 11 - CONFIG_MACH_ALCHEMY=y 11 + CONFIG_MIPS_ALCHEMY=y 12 12 # CONFIG_AR7 is not set 13 13 # CONFIG_BCM47XX is not set 14 14 # CONFIG_BCM63XX is not set ··· 64 64 # CONFIG_MIPS_PB1550 is not set 65 65 # CONFIG_MIPS_XXS1500 is not set 66 66 CONFIG_SOC_AU1100=y 67 - CONFIG_SOC_AU1X00=y 68 67 CONFIG_LOONGSON_UART_BASE=y 69 68 CONFIG_RWSEM_GENERIC_SPINLOCK=y 70 69 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+1 -2
arch/mips/configs/pb1200_defconfig
··· 8 8 # 9 9 # Machine selection 10 10 # 11 - CONFIG_MACH_ALCHEMY=y 11 + CONFIG_MIPS_ALCHEMY=y 12 12 # CONFIG_AR7 is not set 13 13 # CONFIG_BCM47XX is not set 14 14 # CONFIG_BCM63XX is not set ··· 64 64 # CONFIG_MIPS_PB1550 is not set 65 65 # CONFIG_MIPS_XXS1500 is not set 66 66 CONFIG_SOC_AU1200=y 67 - CONFIG_SOC_AU1X00=y 68 67 CONFIG_LOONGSON_UART_BASE=y 69 68 CONFIG_RWSEM_GENERIC_SPINLOCK=y 70 69 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+1 -2
arch/mips/configs/pb1500_defconfig
··· 8 8 # 9 9 # Machine selection 10 10 # 11 - CONFIG_MACH_ALCHEMY=y 11 + CONFIG_MIPS_ALCHEMY=y 12 12 # CONFIG_AR7 is not set 13 13 # CONFIG_BCM47XX is not set 14 14 # CONFIG_BCM63XX is not set ··· 64 64 # CONFIG_MIPS_PB1550 is not set 65 65 # CONFIG_MIPS_XXS1500 is not set 66 66 CONFIG_SOC_AU1500=y 67 - CONFIG_SOC_AU1X00=y 68 67 CONFIG_LOONGSON_UART_BASE=y 69 68 CONFIG_RWSEM_GENERIC_SPINLOCK=y 70 69 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+1 -2
arch/mips/configs/pb1550_defconfig
··· 8 8 # 9 9 # Machine selection 10 10 # 11 - CONFIG_MACH_ALCHEMY=y 11 + CONFIG_MIPS_ALCHEMY=y 12 12 # CONFIG_AR7 is not set 13 13 # CONFIG_BCM47XX is not set 14 14 # CONFIG_BCM63XX is not set ··· 64 64 CONFIG_MIPS_PB1550=y 65 65 # CONFIG_MIPS_XXS1500 is not set 66 66 CONFIG_SOC_AU1550=y 67 - CONFIG_SOC_AU1X00=y 68 67 CONFIG_LOONGSON_UART_BASE=y 69 68 CONFIG_RWSEM_GENERIC_SPINLOCK=y 70 69 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+2 -2
arch/mips/include/asm/hazards.h
··· 87 87 : "=r" (tmp)); \ 88 88 } while (0) 89 89 90 - #elif defined(CONFIG_CPU_MIPSR1) && !defined(CONFIG_MACH_ALCHEMY) 90 + #elif defined(CONFIG_CPU_MIPSR1) && !defined(CONFIG_MIPS_ALCHEMY) 91 91 92 92 /* 93 93 * These are slightly complicated by the fact that we guarantee R1 kernels to ··· 138 138 __instruction_hazard(); \ 139 139 } while (0) 140 140 141 - #elif defined(CONFIG_MACH_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \ 141 + #elif defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \ 142 142 defined(CONFIG_CPU_LOONGSON2) || defined(CONFIG_CPU_R10000) || \ 143 143 defined(CONFIG_CPU_R5500) 144 144
+1 -1
drivers/net/Kconfig
··· 484 484 485 485 config MIPS_AU1X00_ENET 486 486 tristate "MIPS AU1000 Ethernet support" 487 - depends on SOC_AU1X00 487 + depends on MIPS_ALCHEMY 488 488 select PHYLIB 489 489 select CRC32 490 490 help
+2 -2
drivers/pcmcia/Kconfig
··· 157 157 158 158 config PCMCIA_AU1X00 159 159 tristate "Au1x00 pcmcia support" 160 - depends on SOC_AU1X00 && PCMCIA 160 + depends on MIPS_ALCHEMY && PCMCIA 161 161 162 162 config PCMCIA_ALCHEMY_DEVBOARD 163 163 tristate "Alchemy Db/Pb1xxx PCMCIA socket services" 164 - depends on SOC_AU1X00 && PCMCIA 164 + depends on MIPS_ALCHEMY && PCMCIA 165 165 select 64BIT_PHYS_ADDR 166 166 help 167 167 Enable this driver of you want PCMCIA support on your Alchemy
+1 -1
drivers/rtc/Kconfig
··· 774 774 775 775 config RTC_DRV_AU1XXX 776 776 tristate "Au1xxx Counter0 RTC support" 777 - depends on SOC_AU1X00 777 + depends on MIPS_ALCHEMY 778 778 help 779 779 This is a driver for the Au1xxx on-chip Counter0 (Time-Of-Year 780 780 counter) to be used as a RTC.
+1 -1
drivers/serial/Kconfig
··· 260 260 261 261 config SERIAL_8250_AU1X00 262 262 bool "Au1x00 serial port support" 263 - depends on SERIAL_8250 != n && SOC_AU1X00 263 + depends on SERIAL_8250 != n && MIPS_ALCHEMY 264 264 help 265 265 If you have an Au1x00 SOC based board and want to use the serial port, 266 266 say Y to this option. The driver can handle up to 4 serial ports,
+1 -1
drivers/usb/Kconfig
··· 45 45 default y if STB03xxx 46 46 default y if PPC_MPC52xx 47 47 # MIPS: 48 - default y if SOC_AU1X00 48 + default y if MIPS_ALCHEMY 49 49 # SH: 50 50 default y if CPU_SUBTYPE_SH7720 51 51 default y if CPU_SUBTYPE_SH7721
+1 -1
drivers/usb/host/ohci-hcd.c
··· 1031 1031 #define PLATFORM_DRIVER ohci_hcd_ep93xx_driver 1032 1032 #endif 1033 1033 1034 - #ifdef CONFIG_SOC_AU1X00 1034 + #ifdef CONFIG_MIPS_ALCHEMY 1035 1035 #include "ohci-au1xxx.c" 1036 1036 #define PLATFORM_DRIVER ohci_hcd_au1xxx_driver 1037 1037 #endif