Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

[media] au8522: rework setup of audio routing

The original code was based on my reverse engineering of an I2C trace
of the Windows driver. Now that I know what the registers actually do,
restructure the code a bit, removing some unneeded register programming
and fixing the sequencing of operations.

This reduces the time it takes to change inputs from 1300ms down to
600ms (as measured by "time v4l2-ctl -i 0")

Note this does not address outstanding issues related to the management
of the module clocks and power control for the various blocks, which
will be done in a separate patch.

Signed-off-by: Devin Heitmueller <dheitmueller@kernellabs.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>

authored by

Devin Heitmueller and committed by
Mauro Carvalho Chehab
427de05c bb750c7b

+15 -14
+15 -14
drivers/media/dvb-frontends/au8522_decoder.c
··· 418 418 lpfilter_coef[i].reg_val[0]); 419 419 } 420 420 421 - /* Setup audio */ 422 - au8522_writereg(state, AU8522_AUDIO_VOLUME_L_REG0F2H, 0x00); 423 - au8522_writereg(state, AU8522_AUDIO_VOLUME_R_REG0F3H, 0x00); 424 - au8522_writereg(state, AU8522_AUDIO_VOLUME_REG0F4H, 0x00); 425 - msleep(150); 426 - au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, 0x00); 427 - msleep(10); 428 - au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, 429 - AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS); 430 - msleep(50); 421 + /* Set the volume */ 431 422 au8522_writereg(state, AU8522_AUDIO_VOLUME_L_REG0F2H, 0x7F); 432 423 au8522_writereg(state, AU8522_AUDIO_VOLUME_R_REG0F3H, 0x7F); 433 424 au8522_writereg(state, AU8522_AUDIO_VOLUME_REG0F4H, 0xff); 434 - msleep(80); 435 - au8522_writereg(state, AU8522_AUDIO_VOLUME_L_REG0F2H, 0x7F); 436 - au8522_writereg(state, AU8522_AUDIO_VOLUME_R_REG0F3H, 0x7F); 425 + 426 + /* Not sure what this does */ 437 427 au8522_writereg(state, AU8522_REG0F9H, AU8522_REG0F9H_AUDIO); 428 + 429 + /* Setup the audio mode to stereo DBX */ 438 430 au8522_writereg(state, AU8522_AUDIO_MODE_REG0F1H, 0x82); 439 431 msleep(70); 440 - au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H, 0x09); 432 + 433 + /* Start the audio processing module */ 434 + au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, 0x9d); 435 + 436 + /* Set the audio frequency to 48 KHz */ 441 437 au8522_writereg(state, AU8522_AUDIOFREQ_REG606H, 0x03); 438 + 439 + /* Set the I2S parameters (WS, LSB, mode, sample rate */ 442 440 au8522_writereg(state, AU8522_I2S_CTRL_2_REG112H, 0xc2); 441 + 442 + /* Enable the I2S output */ 443 + au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H, 0x09); 443 444 } 444 445 445 446 /* ----------------------------------------------------------------------- */