Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm: (30 commits)
[ARM] Acorn: move the i2c bus driver into drivers/i2c
[ARM] ARM SCSI: Don't try to dma_map_sg too many scatterlist entries
[ARM] ARM FAS216: don't modify scsi_cmnd request_bufflen
[ARM] rtc-pcf8583: Final fixes for this RTC on RiscPC
[ARM] rtc-pcf8583: correct month and year offsets
[ARM] rtc-pcf8583: don't use BCD_TO_BIN/BIN_TO_BCD
[ARM] EBSA110: Work around build errors
[ARM] 4241/1: Define mb() as compiler barrier on a uniprocessor system
[ARM] 4239/1: S3C24XX: Update kconfig entries for PM
[ARM] 4238/1: S3C24XX: docs: update suspend and resume
[ARM] 4237/2: oprofile: Always allow backtraces on ARM
[ARM] Yet more asm/apm-emulation.h stuff
ARM: OMAP: Add missing get_irqnr_preamble and arch_ret_to_user for omap2
ARM: OMAP: Use linux/delay.h not asm/delay.h
ARM: OMAP: Remove obsolete alsa typedefs
ARM: OMAP: omap1510->15xx conversions needed for sx1
ARM: OMAP: Add missing includes to board-nokia770
ARM: OMAP: Workqueue changes for board-h4.c
ARM: OMAP: dmtimer.c omap1 register fix
ARM: OMAP: board-nokia770: correct lcd name
...

+280 -802
+33 -2
Documentation/arm/Samsung-S3C24XX/Suspend.txt
··· 5 Introduction 6 ------------ 7 8 - The S3C2410 supports a low-power suspend mode, where the SDRAM is kept 9 in Self-Refresh mode, and all but the essential peripheral blocks are 10 powered down. For more information on how this works, please look 11 - at the S3C2410 datasheets from Samsung. 12 13 14 Requirements ··· 56 Note, the original method of adding an late_initcall() is wrong, 57 and will end up initialising all compiled machines' pm init! 58 59 60 Debugging 61 --------- ··· 90 2) Whilst the pm code itself will attempt to re-enable the UART clocks, 91 care should be taken that any external clock sources that the UARTs 92 rely on are still enabled at that point. 93 94 95 Configuration ··· 115 116 Allows the entire memory to be checksummed before and after the 117 suspend to see if there has been any corruption of the contents. 118 119 This support requires the CRC32 function to be enabled. 120
··· 5 Introduction 6 ------------ 7 8 + The S3C24XX supports a low-power suspend mode, where the SDRAM is kept 9 in Self-Refresh mode, and all but the essential peripheral blocks are 10 powered down. For more information on how this works, please look 11 + at the relevant CPU datasheet from Samsung. 12 13 14 Requirements ··· 56 Note, the original method of adding an late_initcall() is wrong, 57 and will end up initialising all compiled machines' pm init! 58 59 + The following is an example of code used for testing wakeup from 60 + an falling edge on IRQ_EINT0: 61 + 62 + 63 + static irqreturn_t button_irq(int irq, void *pw) 64 + { 65 + return IRQ_HANDLED; 66 + } 67 + 68 + statuc void __init machine_init(void) 69 + { 70 + ... 71 + 72 + request_irq(IRQ_EINT0, button_irq, IRQF_TRIGGER_FALLING, 73 + "button-irq-eint0", NULL); 74 + 75 + enable_irq_wake(IRQ_EINT0); 76 + 77 + s3c2410_pm_init(); 78 + } 79 + 80 81 Debugging 82 --------- ··· 69 2) Whilst the pm code itself will attempt to re-enable the UART clocks, 70 care should be taken that any external clock sources that the UARTs 71 rely on are still enabled at that point. 72 + 73 + 3) If any debugging is placed in the resume path, then it must have the 74 + relevant clocks and peripherals setup before use (ie, bootloader). 75 + 76 + For example, if you transmit a character from the UART, the baud 77 + rate and uart controls must be setup beforehand. 78 79 80 Configuration ··· 88 89 Allows the entire memory to be checksummed before and after the 90 suspend to see if there has been any corruption of the contents. 91 + 92 + Note, the time to calculate the CRC is dependant on the CPU speed 93 + and the size of memory. For an 64Mbyte RAM area on an 200MHz 94 + S3C2410, this can take approximately 4 seconds to complete. 95 96 This support requires the CRC32 function to be enabled. 97
+1
arch/arm/Kconfig
··· 190 config ARCH_EBSA110 191 bool "EBSA-110" 192 select ISA 193 help 194 This is an evaluation board for the StrongARM processor available 195 from Digital. It has limited hardware on-board, including an
··· 190 config ARCH_EBSA110 191 bool "EBSA-110" 192 select ISA 193 + select NO_IOPORT 194 help 195 This is an evaluation board for the StrongARM processor available 196 from Digital. It has limited hardware on-board, including an
+3 -1
arch/arm/mach-omap1/board-nokia770.c
··· 16 17 #include <linux/spi/spi.h> 18 #include <linux/spi/ads7846.h> 19 20 #include <asm/hardware.h> 21 #include <asm/mach-types.h> ··· 105 106 static struct spi_board_info nokia770_spi_board_info[] __initdata = { 107 [0] = { 108 - .modalias = "lcd_lph8923", 109 .bus_num = 2, 110 .chip_select = 3, 111 .max_speed_hz = 12000000,
··· 16 17 #include <linux/spi/spi.h> 18 #include <linux/spi/ads7846.h> 19 + #include <linux/workqueue.h> 20 + #include <linux/delay.h> 21 22 #include <asm/hardware.h> 23 #include <asm/mach-types.h> ··· 103 104 static struct spi_board_info nokia770_spi_board_info[] __initdata = { 105 [0] = { 106 + .modalias = "lcd_mipid", 107 .bus_num = 2, 108 .chip_select = 3, 109 .max_speed_hz = 12000000,
+13 -7
arch/arm/mach-omap1/clock.c
··· 432 } 433 434 if (clk->flags & CLOCK_NO_IDLE_PARENT) 435 - if (!cpu_is_omap24xx()) 436 - omap1_clk_deny_idle(clk->parent); 437 } 438 439 ret = clk->enable(clk); ··· 453 if (likely(clk->parent)) { 454 omap1_clk_disable(clk->parent); 455 if (clk->flags & CLOCK_NO_IDLE_PARENT) 456 - if (!cpu_is_omap24xx()) 457 - omap1_clk_allow_idle(clk->parent); 458 } 459 } 460 } ··· 469 if (unlikely(clk->enable_reg == 0)) { 470 printk(KERN_ERR "clock.c: Enable for %s without enable code\n", 471 clk->name); 472 - return 0; 473 } 474 475 if (clk->flags & ENABLE_REG_32BIT) { ··· 649 int crystal_type = 0; /* Default 12 MHz */ 650 u32 reg; 651 652 /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */ 653 reg = omap_readw(SOFT_REQ_REG) & (1 << 4); 654 omap_writew(reg, SOFT_REQ_REG); 655 - omap_writew(0, SOFT_REQ_REG2); 656 657 clk_init(&omap1_clk_functions); 658 ··· 691 692 info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config); 693 if (info != NULL) { 694 - if (!cpu_is_omap1510()) 695 crystal_type = info->system_clock_type; 696 } 697
··· 432 } 433 434 if (clk->flags & CLOCK_NO_IDLE_PARENT) 435 + omap1_clk_deny_idle(clk->parent); 436 } 437 438 ret = clk->enable(clk); ··· 454 if (likely(clk->parent)) { 455 omap1_clk_disable(clk->parent); 456 if (clk->flags & CLOCK_NO_IDLE_PARENT) 457 + omap1_clk_allow_idle(clk->parent); 458 } 459 } 460 } ··· 471 if (unlikely(clk->enable_reg == 0)) { 472 printk(KERN_ERR "clock.c: Enable for %s without enable code\n", 473 clk->name); 474 + return -EINVAL; 475 } 476 477 if (clk->flags & ENABLE_REG_32BIT) { ··· 651 int crystal_type = 0; /* Default 12 MHz */ 652 u32 reg; 653 654 + #ifdef CONFIG_DEBUG_LL 655 + /* Resets some clocks that may be left on from bootloader, 656 + * but leaves serial clocks on. 657 + */ 658 + omap_writel(0x3 << 29, MOD_CONF_CTRL_0); 659 + #endif 660 + 661 /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */ 662 reg = omap_readw(SOFT_REQ_REG) & (1 << 4); 663 omap_writew(reg, SOFT_REQ_REG); 664 + if (!cpu_is_omap15xx()) 665 + omap_writew(0, SOFT_REQ_REG2); 666 667 clk_init(&omap1_clk_functions); 668 ··· 685 686 info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config); 687 if (info != NULL) { 688 + if (!cpu_is_omap15xx()) 689 crystal_type = info->system_clock_type; 690 } 691
+1 -1
arch/arm/mach-omap1/irq.c
··· 238 239 if (cpu_is_omap730()) 240 omap_unmask_irq(INT_730_IH2_IRQ); 241 - else if (cpu_is_omap1510()) 242 omap_unmask_irq(INT_1510_IH2_IRQ); 243 else if (cpu_is_omap16xx()) 244 omap_unmask_irq(INT_1610_IH2_IRQ);
··· 238 239 if (cpu_is_omap730()) 240 omap_unmask_irq(INT_730_IH2_IRQ); 241 + else if (cpu_is_omap15xx()) 242 omap_unmask_irq(INT_1510_IH2_IRQ); 243 else if (cpu_is_omap16xx()) 244 omap_unmask_irq(INT_1610_IH2_IRQ);
+9 -3
arch/arm/mach-omap1/pm.c
··· 256 tps65010_set_led(LED1, OFF); 257 } 258 259 - omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG); 260 261 /* 262 * Step 1: turn off interrupts (FIXME: NOTE: already disabled) ··· 435 MPUI1610_RESTORE(OMAP_IH2_3_MIR); 436 } 437 438 - omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG); 439 440 /* 441 * Reenable interrupts ··· 706 707 static int __init omap_pm_init(void) 708 { 709 printk("Power Management for TI OMAP.\n"); 710 711 /* ··· 764 omap_pm_init_proc(); 765 #endif 766 767 - subsys_create_file(&power_subsys, &sleep_while_idle_attr); 768 769 if (cpu_is_omap16xx()) { 770 /* configure LOW_PWR pin */
··· 256 tps65010_set_led(LED1, OFF); 257 } 258 259 + if (!cpu_is_omap15xx()) 260 + omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG); 261 262 /* 263 * Step 1: turn off interrupts (FIXME: NOTE: already disabled) ··· 434 MPUI1610_RESTORE(OMAP_IH2_3_MIR); 435 } 436 437 + if (!cpu_is_omap15xx()) 438 + omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG); 439 440 /* 441 * Reenable interrupts ··· 704 705 static int __init omap_pm_init(void) 706 { 707 + int error; 708 + 709 printk("Power Management for TI OMAP.\n"); 710 711 /* ··· 760 omap_pm_init_proc(); 761 #endif 762 763 + error = subsys_create_file(&power_subsys, &sleep_while_idle_attr); 764 + if (error) 765 + printk(KERN_ERR "subsys_create_file failed: %d\n", error); 766 767 if (cpu_is_omap16xx()) { 768 /* configure LOW_PWR pin */
+9 -9
arch/arm/mach-omap1/serial.c
··· 1 /* 2 * linux/arch/arm/mach-omap1/serial.c 3 * 4 - * OMAP1 CPU identification code 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as ··· 59 omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ 60 omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */ 61 62 - if (!cpu_is_omap1510()) { 63 omap_serial_outp(p, UART_OMAP_SYSC, 0x01); 64 while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01)); 65 } ··· 121 serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2; 122 } 123 124 - if (cpu_is_omap1510()) { 125 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; 126 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; 127 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; ··· 147 printk("Could not get uart1_ck\n"); 148 else { 149 clk_enable(uart1_ck); 150 - if (cpu_is_omap1510()) 151 clk_set_rate(uart1_ck, 12000000); 152 } 153 - if (cpu_is_omap1510()) { 154 omap_cfg_reg(UART1_TX); 155 omap_cfg_reg(UART1_RTS); 156 if (machine_is_omap_innovator()) { ··· 167 printk("Could not get uart2_ck\n"); 168 else { 169 clk_enable(uart2_ck); 170 - if (cpu_is_omap1510()) 171 clk_set_rate(uart2_ck, 12000000); 172 else 173 clk_set_rate(uart2_ck, 48000000); 174 } 175 - if (cpu_is_omap1510()) { 176 omap_cfg_reg(UART2_TX); 177 omap_cfg_reg(UART2_RTS); 178 if (machine_is_omap_innovator()) { ··· 189 printk("Could not get uart3_ck\n"); 190 else { 191 clk_enable(uart3_ck); 192 - if (cpu_is_omap1510()) 193 clk_set_rate(uart3_ck, 12000000); 194 } 195 - if (cpu_is_omap1510()) { 196 omap_cfg_reg(UART3_TX); 197 omap_cfg_reg(UART3_RX); 198 }
··· 1 /* 2 * linux/arch/arm/mach-omap1/serial.c 3 * 4 + * OMAP1 serial support. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as ··· 59 omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ 60 omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */ 61 62 + if (!cpu_is_omap15xx()) { 63 omap_serial_outp(p, UART_OMAP_SYSC, 0x01); 64 while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01)); 65 } ··· 121 serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2; 122 } 123 124 + if (cpu_is_omap15xx()) { 125 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; 126 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; 127 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; ··· 147 printk("Could not get uart1_ck\n"); 148 else { 149 clk_enable(uart1_ck); 150 + if (cpu_is_omap15xx()) 151 clk_set_rate(uart1_ck, 12000000); 152 } 153 + if (cpu_is_omap15xx()) { 154 omap_cfg_reg(UART1_TX); 155 omap_cfg_reg(UART1_RTS); 156 if (machine_is_omap_innovator()) { ··· 167 printk("Could not get uart2_ck\n"); 168 else { 169 clk_enable(uart2_ck); 170 + if (cpu_is_omap15xx()) 171 clk_set_rate(uart2_ck, 12000000); 172 else 173 clk_set_rate(uart2_ck, 48000000); 174 } 175 + if (cpu_is_omap15xx()) { 176 omap_cfg_reg(UART2_TX); 177 omap_cfg_reg(UART2_RTS); 178 if (machine_is_omap_innovator()) { ··· 189 printk("Could not get uart3_ck\n"); 190 else { 191 clk_enable(uart3_ck); 192 + if (cpu_is_omap15xx()) 193 clk_set_rate(uart3_ck, 12000000); 194 } 195 + if (cpu_is_omap15xx()) { 196 omap_cfg_reg(UART3_TX); 197 omap_cfg_reg(UART3_RX); 198 }
+7 -6
arch/arm/mach-omap2/board-h4.c
··· 39 #include "prcm-regs.h" 40 41 #include <asm/io.h> 42 - #include <asm/delay.h> 43 44 static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 }; 45 static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 }; ··· 178 return err; 179 } 180 181 - static void set_trans_mode(void *data) 182 { 183 - int *mode = data; 184 unsigned char expa; 185 int err = 0; 186 ··· 192 193 expa &= ~0x01; 194 195 - if (!(*mode & IR_SIRMODE)) { /* MIR/FIR */ 196 expa |= 0x01; 197 } 198 ··· 205 { 206 struct omap_irda_config *irda_config = dev->platform_data; 207 208 cancel_delayed_work(&irda_config->gpio_expa); 209 - PREPARE_WORK(&irda_config->gpio_expa, set_trans_mode, &mode); 210 - #error this is not permitted - mode is an argument variable 211 schedule_delayed_work(&irda_config->gpio_expa, 0); 212 213 return 0;
··· 39 #include "prcm-regs.h" 40 41 #include <asm/io.h> 42 43 static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 }; 44 static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 }; ··· 179 return err; 180 } 181 182 + static void set_trans_mode(struct work_struct *work) 183 { 184 + struct omap_irda_config *irda_config = 185 + container_of(work, struct omap_irda_config, gpio_expa.work); 186 + int mode = irda_config->mode; 187 unsigned char expa; 188 int err = 0; 189 ··· 191 192 expa &= ~0x01; 193 194 + if (!(mode & IR_SIRMODE)) { /* MIR/FIR */ 195 expa |= 0x01; 196 } 197 ··· 204 { 205 struct omap_irda_config *irda_config = dev->platform_data; 206 207 + irda_config->mode = mode; 208 cancel_delayed_work(&irda_config->gpio_expa); 209 + PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode); 210 schedule_delayed_work(&irda_config->gpio_expa, 0); 211 212 return 0;
+2 -1
arch/arm/mach-omap2/timer-gp.c
··· 24 #include <linux/err.h> 25 #include <linux/clk.h> 26 #include <linux/delay.h> 27 28 #include <asm/mach/time.h> 29 #include <asm/arch/dmtimer.h> ··· 65 BUG_ON(gptimer == NULL); 66 67 omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK); 68 - tick_period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / 100; 69 tick_period -= 1; 70 71 setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
··· 24 #include <linux/err.h> 25 #include <linux/clk.h> 26 #include <linux/delay.h> 27 + #include <linux/irq.h> 28 29 #include <asm/mach/time.h> 30 #include <asm/arch/dmtimer.h> ··· 64 BUG_ON(gptimer == NULL); 65 66 omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK); 67 + tick_period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ; 68 tick_period -= 1; 69 70 setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
+2 -1
arch/arm/mach-pxa/corgi_pm.c
··· 16 #include <linux/delay.h> 17 #include <linux/interrupt.h> 18 #include <linux/platform_device.h> 19 - #include <asm/apm-emulation.h> 20 #include <asm/irq.h> 21 #include <asm/mach-types.h> 22 #include <asm/hardware.h>
··· 16 #include <linux/delay.h> 17 #include <linux/interrupt.h> 18 #include <linux/platform_device.h> 19 + #include <linux/apm-emulation.h> 20 + 21 #include <asm/irq.h> 22 #include <asm/mach-types.h> 23 #include <asm/hardware.h>
+2 -1
arch/arm/mach-pxa/spitz_pm.c
··· 16 #include <linux/delay.h> 17 #include <linux/interrupt.h> 18 #include <linux/platform_device.h> 19 - #include <asm/apm-emulation.h> 20 #include <asm/irq.h> 21 #include <asm/mach-types.h> 22 #include <asm/hardware.h>
··· 16 #include <linux/delay.h> 17 #include <linux/interrupt.h> 18 #include <linux/platform_device.h> 19 + #include <linux/apm-emulation.h> 20 + 21 #include <asm/irq.h> 22 #include <asm/mach-types.h> 23 #include <asm/hardware.h>
+2 -1
arch/arm/oprofile/common.c
··· 131 struct op_arm_model_spec *spec = NULL; 132 int ret = -ENODEV; 133 134 #ifdef CONFIG_CPU_XSCALE 135 spec = &op_xscale_spec; 136 #endif ··· 163 ops->start = op_arm_start; 164 ops->stop = op_arm_stop; 165 ops->cpu_type = op_arm_model->name; 166 - ops->backtrace = arm_backtrace; 167 printk(KERN_INFO "oprofile: using %s\n", spec->name); 168 } 169
··· 131 struct op_arm_model_spec *spec = NULL; 132 int ret = -ENODEV; 133 134 + ops->backtrace = arm_backtrace; 135 + 136 #ifdef CONFIG_CPU_XSCALE 137 spec = &op_xscale_spec; 138 #endif ··· 161 ops->start = op_arm_start; 162 ops->stop = op_arm_stop; 163 ops->cpu_type = op_arm_model->name; 164 printk(KERN_INFO "oprofile: using %s\n", spec->name); 165 } 166
+3 -11
arch/arm/plat-omap/dma.c
··· 557 omap_enable_channel_irq(free_ch); 558 /* Clear the CSR register and IRQ status register */ 559 OMAP_DMA_CSR_REG(free_ch) = OMAP2_DMA_CSR_CLEAR_MASK; 560 - omap_writel(~0x0, OMAP_DMA4_IRQSTATUS_L0); 561 } 562 563 *dma_ch_out = free_ch; ··· 597 598 /* Clear the CSR register and IRQ status register */ 599 OMAP_DMA_CSR_REG(lch) = OMAP2_DMA_CSR_CLEAR_MASK; 600 - 601 - val = omap_readl(OMAP_DMA4_IRQSTATUS_L0); 602 - val |= 1 << lch; 603 - omap_writel(val, OMAP_DMA4_IRQSTATUS_L0); 604 605 /* Disable all DMA interrupts for the channel. */ 606 OMAP_DMA_CICR_REG(lch) = 0; ··· 924 static int omap2_dma_handle_ch(int ch) 925 { 926 u32 status = OMAP_DMA_CSR_REG(ch); 927 - u32 val; 928 929 if (!status) 930 return 0; ··· 944 dma_chan[ch].dev_id); 945 946 OMAP_DMA_CSR_REG(ch) = OMAP2_DMA_CSR_CLEAR_MASK; 947 - 948 - val = omap_readl(OMAP_DMA4_IRQSTATUS_L0); 949 - /* ch in this function is from 0-31 while in register it is 1-32 */ 950 - val = 1 << (ch); 951 - omap_writel(val, OMAP_DMA4_IRQSTATUS_L0); 952 953 if (likely(dma_chan[ch].callback != NULL)) 954 dma_chan[ch].callback(ch, status, dma_chan[ch].data);
··· 557 omap_enable_channel_irq(free_ch); 558 /* Clear the CSR register and IRQ status register */ 559 OMAP_DMA_CSR_REG(free_ch) = OMAP2_DMA_CSR_CLEAR_MASK; 560 + omap_writel(1 << free_ch, OMAP_DMA4_IRQSTATUS_L0); 561 } 562 563 *dma_ch_out = free_ch; ··· 597 598 /* Clear the CSR register and IRQ status register */ 599 OMAP_DMA_CSR_REG(lch) = OMAP2_DMA_CSR_CLEAR_MASK; 600 + omap_writel(1 << lch, OMAP_DMA4_IRQSTATUS_L0); 601 602 /* Disable all DMA interrupts for the channel. */ 603 OMAP_DMA_CICR_REG(lch) = 0; ··· 927 static int omap2_dma_handle_ch(int ch) 928 { 929 u32 status = OMAP_DMA_CSR_REG(ch); 930 931 if (!status) 932 return 0; ··· 948 dma_chan[ch].dev_id); 949 950 OMAP_DMA_CSR_REG(ch) = OMAP2_DMA_CSR_CLEAR_MASK; 951 + omap_writel(1 << ch, OMAP_DMA4_IRQSTATUS_L0); 952 953 if (likely(dma_chan[ch].callback != NULL)) 954 dma_chan[ch].callback(ch, status, dma_chan[ch].data);
+4 -2
arch/arm/plat-omap/dmtimer.c
··· 90 { .phys_base = 0xfffb2c00, .irq = INT_1610_GPTIMER4 }, 91 { .phys_base = 0xfffb3400, .irq = INT_1610_GPTIMER5 }, 92 { .phys_base = 0xfffb3c00, .irq = INT_1610_GPTIMER6 }, 93 - { .phys_base = 0xfffb4400, .irq = INT_1610_GPTIMER7 }, 94 - { .phys_base = 0xfffb4c00, .irq = INT_1610_GPTIMER8 }, 95 }; 96 97 #elif defined(CONFIG_ARCH_OMAP2) ··· 314 __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask) 315 { 316 BUG(); 317 } 318 319 #endif
··· 90 { .phys_base = 0xfffb2c00, .irq = INT_1610_GPTIMER4 }, 91 { .phys_base = 0xfffb3400, .irq = INT_1610_GPTIMER5 }, 92 { .phys_base = 0xfffb3c00, .irq = INT_1610_GPTIMER6 }, 93 + { .phys_base = 0xfffb7400, .irq = INT_1610_GPTIMER7 }, 94 + { .phys_base = 0xfffbd400, .irq = INT_1610_GPTIMER8 }, 95 }; 96 97 #elif defined(CONFIG_ARCH_OMAP2) ··· 314 __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask) 315 { 316 BUG(); 317 + 318 + return 0; 319 } 320 321 #endif
+5 -4
arch/arm/plat-omap/gpio.c
··· 974 }; 975 976 static struct irq_chip mpuio_irq_chip = { 977 - .name = "MPUIO", 978 - .ack = mpuio_ack_irq, 979 - .mask = mpuio_mask_irq, 980 - .unmask = mpuio_unmask_irq 981 }; 982 983 static int initialized;
··· 974 }; 975 976 static struct irq_chip mpuio_irq_chip = { 977 + .name = "MPUIO", 978 + .ack = mpuio_ack_irq, 979 + .mask = mpuio_mask_irq, 980 + .unmask = mpuio_unmask_irq, 981 + .set_type = gpio_irq_type, 982 }; 983 984 static int initialized;
+1 -1
arch/arm/plat-omap/mcbsp.c
··· 20 #include <linux/interrupt.h> 21 #include <linux/err.h> 22 #include <linux/clk.h> 23 24 - #include <asm/delay.h> 25 #include <asm/io.h> 26 #include <asm/irq.h> 27
··· 20 #include <linux/interrupt.h> 21 #include <linux/err.h> 22 #include <linux/clk.h> 23 + #include <linux/delay.h> 24 25 #include <asm/io.h> 26 #include <asm/irq.h> 27
+2 -2
arch/arm/plat-omap/mux.c
··· 116 } 117 118 /* Check for pull up or pull down selection on 1610 */ 119 - if (!cpu_is_omap1510()) { 120 if (cfg->pu_pd_reg && cfg->pull_val) { 121 spin_lock_irqsave(&mux_spin_lock, flags); 122 pu_pd_orig = omap_readl(cfg->pu_pd_reg); ··· 172 printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", 173 cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); 174 175 - if (!cpu_is_omap1510()) { 176 if (cfg->pu_pd_reg && cfg->pull_val) { 177 printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", 178 cfg->pu_pd_name, cfg->pu_pd_reg,
··· 116 } 117 118 /* Check for pull up or pull down selection on 1610 */ 119 + if (!cpu_is_omap15xx()) { 120 if (cfg->pu_pd_reg && cfg->pull_val) { 121 spin_lock_irqsave(&mux_spin_lock, flags); 122 pu_pd_orig = omap_readl(cfg->pu_pd_reg); ··· 172 printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", 173 cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); 174 175 + if (!cpu_is_omap15xx()) { 176 if (cfg->pu_pd_reg && cfg->pull_val) { 177 printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", 178 cfg->pu_pd_name, cfg->pu_pd_reg,
+7
arch/arm/plat-s3c24xx/Kconfig
··· 58 going to sleep. The blocks are then checked on resume for any 59 errors. 60 61 config S3C2410_PM_CHECK_CHUNKSIZE 62 int "S3C2410 PM Suspend CRC Chunksize (KiB)" 63 depends on ARCH_S3C2410 && PM && S3C2410_PM_CHECK ··· 72 corruption over suspend and resume. A smaller value will mean that 73 the CRC data block will take more memory, but wil identify any 74 faults with better precision. 75 76 config S3C2410_LOWLEVEL_UART_PORT 77 int "S3C2410 UART to use for low-level messages"
··· 58 going to sleep. The blocks are then checked on resume for any 59 errors. 60 61 + Note, this can take several seconds depending on memory size 62 + and CPU speed. 63 + 64 + See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> 65 + 66 config S3C2410_PM_CHECK_CHUNKSIZE 67 int "S3C2410 PM Suspend CRC Chunksize (KiB)" 68 depends on ARCH_S3C2410 && PM && S3C2410_PM_CHECK ··· 67 corruption over suspend and resume. A smaller value will mean that 68 the CRC data block will take more memory, but wil identify any 69 faults with better precision. 70 + 71 + See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> 72 73 config S3C2410_LOWLEVEL_UART_PORT 74 int "S3C2410 UART to use for low-level messages"
-1
drivers/acorn/char/Makefile
··· 2 # Makefile for the acorn character device drivers. 3 # 4 5 - obj-$(CONFIG_ARCH_ACORN) += i2c.o pcf8583.o 6 obj-$(CONFIG_L7200_KEYB) += defkeymap-l7200.o keyb_l7200.o
··· 2 # Makefile for the acorn character device drivers. 3 # 4 5 obj-$(CONFIG_L7200_KEYB) += defkeymap-l7200.o keyb_l7200.o
-368
drivers/acorn/char/i2c.c
··· 1 - /* 2 - * linux/drivers/acorn/char/i2c.c 3 - * 4 - * Copyright (C) 2000 Russell King 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License version 2 as 8 - * published by the Free Software Foundation. 9 - * 10 - * ARM IOC/IOMD i2c driver. 11 - * 12 - * On Acorn machines, the following i2c devices are on the bus: 13 - * - PCF8583 real time clock & static RAM 14 - */ 15 - #include <linux/capability.h> 16 - #include <linux/init.h> 17 - #include <linux/time.h> 18 - #include <linux/miscdevice.h> 19 - #include <linux/rtc.h> 20 - #include <linux/i2c.h> 21 - #include <linux/i2c-algo-bit.h> 22 - #include <linux/fs.h> 23 - 24 - #include <asm/hardware.h> 25 - #include <asm/io.h> 26 - #include <asm/hardware/ioc.h> 27 - #include <asm/system.h> 28 - #include <asm/uaccess.h> 29 - 30 - #include "pcf8583.h" 31 - 32 - extern int (*set_rtc)(void); 33 - 34 - static struct i2c_client *rtc_client; 35 - static const unsigned char days_in_mon[] = 36 - { 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; 37 - 38 - #define CMOS_CHECKSUM (63) 39 - 40 - /* 41 - * Acorn machines store the year in the static RAM at 42 - * location 128. 43 - */ 44 - #define CMOS_YEAR (64 + 128) 45 - 46 - static inline int rtc_command(int cmd, void *data) 47 - { 48 - int ret = -EIO; 49 - 50 - if (rtc_client) 51 - ret = rtc_client->driver->command(rtc_client, cmd, data); 52 - 53 - return ret; 54 - } 55 - 56 - /* 57 - * Update the century + year bytes in the CMOS RAM, ensuring 58 - * that the check byte is correctly adjusted for the change. 59 - */ 60 - static int rtc_update_year(unsigned int new_year) 61 - { 62 - unsigned char yr[2], chk; 63 - struct mem cmos_year = { CMOS_YEAR, sizeof(yr), yr }; 64 - struct mem cmos_check = { CMOS_CHECKSUM, 1, &chk }; 65 - int ret; 66 - 67 - ret = rtc_command(MEM_READ, &cmos_check); 68 - if (ret) 69 - goto out; 70 - ret = rtc_command(MEM_READ, &cmos_year); 71 - if (ret) 72 - goto out; 73 - 74 - chk -= yr[1] + yr[0]; 75 - 76 - yr[1] = new_year / 100; 77 - yr[0] = new_year % 100; 78 - 79 - chk += yr[1] + yr[0]; 80 - 81 - ret = rtc_command(MEM_WRITE, &cmos_year); 82 - if (ret == 0) 83 - ret = rtc_command(MEM_WRITE, &cmos_check); 84 - out: 85 - return ret; 86 - } 87 - 88 - /* 89 - * Read the current RTC time and date, and update xtime. 90 - */ 91 - static void get_rtc_time(struct rtc_tm *rtctm, unsigned int *year) 92 - { 93 - unsigned char ctrl, yr[2]; 94 - struct mem rtcmem = { CMOS_YEAR, sizeof(yr), yr }; 95 - int real_year, year_offset; 96 - 97 - /* 98 - * Ensure that the RTC is running. 99 - */ 100 - rtc_command(RTC_GETCTRL, &ctrl); 101 - if (ctrl & 0xc0) { 102 - unsigned char new_ctrl = ctrl & ~0xc0; 103 - 104 - printk(KERN_WARNING "RTC: resetting control %02x -> %02x\n", 105 - ctrl, new_ctrl); 106 - 107 - rtc_command(RTC_SETCTRL, &new_ctrl); 108 - } 109 - 110 - if (rtc_command(RTC_GETDATETIME, rtctm) || 111 - rtc_command(MEM_READ, &rtcmem)) 112 - return; 113 - 114 - real_year = yr[0]; 115 - 116 - /* 117 - * The RTC year holds the LSB two bits of the current 118 - * year, which should reflect the LSB two bits of the 119 - * CMOS copy of the year. Any difference indicates 120 - * that we have to correct the CMOS version. 121 - */ 122 - year_offset = rtctm->year_off - (real_year & 3); 123 - if (year_offset < 0) 124 - /* 125 - * RTC year wrapped. Adjust it appropriately. 126 - */ 127 - year_offset += 4; 128 - 129 - *year = real_year + year_offset + yr[1] * 100; 130 - } 131 - 132 - static int set_rtc_time(struct rtc_tm *rtctm, unsigned int year) 133 - { 134 - unsigned char leap; 135 - int ret; 136 - 137 - leap = (!(year % 4) && (year % 100)) || !(year % 400); 138 - 139 - if (rtctm->mon > 12 || rtctm->mon == 0 || rtctm->mday == 0) 140 - return -EINVAL; 141 - 142 - if (rtctm->mday > (days_in_mon[rtctm->mon] + (rtctm->mon == 2 && leap))) 143 - return -EINVAL; 144 - 145 - if (rtctm->hours >= 24 || rtctm->mins >= 60 || rtctm->secs >= 60) 146 - return -EINVAL; 147 - 148 - /* 149 - * The RTC's own 2-bit year must reflect the least 150 - * significant two bits of the CMOS year. 151 - */ 152 - rtctm->year_off = (year % 100) & 3; 153 - 154 - ret = rtc_command(RTC_SETDATETIME, rtctm); 155 - if (ret == 0) 156 - ret = rtc_update_year(year); 157 - 158 - return ret; 159 - } 160 - 161 - /* 162 - * Set the RTC time only. Note that 163 - * we do not touch the date. 164 - */ 165 - static int k_set_rtc_time(void) 166 - { 167 - struct rtc_tm new_rtctm, old_rtctm; 168 - unsigned long nowtime = xtime.tv_sec; 169 - 170 - if (rtc_command(RTC_GETDATETIME, &old_rtctm)) 171 - return 0; 172 - 173 - new_rtctm.cs = xtime.tv_nsec / 10000000; 174 - new_rtctm.secs = nowtime % 60; nowtime /= 60; 175 - new_rtctm.mins = nowtime % 60; nowtime /= 60; 176 - new_rtctm.hours = nowtime % 24; 177 - 178 - /* 179 - * avoid writing when we're going to change the day 180 - * of the month. We will retry in the next minute. 181 - * This basically means that if the RTC must not drift 182 - * by more than 1 minute in 11 minutes. 183 - * 184 - * [ rtc: 1/1/2000 23:58:00, real 2/1/2000 00:01:00, 185 - * rtc gets set to 1/1/2000 00:01:00 ] 186 - */ 187 - if ((old_rtctm.hours == 23 && old_rtctm.mins == 59) || 188 - (new_rtctm.hours == 23 && new_rtctm.mins == 59)) 189 - return 1; 190 - 191 - return rtc_command(RTC_SETTIME, &new_rtctm); 192 - } 193 - 194 - static int rtc_ioctl(struct inode *inode, struct file *file, 195 - unsigned int cmd, unsigned long arg) 196 - { 197 - unsigned int year; 198 - struct rtc_time rtctm; 199 - struct rtc_tm rtc_raw; 200 - 201 - switch (cmd) { 202 - case RTC_ALM_READ: 203 - case RTC_ALM_SET: 204 - break; 205 - 206 - case RTC_RD_TIME: 207 - memset(&rtctm, 0, sizeof(struct rtc_time)); 208 - get_rtc_time(&rtc_raw, &year); 209 - rtctm.tm_sec = rtc_raw.secs; 210 - rtctm.tm_min = rtc_raw.mins; 211 - rtctm.tm_hour = rtc_raw.hours; 212 - rtctm.tm_mday = rtc_raw.mday; 213 - rtctm.tm_mon = rtc_raw.mon - 1; /* month starts at 0 */ 214 - rtctm.tm_year = year - 1900; /* starts at 1900 */ 215 - return copy_to_user((void *)arg, &rtctm, sizeof(rtctm)) 216 - ? -EFAULT : 0; 217 - 218 - case RTC_SET_TIME: 219 - if (!capable(CAP_SYS_TIME)) 220 - return -EACCES; 221 - 222 - if (copy_from_user(&rtctm, (void *)arg, sizeof(rtctm))) 223 - return -EFAULT; 224 - rtc_raw.secs = rtctm.tm_sec; 225 - rtc_raw.mins = rtctm.tm_min; 226 - rtc_raw.hours = rtctm.tm_hour; 227 - rtc_raw.mday = rtctm.tm_mday; 228 - rtc_raw.mon = rtctm.tm_mon + 1; 229 - year = rtctm.tm_year + 1900; 230 - return set_rtc_time(&rtc_raw, year); 231 - break; 232 - 233 - case RTC_EPOCH_READ: 234 - return put_user(1900, (unsigned long *)arg); 235 - 236 - } 237 - return -EINVAL; 238 - } 239 - 240 - static const struct file_operations rtc_fops = { 241 - .ioctl = rtc_ioctl, 242 - }; 243 - 244 - static struct miscdevice rtc_dev = { 245 - .minor = RTC_MINOR, 246 - .name = "rtc", 247 - .fops = &rtc_fops, 248 - }; 249 - 250 - /* IOC / IOMD i2c driver */ 251 - 252 - #define FORCE_ONES 0xdc 253 - #define SCL 0x02 254 - #define SDA 0x01 255 - 256 - /* 257 - * We must preserve all non-i2c output bits in IOC_CONTROL. 258 - * Note also that we need to preserve the value of SCL and 259 - * SDA outputs as well (which may be different from the 260 - * values read back from IOC_CONTROL). 261 - */ 262 - static u_int force_ones; 263 - 264 - static void ioc_setscl(void *data, int state) 265 - { 266 - u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); 267 - u_int ones = force_ones; 268 - 269 - if (state) 270 - ones |= SCL; 271 - else 272 - ones &= ~SCL; 273 - 274 - force_ones = ones; 275 - 276 - ioc_writeb(ioc_control | ones, IOC_CONTROL); 277 - } 278 - 279 - static void ioc_setsda(void *data, int state) 280 - { 281 - u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); 282 - u_int ones = force_ones; 283 - 284 - if (state) 285 - ones |= SDA; 286 - else 287 - ones &= ~SDA; 288 - 289 - force_ones = ones; 290 - 291 - ioc_writeb(ioc_control | ones, IOC_CONTROL); 292 - } 293 - 294 - static int ioc_getscl(void *data) 295 - { 296 - return (ioc_readb(IOC_CONTROL) & SCL) != 0; 297 - } 298 - 299 - static int ioc_getsda(void *data) 300 - { 301 - return (ioc_readb(IOC_CONTROL) & SDA) != 0; 302 - } 303 - 304 - static struct i2c_algo_bit_data ioc_data = { 305 - .setsda = ioc_setsda, 306 - .setscl = ioc_setscl, 307 - .getsda = ioc_getsda, 308 - .getscl = ioc_getscl, 309 - .udelay = 80, 310 - .timeout = 100 311 - }; 312 - 313 - static int ioc_client_reg(struct i2c_client *client) 314 - { 315 - if (client->driver->id == I2C_DRIVERID_PCF8583 && 316 - client->addr == 0x50) { 317 - struct rtc_tm rtctm; 318 - unsigned int year; 319 - struct timespec tv; 320 - 321 - rtc_client = client; 322 - get_rtc_time(&rtctm, &year); 323 - 324 - tv.tv_nsec = rtctm.cs * 10000000; 325 - tv.tv_sec = mktime(year, rtctm.mon, rtctm.mday, 326 - rtctm.hours, rtctm.mins, rtctm.secs); 327 - do_settimeofday(&tv); 328 - set_rtc = k_set_rtc_time; 329 - } 330 - 331 - return 0; 332 - } 333 - 334 - static int ioc_client_unreg(struct i2c_client *client) 335 - { 336 - if (client == rtc_client) { 337 - set_rtc = NULL; 338 - rtc_client = NULL; 339 - } 340 - 341 - return 0; 342 - } 343 - 344 - static struct i2c_adapter ioc_ops = { 345 - .id = I2C_HW_B_IOC, 346 - .algo_data = &ioc_data, 347 - .client_register = ioc_client_reg, 348 - .client_unregister = ioc_client_unreg, 349 - }; 350 - 351 - static int __init i2c_ioc_init(void) 352 - { 353 - int ret; 354 - 355 - force_ones = FORCE_ONES | SCL | SDA; 356 - 357 - ret = i2c_bit_add_bus(&ioc_ops); 358 - 359 - if (ret >= 0){ 360 - ret = misc_register(&rtc_dev); 361 - if(ret < 0) 362 - i2c_del_adapter(&ioc_ops); 363 - } 364 - 365 - return ret; 366 - } 367 - 368 - __initcall(i2c_ioc_init);
···
-284
drivers/acorn/char/pcf8583.c
··· 1 - /* 2 - * linux/drivers/acorn/char/pcf8583.c 3 - * 4 - * Copyright (C) 2000 Russell King 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License version 2 as 8 - * published by the Free Software Foundation. 9 - * 10 - * Driver for PCF8583 RTC & RAM chip 11 - */ 12 - #include <linux/module.h> 13 - #include <linux/i2c.h> 14 - #include <linux/slab.h> 15 - #include <linux/string.h> 16 - #include <linux/mc146818rtc.h> 17 - #include <linux/init.h> 18 - #include <linux/errno.h> 19 - #include <linux/bcd.h> 20 - 21 - #include "pcf8583.h" 22 - 23 - static struct i2c_driver pcf8583_driver; 24 - 25 - static unsigned short ignore[] = { I2C_CLIENT_END }; 26 - static unsigned short normal_addr[] = { 0x50, I2C_CLIENT_END }; 27 - static unsigned short *forces[] = { NULL }; 28 - 29 - static struct i2c_client_address_data addr_data = { 30 - .normal_i2c = normal_addr, 31 - .probe = ignore, 32 - .ignore = ignore, 33 - .forces = forces, 34 - }; 35 - 36 - #define set_ctrl(x, v) i2c_set_clientdata(x, (void *)(unsigned int)(v)) 37 - #define get_ctrl(x) ((unsigned int)i2c_get_clientdata(x)) 38 - 39 - static int 40 - pcf8583_attach(struct i2c_adapter *adap, int addr, int kind) 41 - { 42 - struct i2c_client *c; 43 - unsigned char buf[1], ad[1] = { 0 }; 44 - struct i2c_msg msgs[2] = { 45 - { 46 - .addr = addr, 47 - .flags = 0, 48 - .len = 1, 49 - .buf = ad, 50 - }, { 51 - .addr = addr, 52 - .flags = I2C_M_RD, 53 - .len = 1, 54 - .buf = buf, 55 - } 56 - }; 57 - 58 - c = kmalloc(sizeof(*c), GFP_KERNEL); 59 - if (!c) 60 - return -ENOMEM; 61 - 62 - memset(c, 0, sizeof(*c)); 63 - c->addr = addr; 64 - c->adapter = adap; 65 - c->driver = &pcf8583_driver; 66 - 67 - if (i2c_transfer(c->adapter, msgs, 2) == 2) 68 - set_ctrl(c, buf[0]); 69 - 70 - return i2c_attach_client(c); 71 - } 72 - 73 - static int 74 - pcf8583_probe(struct i2c_adapter *adap) 75 - { 76 - return i2c_probe(adap, &addr_data, pcf8583_attach); 77 - } 78 - 79 - static int 80 - pcf8583_detach(struct i2c_client *client) 81 - { 82 - i2c_detach_client(client); 83 - kfree(client); 84 - return 0; 85 - } 86 - 87 - static int 88 - pcf8583_get_datetime(struct i2c_client *client, struct rtc_tm *dt) 89 - { 90 - unsigned char buf[8], addr[1] = { 1 }; 91 - struct i2c_msg msgs[2] = { 92 - { 93 - .addr = client->addr, 94 - .flags = 0, 95 - .len = 1, 96 - .buf = addr, 97 - }, { 98 - .addr = client->addr, 99 - .flags = I2C_M_RD, 100 - .len = 6, 101 - .buf = buf, 102 - } 103 - }; 104 - int ret = -EIO; 105 - 106 - memset(buf, 0, sizeof(buf)); 107 - 108 - ret = i2c_transfer(client->adapter, msgs, 2); 109 - if (ret == 2) { 110 - dt->year_off = buf[4] >> 6; 111 - dt->wday = buf[5] >> 5; 112 - 113 - buf[4] &= 0x3f; 114 - buf[5] &= 0x1f; 115 - 116 - dt->cs = BCD_TO_BIN(buf[0]); 117 - dt->secs = BCD_TO_BIN(buf[1]); 118 - dt->mins = BCD_TO_BIN(buf[2]); 119 - dt->hours = BCD_TO_BIN(buf[3]); 120 - dt->mday = BCD_TO_BIN(buf[4]); 121 - dt->mon = BCD_TO_BIN(buf[5]); 122 - 123 - ret = 0; 124 - } 125 - 126 - return ret; 127 - } 128 - 129 - static int 130 - pcf8583_set_datetime(struct i2c_client *client, struct rtc_tm *dt, int datetoo) 131 - { 132 - unsigned char buf[8]; 133 - int ret, len = 6; 134 - 135 - buf[0] = 0; 136 - buf[1] = get_ctrl(client) | 0x80; 137 - buf[2] = BIN_TO_BCD(dt->cs); 138 - buf[3] = BIN_TO_BCD(dt->secs); 139 - buf[4] = BIN_TO_BCD(dt->mins); 140 - buf[5] = BIN_TO_BCD(dt->hours); 141 - 142 - if (datetoo) { 143 - len = 8; 144 - buf[6] = BIN_TO_BCD(dt->mday) | (dt->year_off << 6); 145 - buf[7] = BIN_TO_BCD(dt->mon) | (dt->wday << 5); 146 - } 147 - 148 - ret = i2c_master_send(client, (char *)buf, len); 149 - if (ret == len) 150 - ret = 0; 151 - 152 - buf[1] = get_ctrl(client); 153 - i2c_master_send(client, (char *)buf, 2); 154 - 155 - return ret; 156 - } 157 - 158 - static int 159 - pcf8583_get_ctrl(struct i2c_client *client, unsigned char *ctrl) 160 - { 161 - *ctrl = get_ctrl(client); 162 - return 0; 163 - } 164 - 165 - static int 166 - pcf8583_set_ctrl(struct i2c_client *client, unsigned char *ctrl) 167 - { 168 - unsigned char buf[2]; 169 - 170 - buf[0] = 0; 171 - buf[1] = *ctrl; 172 - set_ctrl(client, *ctrl); 173 - 174 - return i2c_master_send(client, (char *)buf, 2); 175 - } 176 - 177 - static int 178 - pcf8583_read_mem(struct i2c_client *client, struct mem *mem) 179 - { 180 - unsigned char addr[1]; 181 - struct i2c_msg msgs[2] = { 182 - { 183 - .addr = client->addr, 184 - .flags = 0, 185 - .len = 1, 186 - .buf = addr, 187 - }, { 188 - .addr = client->addr, 189 - .flags = I2C_M_RD, 190 - .len = mem->nr, 191 - .buf = mem->data, 192 - } 193 - }; 194 - 195 - if (mem->loc < 8) 196 - return -EINVAL; 197 - 198 - addr[0] = mem->loc; 199 - 200 - return i2c_transfer(client->adapter, msgs, 2) == 2 ? 0 : -EIO; 201 - } 202 - 203 - static int 204 - pcf8583_write_mem(struct i2c_client *client, struct mem *mem) 205 - { 206 - unsigned char addr[1]; 207 - struct i2c_msg msgs[2] = { 208 - { 209 - .addr = client->addr, 210 - .flags = 0, 211 - .len = 1, 212 - .buf = addr, 213 - }, { 214 - .addr = client->addr, 215 - .flags = I2C_M_NOSTART, 216 - .len = mem->nr, 217 - .buf = mem->data, 218 - } 219 - }; 220 - 221 - if (mem->loc < 8) 222 - return -EINVAL; 223 - 224 - addr[0] = mem->loc; 225 - 226 - return i2c_transfer(client->adapter, msgs, 2) == 2 ? 0 : -EIO; 227 - } 228 - 229 - static int 230 - pcf8583_command(struct i2c_client *client, unsigned int cmd, void *arg) 231 - { 232 - switch (cmd) { 233 - case RTC_GETDATETIME: 234 - return pcf8583_get_datetime(client, arg); 235 - 236 - case RTC_SETTIME: 237 - return pcf8583_set_datetime(client, arg, 0); 238 - 239 - case RTC_SETDATETIME: 240 - return pcf8583_set_datetime(client, arg, 1); 241 - 242 - case RTC_GETCTRL: 243 - return pcf8583_get_ctrl(client, arg); 244 - 245 - case RTC_SETCTRL: 246 - return pcf8583_set_ctrl(client, arg); 247 - 248 - case MEM_READ: 249 - return pcf8583_read_mem(client, arg); 250 - 251 - case MEM_WRITE: 252 - return pcf8583_write_mem(client, arg); 253 - 254 - default: 255 - return -EINVAL; 256 - } 257 - } 258 - 259 - static struct i2c_driver pcf8583_driver = { 260 - .driver = { 261 - .name = "PCF8583", 262 - }, 263 - .id = I2C_DRIVERID_PCF8583, 264 - .attach_adapter = pcf8583_probe, 265 - .detach_client = pcf8583_detach, 266 - .command = pcf8583_command 267 - }; 268 - 269 - static __init int pcf8583_init(void) 270 - { 271 - return i2c_add_driver(&pcf8583_driver); 272 - } 273 - 274 - static __exit void pcf8583_exit(void) 275 - { 276 - i2c_del_driver(&pcf8583_driver); 277 - } 278 - 279 - module_init(pcf8583_init); 280 - module_exit(pcf8583_exit); 281 - 282 - MODULE_AUTHOR("Russell King"); 283 - MODULE_DESCRIPTION("PCF8583 I2C RTC driver"); 284 - MODULE_LICENSE("GPL");
···
-41
drivers/acorn/char/pcf8583.h
··· 1 - /* 2 - * linux/drivers/acorn/char/pcf8583.h 3 - * 4 - * Copyright (C) 2000 Russell King 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License version 2 as 8 - * published by the Free Software Foundation. 9 - */ 10 - struct rtc_tm { 11 - unsigned char cs; 12 - unsigned char secs; 13 - unsigned char mins; 14 - unsigned char hours; 15 - unsigned char mday; 16 - unsigned char mon; 17 - unsigned char year_off; 18 - unsigned char wday; 19 - }; 20 - 21 - struct mem { 22 - unsigned int loc; 23 - unsigned int nr; 24 - unsigned char *data; 25 - }; 26 - 27 - #define RTC_GETDATETIME 0 28 - #define RTC_SETTIME 1 29 - #define RTC_SETDATETIME 2 30 - #define RTC_GETCTRL 3 31 - #define RTC_SETCTRL 4 32 - #define MEM_READ 5 33 - #define MEM_WRITE 6 34 - 35 - #define CTRL_STOP 0x80 36 - #define CTRL_HOLD 0x40 37 - #define CTRL_32KHZ 0x00 38 - #define CTRL_MASK 0x08 39 - #define CTRL_ALARMEN 0x04 40 - #define CTRL_ALARM 0x02 41 - #define CTRL_TIMER 0x01
···
+10
drivers/i2c/busses/Kconfig
··· 495 This driver can also be built as a module. If so, the module 496 will be called i2c-versatile. 497 498 config I2C_VIA 499 tristate "VIA 82C586B" 500 depends on I2C && PCI && EXPERIMENTAL
··· 495 This driver can also be built as a module. If so, the module 496 will be called i2c-versatile. 497 498 + config I2C_ACORN 499 + bool "Acorn IOC/IOMD I2C bus support" 500 + depends on I2C && ARCH_ACORN 501 + default y 502 + select I2C_ALGOBIT 503 + help 504 + Say yes if you want to support the I2C bus on Acorn platforms. 505 + 506 + If you don't know, say Y. 507 + 508 config I2C_VIA 509 tristate "VIA 82C586B" 510 depends on I2C && PCI && EXPERIMENTAL
+1
drivers/i2c/busses/Makefile
··· 42 obj-$(CONFIG_I2C_SIS96X) += i2c-sis96x.o 43 obj-$(CONFIG_I2C_STUB) += i2c-stub.o 44 obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o 45 obj-$(CONFIG_I2C_VIA) += i2c-via.o 46 obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o 47 obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o
··· 42 obj-$(CONFIG_I2C_SIS96X) += i2c-sis96x.o 43 obj-$(CONFIG_I2C_STUB) += i2c-stub.o 44 obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o 45 + obj-$(CONFIG_I2C_ACORN) += i2c-acorn.o 46 obj-$(CONFIG_I2C_VIA) += i2c-via.o 47 obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o 48 obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o
+97
drivers/i2c/busses/i2c-acorn.c
···
··· 1 + /* 2 + * linux/drivers/acorn/char/i2c.c 3 + * 4 + * Copyright (C) 2000 Russell King 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License version 2 as 8 + * published by the Free Software Foundation. 9 + * 10 + * ARM IOC/IOMD i2c driver. 11 + * 12 + * On Acorn machines, the following i2c devices are on the bus: 13 + * - PCF8583 real time clock & static RAM 14 + */ 15 + #include <linux/init.h> 16 + #include <linux/i2c.h> 17 + #include <linux/i2c-algo-bit.h> 18 + 19 + #include <asm/hardware.h> 20 + #include <asm/io.h> 21 + #include <asm/hardware/ioc.h> 22 + #include <asm/system.h> 23 + 24 + #define FORCE_ONES 0xdc 25 + #define SCL 0x02 26 + #define SDA 0x01 27 + 28 + /* 29 + * We must preserve all non-i2c output bits in IOC_CONTROL. 30 + * Note also that we need to preserve the value of SCL and 31 + * SDA outputs as well (which may be different from the 32 + * values read back from IOC_CONTROL). 33 + */ 34 + static u_int force_ones; 35 + 36 + static void ioc_setscl(void *data, int state) 37 + { 38 + u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); 39 + u_int ones = force_ones; 40 + 41 + if (state) 42 + ones |= SCL; 43 + else 44 + ones &= ~SCL; 45 + 46 + force_ones = ones; 47 + 48 + ioc_writeb(ioc_control | ones, IOC_CONTROL); 49 + } 50 + 51 + static void ioc_setsda(void *data, int state) 52 + { 53 + u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); 54 + u_int ones = force_ones; 55 + 56 + if (state) 57 + ones |= SDA; 58 + else 59 + ones &= ~SDA; 60 + 61 + force_ones = ones; 62 + 63 + ioc_writeb(ioc_control | ones, IOC_CONTROL); 64 + } 65 + 66 + static int ioc_getscl(void *data) 67 + { 68 + return (ioc_readb(IOC_CONTROL) & SCL) != 0; 69 + } 70 + 71 + static int ioc_getsda(void *data) 72 + { 73 + return (ioc_readb(IOC_CONTROL) & SDA) != 0; 74 + } 75 + 76 + static struct i2c_algo_bit_data ioc_data = { 77 + .setsda = ioc_setsda, 78 + .setscl = ioc_setscl, 79 + .getsda = ioc_getsda, 80 + .getscl = ioc_getscl, 81 + .udelay = 80, 82 + .timeout = 100 83 + }; 84 + 85 + static struct i2c_adapter ioc_ops = { 86 + .id = I2C_HW_B_IOC, 87 + .algo_data = &ioc_data, 88 + }; 89 + 90 + static int __init i2c_ioc_init(void) 91 + { 92 + force_ones = FORCE_ONES | SCL | SDA; 93 + 94 + return i2c_bit_add_bus(&ioc_ops); 95 + } 96 + 97 + __initcall(i2c_ioc_init);
+5 -3
drivers/rtc/Kconfig
··· 207 208 config RTC_DRV_PCF8583 209 tristate "Philips PCF8583" 210 - depends on RTC_CLASS && I2C 211 help 212 - If you say yes here you get support for the 213 - Philips PCF8583 RTC chip. 214 215 This driver can also be built as a module. If so, the module 216 will be called rtc-pcf8583.
··· 207 208 config RTC_DRV_PCF8583 209 tristate "Philips PCF8583" 210 + depends on RTC_CLASS && I2C && ARCH_RPC 211 help 212 + If you say yes here you get support for the Philips PCF8583 213 + RTC chip found on Acorn RiscPCs. This driver supports the 214 + platform specific method of retrieving the current year from 215 + the RTC's SRAM. 216 217 This driver can also be built as a module. If so, the module 218 will be called rtc-pcf8583.
+15 -14
drivers/rtc/rtc-pcf8583.c
··· 40 #define CTRL_ALARM 0x02 41 #define CTRL_TIMER 0x01 42 43 - static unsigned short normal_i2c[] = { I2C_CLIENT_END }; 44 45 /* Module parameters */ 46 I2C_CLIENT_INSMOD; ··· 81 buf[4] &= 0x3f; 82 buf[5] &= 0x1f; 83 84 - dt->tm_sec = BCD_TO_BIN(buf[1]); 85 - dt->tm_min = BCD_TO_BIN(buf[2]); 86 - dt->tm_hour = BCD_TO_BIN(buf[3]); 87 - dt->tm_mday = BCD_TO_BIN(buf[4]); 88 - dt->tm_mon = BCD_TO_BIN(buf[5]); 89 } 90 91 return ret == 2 ? 0 : -EIO; ··· 99 buf[0] = 0; 100 buf[1] = get_ctrl(client) | 0x80; 101 buf[2] = 0; 102 - buf[3] = BIN_TO_BCD(dt->tm_sec); 103 - buf[4] = BIN_TO_BCD(dt->tm_min); 104 - buf[5] = BIN_TO_BCD(dt->tm_hour); 105 106 if (datetoo) { 107 len = 8; 108 - buf[6] = BIN_TO_BCD(dt->tm_mday) | (dt->tm_year << 6); 109 - buf[7] = BIN_TO_BCD(dt->tm_mon) | (dt->tm_wday << 5); 110 } 111 112 ret = i2c_master_send(client, (char *)buf, len); ··· 226 */ 227 year_offset += 4; 228 229 - tm->tm_year = real_year + year_offset + year[1] * 100; 230 231 return 0; 232 } ··· 237 unsigned char year[2], chk; 238 struct rtc_mem cmos_year = { CMOS_YEAR, sizeof(year), year }; 239 struct rtc_mem cmos_check = { CMOS_CHECKSUM, 1, &chk }; 240 int ret; 241 242 /* ··· 259 260 chk -= year[1] + year[0]; 261 262 - year[1] = tm->tm_year / 100; 263 - year[0] = tm->tm_year % 100; 264 265 chk += year[1] + year[0]; 266
··· 40 #define CTRL_ALARM 0x02 41 #define CTRL_TIMER 0x01 42 43 + static unsigned short normal_i2c[] = { 0x50, I2C_CLIENT_END }; 44 45 /* Module parameters */ 46 I2C_CLIENT_INSMOD; ··· 81 buf[4] &= 0x3f; 82 buf[5] &= 0x1f; 83 84 + dt->tm_sec = BCD2BIN(buf[1]); 85 + dt->tm_min = BCD2BIN(buf[2]); 86 + dt->tm_hour = BCD2BIN(buf[3]); 87 + dt->tm_mday = BCD2BIN(buf[4]); 88 + dt->tm_mon = BCD2BIN(buf[5]) - 1; 89 } 90 91 return ret == 2 ? 0 : -EIO; ··· 99 buf[0] = 0; 100 buf[1] = get_ctrl(client) | 0x80; 101 buf[2] = 0; 102 + buf[3] = BIN2BCD(dt->tm_sec); 103 + buf[4] = BIN2BCD(dt->tm_min); 104 + buf[5] = BIN2BCD(dt->tm_hour); 105 106 if (datetoo) { 107 len = 8; 108 + buf[6] = BIN2BCD(dt->tm_mday) | (dt->tm_year << 6); 109 + buf[7] = BIN2BCD(dt->tm_mon + 1) | (dt->tm_wday << 5); 110 } 111 112 ret = i2c_master_send(client, (char *)buf, len); ··· 226 */ 227 year_offset += 4; 228 229 + tm->tm_year = (real_year + year_offset + year[1] * 100) - 1900; 230 231 return 0; 232 } ··· 237 unsigned char year[2], chk; 238 struct rtc_mem cmos_year = { CMOS_YEAR, sizeof(year), year }; 239 struct rtc_mem cmos_check = { CMOS_CHECKSUM, 1, &chk }; 240 + unsigned int proper_year = tm->tm_year + 1900; 241 int ret; 242 243 /* ··· 258 259 chk -= year[1] + year[0]; 260 261 + year[1] = proper_year / 100; 262 + year[0] = proper_year % 100; 263 264 chk += year[1] + year[0]; 265
+2 -2
drivers/scsi/arm/cumana_2.c
··· 178 dma_dir = DMA_MODE_READ, 179 alatch_dir = ALATCH_DMA_IN; 180 181 - dma_map_sg(dev, info->sg, bufs + 1, map_dir); 182 183 disable_dma(dmach); 184 - set_dma_sg(dmach, info->sg, bufs + 1); 185 writeb(alatch_dir, info->base + CUMANASCSI2_ALATCH); 186 set_dma_mode(dmach, dma_dir); 187 enable_dma(dmach);
··· 178 dma_dir = DMA_MODE_READ, 179 alatch_dir = ALATCH_DMA_IN; 180 181 + dma_map_sg(dev, info->sg, bufs, map_dir); 182 183 disable_dma(dmach); 184 + set_dma_sg(dmach, info->sg, bufs); 185 writeb(alatch_dir, info->base + CUMANASCSI2_ALATCH); 186 set_dma_mode(dmach, dma_dir); 187 enable_dma(dmach);
+2 -2
drivers/scsi/arm/eesox.c
··· 175 map_dir = DMA_FROM_DEVICE, 176 dma_dir = DMA_MODE_READ; 177 178 - dma_map_sg(dev, info->sg, bufs + 1, map_dir); 179 180 disable_dma(dmach); 181 - set_dma_sg(dmach, info->sg, bufs + 1); 182 set_dma_mode(dmach, dma_dir); 183 enable_dma(dmach); 184 return fasdma_real_all;
··· 175 map_dir = DMA_FROM_DEVICE, 176 dma_dir = DMA_MODE_READ; 177 178 + dma_map_sg(dev, info->sg, bufs, map_dir); 179 180 disable_dma(dmach); 181 + set_dma_sg(dmach, info->sg, bufs); 182 set_dma_mode(dmach, dma_dir); 183 enable_dma(dmach); 184 return fasdma_real_all;
+5 -4
drivers/scsi/arm/fas216.c
··· 633 634 BUG_ON(bytes_transferred < 0); 635 636 - info->SCpnt->request_bufflen -= bytes_transferred; 637 638 while (bytes_transferred != 0) { 639 if (SCp->this_residual > bytes_transferred) ··· 715 return; 716 717 if (dmatype == fasdma_real_all) 718 - total = info->SCpnt->request_bufflen; 719 else 720 total = info->scsi.SCp.this_residual; 721 ··· 753 fas216_log(info, LOG_BUFFER, 754 "starttransfer: buffer %p length 0x%06x reqlen 0x%06x", 755 info->scsi.SCp.ptr, info->scsi.SCp.this_residual, 756 - info->SCpnt->request_bufflen); 757 758 if (!info->scsi.SCp.ptr) { 759 fas216_log(info, LOG_ERROR, "null buffer passed to " ··· 784 info->dma.transfer_type = dmatype; 785 786 if (dmatype == fasdma_real_all) 787 - fas216_set_stc(info, info->SCpnt->request_bufflen); 788 else 789 fas216_set_stc(info, info->scsi.SCp.this_residual); 790 ··· 2114 SCpnt->SCp.buffers_residual = 0; 2115 SCpnt->SCp.ptr = (char *)SCpnt->sense_buffer; 2116 SCpnt->SCp.this_residual = sizeof(SCpnt->sense_buffer); 2117 SCpnt->SCp.Message = 0; 2118 SCpnt->SCp.Status = 0; 2119 SCpnt->request_bufflen = sizeof(SCpnt->sense_buffer);
··· 633 634 BUG_ON(bytes_transferred < 0); 635 636 + SCp->phase -= bytes_transferred; 637 638 while (bytes_transferred != 0) { 639 if (SCp->this_residual > bytes_transferred) ··· 715 return; 716 717 if (dmatype == fasdma_real_all) 718 + total = info->scsi.SCp.phase; 719 else 720 total = info->scsi.SCp.this_residual; 721 ··· 753 fas216_log(info, LOG_BUFFER, 754 "starttransfer: buffer %p length 0x%06x reqlen 0x%06x", 755 info->scsi.SCp.ptr, info->scsi.SCp.this_residual, 756 + info->scsi.SCp.phase); 757 758 if (!info->scsi.SCp.ptr) { 759 fas216_log(info, LOG_ERROR, "null buffer passed to " ··· 784 info->dma.transfer_type = dmatype; 785 786 if (dmatype == fasdma_real_all) 787 + fas216_set_stc(info, info->scsi.SCp.phase); 788 else 789 fas216_set_stc(info, info->scsi.SCp.this_residual); 790 ··· 2114 SCpnt->SCp.buffers_residual = 0; 2115 SCpnt->SCp.ptr = (char *)SCpnt->sense_buffer; 2116 SCpnt->SCp.this_residual = sizeof(SCpnt->sense_buffer); 2117 + SCpnt->SCp.phase = sizeof(SCpnt->sense_buffer); 2118 SCpnt->SCp.Message = 0; 2119 SCpnt->SCp.Status = 0; 2120 SCpnt->request_bufflen = sizeof(SCpnt->sense_buffer);
+3 -2
drivers/scsi/arm/powertec.c
··· 148 map_dir = DMA_FROM_DEVICE, 149 dma_dir = DMA_MODE_READ; 150 151 - dma_map_sg(dev, info->sg, bufs + 1, map_dir); 152 153 disable_dma(dmach); 154 - set_dma_sg(dmach, info->sg, bufs + 1); 155 set_dma_mode(dmach, dma_dir); 156 enable_dma(dmach); 157 return fasdma_real_all; ··· 342 info->base = base; 343 powertecscsi_terminator_ctl(host, term[ec->slot_no]); 344 345 info->info.scsi.io_base = base + POWERTEC_FAS216_OFFSET; 346 info->info.scsi.io_shift = POWERTEC_FAS216_SHIFT; 347 info->info.scsi.irq = ec->irq;
··· 148 map_dir = DMA_FROM_DEVICE, 149 dma_dir = DMA_MODE_READ; 150 151 + dma_map_sg(dev, info->sg, bufs, map_dir); 152 153 disable_dma(dmach); 154 + set_dma_sg(dmach, info->sg, bufs); 155 set_dma_mode(dmach, dma_dir); 156 enable_dma(dmach); 157 return fasdma_real_all; ··· 342 info->base = base; 343 powertecscsi_terminator_ctl(host, term[ec->slot_no]); 344 345 + info->ec = ec; 346 info->info.scsi.io_base = base + POWERTEC_FAS216_OFFSET; 347 info->info.scsi.io_shift = POWERTEC_FAS216_SHIFT; 348 info->info.scsi.irq = ec->irq;
+2
drivers/scsi/arm/scsi.h
··· 80 (page_address(SCpnt->SCp.buffer->page) + 81 SCpnt->SCp.buffer->offset); 82 SCpnt->SCp.this_residual = SCpnt->SCp.buffer->length; 83 84 #ifdef BELT_AND_BRACES 85 /* ··· 99 } else { 100 SCpnt->SCp.ptr = (unsigned char *)SCpnt->request_buffer; 101 SCpnt->SCp.this_residual = SCpnt->request_bufflen; 102 } 103 104 /*
··· 80 (page_address(SCpnt->SCp.buffer->page) + 81 SCpnt->SCp.buffer->offset); 82 SCpnt->SCp.this_residual = SCpnt->SCp.buffer->length; 83 + SCpnt->SCp.phase = SCpnt->request_bufflen; 84 85 #ifdef BELT_AND_BRACES 86 /* ··· 98 } else { 99 SCpnt->SCp.ptr = (unsigned char *)SCpnt->request_buffer; 100 SCpnt->SCp.this_residual = SCpnt->request_bufflen; 101 + SCpnt->SCp.phase = SCpnt->request_bufflen; 102 } 103 104 /*
+6
include/asm-arm/arch-omap/entry-macro.S
··· 61 .macro disable_fiq 62 .endm 63 64 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 65 ldr \base, =VA_IC_BASE 66 ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
··· 61 .macro disable_fiq 62 .endm 63 64 + .macro get_irqnr_preamble, base, tmp 65 + .endm 66 + 67 + .macro arch_ret_to_user, tmp1, tmp2 68 + .endm 69 + 70 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 71 ldr \base, =VA_IC_BASE 72 ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
+1 -1
include/asm-arm/arch-omap/memory.h
··· 70 71 #define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) 72 #define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) 73 - #define is_lbus_device(dev) (cpu_is_omap1510() && dev && (strncmp(dev->bus_id, "ohci", 4) == 0)) 74 75 #define __arch_page_to_dma(dev, page) ({is_lbus_device(dev) ? \ 76 (dma_addr_t)virt_to_lbus(page_address(page)) : \
··· 70 71 #define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) 72 #define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) 73 + #define is_lbus_device(dev) (cpu_is_omap15xx() && dev && (strncmp(dev->bus_id, "ohci", 4) == 0)) 74 75 #define __arch_page_to_dma(dev, page) ({is_lbus_device(dev) ? \ 76 (dma_addr_t)virt_to_lbus(page_address(page)) : \
+6 -6
include/asm-arm/arch-omap/omap-alsa.h
··· 65 int period; /* current transfer period */ 66 int periods; /* current count of periods registerd in the DMA engine */ 67 spinlock_t dma_lock; /* for locking in DMA operations */ 68 - snd_pcm_substream_t *stream; /* the pcm stream */ 69 unsigned linked:1; /* dma channels linked */ 70 int offset; /* store start position of the last period in the alsa buffer */ 71 int (*hw_start)(void); /* interface to start HW interface, e.g. McBSP */ ··· 76 * Alsa card structure for aic23 77 */ 78 struct snd_card_omap_codec { 79 - snd_card_t *card; 80 - snd_pcm_t *pcm; 81 long samplerate; 82 struct audio_stream s[2]; /* playback & capture */ 83 }; ··· 89 struct omap_alsa_codec_config { 90 char *name; 91 struct omap_mcbsp_reg_cfg *mcbsp_regs_alsa; 92 - snd_pcm_hw_constraint_list_t *hw_constraints_rates; 93 - snd_pcm_hardware_t *snd_omap_alsa_playback; 94 - snd_pcm_hardware_t *snd_omap_alsa_capture; 95 void (*codec_configure_dev)(void); 96 void (*codec_set_samplerate)(long); 97 void (*codec_clock_setup)(void);
··· 65 int period; /* current transfer period */ 66 int periods; /* current count of periods registerd in the DMA engine */ 67 spinlock_t dma_lock; /* for locking in DMA operations */ 68 + struct snd_pcm_substream *stream; /* the pcm stream */ 69 unsigned linked:1; /* dma channels linked */ 70 int offset; /* store start position of the last period in the alsa buffer */ 71 int (*hw_start)(void); /* interface to start HW interface, e.g. McBSP */ ··· 76 * Alsa card structure for aic23 77 */ 78 struct snd_card_omap_codec { 79 + struct snd_card *card; 80 + struct snd_pcm *pcm; 81 long samplerate; 82 struct audio_stream s[2]; /* playback & capture */ 83 }; ··· 89 struct omap_alsa_codec_config { 90 char *name; 91 struct omap_mcbsp_reg_cfg *mcbsp_regs_alsa; 92 + struct snd_pcm_hw_constraint_list *hw_constraints_rates; 93 + struct snd_pcm_hardware *snd_omap_alsa_playback; 94 + struct snd_pcm_hardware *snd_omap_alsa_capture; 95 void (*codec_configure_dev)(void); 96 void (*codec_set_samplerate)(long); 97 void (*codec_clock_setup)(void);
+19 -21
include/asm-arm/system.h
··· 167 : : "r" (0) : "memory") 168 #define dmb() __asm__ __volatile__ ("" : : : "memory") 169 #endif 170 - #define mb() dmb() 171 - #define rmb() mb() 172 - #define wmb() mb() 173 - #define read_barrier_depends() do { } while(0) 174 - #define set_mb(var, value) do { var = value; mb(); } while (0) 175 #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); 176 177 extern unsigned long cr_no_alignment; /* defined in entry-armv.S */ ··· 256 static inline void sched_cacheflush(void) 257 { 258 } 259 - 260 - #ifdef CONFIG_SMP 261 - 262 - #define smp_mb() mb() 263 - #define smp_rmb() rmb() 264 - #define smp_wmb() wmb() 265 - #define smp_read_barrier_depends() read_barrier_depends() 266 - 267 - #else 268 - 269 - #define smp_mb() barrier() 270 - #define smp_rmb() barrier() 271 - #define smp_wmb() barrier() 272 - #define smp_read_barrier_depends() do { } while(0) 273 - 274 - #endif /* CONFIG_SMP */ 275 276 #if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110) 277 /*
··· 167 : : "r" (0) : "memory") 168 #define dmb() __asm__ __volatile__ ("" : : : "memory") 169 #endif 170 + 171 + #define mb() barrier() 172 + #define rmb() barrier() 173 + #define wmb() barrier() 174 + #define read_barrier_depends() do { } while(0) 175 + 176 + #ifdef CONFIG_SMP 177 + #define smp_mb() dmb() 178 + #define smp_rmb() dmb() 179 + #define smp_wmb() dmb() 180 + #define smp_read_barrier_depends() read_barrier_depends() 181 + #else 182 + #define smp_mb() barrier() 183 + #define smp_rmb() barrier() 184 + #define smp_wmb() barrier() 185 + #define smp_read_barrier_depends() read_barrier_depends() 186 + #endif /* CONFIG_SMP */ 187 + 188 + #define set_mb(var, value) do { var = value; smp_mb(); } while (0) 189 #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); 190 191 extern unsigned long cr_no_alignment; /* defined in entry-armv.S */ ··· 242 static inline void sched_cacheflush(void) 243 { 244 } 245 246 #if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110) 247 /*