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kernel os linux

ARM: dts: imx6: add Vivante GPU nodes

This adds the device nodes for 2D, 3D and VG GPU cores.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

authored by

Lucas Stach and committed by
Shawn Guo
419e202b cfa1dd99

+41
+5
arch/arm/boot/dts/imx6dl.dtsi
··· 104 104 compatible = "fsl,imx-display-subsystem"; 105 105 ports = <&ipu1_di0>, <&ipu1_di1>; 106 106 }; 107 + 108 + gpu-subsystem { 109 + compatible = "fsl,imx-gpu-subsystem"; 110 + cores = <&gpu_2d>, <&gpu_3d>; 111 + }; 107 112 }; 108 113 109 114 &gpt {
+15
arch/arm/boot/dts/imx6q.dtsi
··· 154 154 status = "disabled"; 155 155 }; 156 156 157 + gpu_vg: gpu@02204000 { 158 + compatible = "vivante,gc"; 159 + reg = <0x02204000 0x4000>; 160 + interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; 161 + clocks = <&clks IMX6QDL_CLK_OPENVG_AXI>, 162 + <&clks IMX6QDL_CLK_GPU2D_CORE>; 163 + clock-names = "bus", "core"; 164 + power-domains = <&gpc 1>; 165 + }; 166 + 157 167 ipu2: ipu@02800000 { 158 168 #address-cells = <1>; 159 169 #size-cells = <0>; ··· 235 225 display-subsystem { 236 226 compatible = "fsl,imx-display-subsystem"; 237 227 ports = <&ipu1_di0>, <&ipu1_di1>, <&ipu2_di0>, <&ipu2_di1>; 228 + }; 229 + 230 + gpu-subsystem { 231 + compatible = "fsl,imx-gpu-subsystem"; 232 + cores = <&gpu_2d>, <&gpu_3d>, <&gpu_vg>; 238 233 }; 239 234 }; 240 235
+21
arch/arm/boot/dts/imx6qdl.dtsi
··· 139 139 }; 140 140 }; 141 141 142 + gpu_3d: gpu@00130000 { 143 + compatible = "vivante,gc"; 144 + reg = <0x00130000 0x4000>; 145 + interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; 146 + clocks = <&clks IMX6QDL_CLK_GPU3D_AXI>, 147 + <&clks IMX6QDL_CLK_GPU3D_CORE>, 148 + <&clks IMX6QDL_CLK_GPU3D_SHADER>; 149 + clock-names = "bus", "core", "shader"; 150 + power-domains = <&gpc 1>; 151 + }; 152 + 153 + gpu_2d: gpu@00134000 { 154 + compatible = "vivante,gc"; 155 + reg = <0x00134000 0x4000>; 156 + interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; 157 + clocks = <&clks IMX6QDL_CLK_GPU2D_AXI>, 158 + <&clks IMX6QDL_CLK_GPU2D_CORE>; 159 + clock-names = "bus", "core"; 160 + power-domains = <&gpc 1>; 161 + }; 162 + 142 163 timer@00a00600 { 143 164 compatible = "arm,cortex-a9-twd-timer"; 144 165 reg = <0x00a00600 0x20>;