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dt-bindings: serial: vt8500-uart: convert to json-schema

Convert the VIA VT8500 and WonderMedia WM8xxx UART Controller to
newer DT schema. Created DT schema based on the .txt file which had
`compatible`, `reg`, `interrupts` and `clocks` as required properties.

Additions to the original binding
- changed the file name from vt8500-uart to via,vt8500-uart.yaml
- removed unnecessary alias from the example.

Signed-off-by: Kanak Shilledar <kanakshilledar@gmail.com>
Acked-by: Alexey Charkov <alchark@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240612153847.52647-2-kanakshilledar@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Kanak Shilledar and committed by
Greg Kroah-Hartman
418af7ee efa6b0a1

+46 -27
+46
Documentation/devicetree/bindings/serial/via,vt8500-uart.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + 3 + %YAML 1.2 4 + --- 5 + $id: http://devicetree.org/schemas/serial/via,vt8500-uart.yaml# 6 + $schema: http://devicetree.org/meta-schemas/core.yaml# 7 + 8 + title: VIA VT8500 and WonderMedia WM8xxx UART Controller 9 + 10 + maintainers: 11 + - Alexey Charkov <alchark@gmail.com> 12 + 13 + allOf: 14 + - $ref: serial.yaml 15 + 16 + properties: 17 + compatible: 18 + enum: 19 + - via,vt8500-uart # up to WM8850/WM8950 20 + - wm,wm8880-uart # for WM8880 and later 21 + 22 + clocks: 23 + maxItems: 1 24 + 25 + interrupts: 26 + maxItems: 1 27 + 28 + reg: 29 + maxItems: 1 30 + 31 + required: 32 + - compatible 33 + - clocks 34 + - interrupts 35 + - reg 36 + 37 + unevaluatedProperties: false 38 + 39 + examples: 40 + - | 41 + serial@d8200000 { 42 + compatible = "via,vt8500-uart"; 43 + reg = <0xd8200000 0x1040>; 44 + interrupts = <32>; 45 + clocks = <&clkuart0>; 46 + };
-27
Documentation/devicetree/bindings/serial/vt8500-uart.txt
··· 1 - * VIA VT8500 and WonderMedia WM8xxx UART Controller 2 - 3 - Required properties: 4 - - compatible: should be "via,vt8500-uart" (for VIA/WonderMedia chips up to and 5 - including WM8850/WM8950), or "wm,wm8880-uart" (for WM8880 and later) 6 - 7 - - reg: base physical address of the controller and length of memory mapped 8 - region. 9 - 10 - - interrupts: hardware interrupt number 11 - 12 - - clocks: shall be the input parent clock phandle for the clock. This should 13 - be the 24Mhz reference clock. 14 - 15 - Aliases may be defined to ensure the correct ordering of the uarts. 16 - 17 - Example: 18 - aliases { 19 - serial0 = &uart0; 20 - }; 21 - 22 - uart0: serial@d8200000 { 23 - compatible = "via,vt8500-uart"; 24 - reg = <0xd8200000 0x1040>; 25 - interrupts = <32>; 26 - clocks = <&clkuart0>; 27 - };