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ath9k: configure internal regulator for AR9330

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

authored by

Gabor Juhos and committed by
John W. Linville 4187afa2 7b09e49e

+20 -5
+20 -5
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
··· 3712 3712 ath9k_hw_ar9300_get_eeprom(ah, EEP_INTERNAL_REGULATOR); 3713 3713 3714 3714 if (internal_regulator) { 3715 - if (AR_SREV_9485(ah)) { 3715 + if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) { 3716 3716 int reg_pmu_set; 3717 3717 3718 3718 reg_pmu_set = REG_READ(ah, AR_PHY_PMU2) & ~AR_PHY_PMU2_PGM; ··· 3720 3720 if (!is_pmu_set(ah, AR_PHY_PMU2, reg_pmu_set)) 3721 3721 return; 3722 3722 3723 - reg_pmu_set = (5 << 1) | (7 << 4) | (1 << 8) | 3724 - (2 << 14) | (6 << 17) | (1 << 20) | 3725 - (3 << 24) | (1 << 28); 3723 + if (AR_SREV_9330(ah)) { 3724 + if (ah->is_clk_25mhz) { 3725 + reg_pmu_set = (3 << 1) | (8 << 4) | 3726 + (3 << 8) | (1 << 14) | 3727 + (6 << 17) | (1 << 20) | 3728 + (3 << 24); 3729 + } else { 3730 + reg_pmu_set = (4 << 1) | (7 << 4) | 3731 + (3 << 8) | (1 << 14) | 3732 + (6 << 17) | (1 << 20) | 3733 + (3 << 24); 3734 + } 3735 + } else { 3736 + reg_pmu_set = (5 << 1) | (7 << 4) | 3737 + (1 << 8) | (2 << 14) | 3738 + (6 << 17) | (1 << 20) | 3739 + (3 << 24) | (1 << 28); 3740 + } 3726 3741 3727 3742 REG_WRITE(ah, AR_PHY_PMU1, reg_pmu_set); 3728 3743 if (!is_pmu_set(ah, AR_PHY_PMU1, reg_pmu_set)) ··· 3768 3753 AR_RTC_REG_CONTROL1_SWREG_PROGRAM); 3769 3754 } 3770 3755 } else { 3771 - if (AR_SREV_9485(ah)) { 3756 + if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) { 3772 3757 REG_RMW_FIELD(ah, AR_PHY_PMU2, AR_PHY_PMU2_PGM, 0); 3773 3758 while (REG_READ_FIELD(ah, AR_PHY_PMU2, 3774 3759 AR_PHY_PMU2_PGM))