Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Revert "Staging: vme: Use BIT macro for bit field definitions."

This reverts commit d4ef13130ee00432c6e9077ebcf8396f7ca8fb6a.

It's wrong :(

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Anton Leshchenko <antonl1911@gmail.com>
Signed-off-by: Greg Kroah-Hartman gregkh@linuxfoundation.org

+51 -51
+51 -51
drivers/staging/vme/devices/vme_pio2.h
··· 68 68 2, 2, 2, 2, 2, 2, 2, 2, 69 69 3, 3, 3, 3, 3, 3, 3, 3 }; 70 70 71 - #define PIO2_CHANNEL0_BIT BIT(0) 72 - #define PIO2_CHANNEL1_BIT BIT(1) 73 - #define PIO2_CHANNEL2_BIT BIT(2) 74 - #define PIO2_CHANNEL3_BIT BIT(3) 75 - #define PIO2_CHANNEL4_BIT BIT(4) 76 - #define PIO2_CHANNEL5_BIT BIT(5) 77 - #define PIO2_CHANNEL6_BIT BIT(6) 78 - #define PIO2_CHANNEL7_BIT BIT(7) 79 - #define PIO2_CHANNEL8_BIT BIT(0) 80 - #define PIO2_CHANNEL9_BIT BIT(1) 81 - #define PIO2_CHANNEL10_BIT BIT(2) 82 - #define PIO2_CHANNEL11_BIT BIT(3) 83 - #define PIO2_CHANNEL12_BIT BIT(4) 84 - #define PIO2_CHANNEL13_BIT BIT(5) 85 - #define PIO2_CHANNEL14_BIT BIT(6) 86 - #define PIO2_CHANNEL15_BIT BIT(7) 87 - #define PIO2_CHANNEL16_BIT BIT(0) 88 - #define PIO2_CHANNEL17_BIT BIT(1) 89 - #define PIO2_CHANNEL18_BIT BIT(2) 90 - #define PIO2_CHANNEL19_BIT BIT(3) 91 - #define PIO2_CHANNEL20_BIT BIT(4) 92 - #define PIO2_CHANNEL21_BIT BIT(5) 93 - #define PIO2_CHANNEL22_BIT BIT(6) 94 - #define PIO2_CHANNEL23_BIT BIT(7) 95 - #define PIO2_CHANNEL24_BIT BIT(0) 96 - #define PIO2_CHANNEL25_BIT BIT(1) 97 - #define PIO2_CHANNEL26_BIT BIT(2) 98 - #define PIO2_CHANNEL27_BIT BIT(3) 99 - #define PIO2_CHANNEL28_BIT BIT(4) 100 - #define PIO2_CHANNEL29_BIT BIT(5) 101 - #define PIO2_CHANNEL30_BIT BIT(6) 102 - #define PIO2_CHANNEL31_BIT BIT(7) 71 + #define PIO2_CHANNEL0_BIT (1 << 0) 72 + #define PIO2_CHANNEL1_BIT (1 << 1) 73 + #define PIO2_CHANNEL2_BIT (1 << 2) 74 + #define PIO2_CHANNEL3_BIT (1 << 3) 75 + #define PIO2_CHANNEL4_BIT (1 << 4) 76 + #define PIO2_CHANNEL5_BIT (1 << 5) 77 + #define PIO2_CHANNEL6_BIT (1 << 6) 78 + #define PIO2_CHANNEL7_BIT (1 << 7) 79 + #define PIO2_CHANNEL8_BIT (1 << 0) 80 + #define PIO2_CHANNEL9_BIT (1 << 1) 81 + #define PIO2_CHANNEL10_BIT (1 << 2) 82 + #define PIO2_CHANNEL11_BIT (1 << 3) 83 + #define PIO2_CHANNEL12_BIT (1 << 4) 84 + #define PIO2_CHANNEL13_BIT (1 << 5) 85 + #define PIO2_CHANNEL14_BIT (1 << 6) 86 + #define PIO2_CHANNEL15_BIT (1 << 7) 87 + #define PIO2_CHANNEL16_BIT (1 << 0) 88 + #define PIO2_CHANNEL17_BIT (1 << 1) 89 + #define PIO2_CHANNEL18_BIT (1 << 2) 90 + #define PIO2_CHANNEL19_BIT (1 << 3) 91 + #define PIO2_CHANNEL20_BIT (1 << 4) 92 + #define PIO2_CHANNEL21_BIT (1 << 5) 93 + #define PIO2_CHANNEL22_BIT (1 << 6) 94 + #define PIO2_CHANNEL23_BIT (1 << 7) 95 + #define PIO2_CHANNEL24_BIT (1 << 0) 96 + #define PIO2_CHANNEL25_BIT (1 << 1) 97 + #define PIO2_CHANNEL26_BIT (1 << 2) 98 + #define PIO2_CHANNEL27_BIT (1 << 3) 99 + #define PIO2_CHANNEL28_BIT (1 << 4) 100 + #define PIO2_CHANNEL29_BIT (1 << 5) 101 + #define PIO2_CHANNEL30_BIT (1 << 6) 102 + #define PIO2_CHANNEL31_BIT (1 << 7) 103 103 104 104 static const int PIO2_CHANNEL_BIT[32] = { PIO2_CHANNEL0_BIT, PIO2_CHANNEL1_BIT, 105 105 PIO2_CHANNEL2_BIT, PIO2_CHANNEL3_BIT, ··· 120 120 }; 121 121 122 122 /* PIO2_REGS_INT_STAT_CNTR (0xc) */ 123 - #define PIO2_COUNTER0 BIT(0) 124 - #define PIO2_COUNTER1 BIT(1) 125 - #define PIO2_COUNTER2 BIT(2) 126 - #define PIO2_COUNTER3 BIT(3) 127 - #define PIO2_COUNTER4 BIT(4) 128 - #define PIO2_COUNTER5 BIT(5) 123 + #define PIO2_COUNTER0 (1 << 0) 124 + #define PIO2_COUNTER1 (1 << 1) 125 + #define PIO2_COUNTER2 (1 << 2) 126 + #define PIO2_COUNTER3 (1 << 3) 127 + #define PIO2_COUNTER4 (1 << 4) 128 + #define PIO2_COUNTER5 (1 << 5) 129 129 130 130 static const int PIO2_COUNTER[6] = { PIO2_COUNTER0, PIO2_COUNTER1, 131 131 PIO2_COUNTER2, PIO2_COUNTER3, ··· 133 133 134 134 /* PIO2_REGS_CTRL (0x18) */ 135 135 #define PIO2_VME_INT_MASK 0x7 136 - #define PIO2_LED BIT(6) 137 - #define PIO2_LOOP BIT(7) 136 + #define PIO2_LED (1 << 6) 137 + #define PIO2_LOOP (1 << 7) 138 138 139 139 /* PIO2_REGS_VME_VECTOR (0x19) */ 140 140 #define PIO2_VME_VECTOR_SPUR 0x0 ··· 179 179 PIO2_REGS_CTRL_WRD1 }; 180 180 181 181 #define PIO2_CNTR_SC_DEV0 0 182 - #define PIO2_CNTR_SC_DEV1 BIT(6) 183 - #define PIO2_CNTR_SC_DEV2 BIT(7) 184 - #define PIO2_CNTR_SC_RDBACK (BIT(6) | BIT(7)) 182 + #define PIO2_CNTR_SC_DEV1 (1 << 6) 183 + #define PIO2_CNTR_SC_DEV2 (2 << 6) 184 + #define PIO2_CNTR_SC_RDBACK (3 << 6) 185 185 186 186 static const int PIO2_CNTR_SC_DEV[6] = { PIO2_CNTR_SC_DEV0, PIO2_CNTR_SC_DEV1, 187 187 PIO2_CNTR_SC_DEV2, PIO2_CNTR_SC_DEV0, 188 188 PIO2_CNTR_SC_DEV1, PIO2_CNTR_SC_DEV2 }; 189 189 190 190 #define PIO2_CNTR_RW_LATCH 0 191 - #define PIO2_CNTR_RW_LSB BIT(4) 192 - #define PIO2_CNTR_RW_MSB BIT(5) 193 - #define PIO2_CNTR_RW_BOTH (BIT(4) | BIT(5)) 191 + #define PIO2_CNTR_RW_LSB (1 << 4) 192 + #define PIO2_CNTR_RW_MSB (2 << 4) 193 + #define PIO2_CNTR_RW_BOTH (3 << 4) 194 194 195 195 #define PIO2_CNTR_MODE0 0 196 - #define PIO2_CNTR_MODE1 BIT(1) 197 - #define PIO2_CNTR_MODE2 BIT(2) 198 - #define PIO2_CNTR_MODE3 (BIT(1) | BIT(2)) 199 - #define PIO2_CNTR_MODE4 BIT(4) 200 - #define PIO2_CNTR_MODE5 (BIT(1) | BIT(3)) 196 + #define PIO2_CNTR_MODE1 (1 << 1) 197 + #define PIO2_CNTR_MODE2 (2 << 1) 198 + #define PIO2_CNTR_MODE3 (3 << 1) 199 + #define PIO2_CNTR_MODE4 (4 << 1) 200 + #define PIO2_CNTR_MODE5 (5 << 1) 201 201 202 202 #define PIO2_CNTR_BCD 1 203 203