Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

TTY: rocket, fix more no-PCI warnings

Commit "TTY: rocket, fix compilation warning" fixed a compilation
warning, but there was still a problem with !CONFIG_PCI configs. So
fix them for good by coupling the PCI functions together and moving
them inside a common #ifdef.

Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Jiri Slaby and committed by
Greg Kroah-Hartman
416187ca 2b359172

+141 -147
+141 -147
drivers/tty/rocket.c
··· 150 150 AIOP_INTR_BIT_3 151 151 }; 152 152 153 + #ifdef CONFIG_PCI 153 154 static Word_t upci_aiop_intr_bits[AIOP_CTL_SIZE] = { 154 155 UPCI_AIOP_INTR_BIT_0, 155 156 UPCI_AIOP_INTR_BIT_1, 156 157 UPCI_AIOP_INTR_BIT_2, 157 158 UPCI_AIOP_INTR_BIT_3 158 159 }; 160 + #endif 159 161 160 162 static Byte_t RData[RDATASIZE] = { 161 163 0x00, 0x09, 0xf6, 0x82, ··· 229 227 static int __init init_ISA(int i); 230 228 static void rp_wait_until_sent(struct tty_struct *tty, int timeout); 231 229 static void rp_flush_buffer(struct tty_struct *tty); 232 - static void rmSpeakerReset(CONTROLLER_T * CtlP, unsigned long model); 233 230 static unsigned char GetLineNumber(int ctrl, int aiop, int ch); 234 231 static unsigned char SetLineNumber(int ctrl, int aiop, int ch); 235 232 static void rp_start(struct tty_struct *tty); ··· 242 241 static void sModemReset(CONTROLLER_T * CtlP, int chan, int on); 243 242 static void sPCIModemReset(CONTROLLER_T * CtlP, int chan, int on); 244 243 static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data); 245 - static int sPCIInitController(CONTROLLER_T * CtlP, int CtlNum, 246 - ByteIO_t * AiopIOList, int AiopIOListSize, 247 - WordIO_t ConfigIO, int IRQNum, Byte_t Frequency, 248 - int PeriodicOnly, int altChanRingIndicator, 249 - int UPCIRingInd); 250 244 static int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO, 251 245 ByteIO_t * AiopIOList, int AiopIOListSize, 252 246 int IRQNum, Byte_t Frequency, int PeriodicOnly); ··· 1771 1775 }; 1772 1776 MODULE_DEVICE_TABLE(pci, rocket_pci_ids); 1773 1777 1778 + /* Resets the speaker controller on RocketModem II and III devices */ 1779 + static void rmSpeakerReset(CONTROLLER_T * CtlP, unsigned long model) 1780 + { 1781 + ByteIO_t addr; 1782 + 1783 + /* RocketModem II speaker control is at the 8th port location of offset 0x40 */ 1784 + if ((model == MODEL_RP4M) || (model == MODEL_RP6M)) { 1785 + addr = CtlP->AiopIO[0] + 0x4F; 1786 + sOutB(addr, 0); 1787 + } 1788 + 1789 + /* RocketModem III speaker control is at the 1st port location of offset 0x80 */ 1790 + if ((model == MODEL_UPCI_RM3_8PORT) 1791 + || (model == MODEL_UPCI_RM3_4PORT)) { 1792 + addr = CtlP->AiopIO[0] + 0x88; 1793 + sOutB(addr, 0); 1794 + } 1795 + } 1796 + 1797 + /*************************************************************************** 1798 + Function: sPCIInitController 1799 + Purpose: Initialization of controller global registers and controller 1800 + structure. 1801 + Call: sPCIInitController(CtlP,CtlNum,AiopIOList,AiopIOListSize, 1802 + IRQNum,Frequency,PeriodicOnly) 1803 + CONTROLLER_T *CtlP; Ptr to controller structure 1804 + int CtlNum; Controller number 1805 + ByteIO_t *AiopIOList; List of I/O addresses for each AIOP. 1806 + This list must be in the order the AIOPs will be found on the 1807 + controller. Once an AIOP in the list is not found, it is 1808 + assumed that there are no more AIOPs on the controller. 1809 + int AiopIOListSize; Number of addresses in AiopIOList 1810 + int IRQNum; Interrupt Request number. Can be any of the following: 1811 + 0: Disable global interrupts 1812 + 3: IRQ 3 1813 + 4: IRQ 4 1814 + 5: IRQ 5 1815 + 9: IRQ 9 1816 + 10: IRQ 10 1817 + 11: IRQ 11 1818 + 12: IRQ 12 1819 + 15: IRQ 15 1820 + Byte_t Frequency: A flag identifying the frequency 1821 + of the periodic interrupt, can be any one of the following: 1822 + FREQ_DIS - periodic interrupt disabled 1823 + FREQ_137HZ - 137 Hertz 1824 + FREQ_69HZ - 69 Hertz 1825 + FREQ_34HZ - 34 Hertz 1826 + FREQ_17HZ - 17 Hertz 1827 + FREQ_9HZ - 9 Hertz 1828 + FREQ_4HZ - 4 Hertz 1829 + If IRQNum is set to 0 the Frequency parameter is 1830 + overidden, it is forced to a value of FREQ_DIS. 1831 + int PeriodicOnly: 1 if all interrupts except the periodic 1832 + interrupt are to be blocked. 1833 + 0 is both the periodic interrupt and 1834 + other channel interrupts are allowed. 1835 + If IRQNum is set to 0 the PeriodicOnly parameter is 1836 + overidden, it is forced to a value of 0. 1837 + Return: int: Number of AIOPs on the controller, or CTLID_NULL if controller 1838 + initialization failed. 1839 + 1840 + Comments: 1841 + If periodic interrupts are to be disabled but AIOP interrupts 1842 + are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0. 1843 + 1844 + If interrupts are to be completely disabled set IRQNum to 0. 1845 + 1846 + Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an 1847 + invalid combination. 1848 + 1849 + This function performs initialization of global interrupt modes, 1850 + but it does not actually enable global interrupts. To enable 1851 + and disable global interrupts use functions sEnGlobalInt() and 1852 + sDisGlobalInt(). Enabling of global interrupts is normally not 1853 + done until all other initializations are complete. 1854 + 1855 + Even if interrupts are globally enabled, they must also be 1856 + individually enabled for each channel that is to generate 1857 + interrupts. 1858 + 1859 + Warnings: No range checking on any of the parameters is done. 1860 + 1861 + No context switches are allowed while executing this function. 1862 + 1863 + After this function all AIOPs on the controller are disabled, 1864 + they can be enabled with sEnAiop(). 1865 + */ 1866 + static int sPCIInitController(CONTROLLER_T * CtlP, int CtlNum, 1867 + ByteIO_t * AiopIOList, int AiopIOListSize, 1868 + WordIO_t ConfigIO, int IRQNum, Byte_t Frequency, 1869 + int PeriodicOnly, int altChanRingIndicator, 1870 + int UPCIRingInd) 1871 + { 1872 + int i; 1873 + ByteIO_t io; 1874 + 1875 + CtlP->AltChanRingIndicator = altChanRingIndicator; 1876 + CtlP->UPCIRingInd = UPCIRingInd; 1877 + CtlP->CtlNum = CtlNum; 1878 + CtlP->CtlID = CTLID_0001; /* controller release 1 */ 1879 + CtlP->BusType = isPCI; /* controller release 1 */ 1880 + 1881 + if (ConfigIO) { 1882 + CtlP->isUPCI = 1; 1883 + CtlP->PCIIO = ConfigIO + _PCI_9030_INT_CTRL; 1884 + CtlP->PCIIO2 = ConfigIO + _PCI_9030_GPIO_CTRL; 1885 + CtlP->AiopIntrBits = upci_aiop_intr_bits; 1886 + } else { 1887 + CtlP->isUPCI = 0; 1888 + CtlP->PCIIO = 1889 + (WordIO_t) ((ByteIO_t) AiopIOList[0] + _PCI_INT_FUNC); 1890 + CtlP->AiopIntrBits = aiop_intr_bits; 1891 + } 1892 + 1893 + sPCIControllerEOI(CtlP); /* clear EOI if warm init */ 1894 + /* Init AIOPs */ 1895 + CtlP->NumAiop = 0; 1896 + for (i = 0; i < AiopIOListSize; i++) { 1897 + io = AiopIOList[i]; 1898 + CtlP->AiopIO[i] = (WordIO_t) io; 1899 + CtlP->AiopIntChanIO[i] = io + _INT_CHAN; 1900 + 1901 + CtlP->AiopID[i] = sReadAiopID(io); /* read AIOP ID */ 1902 + if (CtlP->AiopID[i] == AIOPID_NULL) /* if AIOP does not exist */ 1903 + break; /* done looking for AIOPs */ 1904 + 1905 + CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */ 1906 + sOutW((WordIO_t) io + _INDX_ADDR, _CLK_PRE); /* clock prescaler */ 1907 + sOutB(io + _INDX_DATA, sClockPrescale); 1908 + CtlP->NumAiop++; /* bump count of AIOPs */ 1909 + } 1910 + 1911 + if (CtlP->NumAiop == 0) 1912 + return (-1); 1913 + else 1914 + return (CtlP->NumAiop); 1915 + } 1916 + 1774 1917 /* 1775 1918 * Called when a PCI card is found. Retrieves and stores model information, 1776 1919 * init's aiopic and serial port hardware. ··· 2653 2518 else 2654 2519 return (CtlP->NumAiop); 2655 2520 } 2656 - 2657 - #ifdef CONFIG_PCI 2658 - /*************************************************************************** 2659 - Function: sPCIInitController 2660 - Purpose: Initialization of controller global registers and controller 2661 - structure. 2662 - Call: sPCIInitController(CtlP,CtlNum,AiopIOList,AiopIOListSize, 2663 - IRQNum,Frequency,PeriodicOnly) 2664 - CONTROLLER_T *CtlP; Ptr to controller structure 2665 - int CtlNum; Controller number 2666 - ByteIO_t *AiopIOList; List of I/O addresses for each AIOP. 2667 - This list must be in the order the AIOPs will be found on the 2668 - controller. Once an AIOP in the list is not found, it is 2669 - assumed that there are no more AIOPs on the controller. 2670 - int AiopIOListSize; Number of addresses in AiopIOList 2671 - int IRQNum; Interrupt Request number. Can be any of the following: 2672 - 0: Disable global interrupts 2673 - 3: IRQ 3 2674 - 4: IRQ 4 2675 - 5: IRQ 5 2676 - 9: IRQ 9 2677 - 10: IRQ 10 2678 - 11: IRQ 11 2679 - 12: IRQ 12 2680 - 15: IRQ 15 2681 - Byte_t Frequency: A flag identifying the frequency 2682 - of the periodic interrupt, can be any one of the following: 2683 - FREQ_DIS - periodic interrupt disabled 2684 - FREQ_137HZ - 137 Hertz 2685 - FREQ_69HZ - 69 Hertz 2686 - FREQ_34HZ - 34 Hertz 2687 - FREQ_17HZ - 17 Hertz 2688 - FREQ_9HZ - 9 Hertz 2689 - FREQ_4HZ - 4 Hertz 2690 - If IRQNum is set to 0 the Frequency parameter is 2691 - overidden, it is forced to a value of FREQ_DIS. 2692 - int PeriodicOnly: 1 if all interrupts except the periodic 2693 - interrupt are to be blocked. 2694 - 0 is both the periodic interrupt and 2695 - other channel interrupts are allowed. 2696 - If IRQNum is set to 0 the PeriodicOnly parameter is 2697 - overidden, it is forced to a value of 0. 2698 - Return: int: Number of AIOPs on the controller, or CTLID_NULL if controller 2699 - initialization failed. 2700 - 2701 - Comments: 2702 - If periodic interrupts are to be disabled but AIOP interrupts 2703 - are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0. 2704 - 2705 - If interrupts are to be completely disabled set IRQNum to 0. 2706 - 2707 - Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an 2708 - invalid combination. 2709 - 2710 - This function performs initialization of global interrupt modes, 2711 - but it does not actually enable global interrupts. To enable 2712 - and disable global interrupts use functions sEnGlobalInt() and 2713 - sDisGlobalInt(). Enabling of global interrupts is normally not 2714 - done until all other initializations are complete. 2715 - 2716 - Even if interrupts are globally enabled, they must also be 2717 - individually enabled for each channel that is to generate 2718 - interrupts. 2719 - 2720 - Warnings: No range checking on any of the parameters is done. 2721 - 2722 - No context switches are allowed while executing this function. 2723 - 2724 - After this function all AIOPs on the controller are disabled, 2725 - they can be enabled with sEnAiop(). 2726 - */ 2727 - static int sPCIInitController(CONTROLLER_T * CtlP, int CtlNum, 2728 - ByteIO_t * AiopIOList, int AiopIOListSize, 2729 - WordIO_t ConfigIO, int IRQNum, Byte_t Frequency, 2730 - int PeriodicOnly, int altChanRingIndicator, 2731 - int UPCIRingInd) 2732 - { 2733 - int i; 2734 - ByteIO_t io; 2735 - 2736 - CtlP->AltChanRingIndicator = altChanRingIndicator; 2737 - CtlP->UPCIRingInd = UPCIRingInd; 2738 - CtlP->CtlNum = CtlNum; 2739 - CtlP->CtlID = CTLID_0001; /* controller release 1 */ 2740 - CtlP->BusType = isPCI; /* controller release 1 */ 2741 - 2742 - if (ConfigIO) { 2743 - CtlP->isUPCI = 1; 2744 - CtlP->PCIIO = ConfigIO + _PCI_9030_INT_CTRL; 2745 - CtlP->PCIIO2 = ConfigIO + _PCI_9030_GPIO_CTRL; 2746 - CtlP->AiopIntrBits = upci_aiop_intr_bits; 2747 - } else { 2748 - CtlP->isUPCI = 0; 2749 - CtlP->PCIIO = 2750 - (WordIO_t) ((ByteIO_t) AiopIOList[0] + _PCI_INT_FUNC); 2751 - CtlP->AiopIntrBits = aiop_intr_bits; 2752 - } 2753 - 2754 - sPCIControllerEOI(CtlP); /* clear EOI if warm init */ 2755 - /* Init AIOPs */ 2756 - CtlP->NumAiop = 0; 2757 - for (i = 0; i < AiopIOListSize; i++) { 2758 - io = AiopIOList[i]; 2759 - CtlP->AiopIO[i] = (WordIO_t) io; 2760 - CtlP->AiopIntChanIO[i] = io + _INT_CHAN; 2761 - 2762 - CtlP->AiopID[i] = sReadAiopID(io); /* read AIOP ID */ 2763 - if (CtlP->AiopID[i] == AIOPID_NULL) /* if AIOP does not exist */ 2764 - break; /* done looking for AIOPs */ 2765 - 2766 - CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */ 2767 - sOutW((WordIO_t) io + _INDX_ADDR, _CLK_PRE); /* clock prescaler */ 2768 - sOutB(io + _INDX_DATA, sClockPrescale); 2769 - CtlP->NumAiop++; /* bump count of AIOPs */ 2770 - } 2771 - 2772 - if (CtlP->NumAiop == 0) 2773 - return (-1); 2774 - else 2775 - return (CtlP->NumAiop); 2776 - } 2777 - 2778 - /* Resets the speaker controller on RocketModem II and III devices */ 2779 - static void rmSpeakerReset(CONTROLLER_T * CtlP, unsigned long model) 2780 - { 2781 - ByteIO_t addr; 2782 - 2783 - /* RocketModem II speaker control is at the 8th port location of offset 0x40 */ 2784 - if ((model == MODEL_RP4M) || (model == MODEL_RP6M)) { 2785 - addr = CtlP->AiopIO[0] + 0x4F; 2786 - sOutB(addr, 0); 2787 - } 2788 - 2789 - /* RocketModem III speaker control is at the 1st port location of offset 0x80 */ 2790 - if ((model == MODEL_UPCI_RM3_8PORT) 2791 - || (model == MODEL_UPCI_RM3_4PORT)) { 2792 - addr = CtlP->AiopIO[0] + 0x88; 2793 - sOutB(addr, 0); 2794 - } 2795 - } 2796 - #endif 2797 2521 2798 2522 /*************************************************************************** 2799 2523 Function: sReadAiopID