[ARM] 4822/1: RealView: Change the REALVIEW_MPCORE configuration option

This patch changes the REALVIEW_MPCORE configuration option to
REALVIEW_EB_ARM11MP since this is only specific to RealView/EB.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by Catalin Marinas and committed by Russell King 41579f49 39e823e3

+15 -18
+2 -2
arch/arm/Kconfig
··· 611 612 config SMP 613 bool "Symmetric Multi-Processing (EXPERIMENTAL)" 614 - depends on EXPERIMENTAL && REALVIEW_MPCORE 615 help 616 This enables support for systems with more than one CPU. If you have 617 a system with only one CPU, like most personal computers, say N. If ··· 645 646 config LOCAL_TIMERS 647 bool "Use local timer interrupts" 648 - depends on SMP && REALVIEW_MPCORE 649 default y 650 help 651 Enable support for local timers on SMP platforms, rather then the
··· 611 612 config SMP 613 bool "Symmetric Multi-Processing (EXPERIMENTAL)" 614 + depends on EXPERIMENTAL && REALVIEW_EB_ARM11MP 615 help 616 This enables support for systems with more than one CPU. If you have 617 a system with only one CPU, like most personal computers, say N. If ··· 645 646 config LOCAL_TIMERS 647 bool "Use local timer interrupts" 648 + depends on SMP && REALVIEW_EB_ARM11MP 649 default y 650 help 651 Enable support for local timers on SMP platforms, rather then the
+9 -12
arch/arm/mach-realview/Kconfig
··· 7 help 8 Include support for the ARM(R) RealView Emulation Baseboard platform. 9 10 - config REALVIEW_MPCORE 11 - bool "Support MPcore tile" 12 depends on MACH_REALVIEW_EB 13 select CACHE_L2X0 14 help 15 - Enable support for the MPCore tile on the Realview platform. 16 - Since there are device address and interrupt differences, a 17 - kernel built with this option enabled is not compatible with 18 - other tiles. 19 20 - config REALVIEW_MPCORE_REVB 21 - bool "Support MPcore RevB tile" 22 - depends on REALVIEW_MPCORE 23 default n 24 help 25 - Enable support for the MPCore RevB tile on the Realview platform. 26 - Since there are device address differences, a 27 kernel built with this option enabled is not compatible with 28 - other tiles. 29 30 endmenu
··· 7 help 8 Include support for the ARM(R) RealView Emulation Baseboard platform. 9 10 + config REALVIEW_EB_ARM11MP 11 + bool "Support ARM11MPCore tile" 12 depends on MACH_REALVIEW_EB 13 select CACHE_L2X0 14 help 15 + Enable support for the ARM11MPCore tile on the Realview platform. 16 17 + config REALVIEW_EB_ARM11MP_REVB 18 + bool "Support ARM11MPCore RevB tile" 19 + depends on REALVIEW_EB_ARM11MP 20 default n 21 help 22 + Enable support for the ARM11MPCore RevB tile on the Realview 23 + platform. Since there are device address differences, a 24 kernel built with this option enabled is not compatible with 25 + other revisions of the ARM11MPCore tile. 26 27 endmenu
+1 -1
arch/arm/mach-realview/realview_eb.c
··· 261 gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29); 262 gic_cpu_init(0, gic_cpu_base_addr); 263 264 - #ifndef CONFIG_REALVIEW_MPCORE_REVB 265 /* board GIC, secondary */ 266 gic_dist_init(1, __io_address(REALVIEW_GIC_DIST_BASE), 64); 267 gic_cpu_init(1, __io_address(REALVIEW_GIC_CPU_BASE));
··· 261 gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29); 262 gic_cpu_init(0, gic_cpu_base_addr); 263 264 + #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB 265 /* board GIC, secondary */ 266 gic_dist_init(1, __io_address(REALVIEW_GIC_DIST_BASE), 64); 267 gic_cpu_init(1, __io_address(REALVIEW_GIC_CPU_BASE));
+3 -3
include/asm-arm/arch-realview/board-eb.h
··· 26 /* 27 * RealView EB + ARM11MPCore peripheral addresses 28 */ 29 - #ifdef CONFIG_REALVIEW_MPCORE_REVB 30 #define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */ 31 #define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */ 32 #define REALVIEW_EB11MP_TWD_BASE 0x10100700 ··· 143 #define NR_IRQS NR_IRQS_EB 144 #endif 145 146 - #if defined(CONFIG_REALVIEW_MPCORE) \ 147 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP)) 148 #undef MAX_GIC_NR 149 #define MAX_GIC_NR NR_GIC_EB11MP ··· 162 ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \ 163 == proc_type) 164 165 - #ifdef CONFIG_REALVIEW_MPCORE 166 #define core_tile_eb11mp() check_eb_proc(REALVIEW_EB_PROC_ARM11MP) 167 #else 168 #define core_tile_eb11mp() 0
··· 26 /* 27 * RealView EB + ARM11MPCore peripheral addresses 28 */ 29 + #ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB 30 #define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */ 31 #define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */ 32 #define REALVIEW_EB11MP_TWD_BASE 0x10100700 ··· 143 #define NR_IRQS NR_IRQS_EB 144 #endif 145 146 + #if defined(CONFIG_REALVIEW_EB_ARM11MP) \ 147 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP)) 148 #undef MAX_GIC_NR 149 #define MAX_GIC_NR NR_GIC_EB11MP ··· 162 ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \ 163 == proc_type) 164 165 + #ifdef CONFIG_REALVIEW_EB_ARM11MP 166 #define core_tile_eb11mp() check_eb_proc(REALVIEW_EB_PROC_ARM11MP) 167 #else 168 #define core_tile_eb11mp() 0