Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

MIPS: crypto: Fix CRC32 code

Commit 67512a8cf5a7 ("MIPS: Avoid macro redefinitions") changed how the
MIPS register macros were defined, in order to allow the code to compile
under LLVM/Clang.

The MIPS CRC32 code however wasn't updated accordingly, causing a build
bug when using a MIPS32r6 toolchain without CRC support.

Update the CRC32 code to use the macros correctly, to fix the build
failures.

Fixes: 67512a8cf5a7 ("MIPS: Avoid macro redefinitions")
Cc: <stable@vger.kernel.org>
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

authored by

Paul Cercueil and committed by
Thomas Bogendoerfer
41022eff bf64f7fe

+26 -20
+26 -20
arch/mips/crypto/crc32-mips.c
··· 28 28 }; 29 29 30 30 #ifndef TOOLCHAIN_SUPPORTS_CRC 31 - #define _ASM_MACRO_CRC32(OP, SZ, TYPE) \ 31 + #define _ASM_SET_CRC(OP, SZ, TYPE) \ 32 32 _ASM_MACRO_3R(OP, rt, rs, rt2, \ 33 33 ".ifnc \\rt, \\rt2\n\t" \ 34 34 ".error \"invalid operands \\\"" #OP " \\rt,\\rs,\\rt2\\\"\"\n\t" \ ··· 37 37 ((SZ) << 6) | ((TYPE) << 8)) \ 38 38 _ASM_INSN32_IF_MM(0x00000030 | (__rs << 16) | (__rt << 21) | \ 39 39 ((SZ) << 14) | ((TYPE) << 3))) 40 - _ASM_MACRO_CRC32(crc32b, 0, 0); 41 - _ASM_MACRO_CRC32(crc32h, 1, 0); 42 - _ASM_MACRO_CRC32(crc32w, 2, 0); 43 - _ASM_MACRO_CRC32(crc32d, 3, 0); 44 - _ASM_MACRO_CRC32(crc32cb, 0, 1); 45 - _ASM_MACRO_CRC32(crc32ch, 1, 1); 46 - _ASM_MACRO_CRC32(crc32cw, 2, 1); 47 - _ASM_MACRO_CRC32(crc32cd, 3, 1); 48 - #define _ASM_SET_CRC "" 40 + #define _ASM_UNSET_CRC(op, SZ, TYPE) ".purgem " #op "\n\t" 49 41 #else /* !TOOLCHAIN_SUPPORTS_CRC */ 50 - #define _ASM_SET_CRC ".set\tcrc\n\t" 42 + #define _ASM_SET_CRC(op, SZ, TYPE) ".set\tcrc\n\t" 43 + #define _ASM_UNSET_CRC(op, SZ, TYPE) 51 44 #endif 52 45 53 - #define _CRC32(crc, value, size, type) \ 54 - do { \ 55 - __asm__ __volatile__( \ 56 - ".set push\n\t" \ 57 - _ASM_SET_CRC \ 58 - #type #size " %0, %1, %0\n\t" \ 59 - ".set pop" \ 60 - : "+r" (crc) \ 61 - : "r" (value)); \ 46 + #define __CRC32(crc, value, op, SZ, TYPE) \ 47 + do { \ 48 + __asm__ __volatile__( \ 49 + ".set push\n\t" \ 50 + _ASM_SET_CRC(op, SZ, TYPE) \ 51 + #op " %0, %1, %0\n\t" \ 52 + _ASM_UNSET_CRC(op, SZ, TYPE) \ 53 + ".set pop" \ 54 + : "+r" (crc) \ 55 + : "r" (value)); \ 62 56 } while (0) 57 + 58 + #define _CRC32_crc32b(crc, value) __CRC32(crc, value, crc32b, 0, 0) 59 + #define _CRC32_crc32h(crc, value) __CRC32(crc, value, crc32h, 1, 0) 60 + #define _CRC32_crc32w(crc, value) __CRC32(crc, value, crc32w, 2, 0) 61 + #define _CRC32_crc32d(crc, value) __CRC32(crc, value, crc32d, 3, 0) 62 + #define _CRC32_crc32cb(crc, value) __CRC32(crc, value, crc32cb, 0, 1) 63 + #define _CRC32_crc32ch(crc, value) __CRC32(crc, value, crc32ch, 1, 1) 64 + #define _CRC32_crc32cw(crc, value) __CRC32(crc, value, crc32cw, 2, 1) 65 + #define _CRC32_crc32cd(crc, value) __CRC32(crc, value, crc32cd, 3, 1) 66 + 67 + #define _CRC32(crc, value, size, op) \ 68 + _CRC32_##op##size(crc, value) 63 69 64 70 #define CRC32(crc, value, size) \ 65 71 _CRC32(crc, value, size, crc32)