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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amdgpu: switch to SMN interface to operate RSMU index mode
This makes consistent with other regsiters' access in this module.
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Guchun Chen
and committed by
Alex Deucher
40e73314
fde812b3
+24
-5
+24
-5
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
+24
-5
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
···
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static void umc_v6_1_enable_umc_index_mode(struct amdgpu_device *adev)
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{
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-
WREG32_FIELD15(RSMU, 0, RSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU,
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uint32_t rsmu_umc_addr, rsmu_umc_val;
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+
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rsmu_umc_addr = SOC15_REG_OFFSET(RSMU, 0,
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mmRSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU);
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rsmu_umc_val = RREG32_PCIE(rsmu_umc_addr * 4);
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+
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rsmu_umc_val = REG_SET_FIELD(rsmu_umc_val,
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RSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU,
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RSMU_UMC_INDEX_MODE_EN, 1);
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+
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WREG32_PCIE(rsmu_umc_addr * 4, rsmu_umc_val);
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}
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static void umc_v6_1_disable_umc_index_mode(struct amdgpu_device *adev)
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{
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WREG32_FIELD15(RSMU, 0, RSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU,
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uint32_t rsmu_umc_addr, rsmu_umc_val;
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rsmu_umc_addr = SOC15_REG_OFFSET(RSMU, 0,
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mmRSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU);
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rsmu_umc_val = RREG32_PCIE(rsmu_umc_addr * 4);
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+
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rsmu_umc_val = REG_SET_FIELD(rsmu_umc_val,
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RSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU,
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RSMU_UMC_INDEX_MODE_EN, 0);
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WREG32_PCIE(rsmu_umc_addr * 4, rsmu_umc_val);
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}
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static uint32_t umc_v6_1_get_umc_index_mode_state(struct amdgpu_device *adev)
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{
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uint32_t rsmu_umc_index;
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uint32_t rsmu_umc_addr, rsmu_umc_val;
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rsmu_umc_index = RREG32_SOC15(RSMU, 0,
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rsmu_umc_addr = SOC15_REG_OFFSET(RSMU, 0,
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mmRSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU);
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rsmu_umc_val = RREG32_PCIE(rsmu_umc_addr * 4);
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return REG_GET_FIELD(rsmu_umc_index,
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return REG_GET_FIELD(rsmu_umc_val,
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RSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU,
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RSMU_UMC_INDEX_MODE_EN);
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}