x86/platform/iosf_mbi: Remove duplicate definitions

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

The read and write opcodes are global for all units on SoC and even across
Intel SoCs. Remove duplication of corresponding constants. At the same time
convert all current users.

No functional change.

Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Boon Leong Ong <boon.leong.ong@intel.com>
Acked-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

authored by

Andy Shevchenko and committed by

Rafael J. Wysocki 10 years ago 4077a387 527e9316

+85 -130

7 changed files

expand all

arch

x86

include

asm

iosf_mbi.h

platform

atom

punit_atom_debug.c

intel-quark

imr.c

drivers

i2c

busses

i2c-designware-baytrail.c

powercap

intel_rapl.c

thermal

intel_quark_dts_thermal.c

intel_soc_dts_iosf.c

+11 -38

arch/x86/include/asm/iosf_mbi.h

··· 1 1 /* 2 - * iosf_mbi.h: Intel OnChip System Fabric MailBox access support 2 + * Intel OnChip System Fabric MailBox access support 3 3 */ 4 4 5 5 #ifndef IOSF_MBI_SYMS_H ··· 16 16 #define MBI_MASK_LO 0x000000FF 17 17 #define MBI_ENABLE 0xF0 18 18 19 + /* IOSF SB read/write opcodes */ 20 + #define MBI_MMIO_READ 0x00 21 + #define MBI_MMIO_WRITE 0x01 22 + #define MBI_CR_READ 0x06 23 + #define MBI_CR_WRITE 0x07 24 + #define MBI_REG_READ 0x10 25 + #define MBI_REG_WRITE 0x11 26 + #define MBI_ESRAM_READ 0x12 27 + #define MBI_ESRAM_WRITE 0x13 28 + 19 29 /* Baytrail available units */ 20 30 #define BT_MBI_UNIT_AUNIT 0x00 21 31 #define BT_MBI_UNIT_SMC 0x01 ··· 38 28 #define BT_MBI_UNIT_SATA 0xA3 39 29 #define BT_MBI_UNIT_PCIE 0xA6 40 30 41 - /* Baytrail read/write opcodes */ 42 - #define BT_MBI_AUNIT_READ 0x10 43 - #define BT_MBI_AUNIT_WRITE 0x11 44 - #define BT_MBI_SMC_READ 0x10 45 - #define BT_MBI_SMC_WRITE 0x11 46 - #define BT_MBI_CPU_READ 0x10 47 - #define BT_MBI_CPU_WRITE 0x11 48 - #define BT_MBI_BUNIT_READ 0x10 49 - #define BT_MBI_BUNIT_WRITE 0x11 50 - #define BT_MBI_PMC_READ 0x06 51 - #define BT_MBI_PMC_WRITE 0x07 52 - #define BT_MBI_GFX_READ 0x00 53 - #define BT_MBI_GFX_WRITE 0x01 54 - #define BT_MBI_SMIO_READ 0x06 55 - #define BT_MBI_SMIO_WRITE 0x07 56 - #define BT_MBI_USB_READ 0x06 57 - #define BT_MBI_USB_WRITE 0x07 58 - #define BT_MBI_SATA_READ 0x00 59 - #define BT_MBI_SATA_WRITE 0x01 60 - #define BT_MBI_PCIE_READ 0x00 61 - #define BT_MBI_PCIE_WRITE 0x01 62 - 63 31 /* Quark available units */ 64 32 #define QRK_MBI_UNIT_HBA 0x00 65 33 #define QRK_MBI_UNIT_HB 0x03 66 34 #define QRK_MBI_UNIT_RMU 0x04 67 35 #define QRK_MBI_UNIT_MM 0x05 68 - #define QRK_MBI_UNIT_MMESRAM 0x05 69 36 #define QRK_MBI_UNIT_SOC 0x31 70 - 71 - /* Quark read/write opcodes */ 72 - #define QRK_MBI_HBA_READ 0x10 73 - #define QRK_MBI_HBA_WRITE 0x11 74 - #define QRK_MBI_HB_READ 0x10 75 - #define QRK_MBI_HB_WRITE 0x11 76 - #define QRK_MBI_RMU_READ 0x10 77 - #define QRK_MBI_RMU_WRITE 0x11 78 - #define QRK_MBI_MM_READ 0x10 79 - #define QRK_MBI_MM_WRITE 0x11 80 - #define QRK_MBI_MMESRAM_READ 0x12 81 - #define QRK_MBI_MMESRAM_WRITE 0x13 82 - #define QRK_MBI_SOC_READ 0x06 83 - #define QRK_MBI_SOC_WRITE 0x07 84 37 85 38 #if IS_ENABLED(CONFIG_IOSF_MBI) 86 39

+2 -5

arch/x86/platform/atom/punit_atom_debug.c

··· 25 25 #include <asm/cpu_device_id.h> 26 26 #include <asm/iosf_mbi.h> 27 27 28 - /* Side band Interface port */ 29 - #define PUNIT_PORT 0x04 30 28 /* Power gate status reg */ 31 29 #define PWRGT_STATUS 0x61 32 30 /* Subsystem config/status Video processor */ ··· 83 85 84 86 seq_puts(seq_file, "\n\nPUNIT NORTH COMPLEX DEVICES :\n"); 85 87 while (punit_devp->name) { 86 - status = iosf_mbi_read(PUNIT_PORT, BT_MBI_PMC_READ, 87 - punit_devp->reg, 88 - &punit_pwr_status); 88 + status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, 89 + punit_devp->reg, &punit_pwr_status); 89 90 if (status) { 90 91 seq_printf(seq_file, "%9s : Read Failed\n", 91 92 punit_devp->name);

+10 -18

arch/x86/platform/intel-quark/imr.c

··· 111 111 u32 reg = imr_id * IMR_NUM_REGS + idev->reg_base; 112 112 int ret; 113 113 114 - ret = iosf_mbi_read(QRK_MBI_UNIT_MM, QRK_MBI_MM_READ, 115 - reg++, &imr->addr_lo); 114 + ret = iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->addr_lo); 116 115 if (ret) 117 116 return ret; 118 117 119 - ret = iosf_mbi_read(QRK_MBI_UNIT_MM, QRK_MBI_MM_READ, 120 - reg++, &imr->addr_hi); 118 + ret = iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->addr_hi); 121 119 if (ret) 122 120 return ret; 123 121 124 - ret = iosf_mbi_read(QRK_MBI_UNIT_MM, QRK_MBI_MM_READ, 125 - reg++, &imr->rmask); 122 + ret = iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->rmask); 126 123 if (ret) 127 124 return ret; 128 125 129 - return iosf_mbi_read(QRK_MBI_UNIT_MM, QRK_MBI_MM_READ, 130 - reg++, &imr->wmask); 126 + return iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->wmask); 131 127 } 132 128 133 129 /** ··· 147 151 148 152 local_irq_save(flags); 149 153 150 - ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE, reg++, 151 - imr->addr_lo); 154 + ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->addr_lo); 152 155 if (ret) 153 156 goto failed; 154 157 155 - ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE, 156 - reg++, imr->addr_hi); 158 + ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->addr_hi); 157 159 if (ret) 158 160 goto failed; 159 161 160 - ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE, 161 - reg++, imr->rmask); 162 + ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->rmask); 162 163 if (ret) 163 164 goto failed; 164 165 165 - ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE, 166 - reg++, imr->wmask); 166 + ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->wmask); 167 167 if (ret) 168 168 goto failed; 169 169 170 170 /* Lock bit must be set separately to addr_lo address bits. */ 171 171 if (lock) { 172 172 imr->addr_lo |= IMR_LOCK; 173 - ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE, 174 - reg - IMR_NUM_REGS, imr->addr_lo); 173 + ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, 174 + reg - IMR_NUM_REGS, imr->addr_lo); 175 175 if (ret) 176 176 goto failed; 177 177 }

+6 -11

drivers/i2c/busses/i2c-designware-baytrail.c

··· 34 34 u32 data; 35 35 int ret; 36 36 37 - ret = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, PUNIT_SEMAPHORE, 38 - &data); 37 + ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, PUNIT_SEMAPHORE, &data); 39 38 if (ret) { 40 39 dev_err(dev, "iosf failed to read punit semaphore\n"); 41 40 return ret; ··· 49 50 { 50 51 u32 data; 51 52 52 - if (iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 53 - PUNIT_SEMAPHORE, &data)) { 53 + if (iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, PUNIT_SEMAPHORE, &data)) { 54 54 dev_err(dev, "iosf failed to reset punit semaphore during read\n"); 55 55 return; 56 56 } 57 57 58 58 data &= ~PUNIT_SEMAPHORE_BIT; 59 - if (iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 60 - PUNIT_SEMAPHORE, data)) 59 + if (iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, PUNIT_SEMAPHORE, data)) 61 60 dev_err(dev, "iosf failed to reset punit semaphore during write\n"); 62 61 } 63 62 64 63 static int baytrail_i2c_acquire(struct dw_i2c_dev *dev) 65 64 { 66 - u32 sem; 65 + u32 sem = PUNIT_SEMAPHORE_ACQUIRE; 67 66 int ret; 68 67 unsigned long start, end; 69 68 ··· 74 77 return 0; 75 78 76 79 /* host driver writes to side band semaphore register */ 77 - ret = iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 78 - PUNIT_SEMAPHORE, PUNIT_SEMAPHORE_ACQUIRE); 80 + ret = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, PUNIT_SEMAPHORE, sem); 79 81 if (ret) { 80 82 dev_err(dev->dev, "iosf punit semaphore request failed\n"); 81 83 return ret; ··· 98 102 dev_err(dev->dev, "punit semaphore timed out, resetting\n"); 99 103 reset_semaphore(dev->dev); 100 104 101 - ret = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 102 - PUNIT_SEMAPHORE, &sem); 105 + ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, PUNIT_SEMAPHORE, &sem); 103 106 if (ret) 104 107 dev_err(dev->dev, "iosf failed to read punit semaphore\n"); 105 108 else

+5 -5

drivers/powercap/intel_rapl.c

··· 988 988 } 989 989 990 990 if (!power_ctrl_orig_val) 991 - iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_PMC_READ, 992 - rapl_defaults->floor_freq_reg_addr, 993 - &power_ctrl_orig_val); 991 + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_CR_READ, 992 + rapl_defaults->floor_freq_reg_addr, 993 + &power_ctrl_orig_val); 994 994 mdata = power_ctrl_orig_val; 995 995 if (enable) { 996 996 mdata &= ~(0x7f << 8); 997 997 mdata |= 1 << 8; 998 998 } 999 - iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_PMC_WRITE, 1000 - rapl_defaults->floor_freq_reg_addr, mdata); 999 + iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_CR_WRITE, 1000 + rapl_defaults->floor_freq_reg_addr, mdata); 1001 1001 } 1002 1002 1003 1003 static u64 rapl_compute_time_window_core(struct rapl_package *rp, u64 value,

+30 -31

drivers/thermal/intel_quark_dts_thermal.c

··· 125 125 struct soc_sensor_entry *aux_entry = tzd->devdata; 126 126 int ret; 127 127 128 - ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ, 129 - QRK_DTS_REG_OFFSET_ENABLE, &out); 128 + ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ, 129 + QRK_DTS_REG_OFFSET_ENABLE, &out); 130 130 if (ret) 131 131 return ret; 132 132 ··· 137 137 138 138 if (!aux_entry->locked) { 139 139 out |= QRK_DTS_ENABLE_BIT; 140 - ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_WRITE, 141 - QRK_DTS_REG_OFFSET_ENABLE, out); 140 + ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, MBI_REG_WRITE, 141 + QRK_DTS_REG_OFFSET_ENABLE, out); 142 142 if (ret) 143 143 return ret; 144 144 ··· 158 158 struct soc_sensor_entry *aux_entry = tzd->devdata; 159 159 int ret; 160 160 161 - ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ, 162 - QRK_DTS_REG_OFFSET_ENABLE, &out); 161 + ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ, 162 + QRK_DTS_REG_OFFSET_ENABLE, &out); 163 163 if (ret) 164 164 return ret; 165 165 ··· 170 170 171 171 if (!aux_entry->locked) { 172 172 out &= ~QRK_DTS_ENABLE_BIT; 173 - ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_WRITE, 174 - QRK_DTS_REG_OFFSET_ENABLE, out); 173 + ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, MBI_REG_WRITE, 174 + QRK_DTS_REG_OFFSET_ENABLE, out); 175 175 176 176 if (ret) 177 177 return ret; ··· 192 192 u32 out; 193 193 194 194 mutex_lock(&dts_update_mutex); 195 - status = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ, 196 - QRK_DTS_REG_OFFSET_PTPS, &out); 195 + status = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ, 196 + QRK_DTS_REG_OFFSET_PTPS, &out); 197 197 mutex_unlock(&dts_update_mutex); 198 198 199 199 if (status) ··· 236 236 goto failed; 237 237 } 238 238 239 - ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ, 240 - QRK_DTS_REG_OFFSET_PTPS, &store_ptps); 239 + ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ, 240 + QRK_DTS_REG_OFFSET_PTPS, &store_ptps); 241 241 if (ret) 242 242 goto failed; 243 243 ··· 262 262 out |= (temp_out & QRK_DTS_MASK_TP_THRES) << 263 263 (trip * QRK_DTS_SHIFT_TP); 264 264 265 - ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_WRITE, 266 - QRK_DTS_REG_OFFSET_PTPS, out); 265 + ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, MBI_REG_WRITE, 266 + QRK_DTS_REG_OFFSET_PTPS, out); 267 267 268 268 failed: 269 269 mutex_unlock(&dts_update_mutex); ··· 294 294 int ret; 295 295 296 296 mutex_lock(&dts_update_mutex); 297 - ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ, 298 - QRK_DTS_REG_OFFSET_TEMP, &out); 297 + ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ, 298 + QRK_DTS_REG_OFFSET_TEMP, &out); 299 299 mutex_unlock(&dts_update_mutex); 300 300 301 301 if (ret) ··· 350 350 if (aux_entry) { 351 351 if (!aux_entry->locked) { 352 352 mutex_lock(&dts_update_mutex); 353 - iosf_mbi_write(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_WRITE, 354 - QRK_DTS_REG_OFFSET_ENABLE, 355 - aux_entry->store_dts_enable); 353 + iosf_mbi_write(QRK_MBI_UNIT_RMU, MBI_REG_WRITE, 354 + QRK_DTS_REG_OFFSET_ENABLE, 355 + aux_entry->store_dts_enable); 356 356 357 - iosf_mbi_write(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_WRITE, 358 - QRK_DTS_REG_OFFSET_PTPS, 359 - aux_entry->store_ptps); 357 + iosf_mbi_write(QRK_MBI_UNIT_RMU, MBI_REG_WRITE, 358 + QRK_DTS_REG_OFFSET_PTPS, 359 + aux_entry->store_ptps); 360 360 mutex_unlock(&dts_update_mutex); 361 361 } 362 362 thermal_zone_device_unregister(aux_entry->tzone); ··· 378 378 } 379 379 380 380 /* Check if DTS register is locked */ 381 - err = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ, 382 - QRK_DTS_REG_OFFSET_LOCK, 383 - &out); 381 + err = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ, 382 + QRK_DTS_REG_OFFSET_LOCK, &out); 384 383 if (err) 385 384 goto err_ret; 386 385 ··· 394 395 /* Store DTS default state if DTS registers are not locked */ 395 396 if (!aux_entry->locked) { 396 397 /* Store DTS default enable for restore on exit */ 397 - err = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ, 398 - QRK_DTS_REG_OFFSET_ENABLE, 399 - &aux_entry->store_dts_enable); 398 + err = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ, 399 + QRK_DTS_REG_OFFSET_ENABLE, 400 + &aux_entry->store_dts_enable); 400 401 if (err) 401 402 goto err_ret; 402 403 403 404 /* Store DTS default PTPS register for restore on exit */ 404 - err = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ, 405 - QRK_DTS_REG_OFFSET_PTPS, 406 - &aux_entry->store_ptps); 405 + err = iosf_mbi_read(QRK_MBI_UNIT_RMU, MBI_REG_READ, 406 + QRK_DTS_REG_OFFSET_PTPS, 407 + &aux_entry->store_ptps); 407 408 if (err) 408 409 goto err_ret; 409 410 }

+21 -22

drivers/thermal/intel_soc_dts_iosf.c

··· 90 90 dts = tzd->devdata; 91 91 sensors = dts->sensors; 92 92 mutex_lock(&sensors->dts_update_lock); 93 - status = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 93 + status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, 94 94 SOC_DTS_OFFSET_PTPS, &out); 95 95 mutex_unlock(&sensors->dts_update_lock); 96 96 if (status) ··· 124 124 125 125 temp_out = (sensors->tj_max - temp) / 1000; 126 126 127 - status = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 127 + status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, 128 128 SOC_DTS_OFFSET_PTPS, &store_ptps); 129 129 if (status) 130 130 return status; 131 131 132 132 out = (store_ptps & ~(0xFF << (thres_index * 8))); 133 133 out |= (temp_out & 0xFF) << (thres_index * 8); 134 - status = iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 134 + status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, 135 135 SOC_DTS_OFFSET_PTPS, out); 136 136 if (status) 137 137 return status; 138 138 139 139 pr_debug("update_trip_temp PTPS = %x\n", out); 140 - status = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 140 + status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, 141 141 SOC_DTS_OFFSET_PTMC, &out); 142 142 if (status) 143 143 goto err_restore_ptps; 144 144 145 145 store_ptmc = out; 146 146 147 - status = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 147 + status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, 148 148 SOC_DTS_TE_AUX0 + thres_index, 149 149 &te_out); 150 150 if (status) ··· 167 167 out &= ~SOC_DTS_AUX0_ENABLE_BIT; 168 168 te_out &= ~int_enable_bit; 169 169 } 170 - status = iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 170 + status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, 171 171 SOC_DTS_OFFSET_PTMC, out); 172 172 if (status) 173 173 goto err_restore_te_out; 174 174 175 - status = iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 175 + status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, 176 176 SOC_DTS_TE_AUX0 + thres_index, 177 177 te_out); 178 178 if (status) ··· 182 182 183 183 return 0; 184 184 err_restore_te_out: 185 - iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 185 + iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, 186 186 SOC_DTS_OFFSET_PTMC, store_te_out); 187 187 err_restore_ptmc: 188 - iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 188 + iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, 189 189 SOC_DTS_OFFSET_PTMC, store_ptmc); 190 190 err_restore_ptps: 191 - iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 191 + iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, 192 192 SOC_DTS_OFFSET_PTPS, store_ptps); 193 193 /* Nothing we can do if restore fails */ 194 194 ··· 235 235 236 236 dts = tzd->devdata; 237 237 sensors = dts->sensors; 238 - status = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 238 + status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, 239 239 SOC_DTS_OFFSET_TEMP, &out); 240 240 if (status) 241 241 return status; ··· 259 259 u32 out; 260 260 int ret; 261 261 262 - ret = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 262 + ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, 263 263 SOC_DTS_OFFSET_ENABLE, &out); 264 264 if (ret) 265 265 return ret; 266 266 267 267 if (!(out & BIT(id))) { 268 268 out |= BIT(id); 269 - ret = iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 269 + ret = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, 270 270 SOC_DTS_OFFSET_ENABLE, out); 271 271 if (ret) 272 272 return ret; ··· 278 278 static void remove_dts_thermal_zone(struct intel_soc_dts_sensor_entry *dts) 279 279 { 280 280 if (dts) { 281 - iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 281 + iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, 282 282 SOC_DTS_OFFSET_ENABLE, dts->store_status); 283 283 thermal_zone_device_unregister(dts->tzone); 284 284 } ··· 296 296 int i; 297 297 298 298 /* Store status to restor on exit */ 299 - ret = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 300 - SOC_DTS_OFFSET_ENABLE, 301 - &dts->store_status); 299 + ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, 300 + SOC_DTS_OFFSET_ENABLE, &dts->store_status); 302 301 if (ret) 303 302 goto err_ret; 304 303 ··· 310 311 } 311 312 312 313 /* Check if the writable trip we provide is not used by BIOS */ 313 - ret = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 314 + ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, 314 315 SOC_DTS_OFFSET_PTPS, &store_ptps); 315 316 if (ret) 316 317 trip_mask = 0; ··· 373 374 374 375 spin_lock_irqsave(&sensors->intr_notify_lock, flags); 375 376 376 - status = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 377 + status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, 377 378 SOC_DTS_OFFSET_PTMC, &ptmc_out); 378 379 ptmc_out |= SOC_DTS_PTMC_APIC_DEASSERT_BIT; 379 - status = iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 380 + status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, 380 381 SOC_DTS_OFFSET_PTMC, ptmc_out); 381 382 382 - status = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, 383 + status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, 383 384 SOC_DTS_OFFSET_PTTSS, &sticky_out); 384 385 pr_debug("status %d PTTSS %x\n", status, sticky_out); 385 386 if (sticky_out & SOC_DTS_TRIP_MASK) { 386 387 int i; 387 388 /* reset sticky bit */ 388 - status = iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE, 389 + status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, 389 390 SOC_DTS_OFFSET_PTTSS, sticky_out); 390 391 spin_unlock_irqrestore(&sensors->intr_notify_lock, flags); 391 392