Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'pm-cpufreq'

* pm-cpufreq: (41 commits)
cpufreq: tegra: call CPUFREQ_POSTCHANGE notfier in error cases
cpufreq: s3c64xx: call CPUFREQ_POSTCHANGE notfier in error cases
cpufreq: omap: call CPUFREQ_POSTCHANGE notfier in error cases
cpufreq: imx6q: call CPUFREQ_POSTCHANGE notfier in error cases
cpufreq: exynos: call CPUFREQ_POSTCHANGE notfier in error cases
cpufreq: dbx500: call CPUFREQ_POSTCHANGE notfier in error cases
cpufreq: davinci: call CPUFREQ_POSTCHANGE notfier in error cases
cpufreq: arm-big-little: call CPUFREQ_POSTCHANGE notfier in error cases
cpufreq: powernow-k8: call CPUFREQ_POSTCHANGE notfier in error cases
cpufreq: pcc: call CPUFREQ_POSTCHANGE notfier in error cases
cpufreq: e_powersaver: call CPUFREQ_POSTCHANGE notfier in error cases
cpufreq: ACPI: call CPUFREQ_POSTCHANGE notfier in error cases
cpufreq: s3c2416: fix forgotten driver_data conversions
cpufreq: make __cpufreq_notify_transition() static
cpufreq: Fix minor formatting issues
cpufreq: Fix governor start/stop race condition
cpufreq: Simplify userspace governor
cpufreq: X86_AMD_FREQ_SENSITIVITY: select CPU_FREQ_TABLE
cpufreq: tegra: create CONFIG_ARM_TEGRA_CPUFREQ
cpufreq: S3C2416/S3C64XX: select CPU_FREQ_TABLE
...

+929 -543
+2 -8
Documentation/cpu-freq/cpu-drivers.txt
··· 186 186 frequencies, a "frequency table" with some functions might assist in 187 187 some work of the processor driver. Such a "frequency table" consists 188 188 of an array of struct cpufreq_frequency_table entries, with any value in 189 - "index" you want to use, and the corresponding frequency in 189 + "driver_data" you want to use, and the corresponding frequency in 190 190 "frequency". At the end of the table, you need to add a 191 191 cpufreq_frequency_table entry with frequency set to CPUFREQ_TABLE_END. And 192 192 if you want to skip one entry in the table, set the frequency to ··· 214 214 is the corresponding frequency table helper for the ->target 215 215 stage. Just pass the values to this function, and the unsigned int 216 216 index returns the number of the frequency table entry which contains 217 - the frequency the CPU shall be set to. PLEASE NOTE: This is not the 218 - "index" which is in this cpufreq_table_entry.index, but instead 219 - cpufreq_table[index]. So, the new frequency is 220 - cpufreq_table[index].frequency, and the value you stored into the 221 - frequency table "index" field is 222 - cpufreq_table[index].index. 223 - 217 + the frequency the CPU shall be set to.
+2 -1
MAINTAINERS
··· 2218 2218 L: cpufreq@vger.kernel.org 2219 2219 L: linux-pm@vger.kernel.org 2220 2220 S: Maintained 2221 - T: git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git 2221 + T: git git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git 2222 + T: git git://git.linaro.org/people/vireshk/linux.git (For ARM Updates) 2222 2223 F: drivers/cpufreq/ 2223 2224 F: include/linux/cpufreq.h 2224 2225
+1
arch/arm/mach-davinci/Kconfig
··· 40 40 bool "DA850/OMAP-L138/AM18x based system" 41 41 select ARCH_DAVINCI_DA8XX 42 42 select ARCH_HAS_CPUFREQ 43 + select CPU_FREQ_TABLE 43 44 select CP_INTC 44 45 45 46 config ARCH_DAVINCI_DA8XX
+4 -4
arch/arm/mach-davinci/da850.c
··· 1004 1004 1005 1005 #define OPP(freq) \ 1006 1006 { \ 1007 - .index = (unsigned int) &da850_opp_##freq, \ 1007 + .driver_data = (unsigned int) &da850_opp_##freq, \ 1008 1008 .frequency = freq * 1000, \ 1009 1009 } 1010 1010 ··· 1016 1016 OPP(200), 1017 1017 OPP(96), 1018 1018 { 1019 - .index = 0, 1019 + .driver_data = 0, 1020 1020 .frequency = CPUFREQ_TABLE_END, 1021 1021 }, 1022 1022 }; ··· 1044 1044 if (!cvdd) 1045 1045 return -ENODEV; 1046 1046 1047 - opp = (struct da850_opp *) cpufreq_info.freq_table[index].index; 1047 + opp = (struct da850_opp *) cpufreq_info.freq_table[index].driver_data; 1048 1048 1049 1049 return regulator_set_voltage(cvdd, opp->cvdd_min, opp->cvdd_max); 1050 1050 } ··· 1125 1125 struct pll_data *pll = clk->pll_data; 1126 1126 int ret; 1127 1127 1128 - opp = (struct da850_opp *) cpufreq_info.freq_table[index].index; 1128 + opp = (struct da850_opp *) cpufreq_info.freq_table[index].driver_data; 1129 1129 prediv = opp->prediv; 1130 1130 mult = opp->mult; 1131 1131 postdiv = opp->postdiv;
+3
arch/arm/mach-pxa/Kconfig
··· 615 615 config PXA25x 616 616 bool 617 617 select CPU_XSCALE 618 + select CPU_FREQ_TABLE if CPU_FREQ 618 619 help 619 620 Select code specific to PXA21x/25x/26x variants 620 621 621 622 config PXA27x 622 623 bool 623 624 select CPU_XSCALE 625 + select CPU_FREQ_TABLE if CPU_FREQ 624 626 help 625 627 Select code specific to PXA27x variants 626 628 ··· 635 633 config PXA3xx 636 634 bool 637 635 select CPU_XSC3 636 + select CPU_FREQ_TABLE if CPU_FREQ 638 637 help 639 638 Select code specific to PXA3xx variants 640 639
+1 -1
arch/arm/mach-s3c24xx/cpufreq-utils.c
··· 60 60 */ 61 61 void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg) 62 62 { 63 - __raw_writel(cfg->pll.index, S3C2410_MPLLCON); 63 + __raw_writel(cfg->pll.driver_data, S3C2410_MPLLCON); 64 64 }
+2 -2
arch/arm/mach-s3c24xx/cpufreq.c
··· 70 70 cfg->freq.pclk = pclk = clk_get_rate(clk_pclk); 71 71 cfg->freq.armclk = armclk = clk_get_rate(clk_arm); 72 72 73 - cfg->pll.index = __raw_readl(S3C2410_MPLLCON); 73 + cfg->pll.driver_data = __raw_readl(S3C2410_MPLLCON); 74 74 cfg->pll.frequency = fclk; 75 75 76 76 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10); ··· 431 431 static int s3c_cpufreq_suspend(struct cpufreq_policy *policy) 432 432 { 433 433 suspend_pll.frequency = clk_get_rate(_clk_mpll); 434 - suspend_pll.index = __raw_readl(S3C2410_MPLLCON); 434 + suspend_pll.driver_data = __raw_readl(S3C2410_MPLLCON); 435 435 suspend_freq = s3c_cpufreq_get(0) * 1000; 436 436 437 437 return 0;
+27 -27
arch/arm/mach-s3c24xx/pll-s3c2410.c
··· 33 33 #include <plat/cpu-freq-core.h> 34 34 35 35 static struct cpufreq_frequency_table pll_vals_12MHz[] = { 36 - { .frequency = 34000000, .index = PLLVAL(82, 2, 3), }, 37 - { .frequency = 45000000, .index = PLLVAL(82, 1, 3), }, 38 - { .frequency = 51000000, .index = PLLVAL(161, 3, 3), }, 39 - { .frequency = 48000000, .index = PLLVAL(120, 2, 3), }, 40 - { .frequency = 56000000, .index = PLLVAL(142, 2, 3), }, 41 - { .frequency = 68000000, .index = PLLVAL(82, 2, 2), }, 42 - { .frequency = 79000000, .index = PLLVAL(71, 1, 2), }, 43 - { .frequency = 85000000, .index = PLLVAL(105, 2, 2), }, 44 - { .frequency = 90000000, .index = PLLVAL(112, 2, 2), }, 45 - { .frequency = 101000000, .index = PLLVAL(127, 2, 2), }, 46 - { .frequency = 113000000, .index = PLLVAL(105, 1, 2), }, 47 - { .frequency = 118000000, .index = PLLVAL(150, 2, 2), }, 48 - { .frequency = 124000000, .index = PLLVAL(116, 1, 2), }, 49 - { .frequency = 135000000, .index = PLLVAL(82, 2, 1), }, 50 - { .frequency = 147000000, .index = PLLVAL(90, 2, 1), }, 51 - { .frequency = 152000000, .index = PLLVAL(68, 1, 1), }, 52 - { .frequency = 158000000, .index = PLLVAL(71, 1, 1), }, 53 - { .frequency = 170000000, .index = PLLVAL(77, 1, 1), }, 54 - { .frequency = 180000000, .index = PLLVAL(82, 1, 1), }, 55 - { .frequency = 186000000, .index = PLLVAL(85, 1, 1), }, 56 - { .frequency = 192000000, .index = PLLVAL(88, 1, 1), }, 57 - { .frequency = 203000000, .index = PLLVAL(161, 3, 1), }, 36 + { .frequency = 34000000, .driver_data = PLLVAL(82, 2, 3), }, 37 + { .frequency = 45000000, .driver_data = PLLVAL(82, 1, 3), }, 38 + { .frequency = 51000000, .driver_data = PLLVAL(161, 3, 3), }, 39 + { .frequency = 48000000, .driver_data = PLLVAL(120, 2, 3), }, 40 + { .frequency = 56000000, .driver_data = PLLVAL(142, 2, 3), }, 41 + { .frequency = 68000000, .driver_data = PLLVAL(82, 2, 2), }, 42 + { .frequency = 79000000, .driver_data = PLLVAL(71, 1, 2), }, 43 + { .frequency = 85000000, .driver_data = PLLVAL(105, 2, 2), }, 44 + { .frequency = 90000000, .driver_data = PLLVAL(112, 2, 2), }, 45 + { .frequency = 101000000, .driver_data = PLLVAL(127, 2, 2), }, 46 + { .frequency = 113000000, .driver_data = PLLVAL(105, 1, 2), }, 47 + { .frequency = 118000000, .driver_data = PLLVAL(150, 2, 2), }, 48 + { .frequency = 124000000, .driver_data = PLLVAL(116, 1, 2), }, 49 + { .frequency = 135000000, .driver_data = PLLVAL(82, 2, 1), }, 50 + { .frequency = 147000000, .driver_data = PLLVAL(90, 2, 1), }, 51 + { .frequency = 152000000, .driver_data = PLLVAL(68, 1, 1), }, 52 + { .frequency = 158000000, .driver_data = PLLVAL(71, 1, 1), }, 53 + { .frequency = 170000000, .driver_data = PLLVAL(77, 1, 1), }, 54 + { .frequency = 180000000, .driver_data = PLLVAL(82, 1, 1), }, 55 + { .frequency = 186000000, .driver_data = PLLVAL(85, 1, 1), }, 56 + { .frequency = 192000000, .driver_data = PLLVAL(88, 1, 1), }, 57 + { .frequency = 203000000, .driver_data = PLLVAL(161, 3, 1), }, 58 58 59 59 /* 2410A extras */ 60 60 61 - { .frequency = 210000000, .index = PLLVAL(132, 2, 1), }, 62 - { .frequency = 226000000, .index = PLLVAL(105, 1, 1), }, 63 - { .frequency = 266000000, .index = PLLVAL(125, 1, 1), }, 64 - { .frequency = 268000000, .index = PLLVAL(126, 1, 1), }, 65 - { .frequency = 270000000, .index = PLLVAL(127, 1, 1), }, 61 + { .frequency = 210000000, .driver_data = PLLVAL(132, 2, 1), }, 62 + { .frequency = 226000000, .driver_data = PLLVAL(105, 1, 1), }, 63 + { .frequency = 266000000, .driver_data = PLLVAL(125, 1, 1), }, 64 + { .frequency = 268000000, .driver_data = PLLVAL(126, 1, 1), }, 65 + { .frequency = 270000000, .driver_data = PLLVAL(127, 1, 1), }, 66 66 }; 67 67 68 68 static int s3c2410_plls_add(struct device *dev, struct subsys_interface *sif)
+27 -27
arch/arm/mach-s3c24xx/pll-s3c2440-12000000.c
··· 21 21 #include <plat/cpu-freq-core.h> 22 22 23 23 static struct cpufreq_frequency_table s3c2440_plls_12[] __initdata = { 24 - { .frequency = 75000000, .index = PLLVAL(0x75, 3, 3), }, /* FVco 600.000000 */ 25 - { .frequency = 80000000, .index = PLLVAL(0x98, 4, 3), }, /* FVco 640.000000 */ 26 - { .frequency = 90000000, .index = PLLVAL(0x70, 2, 3), }, /* FVco 720.000000 */ 27 - { .frequency = 100000000, .index = PLLVAL(0x5c, 1, 3), }, /* FVco 800.000000 */ 28 - { .frequency = 110000000, .index = PLLVAL(0x66, 1, 3), }, /* FVco 880.000000 */ 29 - { .frequency = 120000000, .index = PLLVAL(0x70, 1, 3), }, /* FVco 960.000000 */ 30 - { .frequency = 150000000, .index = PLLVAL(0x75, 3, 2), }, /* FVco 600.000000 */ 31 - { .frequency = 160000000, .index = PLLVAL(0x98, 4, 2), }, /* FVco 640.000000 */ 32 - { .frequency = 170000000, .index = PLLVAL(0x4d, 1, 2), }, /* FVco 680.000000 */ 33 - { .frequency = 180000000, .index = PLLVAL(0x70, 2, 2), }, /* FVco 720.000000 */ 34 - { .frequency = 190000000, .index = PLLVAL(0x57, 1, 2), }, /* FVco 760.000000 */ 35 - { .frequency = 200000000, .index = PLLVAL(0x5c, 1, 2), }, /* FVco 800.000000 */ 36 - { .frequency = 210000000, .index = PLLVAL(0x84, 2, 2), }, /* FVco 840.000000 */ 37 - { .frequency = 220000000, .index = PLLVAL(0x66, 1, 2), }, /* FVco 880.000000 */ 38 - { .frequency = 230000000, .index = PLLVAL(0x6b, 1, 2), }, /* FVco 920.000000 */ 39 - { .frequency = 240000000, .index = PLLVAL(0x70, 1, 2), }, /* FVco 960.000000 */ 40 - { .frequency = 300000000, .index = PLLVAL(0x75, 3, 1), }, /* FVco 600.000000 */ 41 - { .frequency = 310000000, .index = PLLVAL(0x93, 4, 1), }, /* FVco 620.000000 */ 42 - { .frequency = 320000000, .index = PLLVAL(0x98, 4, 1), }, /* FVco 640.000000 */ 43 - { .frequency = 330000000, .index = PLLVAL(0x66, 2, 1), }, /* FVco 660.000000 */ 44 - { .frequency = 340000000, .index = PLLVAL(0x4d, 1, 1), }, /* FVco 680.000000 */ 45 - { .frequency = 350000000, .index = PLLVAL(0xa7, 4, 1), }, /* FVco 700.000000 */ 46 - { .frequency = 360000000, .index = PLLVAL(0x70, 2, 1), }, /* FVco 720.000000 */ 47 - { .frequency = 370000000, .index = PLLVAL(0xb1, 4, 1), }, /* FVco 740.000000 */ 48 - { .frequency = 380000000, .index = PLLVAL(0x57, 1, 1), }, /* FVco 760.000000 */ 49 - { .frequency = 390000000, .index = PLLVAL(0x7a, 2, 1), }, /* FVco 780.000000 */ 50 - { .frequency = 400000000, .index = PLLVAL(0x5c, 1, 1), }, /* FVco 800.000000 */ 24 + { .frequency = 75000000, .driver_data = PLLVAL(0x75, 3, 3), }, /* FVco 600.000000 */ 25 + { .frequency = 80000000, .driver_data = PLLVAL(0x98, 4, 3), }, /* FVco 640.000000 */ 26 + { .frequency = 90000000, .driver_data = PLLVAL(0x70, 2, 3), }, /* FVco 720.000000 */ 27 + { .frequency = 100000000, .driver_data = PLLVAL(0x5c, 1, 3), }, /* FVco 800.000000 */ 28 + { .frequency = 110000000, .driver_data = PLLVAL(0x66, 1, 3), }, /* FVco 880.000000 */ 29 + { .frequency = 120000000, .driver_data = PLLVAL(0x70, 1, 3), }, /* FVco 960.000000 */ 30 + { .frequency = 150000000, .driver_data = PLLVAL(0x75, 3, 2), }, /* FVco 600.000000 */ 31 + { .frequency = 160000000, .driver_data = PLLVAL(0x98, 4, 2), }, /* FVco 640.000000 */ 32 + { .frequency = 170000000, .driver_data = PLLVAL(0x4d, 1, 2), }, /* FVco 680.000000 */ 33 + { .frequency = 180000000, .driver_data = PLLVAL(0x70, 2, 2), }, /* FVco 720.000000 */ 34 + { .frequency = 190000000, .driver_data = PLLVAL(0x57, 1, 2), }, /* FVco 760.000000 */ 35 + { .frequency = 200000000, .driver_data = PLLVAL(0x5c, 1, 2), }, /* FVco 800.000000 */ 36 + { .frequency = 210000000, .driver_data = PLLVAL(0x84, 2, 2), }, /* FVco 840.000000 */ 37 + { .frequency = 220000000, .driver_data = PLLVAL(0x66, 1, 2), }, /* FVco 880.000000 */ 38 + { .frequency = 230000000, .driver_data = PLLVAL(0x6b, 1, 2), }, /* FVco 920.000000 */ 39 + { .frequency = 240000000, .driver_data = PLLVAL(0x70, 1, 2), }, /* FVco 960.000000 */ 40 + { .frequency = 300000000, .driver_data = PLLVAL(0x75, 3, 1), }, /* FVco 600.000000 */ 41 + { .frequency = 310000000, .driver_data = PLLVAL(0x93, 4, 1), }, /* FVco 620.000000 */ 42 + { .frequency = 320000000, .driver_data = PLLVAL(0x98, 4, 1), }, /* FVco 640.000000 */ 43 + { .frequency = 330000000, .driver_data = PLLVAL(0x66, 2, 1), }, /* FVco 660.000000 */ 44 + { .frequency = 340000000, .driver_data = PLLVAL(0x4d, 1, 1), }, /* FVco 680.000000 */ 45 + { .frequency = 350000000, .driver_data = PLLVAL(0xa7, 4, 1), }, /* FVco 700.000000 */ 46 + { .frequency = 360000000, .driver_data = PLLVAL(0x70, 2, 1), }, /* FVco 720.000000 */ 47 + { .frequency = 370000000, .driver_data = PLLVAL(0xb1, 4, 1), }, /* FVco 740.000000 */ 48 + { .frequency = 380000000, .driver_data = PLLVAL(0x57, 1, 1), }, /* FVco 760.000000 */ 49 + { .frequency = 390000000, .driver_data = PLLVAL(0x7a, 2, 1), }, /* FVco 780.000000 */ 50 + { .frequency = 400000000, .driver_data = PLLVAL(0x5c, 1, 1), }, /* FVco 800.000000 */ 51 51 }; 52 52 53 53 static int s3c2440_plls12_add(struct device *dev, struct subsys_interface *sif)
+55 -55
arch/arm/mach-s3c24xx/pll-s3c2440-16934400.c
··· 21 21 #include <plat/cpu-freq-core.h> 22 22 23 23 static struct cpufreq_frequency_table s3c2440_plls_169344[] __initdata = { 24 - { .frequency = 78019200, .index = PLLVAL(121, 5, 3), }, /* FVco 624.153600 */ 25 - { .frequency = 84067200, .index = PLLVAL(131, 5, 3), }, /* FVco 672.537600 */ 26 - { .frequency = 90115200, .index = PLLVAL(141, 5, 3), }, /* FVco 720.921600 */ 27 - { .frequency = 96163200, .index = PLLVAL(151, 5, 3), }, /* FVco 769.305600 */ 28 - { .frequency = 102135600, .index = PLLVAL(185, 6, 3), }, /* FVco 817.084800 */ 29 - { .frequency = 108259200, .index = PLLVAL(171, 5, 3), }, /* FVco 866.073600 */ 30 - { .frequency = 114307200, .index = PLLVAL(127, 3, 3), }, /* FVco 914.457600 */ 31 - { .frequency = 120234240, .index = PLLVAL(134, 3, 3), }, /* FVco 961.873920 */ 32 - { .frequency = 126161280, .index = PLLVAL(141, 3, 3), }, /* FVco 1009.290240 */ 33 - { .frequency = 132088320, .index = PLLVAL(148, 3, 3), }, /* FVco 1056.706560 */ 34 - { .frequency = 138015360, .index = PLLVAL(155, 3, 3), }, /* FVco 1104.122880 */ 35 - { .frequency = 144789120, .index = PLLVAL(163, 3, 3), }, /* FVco 1158.312960 */ 36 - { .frequency = 150100363, .index = PLLVAL(187, 9, 2), }, /* FVco 600.401454 */ 37 - { .frequency = 156038400, .index = PLLVAL(121, 5, 2), }, /* FVco 624.153600 */ 38 - { .frequency = 162086400, .index = PLLVAL(126, 5, 2), }, /* FVco 648.345600 */ 39 - { .frequency = 168134400, .index = PLLVAL(131, 5, 2), }, /* FVco 672.537600 */ 40 - { .frequency = 174048000, .index = PLLVAL(177, 7, 2), }, /* FVco 696.192000 */ 41 - { .frequency = 180230400, .index = PLLVAL(141, 5, 2), }, /* FVco 720.921600 */ 42 - { .frequency = 186278400, .index = PLLVAL(124, 4, 2), }, /* FVco 745.113600 */ 43 - { .frequency = 192326400, .index = PLLVAL(151, 5, 2), }, /* FVco 769.305600 */ 44 - { .frequency = 198132480, .index = PLLVAL(109, 3, 2), }, /* FVco 792.529920 */ 45 - { .frequency = 204271200, .index = PLLVAL(185, 6, 2), }, /* FVco 817.084800 */ 46 - { .frequency = 210268800, .index = PLLVAL(141, 4, 2), }, /* FVco 841.075200 */ 47 - { .frequency = 216518400, .index = PLLVAL(171, 5, 2), }, /* FVco 866.073600 */ 48 - { .frequency = 222264000, .index = PLLVAL(97, 2, 2), }, /* FVco 889.056000 */ 49 - { .frequency = 228614400, .index = PLLVAL(127, 3, 2), }, /* FVco 914.457600 */ 50 - { .frequency = 234259200, .index = PLLVAL(158, 4, 2), }, /* FVco 937.036800 */ 51 - { .frequency = 240468480, .index = PLLVAL(134, 3, 2), }, /* FVco 961.873920 */ 52 - { .frequency = 246960000, .index = PLLVAL(167, 4, 2), }, /* FVco 987.840000 */ 53 - { .frequency = 252322560, .index = PLLVAL(141, 3, 2), }, /* FVco 1009.290240 */ 54 - { .frequency = 258249600, .index = PLLVAL(114, 2, 2), }, /* FVco 1032.998400 */ 55 - { .frequency = 264176640, .index = PLLVAL(148, 3, 2), }, /* FVco 1056.706560 */ 56 - { .frequency = 270950400, .index = PLLVAL(120, 2, 2), }, /* FVco 1083.801600 */ 57 - { .frequency = 276030720, .index = PLLVAL(155, 3, 2), }, /* FVco 1104.122880 */ 58 - { .frequency = 282240000, .index = PLLVAL(92, 1, 2), }, /* FVco 1128.960000 */ 59 - { .frequency = 289578240, .index = PLLVAL(163, 3, 2), }, /* FVco 1158.312960 */ 60 - { .frequency = 294235200, .index = PLLVAL(131, 2, 2), }, /* FVco 1176.940800 */ 61 - { .frequency = 300200727, .index = PLLVAL(187, 9, 1), }, /* FVco 600.401454 */ 62 - { .frequency = 306358690, .index = PLLVAL(191, 9, 1), }, /* FVco 612.717380 */ 63 - { .frequency = 312076800, .index = PLLVAL(121, 5, 1), }, /* FVco 624.153600 */ 64 - { .frequency = 318366720, .index = PLLVAL(86, 3, 1), }, /* FVco 636.733440 */ 65 - { .frequency = 324172800, .index = PLLVAL(126, 5, 1), }, /* FVco 648.345600 */ 66 - { .frequency = 330220800, .index = PLLVAL(109, 4, 1), }, /* FVco 660.441600 */ 67 - { .frequency = 336268800, .index = PLLVAL(131, 5, 1), }, /* FVco 672.537600 */ 68 - { .frequency = 342074880, .index = PLLVAL(93, 3, 1), }, /* FVco 684.149760 */ 69 - { .frequency = 348096000, .index = PLLVAL(177, 7, 1), }, /* FVco 696.192000 */ 70 - { .frequency = 355622400, .index = PLLVAL(118, 4, 1), }, /* FVco 711.244800 */ 71 - { .frequency = 360460800, .index = PLLVAL(141, 5, 1), }, /* FVco 720.921600 */ 72 - { .frequency = 366206400, .index = PLLVAL(165, 6, 1), }, /* FVco 732.412800 */ 73 - { .frequency = 372556800, .index = PLLVAL(124, 4, 1), }, /* FVco 745.113600 */ 74 - { .frequency = 378201600, .index = PLLVAL(126, 4, 1), }, /* FVco 756.403200 */ 75 - { .frequency = 384652800, .index = PLLVAL(151, 5, 1), }, /* FVco 769.305600 */ 76 - { .frequency = 391608000, .index = PLLVAL(177, 6, 1), }, /* FVco 783.216000 */ 77 - { .frequency = 396264960, .index = PLLVAL(109, 3, 1), }, /* FVco 792.529920 */ 78 - { .frequency = 402192000, .index = PLLVAL(87, 2, 1), }, /* FVco 804.384000 */ 24 + { .frequency = 78019200, .driver_data = PLLVAL(121, 5, 3), }, /* FVco 624.153600 */ 25 + { .frequency = 84067200, .driver_data = PLLVAL(131, 5, 3), }, /* FVco 672.537600 */ 26 + { .frequency = 90115200, .driver_data = PLLVAL(141, 5, 3), }, /* FVco 720.921600 */ 27 + { .frequency = 96163200, .driver_data = PLLVAL(151, 5, 3), }, /* FVco 769.305600 */ 28 + { .frequency = 102135600, .driver_data = PLLVAL(185, 6, 3), }, /* FVco 817.084800 */ 29 + { .frequency = 108259200, .driver_data = PLLVAL(171, 5, 3), }, /* FVco 866.073600 */ 30 + { .frequency = 114307200, .driver_data = PLLVAL(127, 3, 3), }, /* FVco 914.457600 */ 31 + { .frequency = 120234240, .driver_data = PLLVAL(134, 3, 3), }, /* FVco 961.873920 */ 32 + { .frequency = 126161280, .driver_data = PLLVAL(141, 3, 3), }, /* FVco 1009.290240 */ 33 + { .frequency = 132088320, .driver_data = PLLVAL(148, 3, 3), }, /* FVco 1056.706560 */ 34 + { .frequency = 138015360, .driver_data = PLLVAL(155, 3, 3), }, /* FVco 1104.122880 */ 35 + { .frequency = 144789120, .driver_data = PLLVAL(163, 3, 3), }, /* FVco 1158.312960 */ 36 + { .frequency = 150100363, .driver_data = PLLVAL(187, 9, 2), }, /* FVco 600.401454 */ 37 + { .frequency = 156038400, .driver_data = PLLVAL(121, 5, 2), }, /* FVco 624.153600 */ 38 + { .frequency = 162086400, .driver_data = PLLVAL(126, 5, 2), }, /* FVco 648.345600 */ 39 + { .frequency = 168134400, .driver_data = PLLVAL(131, 5, 2), }, /* FVco 672.537600 */ 40 + { .frequency = 174048000, .driver_data = PLLVAL(177, 7, 2), }, /* FVco 696.192000 */ 41 + { .frequency = 180230400, .driver_data = PLLVAL(141, 5, 2), }, /* FVco 720.921600 */ 42 + { .frequency = 186278400, .driver_data = PLLVAL(124, 4, 2), }, /* FVco 745.113600 */ 43 + { .frequency = 192326400, .driver_data = PLLVAL(151, 5, 2), }, /* FVco 769.305600 */ 44 + { .frequency = 198132480, .driver_data = PLLVAL(109, 3, 2), }, /* FVco 792.529920 */ 45 + { .frequency = 204271200, .driver_data = PLLVAL(185, 6, 2), }, /* FVco 817.084800 */ 46 + { .frequency = 210268800, .driver_data = PLLVAL(141, 4, 2), }, /* FVco 841.075200 */ 47 + { .frequency = 216518400, .driver_data = PLLVAL(171, 5, 2), }, /* FVco 866.073600 */ 48 + { .frequency = 222264000, .driver_data = PLLVAL(97, 2, 2), }, /* FVco 889.056000 */ 49 + { .frequency = 228614400, .driver_data = PLLVAL(127, 3, 2), }, /* FVco 914.457600 */ 50 + { .frequency = 234259200, .driver_data = PLLVAL(158, 4, 2), }, /* FVco 937.036800 */ 51 + { .frequency = 240468480, .driver_data = PLLVAL(134, 3, 2), }, /* FVco 961.873920 */ 52 + { .frequency = 246960000, .driver_data = PLLVAL(167, 4, 2), }, /* FVco 987.840000 */ 53 + { .frequency = 252322560, .driver_data = PLLVAL(141, 3, 2), }, /* FVco 1009.290240 */ 54 + { .frequency = 258249600, .driver_data = PLLVAL(114, 2, 2), }, /* FVco 1032.998400 */ 55 + { .frequency = 264176640, .driver_data = PLLVAL(148, 3, 2), }, /* FVco 1056.706560 */ 56 + { .frequency = 270950400, .driver_data = PLLVAL(120, 2, 2), }, /* FVco 1083.801600 */ 57 + { .frequency = 276030720, .driver_data = PLLVAL(155, 3, 2), }, /* FVco 1104.122880 */ 58 + { .frequency = 282240000, .driver_data = PLLVAL(92, 1, 2), }, /* FVco 1128.960000 */ 59 + { .frequency = 289578240, .driver_data = PLLVAL(163, 3, 2), }, /* FVco 1158.312960 */ 60 + { .frequency = 294235200, .driver_data = PLLVAL(131, 2, 2), }, /* FVco 1176.940800 */ 61 + { .frequency = 300200727, .driver_data = PLLVAL(187, 9, 1), }, /* FVco 600.401454 */ 62 + { .frequency = 306358690, .driver_data = PLLVAL(191, 9, 1), }, /* FVco 612.717380 */ 63 + { .frequency = 312076800, .driver_data = PLLVAL(121, 5, 1), }, /* FVco 624.153600 */ 64 + { .frequency = 318366720, .driver_data = PLLVAL(86, 3, 1), }, /* FVco 636.733440 */ 65 + { .frequency = 324172800, .driver_data = PLLVAL(126, 5, 1), }, /* FVco 648.345600 */ 66 + { .frequency = 330220800, .driver_data = PLLVAL(109, 4, 1), }, /* FVco 660.441600 */ 67 + { .frequency = 336268800, .driver_data = PLLVAL(131, 5, 1), }, /* FVco 672.537600 */ 68 + { .frequency = 342074880, .driver_data = PLLVAL(93, 3, 1), }, /* FVco 684.149760 */ 69 + { .frequency = 348096000, .driver_data = PLLVAL(177, 7, 1), }, /* FVco 696.192000 */ 70 + { .frequency = 355622400, .driver_data = PLLVAL(118, 4, 1), }, /* FVco 711.244800 */ 71 + { .frequency = 360460800, .driver_data = PLLVAL(141, 5, 1), }, /* FVco 720.921600 */ 72 + { .frequency = 366206400, .driver_data = PLLVAL(165, 6, 1), }, /* FVco 732.412800 */ 73 + { .frequency = 372556800, .driver_data = PLLVAL(124, 4, 1), }, /* FVco 745.113600 */ 74 + { .frequency = 378201600, .driver_data = PLLVAL(126, 4, 1), }, /* FVco 756.403200 */ 75 + { .frequency = 384652800, .driver_data = PLLVAL(151, 5, 1), }, /* FVco 769.305600 */ 76 + { .frequency = 391608000, .driver_data = PLLVAL(177, 6, 1), }, /* FVco 783.216000 */ 77 + { .frequency = 396264960, .driver_data = PLLVAL(109, 3, 1), }, /* FVco 792.529920 */ 78 + { .frequency = 402192000, .driver_data = PLLVAL(87, 2, 1), }, /* FVco 804.384000 */ 79 79 }; 80 80 81 81 static int s3c2440_plls169344_add(struct device *dev,
+3 -3
arch/arm/mach-shmobile/clock-sh7372.c
··· 142 142 /* Initialise PLLC2 frequency table */ 143 143 for (i = 0; i < ARRAY_SIZE(pllc2_freq_table) - 2; i++) { 144 144 pllc2_freq_table[i].frequency = clk->parent->rate * (i + 20) * 2; 145 - pllc2_freq_table[i].index = i; 145 + pllc2_freq_table[i].driver_data = i; 146 146 } 147 147 148 148 /* This is a special entry - switching PLL off makes it a repeater */ 149 149 pllc2_freq_table[i].frequency = clk->parent->rate; 150 - pllc2_freq_table[i].index = i; 150 + pllc2_freq_table[i].driver_data = i; 151 151 152 152 pllc2_freq_table[++i].frequency = CPUFREQ_TABLE_END; 153 - pllc2_freq_table[i].index = i; 153 + pllc2_freq_table[i].driver_data = i; 154 154 } 155 155 156 156 static unsigned long pllc2_recalc(struct clk *clk)
-3
arch/arm/mach-tegra/Kconfig
··· 28 28 select ARM_ERRATA_754327 if SMP 29 29 select ARM_ERRATA_764369 if SMP 30 30 select ARM_GIC 31 - select CPU_FREQ_TABLE if CPU_FREQ 32 31 select CPU_V7 33 32 select PINCTRL 34 33 select PINCTRL_TEGRA20 ··· 45 46 select ARM_ERRATA_754322 46 47 select ARM_ERRATA_764369 if SMP 47 48 select ARM_GIC 48 - select CPU_FREQ_TABLE if CPU_FREQ 49 49 select CPU_V7 50 50 select PINCTRL 51 51 select PINCTRL_TEGRA30 ··· 61 63 select ARM_ARCH_TIMER 62 64 select ARM_GIC 63 65 select ARM_L1_CACHE_SHIFT_6 64 - select CPU_FREQ_TABLE if CPU_FREQ 65 66 select CPU_V7 66 67 select PINCTRL 67 68 select PINCTRL_TEGRA114
+1 -1
arch/arm/plat-samsung/include/plat/cpu-freq-core.h
··· 285 285 s3c_freq_dbg("%s: { %d = %u kHz }\n", 286 286 __func__, index, freq); 287 287 288 - table[index].index = index; 288 + table[index].driver_data = index; 289 289 table[index].frequency = freq; 290 290 } 291 291
+2
arch/cris/Kconfig
··· 134 134 135 135 config ETRAXFS 136 136 bool "ETRAX-FS-V32" 137 + select CPU_FREQ_TABLE if CPU_FREQ 137 138 help 138 139 Support CRIS V32. 139 140 140 141 config CRIS_MACH_ARTPEC3 141 142 bool "ARTPEC-3" 143 + select CPU_FREQ_TABLE if CPU_FREQ 142 144 help 143 145 Support Axis ARTPEC-3. 144 146
+2 -1
arch/mips/loongson/lemote-2f/clock.c
··· 121 121 clk->rate = rate; 122 122 123 123 regval = LOONGSON_CHIPCFG0; 124 - regval = (regval & ~0x7) | (loongson2_clockmod_table[i].index - 1); 124 + regval = (regval & ~0x7) | 125 + (loongson2_clockmod_table[i].driver_data - 1); 125 126 LOONGSON_CHIPCFG0 = regval; 126 127 127 128 return ret;
-31
arch/powerpc/platforms/Kconfig
··· 193 193 194 194 source "drivers/cpufreq/Kconfig" 195 195 196 - menu "CPU Frequency drivers" 197 - depends on CPU_FREQ 198 - 199 - config CPU_FREQ_PMAC 200 - bool "Support for Apple PowerBooks" 201 - depends on ADB_PMU && PPC32 202 - select CPU_FREQ_TABLE 203 - help 204 - This adds support for frequency switching on Apple PowerBooks, 205 - this currently includes some models of iBook & Titanium 206 - PowerBook. 207 - 208 - config CPU_FREQ_PMAC64 209 - bool "Support for some Apple G5s" 210 - depends on PPC_PMAC && PPC64 211 - select CPU_FREQ_TABLE 212 - help 213 - This adds support for frequency switching on Apple iMac G5, 214 - and some of the more recent desktop G5 machines as well. 215 - 216 - config PPC_PASEMI_CPUFREQ 217 - bool "Support for PA Semi PWRficient" 218 - depends on PPC_PASEMI 219 - default y 220 - select CPU_FREQ_TABLE 221 - help 222 - This adds the support for frequency switching on PA Semi 223 - PWRficient processors. 224 - 225 - endmenu 226 - 227 196 menu "CPUIdle driver" 228 197 229 198 source "drivers/cpuidle/Kconfig"
-1
arch/powerpc/platforms/pasemi/Makefile
··· 1 1 obj-y += setup.o pci.o time.o idle.o powersave.o iommu.o dma_lib.o misc.o 2 2 obj-$(CONFIG_PPC_PASEMI_MDIO) += gpio_mdio.o 3 - obj-$(CONFIG_PPC_PASEMI_CPUFREQ) += cpufreq.o
+3 -2
arch/powerpc/platforms/pasemi/cpufreq.c drivers/cpufreq/pasemi-cpufreq.c
··· 204 204 205 205 /* initialize frequency table */ 206 206 for (i=0; pas_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) { 207 - pas_freqs[i].frequency = get_astate_freq(pas_freqs[i].index) * 100000; 207 + pas_freqs[i].frequency = 208 + get_astate_freq(pas_freqs[i].driver_data) * 100000; 208 209 pr_debug("%d: %d\n", i, pas_freqs[i].frequency); 209 210 } 210 211 ··· 281 280 pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n", 282 281 policy->cpu, 283 282 pas_freqs[pas_astate_new].frequency, 284 - pas_freqs[pas_astate_new].index); 283 + pas_freqs[pas_astate_new].driver_data); 285 284 286 285 current_astate = pas_astate_new; 287 286
-2
arch/powerpc/platforms/powermac/Makefile
··· 9 9 sleep.o low_i2c.o cache.o pfunc_core.o \ 10 10 pfunc_base.o udbg_scc.o udbg_adb.o 11 11 obj-$(CONFIG_PMAC_BACKLIGHT) += backlight.o 12 - obj-$(CONFIG_CPU_FREQ_PMAC) += cpufreq_32.o 13 - obj-$(CONFIG_CPU_FREQ_PMAC64) += cpufreq_64.o 14 12 # CONFIG_NVRAM is an arch. independent tristate symbol, for pmac32 we really 15 13 # need this to be a bool. Cheat here and pretend CONFIG_NVRAM=m is really 16 14 # CONFIG_NVRAM=y
arch/powerpc/platforms/powermac/cpufreq_32.c drivers/cpufreq/pmac32-cpufreq.c
arch/powerpc/platforms/powermac/cpufreq_64.c drivers/cpufreq/pmac64-cpufreq.c
+2 -2
drivers/base/power/opp.c
··· 648 648 649 649 list_for_each_entry(opp, &dev_opp->opp_list, node) { 650 650 if (opp->available) { 651 - freq_table[i].index = i; 651 + freq_table[i].driver_data = i; 652 652 freq_table[i].frequency = opp->rate / 1000; 653 653 i++; 654 654 } 655 655 } 656 656 mutex_unlock(&dev_opp_list_lock); 657 657 658 - freq_table[i].index = i; 658 + freq_table[i].driver_data = i; 659 659 freq_table[i].frequency = CPUFREQ_TABLE_END; 660 660 661 661 *table = &freq_table[0];
+16 -1
drivers/cpufreq/Kconfig.arm
··· 5 5 config ARM_BIG_LITTLE_CPUFREQ 6 6 tristate "Generic ARM big LITTLE CPUfreq driver" 7 7 depends on ARM_CPU_TOPOLOGY && PM_OPP && HAVE_CLK 8 + select CPU_FREQ_TABLE 8 9 help 9 10 This enables the Generic CPUfreq driver for ARM big.LITTLE platforms. 10 11 ··· 19 18 config ARM_EXYNOS_CPUFREQ 20 19 bool "SAMSUNG EXYNOS SoCs" 21 20 depends on ARCH_EXYNOS 21 + select CPU_FREQ_TABLE 22 22 default y 23 23 help 24 24 This adds the CPUFreq driver common part for Samsung ··· 48 46 config ARM_EXYNOS5440_CPUFREQ 49 47 def_bool SOC_EXYNOS5440 50 48 depends on HAVE_CLK && PM_OPP && OF 49 + select CPU_FREQ_TABLE 51 50 help 52 51 This adds the CPUFreq driver for Samsung EXYNOS5440 53 52 SoC. The nature of exynos5440 clock controller is ··· 58 55 config ARM_HIGHBANK_CPUFREQ 59 56 tristate "Calxeda Highbank-based" 60 57 depends on ARCH_HIGHBANK 61 - select CPU_FREQ_TABLE 62 58 select GENERIC_CPUFREQ_CPU0 63 59 select PM_OPP 64 60 select REGULATOR ··· 73 71 tristate "Freescale i.MX6Q cpufreq support" 74 72 depends on SOC_IMX6Q 75 73 depends on REGULATOR_ANATOP 74 + select CPU_FREQ_TABLE 76 75 help 77 76 This adds cpufreq driver support for Freescale i.MX6Q SOC. 78 77 ··· 89 86 90 87 config ARM_KIRKWOOD_CPUFREQ 91 88 def_bool ARCH_KIRKWOOD && OF 89 + select CPU_FREQ_TABLE 92 90 help 93 91 This adds the CPUFreq driver for Marvell Kirkwood 94 92 SoCs. ··· 103 99 config ARM_S3C2416_CPUFREQ 104 100 bool "S3C2416 CPU Frequency scaling support" 105 101 depends on CPU_S3C2416 102 + select CPU_FREQ_TABLE 106 103 help 107 104 This adds the CPUFreq driver for the Samsung S3C2416 and 108 105 S3C2450 SoC. The S3C2416 supports changing the rate of the ··· 126 121 config ARM_S3C64XX_CPUFREQ 127 122 bool "Samsung S3C64XX" 128 123 depends on CPU_S3C6410 124 + select CPU_FREQ_TABLE 129 125 default y 130 126 help 131 127 This adds the CPUFreq driver for Samsung S3C6410 SoC. ··· 153 147 config ARM_SPEAR_CPUFREQ 154 148 bool "SPEAr CPUFreq support" 155 149 depends on PLAT_SPEAR 150 + select CPU_FREQ_TABLE 156 151 default y 157 152 help 158 153 This adds the CPUFreq driver support for SPEAr SOCs. 154 + 155 + config ARM_TEGRA_CPUFREQ 156 + bool "TEGRA CPUFreq support" 157 + depends on ARCH_TEGRA 158 + select CPU_FREQ_TABLE 159 + default y 160 + help 161 + This adds the CPUFreq driver support for TEGRA SOCs.
+37
drivers/cpufreq/Kconfig.powerpc
··· 1 1 config CPU_FREQ_CBE 2 2 tristate "CBE frequency scaling" 3 3 depends on CBE_RAS && PPC_CELL 4 + select CPU_FREQ_TABLE 4 5 default m 5 6 help 6 7 This adds the cpufreq driver for Cell BE processors. ··· 24 23 help 25 24 This adds support for frequency switching on Maple 970FX 26 25 Evaluation Board and compatible boards (IBM JS2x blades). 26 + 27 + config PPC_CORENET_CPUFREQ 28 + tristate "CPU frequency scaling driver for Freescale E500MC SoCs" 29 + depends on PPC_E500MC && OF && COMMON_CLK 30 + select CPU_FREQ_TABLE 31 + select CLK_PPC_CORENET 32 + help 33 + This adds the CPUFreq driver support for Freescale e500mc, 34 + e5500 and e6500 series SoCs which are capable of changing 35 + the CPU's frequency dynamically. 36 + 37 + config CPU_FREQ_PMAC 38 + bool "Support for Apple PowerBooks" 39 + depends on ADB_PMU && PPC32 40 + select CPU_FREQ_TABLE 41 + help 42 + This adds support for frequency switching on Apple PowerBooks, 43 + this currently includes some models of iBook & Titanium 44 + PowerBook. 45 + 46 + config CPU_FREQ_PMAC64 47 + bool "Support for some Apple G5s" 48 + depends on PPC_PMAC && PPC64 49 + select CPU_FREQ_TABLE 50 + help 51 + This adds support for frequency switching on Apple iMac G5, 52 + and some of the more recent desktop G5 machines as well. 53 + 54 + config PPC_PASEMI_CPUFREQ 55 + bool "Support for PA Semi PWRficient" 56 + depends on PPC_PASEMI 57 + select CPU_FREQ_TABLE 58 + default y 59 + help 60 + This adds the support for frequency switching on PA Semi 61 + PWRficient processors.
+1
drivers/cpufreq/Kconfig.x86
··· 132 132 config X86_AMD_FREQ_SENSITIVITY 133 133 tristate "AMD frequency sensitivity feedback powersave bias" 134 134 depends on CPU_FREQ_GOV_ONDEMAND && X86_ACPI_CPUFREQ && CPU_SUP_AMD 135 + select CPU_FREQ_TABLE 135 136 help 136 137 This adds AMD-specific powersave bias function to the ondemand 137 138 governor, which allows it to make more power-conscious frequency
+6 -2
drivers/cpufreq/Makefile
··· 71 71 obj-$(CONFIG_ARM_SA1100_CPUFREQ) += sa1100-cpufreq.o 72 72 obj-$(CONFIG_ARM_SA1110_CPUFREQ) += sa1110-cpufreq.o 73 73 obj-$(CONFIG_ARM_SPEAR_CPUFREQ) += spear-cpufreq.o 74 - obj-$(CONFIG_ARCH_TEGRA) += tegra-cpufreq.o 74 + obj-$(CONFIG_ARM_TEGRA_CPUFREQ) += tegra-cpufreq.o 75 75 76 76 ################################################################################## 77 77 # PowerPC platform drivers ··· 79 79 ppc-cbe-cpufreq-y += ppc_cbe_cpufreq_pervasive.o ppc_cbe_cpufreq.o 80 80 obj-$(CONFIG_CPU_FREQ_CBE_PMI) += ppc_cbe_cpufreq_pmi.o 81 81 obj-$(CONFIG_CPU_FREQ_MAPLE) += maple-cpufreq.o 82 + obj-$(CONFIG_PPC_CORENET_CPUFREQ) += ppc-corenet-cpufreq.o 83 + obj-$(CONFIG_CPU_FREQ_PMAC) += pmac32-cpufreq.o 84 + obj-$(CONFIG_CPU_FREQ_PMAC64) += pmac64-cpufreq.o 85 + obj-$(CONFIG_PPC_PASEMI_CPUFREQ) += pasemi-cpufreq.o 82 86 83 87 ################################################################################## 84 88 # Other platform drivers 85 89 obj-$(CONFIG_AVR32_AT32AP_CPUFREQ) += at32ap-cpufreq.o 86 - obj-$(CONFIG_BLACKFIN) += blackfin-cpufreq.o 90 + obj-$(CONFIG_BFIN_CPU_FREQ) += blackfin-cpufreq.o 87 91 obj-$(CONFIG_CRIS_MACH_ARTPEC3) += cris-artpec3-cpufreq.o 88 92 obj-$(CONFIG_ETRAXFS) += cris-etraxfs-cpufreq.o 89 93 obj-$(CONFIG_IA64_ACPI_CPUFREQ) += ia64-acpi-cpufreq.o
+9 -7
drivers/cpufreq/acpi-cpufreq.c
··· 232 232 perf = data->acpi_data; 233 233 234 234 for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) { 235 - if (msr == perf->states[data->freq_table[i].index].status) 235 + if (msr == perf->states[data->freq_table[i].driver_data].status) 236 236 return data->freq_table[i].frequency; 237 237 } 238 238 return data->freq_table[0].frequency; ··· 442 442 goto out; 443 443 } 444 444 445 - next_perf_state = data->freq_table[next_state].index; 445 + next_perf_state = data->freq_table[next_state].driver_data; 446 446 if (perf->state == next_perf_state) { 447 447 if (unlikely(data->resume)) { 448 448 pr_debug("Called after resume, resetting to P%d\n", ··· 494 494 pr_debug("acpi_cpufreq_target failed (%d)\n", 495 495 policy->cpu); 496 496 result = -EAGAIN; 497 - goto out; 497 + freqs.new = freqs.old; 498 498 } 499 499 } 500 500 501 501 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 502 - perf->state = next_perf_state; 502 + 503 + if (!result) 504 + perf->state = next_perf_state; 503 505 504 506 out: 505 507 return result; ··· 813 811 data->freq_table[valid_states-1].frequency / 1000) 814 812 continue; 815 813 816 - data->freq_table[valid_states].index = i; 814 + data->freq_table[valid_states].driver_data = i; 817 815 data->freq_table[valid_states].frequency = 818 816 perf->states[i].core_frequency * 1000; 819 817 valid_states++; ··· 949 947 /* We create the boost file in any case, though for systems without 950 948 * hardware support it will be read-only and hardwired to return 0. 951 949 */ 952 - if (sysfs_create_file(cpufreq_global_kobject, &(global_boost.attr))) 950 + if (cpufreq_sysfs_create_file(&(global_boost.attr))) 953 951 pr_warn(PFX "could not register global boost sysfs file\n"); 954 952 else 955 953 pr_debug("registered global boost sysfs file\n"); ··· 957 955 958 956 static void __exit acpi_cpufreq_boost_exit(void) 959 957 { 960 - sysfs_remove_file(cpufreq_global_kobject, &(global_boost.attr)); 958 + cpufreq_sysfs_remove_file(&(global_boost.attr)); 961 959 962 960 if (msrs) { 963 961 unregister_cpu_notifier(&boost_nb);
+1 -3
drivers/cpufreq/arm_big_little.c
··· 84 84 ret = clk_set_rate(clk[cur_cluster], freqs.new * 1000); 85 85 if (ret) { 86 86 pr_err("clk_set_rate failed: %d\n", ret); 87 - return ret; 87 + freqs.new = freqs.old; 88 88 } 89 - 90 - policy->cur = freqs.new; 91 89 92 90 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 93 91
+5 -5
drivers/cpufreq/blackfin-cpufreq.c
··· 20 20 21 21 22 22 /* this is the table of CCLK frequencies, in Hz */ 23 - /* .index is the entry in the auxiliary dpm_state_table[] */ 23 + /* .driver_data is the entry in the auxiliary dpm_state_table[] */ 24 24 static struct cpufreq_frequency_table bfin_freq_table[] = { 25 25 { 26 26 .frequency = CPUFREQ_TABLE_END, 27 - .index = 0, 27 + .driver_data = 0, 28 28 }, 29 29 { 30 30 .frequency = CPUFREQ_TABLE_END, 31 - .index = 1, 31 + .driver_data = 1, 32 32 }, 33 33 { 34 34 .frequency = CPUFREQ_TABLE_END, 35 - .index = 2, 35 + .driver_data = 2, 36 36 }, 37 37 { 38 38 .frequency = CPUFREQ_TABLE_END, 39 - .index = 0, 39 + .driver_data = 0, 40 40 }, 41 41 }; 42 42
+145 -57
drivers/cpufreq/cpufreq.c
··· 3 3 * 4 4 * Copyright (C) 2001 Russell King 5 5 * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de> 6 + * (C) 2013 Viresh Kumar <viresh.kumar@linaro.org> 6 7 * 7 8 * Oct 2005 - Ashok Raj <ashok.raj@intel.com> 8 9 * Added handling for CPU hotplug ··· 13 12 * This program is free software; you can redistribute it and/or modify 14 13 * it under the terms of the GNU General Public License version 2 as 15 14 * published by the Free Software Foundation. 16 - * 17 15 */ 18 16 19 17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 20 18 19 + #include <asm/cputime.h> 21 20 #include <linux/kernel.h> 21 + #include <linux/kernel_stat.h> 22 22 #include <linux/module.h> 23 23 #include <linux/init.h> 24 24 #include <linux/notifier.h> ··· 27 25 #include <linux/delay.h> 28 26 #include <linux/interrupt.h> 29 27 #include <linux/spinlock.h> 28 + #include <linux/tick.h> 30 29 #include <linux/device.h> 31 30 #include <linux/slab.h> 32 31 #include <linux/cpu.h> ··· 44 41 */ 45 42 static struct cpufreq_driver *cpufreq_driver; 46 43 static DEFINE_PER_CPU(struct cpufreq_policy *, cpufreq_cpu_data); 44 + static DEFINE_RWLOCK(cpufreq_driver_lock); 45 + static DEFINE_MUTEX(cpufreq_governor_lock); 46 + 47 47 #ifdef CONFIG_HOTPLUG_CPU 48 48 /* This one keeps track of the previously set governor of a removed CPU */ 49 49 static DEFINE_PER_CPU(char[CPUFREQ_NAME_LEN], cpufreq_cpu_governor); 50 50 #endif 51 - static DEFINE_RWLOCK(cpufreq_driver_lock); 52 51 53 52 /* 54 53 * cpu_policy_rwsem is a per CPU reader-writer semaphore designed to cure ··· 137 132 { 138 133 return cpufreq_driver->have_governor_per_policy; 139 134 } 135 + EXPORT_SYMBOL_GPL(have_governor_per_policy); 136 + 137 + struct kobject *get_governor_parent_kobj(struct cpufreq_policy *policy) 138 + { 139 + if (have_governor_per_policy()) 140 + return &policy->kobj; 141 + else 142 + return cpufreq_global_kobject; 143 + } 144 + EXPORT_SYMBOL_GPL(get_governor_parent_kobj); 145 + 146 + static inline u64 get_cpu_idle_time_jiffy(unsigned int cpu, u64 *wall) 147 + { 148 + u64 idle_time; 149 + u64 cur_wall_time; 150 + u64 busy_time; 151 + 152 + cur_wall_time = jiffies64_to_cputime64(get_jiffies_64()); 153 + 154 + busy_time = kcpustat_cpu(cpu).cpustat[CPUTIME_USER]; 155 + busy_time += kcpustat_cpu(cpu).cpustat[CPUTIME_SYSTEM]; 156 + busy_time += kcpustat_cpu(cpu).cpustat[CPUTIME_IRQ]; 157 + busy_time += kcpustat_cpu(cpu).cpustat[CPUTIME_SOFTIRQ]; 158 + busy_time += kcpustat_cpu(cpu).cpustat[CPUTIME_STEAL]; 159 + busy_time += kcpustat_cpu(cpu).cpustat[CPUTIME_NICE]; 160 + 161 + idle_time = cur_wall_time - busy_time; 162 + if (wall) 163 + *wall = cputime_to_usecs(cur_wall_time); 164 + 165 + return cputime_to_usecs(idle_time); 166 + } 167 + 168 + u64 get_cpu_idle_time(unsigned int cpu, u64 *wall, int io_busy) 169 + { 170 + u64 idle_time = get_cpu_idle_time_us(cpu, io_busy ? wall : NULL); 171 + 172 + if (idle_time == -1ULL) 173 + return get_cpu_idle_time_jiffy(cpu, wall); 174 + else if (!io_busy) 175 + idle_time += get_cpu_iowait_time_us(cpu, wall); 176 + 177 + return idle_time; 178 + } 179 + EXPORT_SYMBOL_GPL(get_cpu_idle_time); 140 180 141 181 static struct cpufreq_policy *__cpufreq_cpu_get(unsigned int cpu, bool sysfs) 142 182 { ··· 199 149 200 150 if (!try_module_get(cpufreq_driver->owner)) 201 151 goto err_out_unlock; 202 - 203 152 204 153 /* get the CPU */ 205 154 data = per_cpu(cpufreq_cpu_data, cpu); ··· 269 220 */ 270 221 #ifndef CONFIG_SMP 271 222 static unsigned long l_p_j_ref; 272 - static unsigned int l_p_j_ref_freq; 223 + static unsigned int l_p_j_ref_freq; 273 224 274 225 static void adjust_jiffies(unsigned long val, struct cpufreq_freqs *ci) 275 226 { ··· 282 233 pr_debug("saving %lu as reference value for loops_per_jiffy; " 283 234 "freq is %u kHz\n", l_p_j_ref, l_p_j_ref_freq); 284 235 } 285 - if ((val == CPUFREQ_POSTCHANGE && ci->old != ci->new) || 236 + if ((val == CPUFREQ_POSTCHANGE && ci->old != ci->new) || 286 237 (val == CPUFREQ_RESUMECHANGE || val == CPUFREQ_SUSPENDCHANGE)) { 287 238 loops_per_jiffy = cpufreq_scale(l_p_j_ref, l_p_j_ref_freq, 288 239 ci->new); ··· 297 248 } 298 249 #endif 299 250 300 - 301 - void __cpufreq_notify_transition(struct cpufreq_policy *policy, 251 + static void __cpufreq_notify_transition(struct cpufreq_policy *policy, 302 252 struct cpufreq_freqs *freqs, unsigned int state) 303 253 { 304 254 BUG_ON(irqs_disabled()); ··· 342 294 break; 343 295 } 344 296 } 297 + 345 298 /** 346 299 * cpufreq_notify_transition - call notifier chain and adjust_jiffies 347 300 * on frequency transition. ··· 358 309 __cpufreq_notify_transition(policy, freqs, state); 359 310 } 360 311 EXPORT_SYMBOL_GPL(cpufreq_notify_transition); 361 - 362 312 363 313 364 314 /********************************************************************* ··· 424 376 return err; 425 377 } 426 378 427 - 428 379 /** 429 380 * cpufreq_per_cpu_attr_read() / show_##file_name() - 430 381 * print out cpufreq information ··· 488 441 return sprintf(buf, "%u\n", cur_freq); 489 442 } 490 443 491 - 492 444 /** 493 445 * show_scaling_governor - show the current policy for the specified CPU 494 446 */ ··· 502 456 policy->governor->name); 503 457 return -EINVAL; 504 458 } 505 - 506 459 507 460 /** 508 461 * store_scaling_governor - store policy for the specified CPU ··· 525 480 &new_policy.governor)) 526 481 return -EINVAL; 527 482 528 - /* Do not use cpufreq_set_policy here or the user_policy.max 529 - will be wrongly overridden */ 483 + /* 484 + * Do not use cpufreq_set_policy here or the user_policy.max 485 + * will be wrongly overridden 486 + */ 530 487 ret = __cpufreq_set_policy(policy, &new_policy); 531 488 532 489 policy->user_policy.policy = policy->policy; ··· 677 630 NULL 678 631 }; 679 632 680 - struct kobject *cpufreq_global_kobject; 681 - EXPORT_SYMBOL(cpufreq_global_kobject); 682 - 683 633 #define to_policy(k) container_of(k, struct cpufreq_policy, kobj) 684 634 #define to_attr(a) container_of(a, struct freq_attr, attr) 685 635 ··· 746 702 .default_attrs = default_attrs, 747 703 .release = cpufreq_sysfs_release, 748 704 }; 705 + 706 + struct kobject *cpufreq_global_kobject; 707 + EXPORT_SYMBOL(cpufreq_global_kobject); 708 + 709 + static int cpufreq_global_kobject_usage; 710 + 711 + int cpufreq_get_global_kobject(void) 712 + { 713 + if (!cpufreq_global_kobject_usage++) 714 + return kobject_add(cpufreq_global_kobject, 715 + &cpu_subsys.dev_root->kobj, "%s", "cpufreq"); 716 + 717 + return 0; 718 + } 719 + EXPORT_SYMBOL(cpufreq_get_global_kobject); 720 + 721 + void cpufreq_put_global_kobject(void) 722 + { 723 + if (!--cpufreq_global_kobject_usage) 724 + kobject_del(cpufreq_global_kobject); 725 + } 726 + EXPORT_SYMBOL(cpufreq_put_global_kobject); 727 + 728 + int cpufreq_sysfs_create_file(const struct attribute *attr) 729 + { 730 + int ret = cpufreq_get_global_kobject(); 731 + 732 + if (!ret) { 733 + ret = sysfs_create_file(cpufreq_global_kobject, attr); 734 + if (ret) 735 + cpufreq_put_global_kobject(); 736 + } 737 + 738 + return ret; 739 + } 740 + EXPORT_SYMBOL(cpufreq_sysfs_create_file); 741 + 742 + void cpufreq_sysfs_remove_file(const struct attribute *attr) 743 + { 744 + sysfs_remove_file(cpufreq_global_kobject, attr); 745 + cpufreq_put_global_kobject(); 746 + } 747 + EXPORT_SYMBOL(cpufreq_sysfs_remove_file); 749 748 750 749 /* symlink affected CPUs */ 751 750 static int cpufreq_add_dev_symlink(unsigned int cpu, ··· 1092 1005 * Caller should already have policy_rwsem in write mode for this CPU. 1093 1006 * This routine frees the rwsem before returning. 1094 1007 */ 1095 - static int __cpufreq_remove_dev(struct device *dev, struct subsys_interface *sif) 1008 + static int __cpufreq_remove_dev(struct device *dev, 1009 + struct subsys_interface *sif) 1096 1010 { 1097 1011 unsigned int cpu = dev->id, ret, cpus; 1098 1012 unsigned long flags; ··· 1200 1112 return 0; 1201 1113 } 1202 1114 1203 - 1204 1115 static int cpufreq_remove_dev(struct device *dev, struct subsys_interface *sif) 1205 1116 { 1206 1117 unsigned int cpu = dev->id; ··· 1212 1125 return retval; 1213 1126 } 1214 1127 1215 - 1216 1128 static void handle_update(struct work_struct *work) 1217 1129 { 1218 1130 struct cpufreq_policy *policy = ··· 1222 1136 } 1223 1137 1224 1138 /** 1225 - * cpufreq_out_of_sync - If actual and saved CPU frequency differs, we're in deep trouble. 1139 + * cpufreq_out_of_sync - If actual and saved CPU frequency differs, we're 1140 + * in deep trouble. 1226 1141 * @cpu: cpu number 1227 1142 * @old_freq: CPU frequency the kernel thinks the CPU runs at 1228 1143 * @new_freq: CPU frequency the CPU actually runs at ··· 1238 1151 struct cpufreq_freqs freqs; 1239 1152 unsigned long flags; 1240 1153 1241 - 1242 1154 pr_debug("Warning: CPU frequency out of sync: cpufreq and timing " 1243 1155 "core thinks of %u, is %u kHz.\n", old_freq, new_freq); 1244 1156 ··· 1251 1165 cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); 1252 1166 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 1253 1167 } 1254 - 1255 1168 1256 1169 /** 1257 1170 * cpufreq_quick_get - get the CPU frequency (in kHz) from policy->cur ··· 1296 1211 return ret_freq; 1297 1212 } 1298 1213 EXPORT_SYMBOL(cpufreq_quick_get_max); 1299 - 1300 1214 1301 1215 static unsigned int __cpufreq_get(unsigned int cpu) 1302 1216 { ··· 1354 1270 .add_dev = cpufreq_add_dev, 1355 1271 .remove_dev = cpufreq_remove_dev, 1356 1272 }; 1357 - 1358 1273 1359 1274 /** 1360 1275 * cpufreq_bp_suspend - Prepare the boot CPU for system suspend. ··· 1491 1408 } 1492 1409 EXPORT_SYMBOL(cpufreq_register_notifier); 1493 1410 1494 - 1495 1411 /** 1496 1412 * cpufreq_unregister_notifier - unregister a driver with cpufreq 1497 1413 * @nb: notifier block to be unregistered 1498 - * @list: CPUFREQ_TRANSITION_NOTIFIER or CPUFREQ_POLICY_NOTIFIER 1414 + * @list: CPUFREQ_TRANSITION_NOTIFIER or CPUFREQ_POLICY_NOTIFIER 1499 1415 * 1500 1416 * Remove a driver from the CPU frequency notifier list. 1501 1417 * ··· 1529 1447 /********************************************************************* 1530 1448 * GOVERNORS * 1531 1449 *********************************************************************/ 1532 - 1533 1450 1534 1451 int __cpufreq_driver_target(struct cpufreq_policy *policy, 1535 1452 unsigned int target_freq, ··· 1565 1484 { 1566 1485 int ret = -EINVAL; 1567 1486 1568 - policy = cpufreq_cpu_get(policy->cpu); 1569 - if (!policy) 1570 - goto no_policy; 1571 - 1572 1487 if (unlikely(lock_policy_rwsem_write(policy->cpu))) 1573 1488 goto fail; 1574 1489 ··· 1573 1496 unlock_policy_rwsem_write(policy->cpu); 1574 1497 1575 1498 fail: 1576 - cpufreq_cpu_put(policy); 1577 - no_policy: 1578 1499 return ret; 1579 1500 } 1580 1501 EXPORT_SYMBOL_GPL(cpufreq_driver_target); 1581 1502 1582 1503 int __cpufreq_driver_getavg(struct cpufreq_policy *policy, unsigned int cpu) 1583 1504 { 1584 - int ret = 0; 1585 - 1586 1505 if (cpufreq_disabled()) 1587 - return ret; 1506 + return 0; 1588 1507 1589 1508 if (!cpufreq_driver->getavg) 1590 1509 return 0; 1591 1510 1592 - policy = cpufreq_cpu_get(policy->cpu); 1593 - if (!policy) 1594 - return -EINVAL; 1595 - 1596 - ret = cpufreq_driver->getavg(policy, cpu); 1597 - 1598 - cpufreq_cpu_put(policy); 1599 - return ret; 1511 + return cpufreq_driver->getavg(policy, cpu); 1600 1512 } 1601 1513 EXPORT_SYMBOL_GPL(__cpufreq_driver_getavg); 1602 1514 ··· 1628 1562 1629 1563 pr_debug("__cpufreq_governor for CPU %u, event %u\n", 1630 1564 policy->cpu, event); 1565 + 1566 + mutex_lock(&cpufreq_governor_lock); 1567 + if ((!policy->governor_enabled && (event == CPUFREQ_GOV_STOP)) || 1568 + (policy->governor_enabled && (event == CPUFREQ_GOV_START))) { 1569 + mutex_unlock(&cpufreq_governor_lock); 1570 + return -EBUSY; 1571 + } 1572 + 1573 + if (event == CPUFREQ_GOV_STOP) 1574 + policy->governor_enabled = false; 1575 + else if (event == CPUFREQ_GOV_START) 1576 + policy->governor_enabled = true; 1577 + 1578 + mutex_unlock(&cpufreq_governor_lock); 1579 + 1631 1580 ret = policy->governor->governor(policy, event); 1632 1581 1633 1582 if (!ret) { ··· 1650 1569 policy->governor->initialized++; 1651 1570 else if (event == CPUFREQ_GOV_POLICY_EXIT) 1652 1571 policy->governor->initialized--; 1572 + } else { 1573 + /* Restore original values */ 1574 + mutex_lock(&cpufreq_governor_lock); 1575 + if (event == CPUFREQ_GOV_STOP) 1576 + policy->governor_enabled = true; 1577 + else if (event == CPUFREQ_GOV_START) 1578 + policy->governor_enabled = false; 1579 + mutex_unlock(&cpufreq_governor_lock); 1653 1580 } 1654 1581 1655 1582 /* we keep one module reference alive for ··· 1669 1580 1670 1581 return ret; 1671 1582 } 1672 - 1673 1583 1674 1584 int cpufreq_register_governor(struct cpufreq_governor *governor) 1675 1585 { ··· 1693 1605 return err; 1694 1606 } 1695 1607 EXPORT_SYMBOL_GPL(cpufreq_register_governor); 1696 - 1697 1608 1698 1609 void cpufreq_unregister_governor(struct cpufreq_governor *governor) 1699 1610 { ··· 1723 1636 EXPORT_SYMBOL_GPL(cpufreq_unregister_governor); 1724 1637 1725 1638 1726 - 1727 1639 /********************************************************************* 1728 1640 * POLICY INTERFACE * 1729 1641 *********************************************************************/ ··· 1750 1664 return 0; 1751 1665 } 1752 1666 EXPORT_SYMBOL(cpufreq_get_policy); 1753 - 1754 1667 1755 1668 /* 1756 1669 * data : current policy. ··· 1784 1699 blocking_notifier_call_chain(&cpufreq_policy_notifier_list, 1785 1700 CPUFREQ_INCOMPATIBLE, policy); 1786 1701 1787 - /* verify the cpu speed can be set within this limit, 1788 - which might be different to the first one */ 1702 + /* 1703 + * verify the cpu speed can be set within this limit, which might be 1704 + * different to the first one 1705 + */ 1789 1706 ret = cpufreq_driver->verify(policy); 1790 1707 if (ret) 1791 1708 goto error_out; ··· 1889 1802 policy.policy = data->user_policy.policy; 1890 1803 policy.governor = data->user_policy.governor; 1891 1804 1892 - /* BIOS might change freq behind our back 1893 - -> ask driver for current freq and notify governors about a change */ 1805 + /* 1806 + * BIOS might change freq behind our back 1807 + * -> ask driver for current freq and notify governors about a change 1808 + */ 1894 1809 if (cpufreq_driver->get) { 1895 1810 policy.cur = cpufreq_driver->get(cpu); 1896 1811 if (!data->cur) { ··· 1941 1852 } 1942 1853 1943 1854 static struct notifier_block __refdata cpufreq_cpu_notifier = { 1944 - .notifier_call = cpufreq_cpu_callback, 1855 + .notifier_call = cpufreq_cpu_callback, 1945 1856 }; 1946 1857 1947 1858 /********************************************************************* ··· 1953 1864 * @driver_data: A struct cpufreq_driver containing the values# 1954 1865 * submitted by the CPU Frequency driver. 1955 1866 * 1956 - * Registers a CPU Frequency driver to this core code. This code 1867 + * Registers a CPU Frequency driver to this core code. This code 1957 1868 * returns zero on success, -EBUSY when another driver got here first 1958 1869 * (and isn't unregistered in the meantime). 1959 1870 * ··· 2020 1931 } 2021 1932 EXPORT_SYMBOL_GPL(cpufreq_register_driver); 2022 1933 2023 - 2024 1934 /** 2025 1935 * cpufreq_unregister_driver - unregister the current CPUFreq driver 2026 1936 * 2027 - * Unregister the current CPUFreq driver. Only call this if you have 1937 + * Unregister the current CPUFreq driver. Only call this if you have 2028 1938 * the right to do so, i.e. if you have succeeded in initialising before! 2029 1939 * Returns zero if successful, and -EINVAL if the cpufreq_driver is 2030 1940 * currently not initialised. ··· 2060 1972 init_rwsem(&per_cpu(cpu_policy_rwsem, cpu)); 2061 1973 } 2062 1974 2063 - cpufreq_global_kobject = kobject_create_and_add("cpufreq", &cpu_subsys.dev_root->kobj); 1975 + cpufreq_global_kobject = kobject_create(); 2064 1976 BUG_ON(!cpufreq_global_kobject); 2065 1977 register_syscore_ops(&cpufreq_syscore_ops); 2066 1978
+6 -44
drivers/cpufreq/cpufreq_governor.c
··· 23 23 #include <linux/kernel_stat.h> 24 24 #include <linux/mutex.h> 25 25 #include <linux/slab.h> 26 - #include <linux/tick.h> 27 26 #include <linux/types.h> 28 27 #include <linux/workqueue.h> 29 28 #include <linux/cpu.h> 30 29 31 30 #include "cpufreq_governor.h" 32 - 33 - static struct kobject *get_governor_parent_kobj(struct cpufreq_policy *policy) 34 - { 35 - if (have_governor_per_policy()) 36 - return &policy->kobj; 37 - else 38 - return cpufreq_global_kobject; 39 - } 40 31 41 32 static struct attribute_group *get_sysfs_attr(struct dbs_data *dbs_data) 42 33 { ··· 36 45 else 37 46 return dbs_data->cdata->attr_group_gov_sys; 38 47 } 39 - 40 - static inline u64 get_cpu_idle_time_jiffy(unsigned int cpu, u64 *wall) 41 - { 42 - u64 idle_time; 43 - u64 cur_wall_time; 44 - u64 busy_time; 45 - 46 - cur_wall_time = jiffies64_to_cputime64(get_jiffies_64()); 47 - 48 - busy_time = kcpustat_cpu(cpu).cpustat[CPUTIME_USER]; 49 - busy_time += kcpustat_cpu(cpu).cpustat[CPUTIME_SYSTEM]; 50 - busy_time += kcpustat_cpu(cpu).cpustat[CPUTIME_IRQ]; 51 - busy_time += kcpustat_cpu(cpu).cpustat[CPUTIME_SOFTIRQ]; 52 - busy_time += kcpustat_cpu(cpu).cpustat[CPUTIME_STEAL]; 53 - busy_time += kcpustat_cpu(cpu).cpustat[CPUTIME_NICE]; 54 - 55 - idle_time = cur_wall_time - busy_time; 56 - if (wall) 57 - *wall = cputime_to_usecs(cur_wall_time); 58 - 59 - return cputime_to_usecs(idle_time); 60 - } 61 - 62 - u64 get_cpu_idle_time(unsigned int cpu, u64 *wall, int io_busy) 63 - { 64 - u64 idle_time = get_cpu_idle_time_us(cpu, io_busy ? wall : NULL); 65 - 66 - if (idle_time == -1ULL) 67 - return get_cpu_idle_time_jiffy(cpu, wall); 68 - else if (!io_busy) 69 - idle_time += get_cpu_iowait_time_us(cpu, wall); 70 - 71 - return idle_time; 72 - } 73 - EXPORT_SYMBOL_GPL(get_cpu_idle_time); 74 48 75 49 void dbs_check_cpu(struct dbs_data *dbs_data, int cpu) 76 50 { ··· 234 278 return rc; 235 279 } 236 280 281 + if (!have_governor_per_policy()) 282 + WARN_ON(cpufreq_get_global_kobject()); 283 + 237 284 rc = sysfs_create_group(get_governor_parent_kobj(policy), 238 285 get_sysfs_attr(dbs_data)); 239 286 if (rc) { ··· 274 315 if (!--dbs_data->usage_count) { 275 316 sysfs_remove_group(get_governor_parent_kobj(policy), 276 317 get_sysfs_attr(dbs_data)); 318 + 319 + if (!have_governor_per_policy()) 320 + cpufreq_put_global_kobject(); 277 321 278 322 if ((dbs_data->cdata->governor == GOV_CONSERVATIVE) && 279 323 (policy->governor->initialized == 1)) {
+2 -3
drivers/cpufreq/cpufreq_governor.h
··· 81 81 return sprintf(buf, "%u\n", tuners->file_name); \ 82 82 } \ 83 83 \ 84 - static ssize_t show_##file_name##_gov_pol \ 84 + static ssize_t show_##file_name##_gov_pol \ 85 85 (struct cpufreq_policy *policy, char *buf) \ 86 86 { \ 87 87 struct dbs_data *dbs_data = policy->governor_data; \ ··· 91 91 92 92 #define store_one(_gov, file_name) \ 93 93 static ssize_t store_##file_name##_gov_sys \ 94 - (struct kobject *kobj, struct attribute *attr, const char *buf, size_t count) \ 94 + (struct kobject *kobj, struct attribute *attr, const char *buf, size_t count) \ 95 95 { \ 96 96 struct dbs_data *dbs_data = _gov##_dbs_cdata.gdbs_data; \ 97 97 return store_##file_name(dbs_data, buf, count); \ ··· 256 256 return sprintf(buf, "%u\n", dbs_data->min_sampling_rate); \ 257 257 } 258 258 259 - u64 get_cpu_idle_time(unsigned int cpu, u64 *wall, int io_busy); 260 259 void dbs_check_cpu(struct dbs_data *dbs_data, int cpu); 261 260 bool need_load_eval(struct cpu_dbs_common_info *cdbs, 262 261 unsigned int sampling_rate);
-4
drivers/cpufreq/cpufreq_performance.c
··· 17 17 #include <linux/cpufreq.h> 18 18 #include <linux/init.h> 19 19 20 - 21 20 static int cpufreq_governor_performance(struct cpufreq_policy *policy, 22 21 unsigned int event) 23 22 { ··· 43 44 .owner = THIS_MODULE, 44 45 }; 45 46 46 - 47 47 static int __init cpufreq_gov_performance_init(void) 48 48 { 49 49 return cpufreq_register_governor(&cpufreq_gov_performance); 50 50 } 51 51 52 - 53 52 static void __exit cpufreq_gov_performance_exit(void) 54 53 { 55 54 cpufreq_unregister_governor(&cpufreq_gov_performance); 56 55 } 57 - 58 56 59 57 MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>"); 60 58 MODULE_DESCRIPTION("CPUfreq policy governor 'performance'");
+2 -4
drivers/cpufreq/cpufreq_powersave.c
··· 1 1 /* 2 - * linux/drivers/cpufreq/cpufreq_powersave.c 2 + * linux/drivers/cpufreq/cpufreq_powersave.c 3 3 * 4 - * Copyright (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de> 4 + * Copyright (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de> 5 5 * 6 6 * 7 7 * This program is free software; you can redistribute it and/or modify ··· 48 48 return cpufreq_register_governor(&cpufreq_gov_powersave); 49 49 } 50 50 51 - 52 51 static void __exit cpufreq_gov_powersave_exit(void) 53 52 { 54 53 cpufreq_unregister_governor(&cpufreq_gov_powersave); 55 54 } 56 - 57 55 58 56 MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>"); 59 57 MODULE_DESCRIPTION("CPUfreq policy governor 'powersave'");
+2 -2
drivers/cpufreq/cpufreq_stats.c
··· 27 27 struct cpufreq_stats { 28 28 unsigned int cpu; 29 29 unsigned int total_trans; 30 - unsigned long long last_time; 30 + unsigned long long last_time; 31 31 unsigned int max_state; 32 32 unsigned int state_num; 33 33 unsigned int last_index; ··· 116 116 len += snprintf(buf + len, PAGE_SIZE - len, "%9u: ", 117 117 stat->freq_table[i]); 118 118 119 - for (j = 0; j < stat->state_num; j++) { 119 + for (j = 0; j < stat->state_num; j++) { 120 120 if (len >= PAGE_SIZE) 121 121 break; 122 122 len += snprintf(buf + len, PAGE_SIZE - len, "%9u ",
+13 -101
drivers/cpufreq/cpufreq_userspace.c
··· 13 13 14 14 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 15 15 16 - #include <linux/kernel.h> 17 - #include <linux/module.h> 18 - #include <linux/smp.h> 19 - #include <linux/init.h> 20 - #include <linux/spinlock.h> 21 - #include <linux/interrupt.h> 22 16 #include <linux/cpufreq.h> 23 - #include <linux/cpu.h> 24 - #include <linux/types.h> 25 - #include <linux/fs.h> 26 - #include <linux/sysfs.h> 17 + #include <linux/init.h> 18 + #include <linux/module.h> 27 19 #include <linux/mutex.h> 28 20 29 - /** 30 - * A few values needed by the userspace governor 31 - */ 32 - static DEFINE_PER_CPU(unsigned int, cpu_max_freq); 33 - static DEFINE_PER_CPU(unsigned int, cpu_min_freq); 34 - static DEFINE_PER_CPU(unsigned int, cpu_cur_freq); /* current CPU freq */ 35 - static DEFINE_PER_CPU(unsigned int, cpu_set_freq); /* CPU freq desired by 36 - userspace */ 37 21 static DEFINE_PER_CPU(unsigned int, cpu_is_managed); 38 - 39 22 static DEFINE_MUTEX(userspace_mutex); 40 - static int cpus_using_userspace_governor; 41 - 42 - /* keep track of frequency transitions */ 43 - static int 44 - userspace_cpufreq_notifier(struct notifier_block *nb, unsigned long val, 45 - void *data) 46 - { 47 - struct cpufreq_freqs *freq = data; 48 - 49 - if (!per_cpu(cpu_is_managed, freq->cpu)) 50 - return 0; 51 - 52 - if (val == CPUFREQ_POSTCHANGE) { 53 - pr_debug("saving cpu_cur_freq of cpu %u to be %u kHz\n", 54 - freq->cpu, freq->new); 55 - per_cpu(cpu_cur_freq, freq->cpu) = freq->new; 56 - } 57 - 58 - return 0; 59 - } 60 - 61 - static struct notifier_block userspace_cpufreq_notifier_block = { 62 - .notifier_call = userspace_cpufreq_notifier 63 - }; 64 - 65 23 66 24 /** 67 25 * cpufreq_set - set the CPU frequency ··· 38 80 if (!per_cpu(cpu_is_managed, policy->cpu)) 39 81 goto err; 40 82 41 - per_cpu(cpu_set_freq, policy->cpu) = freq; 42 - 43 - if (freq < per_cpu(cpu_min_freq, policy->cpu)) 44 - freq = per_cpu(cpu_min_freq, policy->cpu); 45 - if (freq > per_cpu(cpu_max_freq, policy->cpu)) 46 - freq = per_cpu(cpu_max_freq, policy->cpu); 47 - 48 83 /* 49 84 * We're safe from concurrent calls to ->target() here 50 85 * as we hold the userspace_mutex lock. If we were calling ··· 55 104 return ret; 56 105 } 57 106 58 - 59 107 static ssize_t show_speed(struct cpufreq_policy *policy, char *buf) 60 108 { 61 - return sprintf(buf, "%u\n", per_cpu(cpu_cur_freq, policy->cpu)); 109 + return sprintf(buf, "%u\n", policy->cur); 62 110 } 63 111 64 112 static int cpufreq_governor_userspace(struct cpufreq_policy *policy, ··· 69 119 switch (event) { 70 120 case CPUFREQ_GOV_START: 71 121 BUG_ON(!policy->cur); 122 + pr_debug("started managing cpu %u\n", cpu); 123 + 72 124 mutex_lock(&userspace_mutex); 73 - 74 - if (cpus_using_userspace_governor == 0) { 75 - cpufreq_register_notifier( 76 - &userspace_cpufreq_notifier_block, 77 - CPUFREQ_TRANSITION_NOTIFIER); 78 - } 79 - cpus_using_userspace_governor++; 80 - 81 125 per_cpu(cpu_is_managed, cpu) = 1; 82 - per_cpu(cpu_min_freq, cpu) = policy->min; 83 - per_cpu(cpu_max_freq, cpu) = policy->max; 84 - per_cpu(cpu_cur_freq, cpu) = policy->cur; 85 - per_cpu(cpu_set_freq, cpu) = policy->cur; 86 - pr_debug("managing cpu %u started " 87 - "(%u - %u kHz, currently %u kHz)\n", 88 - cpu, 89 - per_cpu(cpu_min_freq, cpu), 90 - per_cpu(cpu_max_freq, cpu), 91 - per_cpu(cpu_cur_freq, cpu)); 92 - 93 126 mutex_unlock(&userspace_mutex); 94 127 break; 95 128 case CPUFREQ_GOV_STOP: 96 - mutex_lock(&userspace_mutex); 97 - cpus_using_userspace_governor--; 98 - if (cpus_using_userspace_governor == 0) { 99 - cpufreq_unregister_notifier( 100 - &userspace_cpufreq_notifier_block, 101 - CPUFREQ_TRANSITION_NOTIFIER); 102 - } 103 - 104 - per_cpu(cpu_is_managed, cpu) = 0; 105 - per_cpu(cpu_min_freq, cpu) = 0; 106 - per_cpu(cpu_max_freq, cpu) = 0; 107 - per_cpu(cpu_set_freq, cpu) = 0; 108 129 pr_debug("managing cpu %u stopped\n", cpu); 130 + 131 + mutex_lock(&userspace_mutex); 132 + per_cpu(cpu_is_managed, cpu) = 0; 109 133 mutex_unlock(&userspace_mutex); 110 134 break; 111 135 case CPUFREQ_GOV_LIMITS: 112 136 mutex_lock(&userspace_mutex); 113 - pr_debug("limit event for cpu %u: %u - %u kHz, " 114 - "currently %u kHz, last set to %u kHz\n", 137 + pr_debug("limit event for cpu %u: %u - %u kHz, currently %u kHz\n", 115 138 cpu, policy->min, policy->max, 116 - per_cpu(cpu_cur_freq, cpu), 117 - per_cpu(cpu_set_freq, cpu)); 118 - if (policy->max < per_cpu(cpu_set_freq, cpu)) { 139 + policy->cur); 140 + 141 + if (policy->max < policy->cur) 119 142 __cpufreq_driver_target(policy, policy->max, 120 143 CPUFREQ_RELATION_H); 121 - } else if (policy->min > per_cpu(cpu_set_freq, cpu)) { 144 + else if (policy->min > policy->cur) 122 145 __cpufreq_driver_target(policy, policy->min, 123 146 CPUFREQ_RELATION_L); 124 - } else { 125 - __cpufreq_driver_target(policy, 126 - per_cpu(cpu_set_freq, cpu), 127 - CPUFREQ_RELATION_L); 128 - } 129 - per_cpu(cpu_min_freq, cpu) = policy->min; 130 - per_cpu(cpu_max_freq, cpu) = policy->max; 131 - per_cpu(cpu_cur_freq, cpu) = policy->cur; 132 147 mutex_unlock(&userspace_mutex); 133 148 break; 134 149 } 135 150 return rc; 136 151 } 137 - 138 152 139 153 #ifndef CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE 140 154 static ··· 116 202 return cpufreq_register_governor(&cpufreq_gov_userspace); 117 203 } 118 204 119 - 120 205 static void __exit cpufreq_gov_userspace_exit(void) 121 206 { 122 207 cpufreq_unregister_governor(&cpufreq_gov_userspace); 123 208 } 124 - 125 209 126 210 MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>, " 127 211 "Russell King <rmk@arm.linux.org.uk>");
+3
drivers/cpufreq/davinci-cpufreq.c
··· 114 114 pdata->set_voltage(idx); 115 115 116 116 out: 117 + if (ret) 118 + freqs.new = freqs.old; 119 + 117 120 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 118 121 119 122 return ret;
+2 -2
drivers/cpufreq/dbx500-cpufreq.c
··· 57 57 if (ret) { 58 58 pr_err("dbx500-cpufreq: Failed to set armss_clk to %d Hz: error %d\n", 59 59 freqs.new * 1000, ret); 60 - return ret; 60 + freqs.new = freqs.old; 61 61 } 62 62 63 63 /* post change notification */ 64 64 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 65 65 66 - return 0; 66 + return ret; 67 67 } 68 68 69 69 static unsigned int dbx500_cpufreq_getspeed(unsigned int cpu)
+7 -4
drivers/cpufreq/e_powersaver.c
··· 161 161 current_multiplier); 162 162 } 163 163 #endif 164 + if (err) 165 + freqs.new = freqs.old; 166 + 164 167 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 165 168 return err; 166 169 } ··· 191 188 } 192 189 193 190 /* Make frequency transition */ 194 - dest_state = centaur->freq_table[newstate].index & 0xffff; 191 + dest_state = centaur->freq_table[newstate].driver_data & 0xffff; 195 192 ret = eps_set_state(centaur, policy, dest_state); 196 193 if (ret) 197 194 printk(KERN_ERR "eps: Timeout!\n"); ··· 383 380 f_table = &centaur->freq_table[0]; 384 381 if (brand != EPS_BRAND_C7M) { 385 382 f_table[0].frequency = fsb * min_multiplier; 386 - f_table[0].index = (min_multiplier << 8) | min_voltage; 383 + f_table[0].driver_data = (min_multiplier << 8) | min_voltage; 387 384 f_table[1].frequency = fsb * max_multiplier; 388 - f_table[1].index = (max_multiplier << 8) | max_voltage; 385 + f_table[1].driver_data = (max_multiplier << 8) | max_voltage; 389 386 f_table[2].frequency = CPUFREQ_TABLE_END; 390 387 } else { 391 388 k = 0; ··· 394 391 for (i = min_multiplier; i <= max_multiplier; i++) { 395 392 voltage = (k * step) / 256 + min_voltage; 396 393 f_table[k].frequency = fsb * i; 397 - f_table[k].index = (i << 8) | voltage; 394 + f_table[k].driver_data = (i << 8) | voltage; 398 395 k++; 399 396 } 400 397 f_table[k].frequency = CPUFREQ_TABLE_END;
+8 -2
drivers/cpufreq/exynos-cpufreq.c
··· 113 113 if (ret) { 114 114 pr_err("%s: failed to set cpu voltage to %d\n", 115 115 __func__, arm_volt); 116 - goto out; 116 + freqs.new = freqs.old; 117 + goto post_notify; 117 118 } 118 119 } 119 120 ··· 124 123 if (ret) { 125 124 pr_err("%s: failed to set cpu voltage to %d\n", 126 125 __func__, safe_arm_volt); 127 - goto out; 126 + freqs.new = freqs.old; 127 + goto post_notify; 128 128 } 129 129 } 130 130 131 131 exynos_info->set_freq(old_index, index); 132 132 133 + post_notify: 133 134 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 135 + 136 + if (ret) 137 + goto out; 134 138 135 139 /* When the new frequency is lower than current frequency */ 136 140 if ((freqs.new < freqs.old) ||
+13 -13
drivers/cpufreq/freq_table.c
··· 34 34 35 35 continue; 36 36 } 37 - pr_debug("table entry %u: %u kHz, %u index\n", 38 - i, freq, table[i].index); 37 + pr_debug("table entry %u: %u kHz, %u driver_data\n", 38 + i, freq, table[i].driver_data); 39 39 if (freq < min_freq) 40 40 min_freq = freq; 41 41 if (freq > max_freq) ··· 97 97 unsigned int *index) 98 98 { 99 99 struct cpufreq_frequency_table optimal = { 100 - .index = ~0, 100 + .driver_data = ~0, 101 101 .frequency = 0, 102 102 }; 103 103 struct cpufreq_frequency_table suboptimal = { 104 - .index = ~0, 104 + .driver_data = ~0, 105 105 .frequency = 0, 106 106 }; 107 107 unsigned int i; ··· 129 129 if (freq <= target_freq) { 130 130 if (freq >= optimal.frequency) { 131 131 optimal.frequency = freq; 132 - optimal.index = i; 132 + optimal.driver_data = i; 133 133 } 134 134 } else { 135 135 if (freq <= suboptimal.frequency) { 136 136 suboptimal.frequency = freq; 137 - suboptimal.index = i; 137 + suboptimal.driver_data = i; 138 138 } 139 139 } 140 140 break; ··· 142 142 if (freq >= target_freq) { 143 143 if (freq <= optimal.frequency) { 144 144 optimal.frequency = freq; 145 - optimal.index = i; 145 + optimal.driver_data = i; 146 146 } 147 147 } else { 148 148 if (freq >= suboptimal.frequency) { 149 149 suboptimal.frequency = freq; 150 - suboptimal.index = i; 150 + suboptimal.driver_data = i; 151 151 } 152 152 } 153 153 break; 154 154 } 155 155 } 156 - if (optimal.index > i) { 157 - if (suboptimal.index > i) 156 + if (optimal.driver_data > i) { 157 + if (suboptimal.driver_data > i) 158 158 return -EINVAL; 159 - *index = suboptimal.index; 159 + *index = suboptimal.driver_data; 160 160 } else 161 - *index = optimal.index; 161 + *index = optimal.driver_data; 162 162 163 163 pr_debug("target is %u (%u kHz, %u)\n", *index, table[*index].frequency, 164 - table[*index].index); 164 + table[*index].driver_data); 165 165 166 166 return 0; 167 167 }
+1 -1
drivers/cpufreq/ia64-acpi-cpufreq.c
··· 326 326 /* table init */ 327 327 for (i = 0; i <= data->acpi_data.state_count; i++) 328 328 { 329 - data->freq_table[i].index = i; 329 + data->freq_table[i].driver_data = i; 330 330 if (i < data->acpi_data.state_count) { 331 331 data->freq_table[i].frequency = 332 332 data->acpi_data.states[i].core_frequency * 1000;
+11 -6
drivers/cpufreq/imx6q-cpufreq.c
··· 68 68 if (freqs.old == freqs.new) 69 69 return 0; 70 70 71 - cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); 72 - 73 71 rcu_read_lock(); 74 72 opp = opp_find_freq_ceil(cpu_dev, &freq_hz); 75 73 if (IS_ERR(opp)) { ··· 84 86 freqs.old / 1000, volt_old / 1000, 85 87 freqs.new / 1000, volt / 1000); 86 88 89 + cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); 90 + 87 91 /* scaling up? scale voltage before frequency */ 88 92 if (freqs.new > freqs.old) { 89 93 ret = regulator_set_voltage_tol(arm_reg, volt, 0); 90 94 if (ret) { 91 95 dev_err(cpu_dev, 92 96 "failed to scale vddarm up: %d\n", ret); 93 - return ret; 97 + freqs.new = freqs.old; 98 + goto post_notify; 94 99 } 95 100 96 101 /* ··· 146 145 if (ret) { 147 146 dev_err(cpu_dev, "failed to set clock rate: %d\n", ret); 148 147 regulator_set_voltage_tol(arm_reg, volt_old, 0); 149 - return ret; 148 + freqs.new = freqs.old; 149 + goto post_notify; 150 150 } 151 151 152 152 /* scaling down? scale voltage after frequency */ 153 153 if (freqs.new < freqs.old) { 154 154 ret = regulator_set_voltage_tol(arm_reg, volt, 0); 155 - if (ret) 155 + if (ret) { 156 156 dev_warn(cpu_dev, 157 157 "failed to scale vddarm down: %d\n", ret); 158 + ret = 0; 159 + } 158 160 159 161 if (freqs.old == FREQ_1P2_GHZ / 1000) { 160 162 regulator_set_voltage_tol(pu_reg, ··· 167 163 } 168 164 } 169 165 166 + post_notify: 170 167 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 171 168 172 - return 0; 169 + return ret; 173 170 } 174 171 175 172 static int imx6q_cpufreq_init(struct cpufreq_policy *policy)
+1 -1
drivers/cpufreq/kirkwood-cpufreq.c
··· 59 59 unsigned int index) 60 60 { 61 61 struct cpufreq_freqs freqs; 62 - unsigned int state = kirkwood_freq_table[index].index; 62 + unsigned int state = kirkwood_freq_table[index].driver_data; 63 63 unsigned long reg; 64 64 65 65 freqs.old = kirkwood_cpufreq_get_cpu_frequency(0);
+8 -8
drivers/cpufreq/longhaul.c
··· 254 254 u32 bm_timeout = 1000; 255 255 unsigned int dir = 0; 256 256 257 - mults_index = longhaul_table[table_index].index; 257 + mults_index = longhaul_table[table_index].driver_data; 258 258 /* Safety precautions */ 259 259 mult = mults[mults_index & 0x1f]; 260 260 if (mult == -1) ··· 487 487 if (ratio > maxmult || ratio < minmult) 488 488 continue; 489 489 longhaul_table[k].frequency = calc_speed(ratio); 490 - longhaul_table[k].index = j; 490 + longhaul_table[k].driver_data = j; 491 491 k++; 492 492 } 493 493 if (k <= 1) { ··· 508 508 if (min_i != j) { 509 509 swap(longhaul_table[j].frequency, 510 510 longhaul_table[min_i].frequency); 511 - swap(longhaul_table[j].index, 512 - longhaul_table[min_i].index); 511 + swap(longhaul_table[j].driver_data, 512 + longhaul_table[min_i].driver_data); 513 513 } 514 514 } 515 515 ··· 517 517 518 518 /* Find index we are running on */ 519 519 for (j = 0; j < k; j++) { 520 - if (mults[longhaul_table[j].index & 0x1f] == mult) { 520 + if (mults[longhaul_table[j].driver_data & 0x1f] == mult) { 521 521 longhaul_index = j; 522 522 break; 523 523 } ··· 613 613 pos = (speed - min_vid_speed) / kHz_step + minvid.pos; 614 614 else 615 615 pos = minvid.pos; 616 - longhaul_table[j].index |= mV_vrm_table[pos] << 8; 616 + longhaul_table[j].driver_data |= mV_vrm_table[pos] << 8; 617 617 vid = vrm_mV_table[mV_vrm_table[pos]]; 618 618 printk(KERN_INFO PFX "f: %d kHz, index: %d, vid: %d mV\n", 619 619 speed, j, vid.mV); ··· 656 656 * this in hardware, C3 is old and we need to do this 657 657 * in software. */ 658 658 i = longhaul_index; 659 - current_vid = (longhaul_table[longhaul_index].index >> 8); 659 + current_vid = (longhaul_table[longhaul_index].driver_data >> 8); 660 660 current_vid &= 0x1f; 661 661 if (table_index > longhaul_index) 662 662 dir = 1; 663 663 while (i != table_index) { 664 - vid = (longhaul_table[i].index >> 8) & 0x1f; 664 + vid = (longhaul_table[i].driver_data >> 8) & 0x1f; 665 665 if (vid != current_vid) { 666 666 longhaul_setstate(policy, i); 667 667 current_vid = vid;
+1 -1
drivers/cpufreq/loongson2_cpufreq.c
··· 72 72 73 73 freq = 74 74 ((cpu_clock_freq / 1000) * 75 - loongson2_clockmod_table[newstate].index) / 8; 75 + loongson2_clockmod_table[newstate].driver_data) / 8; 76 76 if (freq < policy->min || freq > policy->max) 77 77 return -EINVAL; 78 78
+3 -3
drivers/cpufreq/omap-cpufreq.c
··· 93 93 if (freqs.old == freqs.new && policy->cur == freqs.new) 94 94 return ret; 95 95 96 - /* notifiers */ 97 - cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); 98 - 99 96 freq = freqs.new * 1000; 100 97 ret = clk_round_rate(mpu_clk, freq); 101 98 if (IS_ERR_VALUE(ret)) { ··· 121 124 dev_dbg(mpu_dev, "cpufreq-omap: %u MHz, %ld mV --> %u MHz, %ld mV\n", 122 125 freqs.old / 1000, volt_old ? volt_old / 1000 : -1, 123 126 freqs.new / 1000, volt ? volt / 1000 : -1); 127 + 128 + /* notifiers */ 129 + cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); 124 130 125 131 /* scaling up? scale voltage before frequency */ 126 132 if (mpu_reg && (freqs.new > freqs.old)) {
+2 -2
drivers/cpufreq/p4-clockmod.c
··· 118 118 return -EINVAL; 119 119 120 120 freqs.old = cpufreq_p4_get(policy->cpu); 121 - freqs.new = stock_freq * p4clockmod_table[newstate].index / 8; 121 + freqs.new = stock_freq * p4clockmod_table[newstate].driver_data / 8; 122 122 123 123 if (freqs.new == freqs.old) 124 124 return 0; ··· 131 131 * Developer's Manual, Volume 3 132 132 */ 133 133 for_each_cpu(i, policy->cpus) 134 - cpufreq_p4_setdc(i, p4clockmod_table[newstate].index); 134 + cpufreq_p4_setdc(i, p4clockmod_table[newstate].driver_data); 135 135 136 136 /* notifiers */ 137 137 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
+2
drivers/cpufreq/pcc-cpufreq.c
··· 243 243 return 0; 244 244 245 245 cmd_incomplete: 246 + freqs.new = freqs.old; 247 + cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 246 248 iowrite16(0, &pcch_hdr->status); 247 249 spin_unlock(&pcc_lock); 248 250 return -EINVAL;
+4 -4
drivers/cpufreq/powernow-k6.c
··· 58 58 msrval = POWERNOW_IOPORT + 0x0; 59 59 wrmsr(MSR_K6_EPMR, msrval, 0); /* disable it again */ 60 60 61 - return clock_ratio[(invalue >> 5)&7].index; 61 + return clock_ratio[(invalue >> 5)&7].driver_data; 62 62 } 63 63 64 64 ··· 75 75 unsigned long msrval; 76 76 struct cpufreq_freqs freqs; 77 77 78 - if (clock_ratio[best_i].index > max_multiplier) { 78 + if (clock_ratio[best_i].driver_data > max_multiplier) { 79 79 printk(KERN_ERR PFX "invalid target frequency\n"); 80 80 return; 81 81 } 82 82 83 83 freqs.old = busfreq * powernow_k6_get_cpu_multiplier(); 84 - freqs.new = busfreq * clock_ratio[best_i].index; 84 + freqs.new = busfreq * clock_ratio[best_i].driver_data; 85 85 86 86 cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); 87 87 ··· 156 156 157 157 /* table init */ 158 158 for (i = 0; (clock_ratio[i].frequency != CPUFREQ_TABLE_END); i++) { 159 - f = clock_ratio[i].index; 159 + f = clock_ratio[i].driver_data; 160 160 if (f > max_multiplier) 161 161 clock_ratio[i].frequency = CPUFREQ_ENTRY_INVALID; 162 162 else
+8 -8
drivers/cpufreq/powernow-k7.c
··· 186 186 fid = *pst++; 187 187 188 188 powernow_table[j].frequency = (fsb * fid_codes[fid]) / 10; 189 - powernow_table[j].index = fid; /* lower 8 bits */ 189 + powernow_table[j].driver_data = fid; /* lower 8 bits */ 190 190 191 191 speed = powernow_table[j].frequency; 192 192 ··· 203 203 maximum_speed = speed; 204 204 205 205 vid = *pst++; 206 - powernow_table[j].index |= (vid << 8); /* upper 8 bits */ 206 + powernow_table[j].driver_data |= (vid << 8); /* upper 8 bits */ 207 207 208 208 pr_debug(" FID: 0x%x (%d.%dx [%dMHz]) " 209 209 "VID: 0x%x (%d.%03dV)\n", fid, fid_codes[fid] / 10, ··· 212 212 mobile_vid_table[vid]%1000); 213 213 } 214 214 powernow_table[number_scales].frequency = CPUFREQ_TABLE_END; 215 - powernow_table[number_scales].index = 0; 215 + powernow_table[number_scales].driver_data = 0; 216 216 217 217 return 0; 218 218 } ··· 260 260 * vid are the upper 8 bits. 261 261 */ 262 262 263 - fid = powernow_table[index].index & 0xFF; 264 - vid = (powernow_table[index].index & 0xFF00) >> 8; 263 + fid = powernow_table[index].driver_data & 0xFF; 264 + vid = (powernow_table[index].driver_data & 0xFF00) >> 8; 265 265 266 266 rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val); 267 267 cfid = fidvidstatus.bits.CFID; ··· 373 373 fid = pc.bits.fid; 374 374 375 375 powernow_table[i].frequency = fsb * fid_codes[fid] / 10; 376 - powernow_table[i].index = fid; /* lower 8 bits */ 377 - powernow_table[i].index |= (vid << 8); /* upper 8 bits */ 376 + powernow_table[i].driver_data = fid; /* lower 8 bits */ 377 + powernow_table[i].driver_data |= (vid << 8); /* upper 8 bits */ 378 378 379 379 speed = powernow_table[i].frequency; 380 380 speed_mhz = speed / 1000; ··· 417 417 } 418 418 419 419 powernow_table[i].frequency = CPUFREQ_TABLE_END; 420 - powernow_table[i].index = 0; 420 + powernow_table[i].driver_data = 0; 421 421 422 422 /* notify BIOS that we exist */ 423 423 acpi_processor_notify_smm(THIS_MODULE);
+12 -12
drivers/cpufreq/powernow-k8.c
··· 584 584 CPUFREQ_ENTRY_INVALID) { 585 585 printk(KERN_INFO PFX 586 586 "fid 0x%x (%d MHz), vid 0x%x\n", 587 - data->powernow_table[j].index & 0xff, 587 + data->powernow_table[j].driver_data & 0xff, 588 588 data->powernow_table[j].frequency/1000, 589 - data->powernow_table[j].index >> 8); 589 + data->powernow_table[j].driver_data >> 8); 590 590 } 591 591 } 592 592 if (data->batps) ··· 632 632 633 633 for (j = 0; j < data->numps; j++) { 634 634 int freq; 635 - powernow_table[j].index = pst[j].fid; /* lower 8 bits */ 636 - powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */ 635 + powernow_table[j].driver_data = pst[j].fid; /* lower 8 bits */ 636 + powernow_table[j].driver_data |= (pst[j].vid << 8); /* upper 8 bits */ 637 637 freq = find_khz_freq_from_fid(pst[j].fid); 638 638 powernow_table[j].frequency = freq; 639 639 } 640 640 powernow_table[data->numps].frequency = CPUFREQ_TABLE_END; 641 - powernow_table[data->numps].index = 0; 641 + powernow_table[data->numps].driver_data = 0; 642 642 643 643 if (query_current_values_with_pending_wait(data)) { 644 644 kfree(powernow_table); ··· 810 810 811 811 powernow_table[data->acpi_data.state_count].frequency = 812 812 CPUFREQ_TABLE_END; 813 - powernow_table[data->acpi_data.state_count].index = 0; 813 + powernow_table[data->acpi_data.state_count].driver_data = 0; 814 814 data->powernow_table = powernow_table; 815 815 816 816 if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu) ··· 865 865 pr_debug(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid); 866 866 867 867 index = fid | (vid<<8); 868 - powernow_table[i].index = index; 868 + powernow_table[i].driver_data = index; 869 869 870 870 freq = find_khz_freq_from_fid(fid); 871 871 powernow_table[i].frequency = freq; ··· 941 941 * the cpufreq frequency table in find_psb_table, vid 942 942 * are the upper 8 bits. 943 943 */ 944 - fid = data->powernow_table[index].index & 0xFF; 945 - vid = (data->powernow_table[index].index & 0xFF00) >> 8; 944 + fid = data->powernow_table[index].driver_data & 0xFF; 945 + vid = (data->powernow_table[index].driver_data & 0xFF00) >> 8; 946 946 947 947 pr_debug("table matched fid 0x%x, giving vid 0x%x\n", fid, vid); 948 948 ··· 967 967 968 968 res = transition_fid_vid(data, fid, vid); 969 969 if (res) 970 - return res; 971 - 972 - freqs.new = find_khz_freq_from_fid(data->currfid); 970 + freqs.new = freqs.old; 971 + else 972 + freqs.new = find_khz_freq_from_fid(data->currfid); 973 973 974 974 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 975 975 return res;
+380
drivers/cpufreq/ppc-corenet-cpufreq.c
··· 1 + /* 2 + * Copyright 2013 Freescale Semiconductor, Inc. 3 + * 4 + * CPU Frequency Scaling driver for Freescale PowerPC corenet SoCs. 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License version 2 as 8 + * published by the Free Software Foundation. 9 + */ 10 + 11 + #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 12 + 13 + #include <linux/clk.h> 14 + #include <linux/cpufreq.h> 15 + #include <linux/errno.h> 16 + #include <sysdev/fsl_soc.h> 17 + #include <linux/init.h> 18 + #include <linux/kernel.h> 19 + #include <linux/module.h> 20 + #include <linux/mutex.h> 21 + #include <linux/of.h> 22 + #include <linux/slab.h> 23 + #include <linux/smp.h> 24 + 25 + /** 26 + * struct cpu_data - per CPU data struct 27 + * @clk: the clk of CPU 28 + * @parent: the parent node of cpu clock 29 + * @table: frequency table 30 + */ 31 + struct cpu_data { 32 + struct clk *clk; 33 + struct device_node *parent; 34 + struct cpufreq_frequency_table *table; 35 + }; 36 + 37 + /** 38 + * struct soc_data - SoC specific data 39 + * @freq_mask: mask the disallowed frequencies 40 + * @flag: unique flags 41 + */ 42 + struct soc_data { 43 + u32 freq_mask[4]; 44 + u32 flag; 45 + }; 46 + 47 + #define FREQ_MASK 1 48 + /* see hardware specification for the allowed frqeuencies */ 49 + static const struct soc_data sdata[] = { 50 + { /* used by p2041 and p3041 */ 51 + .freq_mask = {0x8, 0x8, 0x2, 0x2}, 52 + .flag = FREQ_MASK, 53 + }, 54 + { /* used by p5020 */ 55 + .freq_mask = {0x8, 0x2}, 56 + .flag = FREQ_MASK, 57 + }, 58 + { /* used by p4080, p5040 */ 59 + .freq_mask = {0}, 60 + .flag = 0, 61 + }, 62 + }; 63 + 64 + /* 65 + * the minimum allowed core frequency, in Hz 66 + * for chassis v1.0, >= platform frequency 67 + * for chassis v2.0, >= platform frequency / 2 68 + */ 69 + static u32 min_cpufreq; 70 + static const u32 *fmask; 71 + 72 + /* serialize frequency changes */ 73 + static DEFINE_MUTEX(cpufreq_lock); 74 + static DEFINE_PER_CPU(struct cpu_data *, cpu_data); 75 + 76 + /* cpumask in a cluster */ 77 + static DEFINE_PER_CPU(cpumask_var_t, cpu_mask); 78 + 79 + #ifndef CONFIG_SMP 80 + static inline const struct cpumask *cpu_core_mask(int cpu) 81 + { 82 + return cpumask_of(0); 83 + } 84 + #endif 85 + 86 + static unsigned int corenet_cpufreq_get_speed(unsigned int cpu) 87 + { 88 + struct cpu_data *data = per_cpu(cpu_data, cpu); 89 + 90 + return clk_get_rate(data->clk) / 1000; 91 + } 92 + 93 + /* reduce the duplicated frequencies in frequency table */ 94 + static void freq_table_redup(struct cpufreq_frequency_table *freq_table, 95 + int count) 96 + { 97 + int i, j; 98 + 99 + for (i = 1; i < count; i++) { 100 + for (j = 0; j < i; j++) { 101 + if (freq_table[j].frequency == CPUFREQ_ENTRY_INVALID || 102 + freq_table[j].frequency != 103 + freq_table[i].frequency) 104 + continue; 105 + 106 + freq_table[i].frequency = CPUFREQ_ENTRY_INVALID; 107 + break; 108 + } 109 + } 110 + } 111 + 112 + /* sort the frequencies in frequency table in descenting order */ 113 + static void freq_table_sort(struct cpufreq_frequency_table *freq_table, 114 + int count) 115 + { 116 + int i, j, ind; 117 + unsigned int freq, max_freq; 118 + struct cpufreq_frequency_table table; 119 + for (i = 0; i < count - 1; i++) { 120 + max_freq = freq_table[i].frequency; 121 + ind = i; 122 + for (j = i + 1; j < count; j++) { 123 + freq = freq_table[j].frequency; 124 + if (freq == CPUFREQ_ENTRY_INVALID || 125 + freq <= max_freq) 126 + continue; 127 + ind = j; 128 + max_freq = freq; 129 + } 130 + 131 + if (ind != i) { 132 + /* exchange the frequencies */ 133 + table.driver_data = freq_table[i].driver_data; 134 + table.frequency = freq_table[i].frequency; 135 + freq_table[i].driver_data = freq_table[ind].driver_data; 136 + freq_table[i].frequency = freq_table[ind].frequency; 137 + freq_table[ind].driver_data = table.driver_data; 138 + freq_table[ind].frequency = table.frequency; 139 + } 140 + } 141 + } 142 + 143 + static int corenet_cpufreq_cpu_init(struct cpufreq_policy *policy) 144 + { 145 + struct device_node *np; 146 + int i, count, ret; 147 + u32 freq, mask; 148 + struct clk *clk; 149 + struct cpufreq_frequency_table *table; 150 + struct cpu_data *data; 151 + unsigned int cpu = policy->cpu; 152 + 153 + np = of_get_cpu_node(cpu, NULL); 154 + if (!np) 155 + return -ENODEV; 156 + 157 + data = kzalloc(sizeof(*data), GFP_KERNEL); 158 + if (!data) { 159 + pr_err("%s: no memory\n", __func__); 160 + goto err_np; 161 + } 162 + 163 + data->clk = of_clk_get(np, 0); 164 + if (IS_ERR(data->clk)) { 165 + pr_err("%s: no clock information\n", __func__); 166 + goto err_nomem2; 167 + } 168 + 169 + data->parent = of_parse_phandle(np, "clocks", 0); 170 + if (!data->parent) { 171 + pr_err("%s: could not get clock information\n", __func__); 172 + goto err_nomem2; 173 + } 174 + 175 + count = of_property_count_strings(data->parent, "clock-names"); 176 + table = kcalloc(count + 1, sizeof(*table), GFP_KERNEL); 177 + if (!table) { 178 + pr_err("%s: no memory\n", __func__); 179 + goto err_node; 180 + } 181 + 182 + if (fmask) 183 + mask = fmask[get_hard_smp_processor_id(cpu)]; 184 + else 185 + mask = 0x0; 186 + 187 + for (i = 0; i < count; i++) { 188 + clk = of_clk_get(data->parent, i); 189 + freq = clk_get_rate(clk); 190 + /* 191 + * the clock is valid if its frequency is not masked 192 + * and large than minimum allowed frequency. 193 + */ 194 + if (freq < min_cpufreq || (mask & (1 << i))) 195 + table[i].frequency = CPUFREQ_ENTRY_INVALID; 196 + else 197 + table[i].frequency = freq / 1000; 198 + table[i].driver_data = i; 199 + } 200 + freq_table_redup(table, count); 201 + freq_table_sort(table, count); 202 + table[i].frequency = CPUFREQ_TABLE_END; 203 + 204 + /* set the min and max frequency properly */ 205 + ret = cpufreq_frequency_table_cpuinfo(policy, table); 206 + if (ret) { 207 + pr_err("invalid frequency table: %d\n", ret); 208 + goto err_nomem1; 209 + } 210 + 211 + data->table = table; 212 + per_cpu(cpu_data, cpu) = data; 213 + 214 + /* update ->cpus if we have cluster, no harm if not */ 215 + cpumask_copy(policy->cpus, per_cpu(cpu_mask, cpu)); 216 + for_each_cpu(i, per_cpu(cpu_mask, cpu)) 217 + per_cpu(cpu_data, i) = data; 218 + 219 + policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 220 + policy->cur = corenet_cpufreq_get_speed(policy->cpu); 221 + 222 + cpufreq_frequency_table_get_attr(table, cpu); 223 + of_node_put(np); 224 + 225 + return 0; 226 + 227 + err_nomem1: 228 + kfree(table); 229 + err_node: 230 + of_node_put(data->parent); 231 + err_nomem2: 232 + per_cpu(cpu_data, cpu) = NULL; 233 + kfree(data); 234 + err_np: 235 + of_node_put(np); 236 + 237 + return -ENODEV; 238 + } 239 + 240 + static int __exit corenet_cpufreq_cpu_exit(struct cpufreq_policy *policy) 241 + { 242 + struct cpu_data *data = per_cpu(cpu_data, policy->cpu); 243 + unsigned int cpu; 244 + 245 + cpufreq_frequency_table_put_attr(policy->cpu); 246 + of_node_put(data->parent); 247 + kfree(data->table); 248 + kfree(data); 249 + 250 + for_each_cpu(cpu, per_cpu(cpu_mask, policy->cpu)) 251 + per_cpu(cpu_data, cpu) = NULL; 252 + 253 + return 0; 254 + } 255 + 256 + static int corenet_cpufreq_verify(struct cpufreq_policy *policy) 257 + { 258 + struct cpufreq_frequency_table *table = 259 + per_cpu(cpu_data, policy->cpu)->table; 260 + 261 + return cpufreq_frequency_table_verify(policy, table); 262 + } 263 + 264 + static int corenet_cpufreq_target(struct cpufreq_policy *policy, 265 + unsigned int target_freq, unsigned int relation) 266 + { 267 + struct cpufreq_freqs freqs; 268 + unsigned int new; 269 + struct clk *parent; 270 + int ret; 271 + struct cpu_data *data = per_cpu(cpu_data, policy->cpu); 272 + 273 + cpufreq_frequency_table_target(policy, data->table, 274 + target_freq, relation, &new); 275 + 276 + if (policy->cur == data->table[new].frequency) 277 + return 0; 278 + 279 + freqs.old = policy->cur; 280 + freqs.new = data->table[new].frequency; 281 + 282 + mutex_lock(&cpufreq_lock); 283 + cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); 284 + 285 + parent = of_clk_get(data->parent, data->table[new].driver_data); 286 + ret = clk_set_parent(data->clk, parent); 287 + if (ret) 288 + freqs.new = freqs.old; 289 + 290 + cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 291 + mutex_unlock(&cpufreq_lock); 292 + 293 + return ret; 294 + } 295 + 296 + static struct freq_attr *corenet_cpufreq_attr[] = { 297 + &cpufreq_freq_attr_scaling_available_freqs, 298 + NULL, 299 + }; 300 + 301 + static struct cpufreq_driver ppc_corenet_cpufreq_driver = { 302 + .name = "ppc_cpufreq", 303 + .owner = THIS_MODULE, 304 + .flags = CPUFREQ_CONST_LOOPS, 305 + .init = corenet_cpufreq_cpu_init, 306 + .exit = __exit_p(corenet_cpufreq_cpu_exit), 307 + .verify = corenet_cpufreq_verify, 308 + .target = corenet_cpufreq_target, 309 + .get = corenet_cpufreq_get_speed, 310 + .attr = corenet_cpufreq_attr, 311 + }; 312 + 313 + static const struct of_device_id node_matches[] __initdata = { 314 + { .compatible = "fsl,p2041-clockgen", .data = &sdata[0], }, 315 + { .compatible = "fsl,p3041-clockgen", .data = &sdata[0], }, 316 + { .compatible = "fsl,p5020-clockgen", .data = &sdata[1], }, 317 + { .compatible = "fsl,p4080-clockgen", .data = &sdata[2], }, 318 + { .compatible = "fsl,p5040-clockgen", .data = &sdata[2], }, 319 + { .compatible = "fsl,qoriq-clockgen-2.0", }, 320 + {} 321 + }; 322 + 323 + static int __init ppc_corenet_cpufreq_init(void) 324 + { 325 + int ret; 326 + struct device_node *np; 327 + const struct of_device_id *match; 328 + const struct soc_data *data; 329 + unsigned int cpu; 330 + 331 + np = of_find_matching_node(NULL, node_matches); 332 + if (!np) 333 + return -ENODEV; 334 + 335 + for_each_possible_cpu(cpu) { 336 + if (!alloc_cpumask_var(&per_cpu(cpu_mask, cpu), GFP_KERNEL)) 337 + goto err_mask; 338 + cpumask_copy(per_cpu(cpu_mask, cpu), cpu_core_mask(cpu)); 339 + } 340 + 341 + match = of_match_node(node_matches, np); 342 + data = match->data; 343 + if (data) { 344 + if (data->flag) 345 + fmask = data->freq_mask; 346 + min_cpufreq = fsl_get_sys_freq(); 347 + } else { 348 + min_cpufreq = fsl_get_sys_freq() / 2; 349 + } 350 + 351 + of_node_put(np); 352 + 353 + ret = cpufreq_register_driver(&ppc_corenet_cpufreq_driver); 354 + if (!ret) 355 + pr_info("Freescale PowerPC corenet CPU frequency scaling driver\n"); 356 + 357 + return ret; 358 + 359 + err_mask: 360 + for_each_possible_cpu(cpu) 361 + free_cpumask_var(per_cpu(cpu_mask, cpu)); 362 + 363 + return -ENOMEM; 364 + } 365 + module_init(ppc_corenet_cpufreq_init); 366 + 367 + static void __exit ppc_corenet_cpufreq_exit(void) 368 + { 369 + unsigned int cpu; 370 + 371 + for_each_possible_cpu(cpu) 372 + free_cpumask_var(per_cpu(cpu_mask, cpu)); 373 + 374 + cpufreq_unregister_driver(&ppc_corenet_cpufreq_driver); 375 + } 376 + module_exit(ppc_corenet_cpufreq_exit); 377 + 378 + MODULE_LICENSE("GPL"); 379 + MODULE_AUTHOR("Tang Yuantian <Yuantian.Tang@freescale.com>"); 380 + MODULE_DESCRIPTION("cpufreq driver for Freescale e500mc series SoCs");
+2 -2
drivers/cpufreq/ppc_cbe_cpufreq.c
··· 106 106 107 107 /* initialize frequency table */ 108 108 for (i=0; cbe_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) { 109 - cbe_freqs[i].frequency = max_freq / cbe_freqs[i].index; 109 + cbe_freqs[i].frequency = max_freq / cbe_freqs[i].driver_data; 110 110 pr_debug("%d: %d\n", i, cbe_freqs[i].frequency); 111 111 } 112 112 ··· 165 165 "1/%d of max frequency\n", 166 166 policy->cpu, 167 167 cbe_freqs[cbe_pmode_new].frequency, 168 - cbe_freqs[cbe_pmode_new].index); 168 + cbe_freqs[cbe_pmode_new].driver_data); 169 169 170 170 rc = set_pmode(policy->cpu, cbe_pmode_new); 171 171
+4 -4
drivers/cpufreq/pxa2xx-cpufreq.c
··· 420 420 /* Generate pxa25x the run cpufreq_frequency_table struct */ 421 421 for (i = 0; i < NUM_PXA25x_RUN_FREQS; i++) { 422 422 pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz; 423 - pxa255_run_freq_table[i].index = i; 423 + pxa255_run_freq_table[i].driver_data = i; 424 424 } 425 425 pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END; 426 426 ··· 428 428 for (i = 0; i < NUM_PXA25x_TURBO_FREQS; i++) { 429 429 pxa255_turbo_freq_table[i].frequency = 430 430 pxa255_turbo_freqs[i].khz; 431 - pxa255_turbo_freq_table[i].index = i; 431 + pxa255_turbo_freq_table[i].driver_data = i; 432 432 } 433 433 pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END; 434 434 ··· 440 440 if (freq > pxa27x_maxfreq) 441 441 break; 442 442 pxa27x_freq_table[i].frequency = freq; 443 - pxa27x_freq_table[i].index = i; 443 + pxa27x_freq_table[i].driver_data = i; 444 444 } 445 - pxa27x_freq_table[i].index = i; 445 + pxa27x_freq_table[i].driver_data = i; 446 446 pxa27x_freq_table[i].frequency = CPUFREQ_TABLE_END; 447 447 448 448 /*
+2 -2
drivers/cpufreq/pxa3xx-cpufreq.c
··· 98 98 return -ENOMEM; 99 99 100 100 for (i = 0; i < num; i++) { 101 - table[i].index = i; 101 + table[i].driver_data = i; 102 102 table[i].frequency = freqs[i].cpufreq_mhz * 1000; 103 103 } 104 - table[num].index = i; 104 + table[num].driver_data = i; 105 105 table[num].frequency = CPUFREQ_TABLE_END; 106 106 107 107 pxa3xx_freqs = freqs;
+3 -3
drivers/cpufreq/s3c2416-cpufreq.c
··· 244 244 if (ret != 0) 245 245 goto out; 246 246 247 - idx = s3c_freq->freq_table[i].index; 247 + idx = s3c_freq->freq_table[i].driver_data; 248 248 249 249 if (idx == SOURCE_HCLK) 250 250 to_dvs = 1; ··· 312 312 if (freq->frequency == CPUFREQ_ENTRY_INVALID) 313 313 continue; 314 314 315 - dvfs = &s3c2416_dvfs_table[freq->index]; 315 + dvfs = &s3c2416_dvfs_table[freq->driver_data]; 316 316 found = 0; 317 317 318 318 /* Check only the min-voltage, more is always ok on S3C2416 */ ··· 462 462 freq = s3c_freq->freq_table; 463 463 while (freq->frequency != CPUFREQ_TABLE_END) { 464 464 /* special handling for dvs mode */ 465 - if (freq->index == 0) { 465 + if (freq->driver_data == 0) { 466 466 if (!s3c_freq->hclk) { 467 467 pr_debug("cpufreq: %dkHz unsupported as it would need unavailable dvs mode\n", 468 468 freq->frequency);
+7 -3
drivers/cpufreq/s3c64xx-cpufreq.c
··· 87 87 freqs.old = clk_get_rate(armclk) / 1000; 88 88 freqs.new = s3c64xx_freq_table[i].frequency; 89 89 freqs.flags = 0; 90 - dvfs = &s3c64xx_dvfs_table[s3c64xx_freq_table[i].index]; 90 + dvfs = &s3c64xx_dvfs_table[s3c64xx_freq_table[i].driver_data]; 91 91 92 92 if (freqs.old == freqs.new) 93 93 return 0; ··· 104 104 if (ret != 0) { 105 105 pr_err("Failed to set VDDARM for %dkHz: %d\n", 106 106 freqs.new, ret); 107 - goto err; 107 + freqs.new = freqs.old; 108 + goto post_notify; 108 109 } 109 110 } 110 111 #endif ··· 114 113 if (ret < 0) { 115 114 pr_err("Failed to set rate %dkHz: %d\n", 116 115 freqs.new, ret); 117 - goto err; 116 + freqs.new = freqs.old; 118 117 } 119 118 119 + post_notify: 120 120 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 121 + if (ret) 122 + goto err; 121 123 122 124 #ifdef CONFIG_REGULATOR 123 125 if (vddarm && freqs.new < freqs.old) {
+1 -1
drivers/cpufreq/sc520_freq.c
··· 71 71 local_irq_disable(); 72 72 73 73 clockspeed_reg = *cpuctl & ~0x03; 74 - *cpuctl = clockspeed_reg | sc520_freq_table[state].index; 74 + *cpuctl = clockspeed_reg | sc520_freq_table[state].driver_data; 75 75 76 76 local_irq_enable(); 77 77
+6 -6
drivers/cpufreq/sparc-us2e-cpufreq.c
··· 308 308 struct cpufreq_frequency_table *table = 309 309 &us2e_freq_table[cpu].table[0]; 310 310 311 - table[0].index = 0; 311 + table[0].driver_data = 0; 312 312 table[0].frequency = clock_tick / 1; 313 - table[1].index = 1; 313 + table[1].driver_data = 1; 314 314 table[1].frequency = clock_tick / 2; 315 - table[2].index = 2; 315 + table[2].driver_data = 2; 316 316 table[2].frequency = clock_tick / 4; 317 - table[2].index = 3; 317 + table[2].driver_data = 3; 318 318 table[2].frequency = clock_tick / 6; 319 - table[2].index = 4; 319 + table[2].driver_data = 4; 320 320 table[2].frequency = clock_tick / 8; 321 - table[2].index = 5; 321 + table[2].driver_data = 5; 322 322 table[3].frequency = CPUFREQ_TABLE_END; 323 323 324 324 policy->cpuinfo.transition_latency = 0;
+4 -4
drivers/cpufreq/sparc-us3-cpufreq.c
··· 169 169 struct cpufreq_frequency_table *table = 170 170 &us3_freq_table[cpu].table[0]; 171 171 172 - table[0].index = 0; 172 + table[0].driver_data = 0; 173 173 table[0].frequency = clock_tick / 1; 174 - table[1].index = 1; 174 + table[1].driver_data = 1; 175 175 table[1].frequency = clock_tick / 2; 176 - table[2].index = 2; 176 + table[2].driver_data = 2; 177 177 table[2].frequency = clock_tick / 32; 178 - table[3].index = 0; 178 + table[3].driver_data = 0; 179 179 table[3].frequency = CPUFREQ_TABLE_END; 180 180 181 181 policy->cpuinfo.transition_latency = 0;
+2 -2
drivers/cpufreq/spear-cpufreq.c
··· 250 250 } 251 251 252 252 for (i = 0; i < cnt; i++) { 253 - freq_tbl[i].index = i; 253 + freq_tbl[i].driver_data = i; 254 254 freq_tbl[i].frequency = be32_to_cpup(val++); 255 255 } 256 256 257 - freq_tbl[i].index = i; 257 + freq_tbl[i].driver_data = i; 258 258 freq_tbl[i].frequency = CPUFREQ_TABLE_END; 259 259 260 260 spear_cpufreq.freq_tbl = freq_tbl;
+4 -4
drivers/cpufreq/speedstep-centrino.c
··· 79 79 80 80 /* Computes the correct form for IA32_PERF_CTL MSR for a particular 81 81 frequency/voltage operating point; frequency in MHz, volts in mV. 82 - This is stored as "index" in the structure. */ 82 + This is stored as "driver_data" in the structure. */ 83 83 #define OP(mhz, mv) \ 84 84 { \ 85 85 .frequency = (mhz) * 1000, \ 86 - .index = (((mhz)/100) << 8) | ((mv - 700) / 16) \ 86 + .driver_data = (((mhz)/100) << 8) | ((mv - 700) / 16) \ 87 87 } 88 88 89 89 /* ··· 307 307 per_cpu(centrino_model, cpu)->op_points[i].frequency 308 308 != CPUFREQ_TABLE_END; 309 309 i++) { 310 - if (msr == per_cpu(centrino_model, cpu)->op_points[i].index) 310 + if (msr == per_cpu(centrino_model, cpu)->op_points[i].driver_data) 311 311 return per_cpu(centrino_model, cpu)-> 312 312 op_points[i].frequency; 313 313 } ··· 501 501 break; 502 502 } 503 503 504 - msr = per_cpu(centrino_model, cpu)->op_points[newstate].index; 504 + msr = per_cpu(centrino_model, cpu)->op_points[newstate].driver_data; 505 505 506 506 if (first_cpu) { 507 507 rdmsr_on_cpu(good_cpu, MSR_IA32_PERF_CTL, &oldmsr, &h);
+11 -12
drivers/cpufreq/tegra-cpufreq.c
··· 28 28 #include <linux/io.h> 29 29 #include <linux/suspend.h> 30 30 31 - /* Frequency table index must be sequential starting at 0 */ 32 31 static struct cpufreq_frequency_table freq_table[] = { 33 - { 0, 216000 }, 34 - { 1, 312000 }, 35 - { 2, 456000 }, 36 - { 3, 608000 }, 37 - { 4, 760000 }, 38 - { 5, 816000 }, 39 - { 6, 912000 }, 40 - { 7, 1000000 }, 41 - { 8, CPUFREQ_TABLE_END }, 32 + { .frequency = 216000 }, 33 + { .frequency = 312000 }, 34 + { .frequency = 456000 }, 35 + { .frequency = 608000 }, 36 + { .frequency = 760000 }, 37 + { .frequency = 816000 }, 38 + { .frequency = 912000 }, 39 + { .frequency = 1000000 }, 40 + { .frequency = CPUFREQ_TABLE_END }, 42 41 }; 43 42 44 43 #define NUM_CPUS 2 ··· 137 138 if (ret) { 138 139 pr_err("cpu-tegra: Failed to set cpu frequency to %d kHz\n", 139 140 freqs.new); 140 - return ret; 141 + freqs.new = freqs.old; 141 142 } 142 143 143 144 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 144 145 145 - return 0; 146 + return ret; 146 147 } 147 148 148 149 static unsigned long tegra_cpu_highest_speed(void)
+5 -5
drivers/mfd/db8500-prcmu.c
··· 1724 1724 1725 1725 /* CPU FREQ table, may be changed due to if MAX_OPP is supported. */ 1726 1726 static struct cpufreq_frequency_table db8500_cpufreq_table[] = { 1727 - { .frequency = 200000, .index = ARM_EXTCLK,}, 1728 - { .frequency = 400000, .index = ARM_50_OPP,}, 1729 - { .frequency = 800000, .index = ARM_100_OPP,}, 1727 + { .frequency = 200000, .driver_data = ARM_EXTCLK,}, 1728 + { .frequency = 400000, .driver_data = ARM_50_OPP,}, 1729 + { .frequency = 800000, .driver_data = ARM_100_OPP,}, 1730 1730 { .frequency = CPUFREQ_TABLE_END,}, /* To be used for MAX_OPP. */ 1731 1731 { .frequency = CPUFREQ_TABLE_END,}, 1732 1732 }; ··· 1901 1901 return -EINVAL; 1902 1902 1903 1903 /* Set the new arm opp. */ 1904 - return db8500_prcmu_set_arm_opp(db8500_cpufreq_table[i].index); 1904 + return db8500_prcmu_set_arm_opp(db8500_cpufreq_table[i].driver_data); 1905 1905 } 1906 1906 1907 1907 static int set_plldsi_rate(unsigned long rate) ··· 3105 3105 { 3106 3106 if (prcmu_has_arm_maxopp()) { 3107 3107 db8500_cpufreq_table[3].frequency = 1000000; 3108 - db8500_cpufreq_table[3].index = ARM_MAX_OPP; 3108 + db8500_cpufreq_table[3].driver_data = ARM_MAX_OPP; 3109 3109 } 3110 3110 } 3111 3111
+2 -2
drivers/sh/clk/core.c
··· 63 63 else 64 64 freq = clk->parent->rate * mult / div; 65 65 66 - freq_table[i].index = i; 66 + freq_table[i].driver_data = i; 67 67 freq_table[i].frequency = freq; 68 68 } 69 69 70 70 /* Termination entry */ 71 - freq_table[i].index = i; 71 + freq_table[i].driver_data = i; 72 72 freq_table[i].frequency = CPUFREQ_TABLE_END; 73 73 } 74 74
+28 -22
include/linux/cpufreq.h
··· 1 1 /* 2 - * linux/include/linux/cpufreq.h 2 + * linux/include/linux/cpufreq.h 3 3 * 4 - * Copyright (C) 2001 Russell King 5 - * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de> 4 + * Copyright (C) 2001 Russell King 5 + * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de> 6 6 * 7 7 * This program is free software; you can redistribute it and/or modify 8 8 * it under the terms of the GNU General Public License version 2 as ··· 25 25 #define CPUFREQ_NAME_LEN 16 26 26 /* Print length for names. Extra 1 space for accomodating '\n' in prints */ 27 27 #define CPUFREQ_NAME_PLEN (CPUFREQ_NAME_LEN + 1) 28 - 29 28 30 29 /********************************************************************* 31 30 * CPUFREQ NOTIFIER INTERFACE * ··· 70 71 71 72 /* /sys/devices/system/cpu/cpufreq: entry point for global variables */ 72 73 extern struct kobject *cpufreq_global_kobject; 74 + int cpufreq_get_global_kobject(void); 75 + void cpufreq_put_global_kobject(void); 76 + int cpufreq_sysfs_create_file(const struct attribute *attr); 77 + void cpufreq_sysfs_remove_file(const struct attribute *attr); 73 78 74 79 #define CPUFREQ_ETERNAL (-1) 75 80 struct cpufreq_cpuinfo { ··· 110 107 unsigned int policy; /* see above */ 111 108 struct cpufreq_governor *governor; /* see below */ 112 109 void *governor_data; 110 + bool governor_enabled; /* governor start/stop flag */ 113 111 114 112 struct work_struct update; /* if update_policy() needs to be 115 113 * called, but you're in IRQ context */ ··· 152 148 u8 flags; /* flags of cpufreq_driver, see below. */ 153 149 }; 154 150 155 - 156 151 /** 157 - * cpufreq_scale - "old * mult / div" calculation for large values (32-bit-arch safe) 152 + * cpufreq_scale - "old * mult / div" calculation for large values (32-bit-arch 153 + * safe) 158 154 * @old: old value 159 155 * @div: divisor 160 156 * @mult: multiplier 161 157 * 162 158 * 163 - * new = old * mult / div 159 + * new = old * mult / div 164 160 */ 165 - static inline unsigned long cpufreq_scale(unsigned long old, u_int div, u_int mult) 161 + static inline unsigned long cpufreq_scale(unsigned long old, u_int div, 162 + u_int mult) 166 163 { 167 164 #if BITS_PER_LONG == 32 168 165 ··· 216 211 unsigned int target_freq, 217 212 unsigned int relation); 218 213 219 - 220 214 extern int __cpufreq_driver_getavg(struct cpufreq_policy *policy, 221 215 unsigned int cpu); 222 216 223 217 int cpufreq_register_governor(struct cpufreq_governor *governor); 224 218 void cpufreq_unregister_governor(struct cpufreq_governor *governor); 225 - 226 219 227 220 /********************************************************************* 228 221 * CPUFREQ DRIVER INTERFACE * ··· 232 229 struct freq_attr; 233 230 234 231 struct cpufreq_driver { 235 - struct module *owner; 232 + struct module *owner; 236 233 char name[CPUFREQ_NAME_LEN]; 237 234 u8 flags; 238 235 /* ··· 280 277 int cpufreq_register_driver(struct cpufreq_driver *driver_data); 281 278 int cpufreq_unregister_driver(struct cpufreq_driver *driver_data); 282 279 283 - 284 280 void cpufreq_notify_transition(struct cpufreq_policy *policy, 285 281 struct cpufreq_freqs *freqs, unsigned int state); 286 282 287 - static inline void cpufreq_verify_within_limits(struct cpufreq_policy *policy, unsigned int min, unsigned int max) 283 + static inline void cpufreq_verify_within_limits(struct cpufreq_policy *policy, 284 + unsigned int min, unsigned int max) 288 285 { 289 286 if (policy->min < min) 290 287 policy->min = min; ··· 340 337 /********************************************************************* 341 338 * CPUFREQ 2.6. INTERFACE * 342 339 *********************************************************************/ 340 + u64 get_cpu_idle_time(unsigned int cpu, u64 *wall, int io_busy); 343 341 int cpufreq_get_policy(struct cpufreq_policy *policy, unsigned int cpu); 344 342 int cpufreq_update_policy(unsigned int cpu); 345 343 bool have_governor_per_policy(void); 344 + struct kobject *get_governor_parent_kobj(struct cpufreq_policy *policy); 346 345 347 346 #ifdef CONFIG_CPU_FREQ 348 - /* query the current CPU frequency (in kHz). If zero, cpufreq couldn't detect it */ 347 + /* 348 + * query the current CPU frequency (in kHz). If zero, cpufreq couldn't detect it 349 + */ 349 350 unsigned int cpufreq_get(unsigned int cpu); 350 351 #else 351 352 static inline unsigned int cpufreq_get(unsigned int cpu) ··· 358 351 } 359 352 #endif 360 353 361 - /* query the last known CPU freq (in kHz). If zero, cpufreq couldn't detect it */ 354 + /* 355 + * query the last known CPU freq (in kHz). If zero, cpufreq couldn't detect it 356 + */ 362 357 #ifdef CONFIG_CPU_FREQ 363 358 unsigned int cpufreq_quick_get(unsigned int cpu); 364 359 unsigned int cpufreq_quick_get_max(unsigned int cpu); ··· 375 366 } 376 367 #endif 377 368 378 - 379 369 /********************************************************************* 380 370 * CPUFREQ DEFAULT GOVERNOR * 381 371 *********************************************************************/ 382 372 383 - 384 373 /* 385 - Performance governor is fallback governor if any other gov failed to 386 - auto load due latency restrictions 387 - */ 374 + * Performance governor is fallback governor if any other gov failed to auto 375 + * load due latency restrictions 376 + */ 388 377 #ifdef CONFIG_CPU_FREQ_GOV_PERFORMANCE 389 378 extern struct cpufreq_governor cpufreq_gov_performance; 390 379 #endif ··· 402 395 #define CPUFREQ_DEFAULT_GOVERNOR (&cpufreq_gov_conservative) 403 396 #endif 404 397 405 - 406 398 /********************************************************************* 407 399 * FREQUENCY TABLE HELPERS * 408 400 *********************************************************************/ ··· 410 404 #define CPUFREQ_TABLE_END ~1 411 405 412 406 struct cpufreq_frequency_table { 413 - unsigned int index; /* any */ 407 + unsigned int driver_data; /* driver specific data, not used by core */ 414 408 unsigned int frequency; /* kHz - doesn't need to be in ascending 415 409 * order */ 416 410 };