Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/i915/selftests: Restore to default heartbeat

Since we temporarily disable the heartbeat and restore back to the
default value, we can use the stored defaults on the engine and avoid
using a local.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200519063123.20673-3-chris@chris-wilson.co.uk
(cherry picked from commit 3a230a554dbbc6cd5016cf1b56ee77cfcd48c7d8)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

authored by

Chris Wilson and committed by
Joonas Lahtinen
3ffbe353 70cac501

+67 -109
+10 -15
drivers/gpu/drm/i915/gt/selftest_hangcheck.c
··· 310 310 1000)); 311 311 } 312 312 313 - static void engine_heartbeat_disable(struct intel_engine_cs *engine, 314 - unsigned long *saved) 313 + static void engine_heartbeat_disable(struct intel_engine_cs *engine) 315 314 { 316 - *saved = engine->props.heartbeat_interval_ms; 317 315 engine->props.heartbeat_interval_ms = 0; 318 316 319 317 intel_engine_pm_get(engine); 320 318 intel_engine_park_heartbeat(engine); 321 319 } 322 320 323 - static void engine_heartbeat_enable(struct intel_engine_cs *engine, 324 - unsigned long saved) 321 + static void engine_heartbeat_enable(struct intel_engine_cs *engine) 325 322 { 326 323 intel_engine_pm_put(engine); 327 324 328 - engine->props.heartbeat_interval_ms = saved; 325 + engine->props.heartbeat_interval_ms = 326 + engine->defaults.heartbeat_interval_ms; 329 327 } 330 328 331 329 static int igt_hang_sanitycheck(void *arg) ··· 471 473 for_each_engine(engine, gt, id) { 472 474 unsigned int reset_count, reset_engine_count, count; 473 475 struct intel_context *ce; 474 - unsigned long heartbeat; 475 476 IGT_TIMEOUT(end_time); 476 477 int err; 477 478 ··· 482 485 reset_engine_count = i915_reset_engine_count(global, engine); 483 486 count = 0; 484 487 485 - engine_heartbeat_disable(engine, &heartbeat); 488 + engine_heartbeat_disable(engine); 486 489 set_bit(I915_RESET_ENGINE + id, &gt->reset.flags); 487 490 do { 488 491 int i; ··· 526 529 } 527 530 } while (time_before(jiffies, end_time)); 528 531 clear_bit(I915_RESET_ENGINE + id, &gt->reset.flags); 529 - engine_heartbeat_enable(engine, heartbeat); 532 + engine_heartbeat_enable(engine); 530 533 531 534 pr_info("%s(%s): %d resets\n", __func__, engine->name, count); 532 535 ··· 561 564 562 565 for_each_engine(engine, gt, id) { 563 566 unsigned int reset_count, reset_engine_count; 564 - unsigned long heartbeat; 565 567 IGT_TIMEOUT(end_time); 566 568 567 569 if (active && !intel_engine_can_store_dword(engine)) ··· 576 580 reset_count = i915_reset_count(global); 577 581 reset_engine_count = i915_reset_engine_count(global, engine); 578 582 579 - engine_heartbeat_disable(engine, &heartbeat); 583 + engine_heartbeat_disable(engine); 580 584 set_bit(I915_RESET_ENGINE + id, &gt->reset.flags); 581 585 do { 582 586 if (active) { ··· 628 632 } 629 633 } while (time_before(jiffies, end_time)); 630 634 clear_bit(I915_RESET_ENGINE + id, &gt->reset.flags); 631 - engine_heartbeat_enable(engine, heartbeat); 635 + engine_heartbeat_enable(engine); 632 636 633 637 if (err) 634 638 break; ··· 785 789 struct active_engine threads[I915_NUM_ENGINES] = {}; 786 790 unsigned long device = i915_reset_count(global); 787 791 unsigned long count = 0, reported; 788 - unsigned long heartbeat; 789 792 IGT_TIMEOUT(end_time); 790 793 791 794 if (flags & TEST_ACTIVE && ··· 827 832 828 833 yield(); /* start all threads before we begin */ 829 834 830 - engine_heartbeat_disable(engine, &heartbeat); 835 + engine_heartbeat_disable(engine); 831 836 set_bit(I915_RESET_ENGINE + id, &gt->reset.flags); 832 837 do { 833 838 struct i915_request *rq = NULL; ··· 901 906 } 902 907 } while (time_before(jiffies, end_time)); 903 908 clear_bit(I915_RESET_ENGINE + id, &gt->reset.flags); 904 - engine_heartbeat_enable(engine, heartbeat); 909 + engine_heartbeat_enable(engine); 905 910 906 911 pr_info("i915_reset_engine(%s:%s): %lu resets\n", 907 912 engine->name, test_name, count);
+23 -44
drivers/gpu/drm/i915/gt/selftest_lrc.c
··· 51 51 return vma; 52 52 } 53 53 54 - static void engine_heartbeat_disable(struct intel_engine_cs *engine, 55 - unsigned long *saved) 54 + static void engine_heartbeat_disable(struct intel_engine_cs *engine) 56 55 { 57 - *saved = engine->props.heartbeat_interval_ms; 58 56 engine->props.heartbeat_interval_ms = 0; 59 57 60 58 intel_engine_pm_get(engine); 61 59 intel_engine_park_heartbeat(engine); 62 60 } 63 61 64 - static void engine_heartbeat_enable(struct intel_engine_cs *engine, 65 - unsigned long saved) 62 + static void engine_heartbeat_enable(struct intel_engine_cs *engine) 66 63 { 67 64 intel_engine_pm_put(engine); 68 65 69 - engine->props.heartbeat_interval_ms = saved; 66 + engine->props.heartbeat_interval_ms = 67 + engine->defaults.heartbeat_interval_ms; 70 68 } 71 69 72 70 static bool is_active(struct i915_request *rq) ··· 222 224 struct intel_context *ce[2] = {}; 223 225 struct i915_request *rq[2]; 224 226 struct igt_live_test t; 225 - unsigned long saved; 226 227 int n; 227 228 228 229 if (prio && !intel_engine_has_preemption(engine)) ··· 234 237 err = -EIO; 235 238 break; 236 239 } 237 - engine_heartbeat_disable(engine, &saved); 240 + engine_heartbeat_disable(engine); 238 241 239 242 for (n = 0; n < ARRAY_SIZE(ce); n++) { 240 243 struct intel_context *tmp; ··· 342 345 intel_context_put(ce[n]); 343 346 } 344 347 345 - engine_heartbeat_enable(engine, saved); 348 + engine_heartbeat_enable(engine); 346 349 if (igt_live_test_end(&t)) 347 350 err = -EIO; 348 351 if (err) ··· 463 466 464 467 for_each_engine(engine, gt, id) { 465 468 struct intel_context *ce; 466 - unsigned long heartbeat; 467 469 struct i915_request *rq; 468 470 469 471 ce = intel_context_create(engine); ··· 471 475 break; 472 476 } 473 477 474 - engine_heartbeat_disable(engine, &heartbeat); 478 + engine_heartbeat_disable(engine); 475 479 476 480 rq = igt_spinner_create_request(&spin, ce, MI_ARB_CHECK); 477 481 if (IS_ERR(rq)) { ··· 531 535 i915_request_put(rq); 532 536 533 537 out: 534 - engine_heartbeat_enable(engine, heartbeat); 538 + engine_heartbeat_enable(engine); 535 539 intel_context_put(ce); 536 540 if (err) 537 541 break; ··· 576 580 577 581 for_each_engine(engine, gt, id) { 578 582 const struct error_phase *p; 579 - unsigned long heartbeat; 580 583 int err = 0; 581 584 582 - engine_heartbeat_disable(engine, &heartbeat); 585 + engine_heartbeat_disable(engine); 583 586 584 587 for (p = phases; p->error[0] != GOOD; p++) { 585 588 struct i915_request *client[ARRAY_SIZE(phases->error)]; ··· 677 682 } 678 683 } 679 684 680 - engine_heartbeat_enable(engine, heartbeat); 685 + engine_heartbeat_enable(engine); 681 686 if (err) { 682 687 intel_gt_set_wedged(gt); 683 688 return err; ··· 890 895 enum intel_engine_id id; 891 896 892 897 for_each_engine(engine, gt, id) { 893 - unsigned long saved; 894 - 895 898 if (!intel_engine_has_preemption(engine)) 896 899 continue; 897 900 898 901 memset(vaddr, 0, PAGE_SIZE); 899 902 900 - engine_heartbeat_disable(engine, &saved); 903 + engine_heartbeat_disable(engine); 901 904 err = slice_semaphore_queue(engine, vma, count); 902 - engine_heartbeat_enable(engine, saved); 905 + engine_heartbeat_enable(engine); 903 906 if (err) 904 907 goto err_pin; 905 908 ··· 1002 1009 enum { X = 1, Z, Y }; 1003 1010 struct i915_request *rq[3] = {}; 1004 1011 struct intel_context *ce; 1005 - unsigned long heartbeat; 1006 1012 unsigned long timeslice; 1007 1013 int i, err = 0; 1008 1014 u32 *slot; ··· 1020 1028 * Expect execution/evaluation order XZY 1021 1029 */ 1022 1030 1023 - engine_heartbeat_disable(engine, &heartbeat); 1031 + engine_heartbeat_disable(engine); 1024 1032 timeslice = xchg(&engine->props.timeslice_duration_ms, 1); 1025 1033 1026 1034 slot = memset32(engine->status_page.addr + 1000, 0, 4); ··· 1114 1122 wmb(); 1115 1123 1116 1124 engine->props.timeslice_duration_ms = timeslice; 1117 - engine_heartbeat_enable(engine, heartbeat); 1125 + engine_heartbeat_enable(engine); 1118 1126 for (i = 0; i < 3; i++) 1119 1127 i915_request_put(rq[i]); 1120 1128 if (igt_flush_test(gt->i915)) ··· 1194 1202 .priority = I915_USER_PRIORITY(I915_PRIORITY_MAX), 1195 1203 }; 1196 1204 struct i915_request *rq, *nop; 1197 - unsigned long saved; 1198 1205 1199 1206 if (!intel_engine_has_preemption(engine)) 1200 1207 continue; 1201 1208 1202 - engine_heartbeat_disable(engine, &saved); 1209 + engine_heartbeat_disable(engine); 1203 1210 memset(vaddr, 0, PAGE_SIZE); 1204 1211 1205 1212 /* ELSP[0]: semaphore wait */ ··· 1275 1284 err_rq: 1276 1285 i915_request_put(rq); 1277 1286 err_heartbeat: 1278 - engine_heartbeat_enable(engine, saved); 1287 + engine_heartbeat_enable(engine); 1279 1288 if (err) 1280 1289 break; 1281 1290 } ··· 4144 4153 { 4145 4154 struct intel_engine_cs *engine; 4146 4155 struct intel_context *ve; 4147 - unsigned long *heartbeat; 4148 4156 struct igt_spinner spin; 4149 4157 struct i915_request *rq; 4150 4158 unsigned int n; ··· 4155 4165 * descendents are not executed while the capture is in progress. 4156 4166 */ 4157 4167 4158 - heartbeat = kmalloc_array(nsibling, sizeof(*heartbeat), GFP_KERNEL); 4159 - if (!heartbeat) 4168 + if (igt_spinner_init(&spin, gt)) 4160 4169 return -ENOMEM; 4161 - 4162 - if (igt_spinner_init(&spin, gt)) { 4163 - err = -ENOMEM; 4164 - goto out_free; 4165 - } 4166 4170 4167 4171 ve = intel_execlists_create_virtual(siblings, nsibling); 4168 4172 if (IS_ERR(ve)) { ··· 4165 4181 } 4166 4182 4167 4183 for (n = 0; n < nsibling; n++) 4168 - engine_heartbeat_disable(siblings[n], &heartbeat[n]); 4184 + engine_heartbeat_disable(siblings[n]); 4169 4185 4170 4186 rq = igt_spinner_create_request(&spin, ve, MI_ARB_CHECK); 4171 4187 if (IS_ERR(rq)) { ··· 4236 4252 i915_request_put(rq); 4237 4253 out_heartbeat: 4238 4254 for (n = 0; n < nsibling; n++) 4239 - engine_heartbeat_enable(siblings[n], heartbeat[n]); 4255 + engine_heartbeat_enable(siblings[n]); 4240 4256 4241 4257 intel_context_put(ve); 4242 4258 out_spin: 4243 4259 igt_spinner_fini(&spin); 4244 - out_free: 4245 - kfree(heartbeat); 4246 4260 return err; 4247 4261 } 4248 4262 ··· 4914 4932 return PTR_ERR(scratch); 4915 4933 4916 4934 for_each_engine(engine, gt, id) { 4917 - unsigned long heartbeat; 4918 - 4919 - engine_heartbeat_disable(engine, &heartbeat); 4935 + engine_heartbeat_disable(engine); 4920 4936 4921 4937 err = __live_lrc_gpr(engine, scratch, false); 4922 4938 if (err) ··· 4925 4945 goto err; 4926 4946 4927 4947 err: 4928 - engine_heartbeat_enable(engine, heartbeat); 4948 + engine_heartbeat_enable(engine); 4929 4949 if (igt_flush_test(gt->i915)) 4930 4950 err = -EIO; 4931 4951 if (err) ··· 5072 5092 */ 5073 5093 5074 5094 for_each_engine(data.engine, gt, id) { 5075 - unsigned long heartbeat; 5076 5095 int i, err = 0; 5077 5096 5078 - engine_heartbeat_disable(data.engine, &heartbeat); 5097 + engine_heartbeat_disable(data.engine); 5079 5098 5080 5099 for (i = 0; i < ARRAY_SIZE(data.ce); i++) { 5081 5100 struct intel_context *tmp; ··· 5107 5128 } 5108 5129 5109 5130 err: 5110 - engine_heartbeat_enable(data.engine, heartbeat); 5131 + engine_heartbeat_enable(data.engine); 5111 5132 for (i = 0; i < ARRAY_SIZE(data.ce); i++) { 5112 5133 if (!data.ce[i]) 5113 5134 break;
+28 -41
drivers/gpu/drm/i915/gt/selftest_rps.c
··· 20 20 /* Try to isolate the impact of cstates from determing frequency response */ 21 21 #define CPU_LATENCY 0 /* -1 to disable pm_qos, 0 to disable cstates */ 22 22 23 - static unsigned long engine_heartbeat_disable(struct intel_engine_cs *engine) 23 + static void engine_heartbeat_disable(struct intel_engine_cs *engine) 24 24 { 25 - unsigned long old; 26 - 27 - old = fetch_and_zero(&engine->props.heartbeat_interval_ms); 25 + engine->props.heartbeat_interval_ms = 0; 28 26 29 27 intel_engine_pm_get(engine); 30 28 intel_engine_park_heartbeat(engine); 31 - 32 - return old; 33 29 } 34 30 35 - static void engine_heartbeat_enable(struct intel_engine_cs *engine, 36 - unsigned long saved) 31 + static void engine_heartbeat_enable(struct intel_engine_cs *engine) 37 32 { 38 33 intel_engine_pm_put(engine); 39 34 40 - engine->props.heartbeat_interval_ms = saved; 35 + engine->props.heartbeat_interval_ms = 36 + engine->defaults.heartbeat_interval_ms; 41 37 } 42 38 43 39 static void dummy_rps_work(struct work_struct *wrk) ··· 242 246 intel_gt_check_clock_frequency(gt); 243 247 244 248 for_each_engine(engine, gt, id) { 245 - unsigned long saved_heartbeat; 246 249 struct i915_request *rq; 247 250 u32 cycles; 248 251 u64 dt; ··· 249 254 if (!intel_engine_can_store_dword(engine)) 250 255 continue; 251 256 252 - saved_heartbeat = engine_heartbeat_disable(engine); 257 + engine_heartbeat_disable(engine); 253 258 254 259 rq = igt_spinner_create_request(&spin, 255 260 engine->kernel_context, 256 261 MI_NOOP); 257 262 if (IS_ERR(rq)) { 258 - engine_heartbeat_enable(engine, saved_heartbeat); 263 + engine_heartbeat_enable(engine); 259 264 err = PTR_ERR(rq); 260 265 break; 261 266 } ··· 266 271 pr_err("%s: RPS spinner did not start\n", 267 272 engine->name); 268 273 igt_spinner_end(&spin); 269 - engine_heartbeat_enable(engine, saved_heartbeat); 274 + engine_heartbeat_enable(engine); 270 275 intel_gt_set_wedged(engine->gt); 271 276 err = -EIO; 272 277 break; ··· 322 327 intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL); 323 328 324 329 igt_spinner_end(&spin); 325 - engine_heartbeat_enable(engine, saved_heartbeat); 330 + engine_heartbeat_enable(engine); 326 331 327 332 if (err == 0) { 328 333 u64 time = intel_gt_pm_interval_to_ns(gt, cycles); ··· 400 405 401 406 intel_gt_pm_get(gt); 402 407 for_each_engine(engine, gt, id) { 403 - unsigned long saved_heartbeat; 404 408 struct i915_request *rq; 405 409 ktime_t min_dt, max_dt; 406 410 int f, limit; ··· 408 414 if (!intel_engine_can_store_dword(engine)) 409 415 continue; 410 416 411 - saved_heartbeat = engine_heartbeat_disable(engine); 417 + engine_heartbeat_disable(engine); 412 418 413 419 rq = igt_spinner_create_request(&spin, 414 420 engine->kernel_context, ··· 424 430 pr_err("%s: RPS spinner did not start\n", 425 431 engine->name); 426 432 igt_spinner_end(&spin); 427 - engine_heartbeat_enable(engine, saved_heartbeat); 433 + engine_heartbeat_enable(engine); 428 434 intel_gt_set_wedged(engine->gt); 429 435 err = -EIO; 430 436 break; ··· 434 440 pr_err("%s: could not set minimum frequency [%x], only %x!\n", 435 441 engine->name, rps->min_freq, read_cagf(rps)); 436 442 igt_spinner_end(&spin); 437 - engine_heartbeat_enable(engine, saved_heartbeat); 443 + engine_heartbeat_enable(engine); 438 444 show_pstate_limits(rps); 439 445 err = -EINVAL; 440 446 break; ··· 451 457 pr_err("%s: could not restore minimum frequency [%x], only %x!\n", 452 458 engine->name, rps->min_freq, read_cagf(rps)); 453 459 igt_spinner_end(&spin); 454 - engine_heartbeat_enable(engine, saved_heartbeat); 460 + engine_heartbeat_enable(engine); 455 461 show_pstate_limits(rps); 456 462 err = -EINVAL; 457 463 break; ··· 466 472 min_dt = ktime_sub(ktime_get(), min_dt); 467 473 468 474 igt_spinner_end(&spin); 469 - engine_heartbeat_enable(engine, saved_heartbeat); 475 + engine_heartbeat_enable(engine); 470 476 471 477 pr_info("%s: range:[%x:%uMHz, %x:%uMHz] limit:[%x:%uMHz], %x:%x response %lluns:%lluns\n", 472 478 engine->name, ··· 629 635 rps->work.func = dummy_rps_work; 630 636 631 637 for_each_engine(engine, gt, id) { 632 - unsigned long saved_heartbeat; 633 638 struct i915_request *rq; 634 639 struct i915_vma *vma; 635 640 u32 *cancel, *cntr; ··· 637 644 int freq; 638 645 } min, max; 639 646 640 - saved_heartbeat = engine_heartbeat_disable(engine); 647 + engine_heartbeat_disable(engine); 641 648 642 649 vma = create_spin_counter(engine, 643 650 engine->kernel_context->vm, false, 644 651 &cancel, &cntr); 645 652 if (IS_ERR(vma)) { 646 653 err = PTR_ERR(vma); 647 - engine_heartbeat_enable(engine, saved_heartbeat); 654 + engine_heartbeat_enable(engine); 648 655 break; 649 656 } 650 657 ··· 725 732 i915_vma_unpin(vma); 726 733 i915_vma_put(vma); 727 734 728 - engine_heartbeat_enable(engine, saved_heartbeat); 735 + engine_heartbeat_enable(engine); 729 736 if (igt_flush_test(gt->i915)) 730 737 err = -EIO; 731 738 if (err) ··· 771 778 rps->work.func = dummy_rps_work; 772 779 773 780 for_each_engine(engine, gt, id) { 774 - unsigned long saved_heartbeat; 775 781 struct i915_request *rq; 776 782 struct i915_vma *vma; 777 783 u32 *cancel, *cntr; ··· 779 787 int freq; 780 788 } min, max; 781 789 782 - saved_heartbeat = engine_heartbeat_disable(engine); 790 + engine_heartbeat_disable(engine); 783 791 784 792 vma = create_spin_counter(engine, 785 793 engine->kernel_context->vm, true, 786 794 &cancel, &cntr); 787 795 if (IS_ERR(vma)) { 788 796 err = PTR_ERR(vma); 789 - engine_heartbeat_enable(engine, saved_heartbeat); 797 + engine_heartbeat_enable(engine); 790 798 break; 791 799 } 792 800 ··· 866 874 i915_vma_unpin(vma); 867 875 i915_vma_put(vma); 868 876 869 - engine_heartbeat_enable(engine, saved_heartbeat); 877 + engine_heartbeat_enable(engine); 870 878 if (igt_flush_test(gt->i915)) 871 879 err = -EIO; 872 880 if (err) ··· 1058 1066 for_each_engine(engine, gt, id) { 1059 1067 /* Keep the engine busy with a spinner; expect an UP! */ 1060 1068 if (pm_events & GEN6_PM_RP_UP_THRESHOLD) { 1061 - unsigned long saved_heartbeat; 1062 - 1063 1069 intel_gt_pm_wait_for_idle(engine->gt); 1064 1070 GEM_BUG_ON(intel_rps_is_active(rps)); 1065 1071 1066 - saved_heartbeat = engine_heartbeat_disable(engine); 1072 + engine_heartbeat_disable(engine); 1067 1073 1068 1074 err = __rps_up_interrupt(rps, engine, &spin); 1069 1075 1070 - engine_heartbeat_enable(engine, saved_heartbeat); 1076 + engine_heartbeat_enable(engine); 1071 1077 if (err) 1072 1078 goto out; 1073 1079 ··· 1074 1084 1075 1085 /* Keep the engine awake but idle and check for DOWN */ 1076 1086 if (pm_events & GEN6_PM_RP_DOWN_THRESHOLD) { 1077 - unsigned long saved_heartbeat; 1078 - 1079 - saved_heartbeat = engine_heartbeat_disable(engine); 1087 + engine_heartbeat_disable(engine); 1080 1088 intel_rc6_disable(&gt->rc6); 1081 1089 1082 1090 err = __rps_down_interrupt(rps, engine); 1083 1091 1084 1092 intel_rc6_enable(&gt->rc6); 1085 - engine_heartbeat_enable(engine, saved_heartbeat); 1093 + engine_heartbeat_enable(engine); 1086 1094 if (err) 1087 1095 goto out; 1088 1096 } ··· 1156 1168 rps->work.func = dummy_rps_work; 1157 1169 1158 1170 for_each_engine(engine, gt, id) { 1159 - unsigned long saved_heartbeat; 1160 1171 struct i915_request *rq; 1161 1172 struct { 1162 1173 u64 power; ··· 1165 1178 if (!intel_engine_can_store_dword(engine)) 1166 1179 continue; 1167 1180 1168 - saved_heartbeat = engine_heartbeat_disable(engine); 1181 + engine_heartbeat_disable(engine); 1169 1182 1170 1183 rq = igt_spinner_create_request(&spin, 1171 1184 engine->kernel_context, 1172 1185 MI_NOOP); 1173 1186 if (IS_ERR(rq)) { 1174 - engine_heartbeat_enable(engine, saved_heartbeat); 1187 + engine_heartbeat_enable(engine); 1175 1188 err = PTR_ERR(rq); 1176 1189 break; 1177 1190 } ··· 1182 1195 pr_err("%s: RPS spinner did not start\n", 1183 1196 engine->name); 1184 1197 igt_spinner_end(&spin); 1185 - engine_heartbeat_enable(engine, saved_heartbeat); 1198 + engine_heartbeat_enable(engine); 1186 1199 intel_gt_set_wedged(engine->gt); 1187 1200 err = -EIO; 1188 1201 break; ··· 1195 1208 min.power = measure_power_at(rps, &min.freq); 1196 1209 1197 1210 igt_spinner_end(&spin); 1198 - engine_heartbeat_enable(engine, saved_heartbeat); 1211 + engine_heartbeat_enable(engine); 1199 1212 1200 1213 pr_info("%s: min:%llumW @ %uMHz, max:%llumW @ %uMHz\n", 1201 1214 engine->name,
+6 -9
drivers/gpu/drm/i915/gt/selftest_timeline.c
··· 751 751 return err; 752 752 } 753 753 754 - static void engine_heartbeat_disable(struct intel_engine_cs *engine, 755 - unsigned long *saved) 754 + static void engine_heartbeat_disable(struct intel_engine_cs *engine) 756 755 { 757 - *saved = engine->props.heartbeat_interval_ms; 758 756 engine->props.heartbeat_interval_ms = 0; 759 757 760 758 intel_engine_pm_get(engine); 761 759 intel_engine_park_heartbeat(engine); 762 760 } 763 761 764 - static void engine_heartbeat_enable(struct intel_engine_cs *engine, 765 - unsigned long saved) 762 + static void engine_heartbeat_enable(struct intel_engine_cs *engine) 766 763 { 767 764 intel_engine_pm_put(engine); 768 765 769 - engine->props.heartbeat_interval_ms = saved; 766 + engine->props.heartbeat_interval_ms = 767 + engine->defaults.heartbeat_interval_ms; 770 768 } 771 769 772 770 static int live_hwsp_rollover_kernel(void *arg) ··· 783 785 struct intel_context *ce = engine->kernel_context; 784 786 struct intel_timeline *tl = ce->timeline; 785 787 struct i915_request *rq[3] = {}; 786 - unsigned long heartbeat; 787 788 int i; 788 789 789 - engine_heartbeat_disable(engine, &heartbeat); 790 + engine_heartbeat_disable(engine); 790 791 if (intel_gt_wait_for_idle(gt, HZ / 2)) { 791 792 err = -EIO; 792 793 goto out; ··· 836 839 out: 837 840 for (i = 0; i < ARRAY_SIZE(rq); i++) 838 841 i915_request_put(rq[i]); 839 - engine_heartbeat_enable(engine, heartbeat); 842 + engine_heartbeat_enable(engine); 840 843 if (err) 841 844 break; 842 845 }