Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: (48 commits)
IB/srp: Clean up error path in srp_create_target_ib()
IB/srp: Split send and recieve CQs to reduce number of interrupts
RDMA/nes: Add support for KR device id 0x0110
IB/uverbs: Use anon_inodes instead of private infinibandeventfs
IB/core: Fix and clean up ib_ud_header_init()
RDMA/cxgb3: Mark RDMA device with CXIO_ERROR_FATAL when removing
RDMA/cxgb3: Don't allocate the SW queue for user mode CQs
RDMA/cxgb3: Increase the max CQ depth
RDMA/cxgb3: Doorbell overflow avoidance and recovery
IB/core: Pack struct ib_device a little tighter
IB/ucm: Clean whitespace errors
IB/ucm: Increase maximum devices supported
IB/ucm: Use stack variable 'base' in ib_ucm_add_one
IB/ucm: Use stack variable 'devnum' in ib_ucm_add_one
IB/umad: Clean whitespace
IB/umad: Increase maximum devices supported
IB/umad: Use stack variable 'base' in ib_umad_init_port
IB/umad: Use stack variable 'devnum' in ib_umad_init_port
IB/umad: Remove port_table[]
IB/umad: Convert *cdev to cdev in struct ib_umad_port
...

+1238 -1227
+1
drivers/infiniband/Kconfig
··· 20 20 21 21 config INFINIBAND_USER_ACCESS 22 22 tristate "InfiniBand userspace access (verbs and CM)" 23 + select ANON_INODES 23 24 ---help--- 24 25 Userspace InfiniBand access support. This enables the 25 26 kernel side of userspace verbs and the userspace
+51 -10
drivers/infiniband/core/ucm.c
··· 1215 1215 1216 1216 ucm_dev = container_of(dev, struct ib_ucm_device, dev); 1217 1217 cdev_del(&ucm_dev->cdev); 1218 - clear_bit(ucm_dev->devnum, dev_map); 1218 + if (ucm_dev->devnum < IB_UCM_MAX_DEVICES) 1219 + clear_bit(ucm_dev->devnum, dev_map); 1220 + else 1221 + clear_bit(ucm_dev->devnum - IB_UCM_MAX_DEVICES, dev_map); 1219 1222 kfree(ucm_dev); 1220 1223 } 1221 1224 1222 1225 static const struct file_operations ucm_fops = { 1223 - .owner = THIS_MODULE, 1224 - .open = ib_ucm_open, 1226 + .owner = THIS_MODULE, 1227 + .open = ib_ucm_open, 1225 1228 .release = ib_ucm_close, 1226 - .write = ib_ucm_write, 1229 + .write = ib_ucm_write, 1227 1230 .poll = ib_ucm_poll, 1228 1231 }; 1229 1232 ··· 1240 1237 } 1241 1238 static DEVICE_ATTR(ibdev, S_IRUGO, show_ibdev, NULL); 1242 1239 1240 + static dev_t overflow_maj; 1241 + static DECLARE_BITMAP(overflow_map, IB_UCM_MAX_DEVICES); 1242 + static int find_overflow_devnum(void) 1243 + { 1244 + int ret; 1245 + 1246 + if (!overflow_maj) { 1247 + ret = alloc_chrdev_region(&overflow_maj, 0, IB_UCM_MAX_DEVICES, 1248 + "infiniband_cm"); 1249 + if (ret) { 1250 + printk(KERN_ERR "ucm: couldn't register dynamic device number\n"); 1251 + return ret; 1252 + } 1253 + } 1254 + 1255 + ret = find_first_zero_bit(overflow_map, IB_UCM_MAX_DEVICES); 1256 + if (ret >= IB_UCM_MAX_DEVICES) 1257 + return -1; 1258 + 1259 + return ret; 1260 + } 1261 + 1243 1262 static void ib_ucm_add_one(struct ib_device *device) 1244 1263 { 1264 + int devnum; 1265 + dev_t base; 1245 1266 struct ib_ucm_device *ucm_dev; 1246 1267 1247 1268 if (!device->alloc_ucontext || ··· 1278 1251 1279 1252 ucm_dev->ib_dev = device; 1280 1253 1281 - ucm_dev->devnum = find_first_zero_bit(dev_map, IB_UCM_MAX_DEVICES); 1282 - if (ucm_dev->devnum >= IB_UCM_MAX_DEVICES) 1283 - goto err; 1254 + devnum = find_first_zero_bit(dev_map, IB_UCM_MAX_DEVICES); 1255 + if (devnum >= IB_UCM_MAX_DEVICES) { 1256 + devnum = find_overflow_devnum(); 1257 + if (devnum < 0) 1258 + goto err; 1284 1259 1285 - set_bit(ucm_dev->devnum, dev_map); 1260 + ucm_dev->devnum = devnum + IB_UCM_MAX_DEVICES; 1261 + base = devnum + overflow_maj; 1262 + set_bit(devnum, overflow_map); 1263 + } else { 1264 + ucm_dev->devnum = devnum; 1265 + base = devnum + IB_UCM_BASE_DEV; 1266 + set_bit(devnum, dev_map); 1267 + } 1286 1268 1287 1269 cdev_init(&ucm_dev->cdev, &ucm_fops); 1288 1270 ucm_dev->cdev.owner = THIS_MODULE; 1289 1271 kobject_set_name(&ucm_dev->cdev.kobj, "ucm%d", ucm_dev->devnum); 1290 - if (cdev_add(&ucm_dev->cdev, IB_UCM_BASE_DEV + ucm_dev->devnum, 1)) 1272 + if (cdev_add(&ucm_dev->cdev, base, 1)) 1291 1273 goto err; 1292 1274 1293 1275 ucm_dev->dev.class = &cm_class; ··· 1317 1281 device_unregister(&ucm_dev->dev); 1318 1282 err_cdev: 1319 1283 cdev_del(&ucm_dev->cdev); 1320 - clear_bit(ucm_dev->devnum, dev_map); 1284 + if (ucm_dev->devnum < IB_UCM_MAX_DEVICES) 1285 + clear_bit(devnum, dev_map); 1286 + else 1287 + clear_bit(devnum, overflow_map); 1321 1288 err: 1322 1289 kfree(ucm_dev); 1323 1290 return; ··· 1379 1340 ib_unregister_client(&ucm_client); 1380 1341 class_remove_file(&cm_class, &class_attr_abi_version); 1381 1342 unregister_chrdev_region(IB_UCM_BASE_DEV, IB_UCM_MAX_DEVICES); 1343 + if (overflow_maj) 1344 + unregister_chrdev_region(overflow_maj, IB_UCM_MAX_DEVICES); 1382 1345 idr_destroy(&ctx_id_table); 1383 1346 } 1384 1347
+4 -10
drivers/infiniband/core/ud_header.c
··· 181 181 * ib_ud_header_init - Initialize UD header structure 182 182 * @payload_bytes:Length of packet payload 183 183 * @grh_present:GRH flag (if non-zero, GRH will be included) 184 + * @immediate_present: specify if immediate data should be used 184 185 * @header:Structure to initialize 185 186 * 186 187 * ib_ud_header_init() initializes the lrh.link_version, lrh.link_next_header, ··· 192 191 */ 193 192 void ib_ud_header_init(int payload_bytes, 194 193 int grh_present, 194 + int immediate_present, 195 195 struct ib_ud_header *header) 196 196 { 197 - int header_len; 198 197 u16 packet_length; 199 198 200 199 memset(header, 0, sizeof *header); 201 - 202 - header_len = 203 - IB_LRH_BYTES + 204 - IB_BTH_BYTES + 205 - IB_DETH_BYTES; 206 - if (grh_present) { 207 - header_len += IB_GRH_BYTES; 208 - } 209 200 210 201 header->lrh.link_version = 0; 211 202 header->lrh.link_next_header = ··· 224 231 225 232 header->lrh.packet_length = cpu_to_be16(packet_length); 226 233 227 - if (header->immediate_present) 234 + header->immediate_present = immediate_present; 235 + if (immediate_present) 228 236 header->bth.opcode = IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE; 229 237 else 230 238 header->bth.opcode = IB_OPCODE_UD_SEND_ONLY;
+1 -1
drivers/infiniband/core/umem.c
··· 136 136 down_write(&current->mm->mmap_sem); 137 137 138 138 locked = npages + current->mm->locked_vm; 139 - lock_limit = current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur >> PAGE_SHIFT; 139 + lock_limit = rlimit(RLIMIT_MEMLOCK) >> PAGE_SHIFT; 140 140 141 141 if ((locked > lock_limit) && !capable(CAP_IPC_LOCK)) { 142 142 ret = -ENOMEM;
+92 -81
drivers/infiniband/core/user_mad.c
··· 65 65 }; 66 66 67 67 /* 68 - * Our lifetime rules for these structs are the following: each time a 69 - * device special file is opened, we look up the corresponding struct 70 - * ib_umad_port by minor in the umad_port[] table while holding the 71 - * port_lock. If this lookup succeeds, we take a reference on the 72 - * ib_umad_port's struct ib_umad_device while still holding the 73 - * port_lock; if the lookup fails, we fail the open(). We drop these 68 + * Our lifetime rules for these structs are the following: 69 + * device special file is opened, we take a reference on the 70 + * ib_umad_port's struct ib_umad_device. We drop these 74 71 * references in the corresponding close(). 75 72 * 76 73 * In addition to references coming from open character devices, there ··· 75 78 * module's reference taken when allocating the ib_umad_device in 76 79 * ib_umad_add_one(). 77 80 * 78 - * When destroying an ib_umad_device, we clear all of its 79 - * ib_umad_ports from umad_port[] while holding port_lock before 80 - * dropping the module's reference to the ib_umad_device. This is 81 - * always safe because any open() calls will either succeed and obtain 82 - * a reference before we clear the umad_port[] entries, or fail after 83 - * we clear the umad_port[] entries. 81 + * When destroying an ib_umad_device, we drop the module's reference. 84 82 */ 85 83 86 84 struct ib_umad_port { 87 - struct cdev *cdev; 85 + struct cdev cdev; 88 86 struct device *dev; 89 87 90 - struct cdev *sm_cdev; 88 + struct cdev sm_cdev; 91 89 struct device *sm_dev; 92 90 struct semaphore sm_sem; 93 91 ··· 128 136 static const dev_t base_dev = MKDEV(IB_UMAD_MAJOR, IB_UMAD_MINOR_BASE); 129 137 130 138 static DEFINE_SPINLOCK(port_lock); 131 - static struct ib_umad_port *umad_port[IB_UMAD_MAX_PORTS]; 132 139 static DECLARE_BITMAP(dev_map, IB_UMAD_MAX_PORTS); 133 140 134 141 static void ib_umad_add_one(struct ib_device *device); ··· 487 496 ah_attr.ah_flags = IB_AH_GRH; 488 497 memcpy(ah_attr.grh.dgid.raw, packet->mad.hdr.gid, 16); 489 498 ah_attr.grh.sgid_index = packet->mad.hdr.gid_index; 490 - ah_attr.grh.flow_label = be32_to_cpu(packet->mad.hdr.flow_label); 491 - ah_attr.grh.hop_limit = packet->mad.hdr.hop_limit; 499 + ah_attr.grh.flow_label = be32_to_cpu(packet->mad.hdr.flow_label); 500 + ah_attr.grh.hop_limit = packet->mad.hdr.hop_limit; 492 501 ah_attr.grh.traffic_class = packet->mad.hdr.traffic_class; 493 502 } 494 503 ··· 519 528 goto err_ah; 520 529 } 521 530 522 - packet->msg->ah = ah; 531 + packet->msg->ah = ah; 523 532 packet->msg->timeout_ms = packet->mad.hdr.timeout_ms; 524 - packet->msg->retries = packet->mad.hdr.retries; 533 + packet->msg->retries = packet->mad.hdr.retries; 525 534 packet->msg->context[0] = packet; 526 535 527 536 /* Copy MAD header. Any RMPP header is already in place. */ ··· 770 779 /* 771 780 * ib_umad_open() does not need the BKL: 772 781 * 773 - * - umad_port[] accesses are protected by port_lock, the 774 - * ib_umad_port structures are properly reference counted, and 782 + * - the ib_umad_port structures are properly reference counted, and 775 783 * everything else is purely local to the file being created, so 776 784 * races against other open calls are not a problem; 777 785 * - the ioctl method does not affect any global state outside of the 778 786 * file structure being operated on; 779 - * - the port is added to umad_port[] as the last part of module 780 - * initialization so the open method will either immediately run 781 - * -ENXIO, or all required initialization will be done. 782 787 */ 783 788 static int ib_umad_open(struct inode *inode, struct file *filp) 784 789 { ··· 782 795 struct ib_umad_file *file; 783 796 int ret = 0; 784 797 785 - spin_lock(&port_lock); 786 - port = umad_port[iminor(inode) - IB_UMAD_MINOR_BASE]; 798 + port = container_of(inode->i_cdev, struct ib_umad_port, cdev); 787 799 if (port) 788 800 kref_get(&port->umad_dev->ref); 789 - spin_unlock(&port_lock); 790 - 791 - if (!port) 801 + else 792 802 return -ENXIO; 793 803 794 804 mutex_lock(&port->file_mutex); ··· 856 872 } 857 873 858 874 static const struct file_operations umad_fops = { 859 - .owner = THIS_MODULE, 860 - .read = ib_umad_read, 861 - .write = ib_umad_write, 862 - .poll = ib_umad_poll, 875 + .owner = THIS_MODULE, 876 + .read = ib_umad_read, 877 + .write = ib_umad_write, 878 + .poll = ib_umad_poll, 863 879 .unlocked_ioctl = ib_umad_ioctl, 864 880 #ifdef CONFIG_COMPAT 865 - .compat_ioctl = ib_umad_compat_ioctl, 881 + .compat_ioctl = ib_umad_compat_ioctl, 866 882 #endif 867 - .open = ib_umad_open, 868 - .release = ib_umad_close 883 + .open = ib_umad_open, 884 + .release = ib_umad_close 869 885 }; 870 886 871 887 static int ib_umad_sm_open(struct inode *inode, struct file *filp) ··· 876 892 }; 877 893 int ret; 878 894 879 - spin_lock(&port_lock); 880 - port = umad_port[iminor(inode) - IB_UMAD_MINOR_BASE - IB_UMAD_MAX_PORTS]; 895 + port = container_of(inode->i_cdev, struct ib_umad_port, sm_cdev); 881 896 if (port) 882 897 kref_get(&port->umad_dev->ref); 883 - spin_unlock(&port_lock); 884 - 885 - if (!port) 898 + else 886 899 return -ENXIO; 887 900 888 901 if (filp->f_flags & O_NONBLOCK) { ··· 930 949 } 931 950 932 951 static const struct file_operations umad_sm_fops = { 933 - .owner = THIS_MODULE, 934 - .open = ib_umad_sm_open, 952 + .owner = THIS_MODULE, 953 + .open = ib_umad_sm_open, 935 954 .release = ib_umad_sm_close 936 955 }; 937 956 ··· 971 990 } 972 991 static CLASS_ATTR(abi_version, S_IRUGO, show_abi_version, NULL); 973 992 993 + static dev_t overflow_maj; 994 + static DECLARE_BITMAP(overflow_map, IB_UMAD_MAX_PORTS); 995 + static int find_overflow_devnum(void) 996 + { 997 + int ret; 998 + 999 + if (!overflow_maj) { 1000 + ret = alloc_chrdev_region(&overflow_maj, 0, IB_UMAD_MAX_PORTS * 2, 1001 + "infiniband_mad"); 1002 + if (ret) { 1003 + printk(KERN_ERR "user_mad: couldn't register dynamic device number\n"); 1004 + return ret; 1005 + } 1006 + } 1007 + 1008 + ret = find_first_zero_bit(overflow_map, IB_UMAD_MAX_PORTS); 1009 + if (ret >= IB_UMAD_MAX_PORTS) 1010 + return -1; 1011 + 1012 + return ret; 1013 + } 1014 + 974 1015 static int ib_umad_init_port(struct ib_device *device, int port_num, 975 1016 struct ib_umad_port *port) 976 1017 { 1018 + int devnum; 1019 + dev_t base; 1020 + 977 1021 spin_lock(&port_lock); 978 - port->dev_num = find_first_zero_bit(dev_map, IB_UMAD_MAX_PORTS); 979 - if (port->dev_num >= IB_UMAD_MAX_PORTS) { 1022 + devnum = find_first_zero_bit(dev_map, IB_UMAD_MAX_PORTS); 1023 + if (devnum >= IB_UMAD_MAX_PORTS) { 980 1024 spin_unlock(&port_lock); 981 - return -1; 1025 + devnum = find_overflow_devnum(); 1026 + if (devnum < 0) 1027 + return -1; 1028 + 1029 + spin_lock(&port_lock); 1030 + port->dev_num = devnum + IB_UMAD_MAX_PORTS; 1031 + base = devnum + overflow_maj; 1032 + set_bit(devnum, overflow_map); 1033 + } else { 1034 + port->dev_num = devnum; 1035 + base = devnum + base_dev; 1036 + set_bit(devnum, dev_map); 982 1037 } 983 - set_bit(port->dev_num, dev_map); 984 1038 spin_unlock(&port_lock); 985 1039 986 1040 port->ib_dev = device; ··· 1024 1008 mutex_init(&port->file_mutex); 1025 1009 INIT_LIST_HEAD(&port->file_list); 1026 1010 1027 - port->cdev = cdev_alloc(); 1028 - if (!port->cdev) 1029 - return -1; 1030 - port->cdev->owner = THIS_MODULE; 1031 - port->cdev->ops = &umad_fops; 1032 - kobject_set_name(&port->cdev->kobj, "umad%d", port->dev_num); 1033 - if (cdev_add(port->cdev, base_dev + port->dev_num, 1)) 1011 + cdev_init(&port->cdev, &umad_fops); 1012 + port->cdev.owner = THIS_MODULE; 1013 + kobject_set_name(&port->cdev.kobj, "umad%d", port->dev_num); 1014 + if (cdev_add(&port->cdev, base, 1)) 1034 1015 goto err_cdev; 1035 1016 1036 1017 port->dev = device_create(umad_class, device->dma_device, 1037 - port->cdev->dev, port, 1018 + port->cdev.dev, port, 1038 1019 "umad%d", port->dev_num); 1039 1020 if (IS_ERR(port->dev)) 1040 1021 goto err_cdev; ··· 1041 1028 if (device_create_file(port->dev, &dev_attr_port)) 1042 1029 goto err_dev; 1043 1030 1044 - port->sm_cdev = cdev_alloc(); 1045 - if (!port->sm_cdev) 1046 - goto err_dev; 1047 - port->sm_cdev->owner = THIS_MODULE; 1048 - port->sm_cdev->ops = &umad_sm_fops; 1049 - kobject_set_name(&port->sm_cdev->kobj, "issm%d", port->dev_num); 1050 - if (cdev_add(port->sm_cdev, base_dev + port->dev_num + IB_UMAD_MAX_PORTS, 1)) 1031 + base += IB_UMAD_MAX_PORTS; 1032 + cdev_init(&port->sm_cdev, &umad_sm_fops); 1033 + port->sm_cdev.owner = THIS_MODULE; 1034 + kobject_set_name(&port->sm_cdev.kobj, "issm%d", port->dev_num); 1035 + if (cdev_add(&port->sm_cdev, base, 1)) 1051 1036 goto err_sm_cdev; 1052 1037 1053 1038 port->sm_dev = device_create(umad_class, device->dma_device, 1054 - port->sm_cdev->dev, port, 1039 + port->sm_cdev.dev, port, 1055 1040 "issm%d", port->dev_num); 1056 1041 if (IS_ERR(port->sm_dev)) 1057 1042 goto err_sm_cdev; ··· 1059 1048 if (device_create_file(port->sm_dev, &dev_attr_port)) 1060 1049 goto err_sm_dev; 1061 1050 1062 - spin_lock(&port_lock); 1063 - umad_port[port->dev_num] = port; 1064 - spin_unlock(&port_lock); 1065 - 1066 1051 return 0; 1067 1052 1068 1053 err_sm_dev: 1069 - device_destroy(umad_class, port->sm_cdev->dev); 1054 + device_destroy(umad_class, port->sm_cdev.dev); 1070 1055 1071 1056 err_sm_cdev: 1072 - cdev_del(port->sm_cdev); 1057 + cdev_del(&port->sm_cdev); 1073 1058 1074 1059 err_dev: 1075 - device_destroy(umad_class, port->cdev->dev); 1060 + device_destroy(umad_class, port->cdev.dev); 1076 1061 1077 1062 err_cdev: 1078 - cdev_del(port->cdev); 1079 - clear_bit(port->dev_num, dev_map); 1063 + cdev_del(&port->cdev); 1064 + if (port->dev_num < IB_UMAD_MAX_PORTS) 1065 + clear_bit(devnum, dev_map); 1066 + else 1067 + clear_bit(devnum, overflow_map); 1080 1068 1081 1069 return -1; 1082 1070 } ··· 1089 1079 dev_set_drvdata(port->dev, NULL); 1090 1080 dev_set_drvdata(port->sm_dev, NULL); 1091 1081 1092 - device_destroy(umad_class, port->cdev->dev); 1093 - device_destroy(umad_class, port->sm_cdev->dev); 1082 + device_destroy(umad_class, port->cdev.dev); 1083 + device_destroy(umad_class, port->sm_cdev.dev); 1094 1084 1095 - cdev_del(port->cdev); 1096 - cdev_del(port->sm_cdev); 1097 - 1098 - spin_lock(&port_lock); 1099 - umad_port[port->dev_num] = NULL; 1100 - spin_unlock(&port_lock); 1085 + cdev_del(&port->cdev); 1086 + cdev_del(&port->sm_cdev); 1101 1087 1102 1088 mutex_lock(&port->file_mutex); 1103 1089 ··· 1112 1106 1113 1107 mutex_unlock(&port->file_mutex); 1114 1108 1115 - clear_bit(port->dev_num, dev_map); 1109 + if (port->dev_num < IB_UMAD_MAX_PORTS) 1110 + clear_bit(port->dev_num, dev_map); 1111 + else 1112 + clear_bit(port->dev_num - IB_UMAD_MAX_PORTS, overflow_map); 1116 1113 } 1117 1114 1118 1115 static void ib_umad_add_one(struct ib_device *device) ··· 1223 1214 ib_unregister_client(&umad_client); 1224 1215 class_destroy(umad_class); 1225 1216 unregister_chrdev_region(base_dev, IB_UMAD_MAX_PORTS * 2); 1217 + if (overflow_maj) 1218 + unregister_chrdev_region(overflow_maj, IB_UMAD_MAX_PORTS * 2); 1226 1219 } 1227 1220 1228 1221 module_init(ib_umad_init);
+6 -5
drivers/infiniband/core/uverbs.h
··· 41 41 #include <linux/idr.h> 42 42 #include <linux/mutex.h> 43 43 #include <linux/completion.h> 44 + #include <linux/cdev.h> 44 45 45 46 #include <rdma/ib_verbs.h> 46 47 #include <rdma/ib_umem.h> ··· 70 69 71 70 struct ib_uverbs_device { 72 71 struct kref ref; 72 + int num_comp_vectors; 73 73 struct completion comp; 74 - int devnum; 75 - struct cdev *cdev; 76 74 struct device *dev; 77 75 struct ib_device *ib_dev; 78 - int num_comp_vectors; 76 + int devnum; 77 + struct cdev cdev; 79 78 }; 80 79 81 80 struct ib_uverbs_event_file { 82 81 struct kref ref; 82 + int is_async; 83 83 struct ib_uverbs_file *uverbs_file; 84 84 spinlock_t lock; 85 + int is_closed; 85 86 wait_queue_head_t poll_wait; 86 87 struct fasync_struct *async_queue; 87 88 struct list_head event_list; 88 - int is_async; 89 - int is_closed; 90 89 }; 91 90 92 91 struct ib_uverbs_file {
+107 -127
drivers/infiniband/core/uverbs_main.c
··· 42 42 #include <linux/poll.h> 43 43 #include <linux/sched.h> 44 44 #include <linux/file.h> 45 - #include <linux/mount.h> 46 45 #include <linux/cdev.h> 46 + #include <linux/anon_inodes.h> 47 47 48 48 #include <asm/uaccess.h> 49 49 ··· 52 52 MODULE_AUTHOR("Roland Dreier"); 53 53 MODULE_DESCRIPTION("InfiniBand userspace verbs access"); 54 54 MODULE_LICENSE("Dual BSD/GPL"); 55 - 56 - #define INFINIBANDEVENTFS_MAGIC 0x49426576 /* "IBev" */ 57 55 58 56 enum { 59 57 IB_UVERBS_MAJOR = 231, ··· 73 75 DEFINE_IDR(ib_uverbs_srq_idr); 74 76 75 77 static DEFINE_SPINLOCK(map_lock); 76 - static struct ib_uverbs_device *dev_table[IB_UVERBS_MAX_DEVICES]; 77 78 static DECLARE_BITMAP(dev_map, IB_UVERBS_MAX_DEVICES); 78 79 79 80 static ssize_t (*uverbs_cmd_table[])(struct ib_uverbs_file *file, 80 81 const char __user *buf, int in_len, 81 82 int out_len) = { 82 - [IB_USER_VERBS_CMD_GET_CONTEXT] = ib_uverbs_get_context, 83 - [IB_USER_VERBS_CMD_QUERY_DEVICE] = ib_uverbs_query_device, 84 - [IB_USER_VERBS_CMD_QUERY_PORT] = ib_uverbs_query_port, 85 - [IB_USER_VERBS_CMD_ALLOC_PD] = ib_uverbs_alloc_pd, 86 - [IB_USER_VERBS_CMD_DEALLOC_PD] = ib_uverbs_dealloc_pd, 87 - [IB_USER_VERBS_CMD_REG_MR] = ib_uverbs_reg_mr, 88 - [IB_USER_VERBS_CMD_DEREG_MR] = ib_uverbs_dereg_mr, 83 + [IB_USER_VERBS_CMD_GET_CONTEXT] = ib_uverbs_get_context, 84 + [IB_USER_VERBS_CMD_QUERY_DEVICE] = ib_uverbs_query_device, 85 + [IB_USER_VERBS_CMD_QUERY_PORT] = ib_uverbs_query_port, 86 + [IB_USER_VERBS_CMD_ALLOC_PD] = ib_uverbs_alloc_pd, 87 + [IB_USER_VERBS_CMD_DEALLOC_PD] = ib_uverbs_dealloc_pd, 88 + [IB_USER_VERBS_CMD_REG_MR] = ib_uverbs_reg_mr, 89 + [IB_USER_VERBS_CMD_DEREG_MR] = ib_uverbs_dereg_mr, 89 90 [IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL] = ib_uverbs_create_comp_channel, 90 - [IB_USER_VERBS_CMD_CREATE_CQ] = ib_uverbs_create_cq, 91 - [IB_USER_VERBS_CMD_RESIZE_CQ] = ib_uverbs_resize_cq, 92 - [IB_USER_VERBS_CMD_POLL_CQ] = ib_uverbs_poll_cq, 93 - [IB_USER_VERBS_CMD_REQ_NOTIFY_CQ] = ib_uverbs_req_notify_cq, 94 - [IB_USER_VERBS_CMD_DESTROY_CQ] = ib_uverbs_destroy_cq, 95 - [IB_USER_VERBS_CMD_CREATE_QP] = ib_uverbs_create_qp, 96 - [IB_USER_VERBS_CMD_QUERY_QP] = ib_uverbs_query_qp, 97 - [IB_USER_VERBS_CMD_MODIFY_QP] = ib_uverbs_modify_qp, 98 - [IB_USER_VERBS_CMD_DESTROY_QP] = ib_uverbs_destroy_qp, 99 - [IB_USER_VERBS_CMD_POST_SEND] = ib_uverbs_post_send, 100 - [IB_USER_VERBS_CMD_POST_RECV] = ib_uverbs_post_recv, 101 - [IB_USER_VERBS_CMD_POST_SRQ_RECV] = ib_uverbs_post_srq_recv, 102 - [IB_USER_VERBS_CMD_CREATE_AH] = ib_uverbs_create_ah, 103 - [IB_USER_VERBS_CMD_DESTROY_AH] = ib_uverbs_destroy_ah, 104 - [IB_USER_VERBS_CMD_ATTACH_MCAST] = ib_uverbs_attach_mcast, 105 - [IB_USER_VERBS_CMD_DETACH_MCAST] = ib_uverbs_detach_mcast, 106 - [IB_USER_VERBS_CMD_CREATE_SRQ] = ib_uverbs_create_srq, 107 - [IB_USER_VERBS_CMD_MODIFY_SRQ] = ib_uverbs_modify_srq, 108 - [IB_USER_VERBS_CMD_QUERY_SRQ] = ib_uverbs_query_srq, 109 - [IB_USER_VERBS_CMD_DESTROY_SRQ] = ib_uverbs_destroy_srq, 91 + [IB_USER_VERBS_CMD_CREATE_CQ] = ib_uverbs_create_cq, 92 + [IB_USER_VERBS_CMD_RESIZE_CQ] = ib_uverbs_resize_cq, 93 + [IB_USER_VERBS_CMD_POLL_CQ] = ib_uverbs_poll_cq, 94 + [IB_USER_VERBS_CMD_REQ_NOTIFY_CQ] = ib_uverbs_req_notify_cq, 95 + [IB_USER_VERBS_CMD_DESTROY_CQ] = ib_uverbs_destroy_cq, 96 + [IB_USER_VERBS_CMD_CREATE_QP] = ib_uverbs_create_qp, 97 + [IB_USER_VERBS_CMD_QUERY_QP] = ib_uverbs_query_qp, 98 + [IB_USER_VERBS_CMD_MODIFY_QP] = ib_uverbs_modify_qp, 99 + [IB_USER_VERBS_CMD_DESTROY_QP] = ib_uverbs_destroy_qp, 100 + [IB_USER_VERBS_CMD_POST_SEND] = ib_uverbs_post_send, 101 + [IB_USER_VERBS_CMD_POST_RECV] = ib_uverbs_post_recv, 102 + [IB_USER_VERBS_CMD_POST_SRQ_RECV] = ib_uverbs_post_srq_recv, 103 + [IB_USER_VERBS_CMD_CREATE_AH] = ib_uverbs_create_ah, 104 + [IB_USER_VERBS_CMD_DESTROY_AH] = ib_uverbs_destroy_ah, 105 + [IB_USER_VERBS_CMD_ATTACH_MCAST] = ib_uverbs_attach_mcast, 106 + [IB_USER_VERBS_CMD_DETACH_MCAST] = ib_uverbs_detach_mcast, 107 + [IB_USER_VERBS_CMD_CREATE_SRQ] = ib_uverbs_create_srq, 108 + [IB_USER_VERBS_CMD_MODIFY_SRQ] = ib_uverbs_modify_srq, 109 + [IB_USER_VERBS_CMD_QUERY_SRQ] = ib_uverbs_query_srq, 110 + [IB_USER_VERBS_CMD_DESTROY_SRQ] = ib_uverbs_destroy_srq, 110 111 }; 111 - 112 - static struct vfsmount *uverbs_event_mnt; 113 112 114 113 static void ib_uverbs_add_one(struct ib_device *device); 115 114 static void ib_uverbs_remove_one(struct ib_device *device); ··· 365 370 366 371 static const struct file_operations uverbs_event_fops = { 367 372 .owner = THIS_MODULE, 368 - .read = ib_uverbs_event_read, 373 + .read = ib_uverbs_event_read, 369 374 .poll = ib_uverbs_event_poll, 370 375 .release = ib_uverbs_event_close, 371 376 .fasync = ib_uverbs_event_fasync ··· 487 492 int is_async, int *fd) 488 493 { 489 494 struct ib_uverbs_event_file *ev_file; 490 - struct path path; 491 495 struct file *filp; 492 496 int ret; 493 497 ··· 509 515 goto err; 510 516 } 511 517 512 - /* 513 - * fops_get() can't fail here, because we're coming from a 514 - * system call on a uverbs file, which will already have a 515 - * module reference. 516 - */ 517 - path.mnt = uverbs_event_mnt; 518 - path.dentry = uverbs_event_mnt->mnt_root; 519 - path_get(&path); 520 - filp = alloc_file(&path, FMODE_READ, fops_get(&uverbs_event_fops)); 518 + filp = anon_inode_getfile("[uverbs-event]", &uverbs_event_fops, 519 + ev_file, O_RDONLY); 521 520 if (!filp) { 522 521 ret = -ENFILE; 523 522 goto err_fd; 524 523 } 525 524 526 - filp->private_data = ev_file; 527 - 528 525 return filp; 529 526 530 527 err_fd: 531 - fops_put(&uverbs_event_fops); 532 - path_put(&path); 533 528 put_unused_fd(*fd); 534 529 535 530 err: ··· 600 617 /* 601 618 * ib_uverbs_open() does not need the BKL: 602 619 * 603 - * - dev_table[] accesses are protected by map_lock, the 604 - * ib_uverbs_device structures are properly reference counted, and 620 + * - the ib_uverbs_device structures are properly reference counted and 605 621 * everything else is purely local to the file being created, so 606 622 * races against other open calls are not a problem; 607 623 * - there is no ioctl method to race against; 608 - * - the device is added to dev_table[] as the last part of module 609 - * initialization, the open method will either immediately run 610 - * -ENXIO, or all required initialization will be done. 624 + * - the open method will either immediately run -ENXIO, or all 625 + * required initialization will be done. 611 626 */ 612 627 static int ib_uverbs_open(struct inode *inode, struct file *filp) 613 628 { ··· 613 632 struct ib_uverbs_file *file; 614 633 int ret; 615 634 616 - spin_lock(&map_lock); 617 - dev = dev_table[iminor(inode) - IB_UVERBS_BASE_MINOR]; 635 + dev = container_of(inode->i_cdev, struct ib_uverbs_device, cdev); 618 636 if (dev) 619 637 kref_get(&dev->ref); 620 - spin_unlock(&map_lock); 621 - 622 - if (!dev) 638 + else 623 639 return -ENXIO; 624 640 625 641 if (!try_module_get(dev->ib_dev->owner)) { ··· 663 685 } 664 686 665 687 static const struct file_operations uverbs_fops = { 666 - .owner = THIS_MODULE, 667 - .write = ib_uverbs_write, 668 - .open = ib_uverbs_open, 688 + .owner = THIS_MODULE, 689 + .write = ib_uverbs_write, 690 + .open = ib_uverbs_open, 669 691 .release = ib_uverbs_close 670 692 }; 671 693 672 694 static const struct file_operations uverbs_mmap_fops = { 673 - .owner = THIS_MODULE, 674 - .write = ib_uverbs_write, 695 + .owner = THIS_MODULE, 696 + .write = ib_uverbs_write, 675 697 .mmap = ib_uverbs_mmap, 676 - .open = ib_uverbs_open, 698 + .open = ib_uverbs_open, 677 699 .release = ib_uverbs_close 678 700 }; 679 701 ··· 713 735 } 714 736 static CLASS_ATTR(abi_version, S_IRUGO, show_abi_version, NULL); 715 737 738 + static dev_t overflow_maj; 739 + static DECLARE_BITMAP(overflow_map, IB_UVERBS_MAX_DEVICES); 740 + 741 + /* 742 + * If we have more than IB_UVERBS_MAX_DEVICES, dynamically overflow by 743 + * requesting a new major number and doubling the number of max devices we 744 + * support. It's stupid, but simple. 745 + */ 746 + static int find_overflow_devnum(void) 747 + { 748 + int ret; 749 + 750 + if (!overflow_maj) { 751 + ret = alloc_chrdev_region(&overflow_maj, 0, IB_UVERBS_MAX_DEVICES, 752 + "infiniband_verbs"); 753 + if (ret) { 754 + printk(KERN_ERR "user_verbs: couldn't register dynamic device number\n"); 755 + return ret; 756 + } 757 + } 758 + 759 + ret = find_first_zero_bit(overflow_map, IB_UVERBS_MAX_DEVICES); 760 + if (ret >= IB_UVERBS_MAX_DEVICES) 761 + return -1; 762 + 763 + return ret; 764 + } 765 + 716 766 static void ib_uverbs_add_one(struct ib_device *device) 717 767 { 768 + int devnum; 769 + dev_t base; 718 770 struct ib_uverbs_device *uverbs_dev; 719 771 720 772 if (!device->alloc_ucontext) ··· 758 750 init_completion(&uverbs_dev->comp); 759 751 760 752 spin_lock(&map_lock); 761 - uverbs_dev->devnum = find_first_zero_bit(dev_map, IB_UVERBS_MAX_DEVICES); 762 - if (uverbs_dev->devnum >= IB_UVERBS_MAX_DEVICES) { 753 + devnum = find_first_zero_bit(dev_map, IB_UVERBS_MAX_DEVICES); 754 + if (devnum >= IB_UVERBS_MAX_DEVICES) { 763 755 spin_unlock(&map_lock); 764 - goto err; 756 + devnum = find_overflow_devnum(); 757 + if (devnum < 0) 758 + goto err; 759 + 760 + spin_lock(&map_lock); 761 + uverbs_dev->devnum = devnum + IB_UVERBS_MAX_DEVICES; 762 + base = devnum + overflow_maj; 763 + set_bit(devnum, overflow_map); 764 + } else { 765 + uverbs_dev->devnum = devnum; 766 + base = devnum + IB_UVERBS_BASE_DEV; 767 + set_bit(devnum, dev_map); 765 768 } 766 - set_bit(uverbs_dev->devnum, dev_map); 767 769 spin_unlock(&map_lock); 768 770 769 771 uverbs_dev->ib_dev = device; 770 772 uverbs_dev->num_comp_vectors = device->num_comp_vectors; 771 773 772 - uverbs_dev->cdev = cdev_alloc(); 773 - if (!uverbs_dev->cdev) 774 - goto err; 775 - uverbs_dev->cdev->owner = THIS_MODULE; 776 - uverbs_dev->cdev->ops = device->mmap ? &uverbs_mmap_fops : &uverbs_fops; 777 - kobject_set_name(&uverbs_dev->cdev->kobj, "uverbs%d", uverbs_dev->devnum); 778 - if (cdev_add(uverbs_dev->cdev, IB_UVERBS_BASE_DEV + uverbs_dev->devnum, 1)) 774 + cdev_init(&uverbs_dev->cdev, NULL); 775 + uverbs_dev->cdev.owner = THIS_MODULE; 776 + uverbs_dev->cdev.ops = device->mmap ? &uverbs_mmap_fops : &uverbs_fops; 777 + kobject_set_name(&uverbs_dev->cdev.kobj, "uverbs%d", uverbs_dev->devnum); 778 + if (cdev_add(&uverbs_dev->cdev, base, 1)) 779 779 goto err_cdev; 780 780 781 781 uverbs_dev->dev = device_create(uverbs_class, device->dma_device, 782 - uverbs_dev->cdev->dev, uverbs_dev, 782 + uverbs_dev->cdev.dev, uverbs_dev, 783 783 "uverbs%d", uverbs_dev->devnum); 784 784 if (IS_ERR(uverbs_dev->dev)) 785 785 goto err_cdev; ··· 797 781 if (device_create_file(uverbs_dev->dev, &dev_attr_abi_version)) 798 782 goto err_class; 799 783 800 - spin_lock(&map_lock); 801 - dev_table[uverbs_dev->devnum] = uverbs_dev; 802 - spin_unlock(&map_lock); 803 - 804 784 ib_set_client_data(device, &uverbs_client, uverbs_dev); 805 785 806 786 return; 807 787 808 788 err_class: 809 - device_destroy(uverbs_class, uverbs_dev->cdev->dev); 789 + device_destroy(uverbs_class, uverbs_dev->cdev.dev); 810 790 811 791 err_cdev: 812 - cdev_del(uverbs_dev->cdev); 813 - clear_bit(uverbs_dev->devnum, dev_map); 792 + cdev_del(&uverbs_dev->cdev); 793 + if (uverbs_dev->devnum < IB_UVERBS_MAX_DEVICES) 794 + clear_bit(devnum, dev_map); 795 + else 796 + clear_bit(devnum, overflow_map); 814 797 815 798 err: 816 799 kref_put(&uverbs_dev->ref, ib_uverbs_release_dev); ··· 826 811 return; 827 812 828 813 dev_set_drvdata(uverbs_dev->dev, NULL); 829 - device_destroy(uverbs_class, uverbs_dev->cdev->dev); 830 - cdev_del(uverbs_dev->cdev); 814 + device_destroy(uverbs_class, uverbs_dev->cdev.dev); 815 + cdev_del(&uverbs_dev->cdev); 831 816 832 - spin_lock(&map_lock); 833 - dev_table[uverbs_dev->devnum] = NULL; 834 - spin_unlock(&map_lock); 835 - 836 - clear_bit(uverbs_dev->devnum, dev_map); 817 + if (uverbs_dev->devnum < IB_UVERBS_MAX_DEVICES) 818 + clear_bit(uverbs_dev->devnum, dev_map); 819 + else 820 + clear_bit(uverbs_dev->devnum - IB_UVERBS_MAX_DEVICES, overflow_map); 837 821 838 822 kref_put(&uverbs_dev->ref, ib_uverbs_release_dev); 839 823 wait_for_completion(&uverbs_dev->comp); 840 824 kfree(uverbs_dev); 841 825 } 842 - 843 - static int uverbs_event_get_sb(struct file_system_type *fs_type, int flags, 844 - const char *dev_name, void *data, 845 - struct vfsmount *mnt) 846 - { 847 - return get_sb_pseudo(fs_type, "infinibandevent:", NULL, 848 - INFINIBANDEVENTFS_MAGIC, mnt); 849 - } 850 - 851 - static struct file_system_type uverbs_event_fs = { 852 - /* No owner field so module can be unloaded */ 853 - .name = "infinibandeventfs", 854 - .get_sb = uverbs_event_get_sb, 855 - .kill_sb = kill_litter_super 856 - }; 857 826 858 827 static int __init ib_uverbs_init(void) 859 828 { ··· 863 864 goto out_class; 864 865 } 865 866 866 - ret = register_filesystem(&uverbs_event_fs); 867 - if (ret) { 868 - printk(KERN_ERR "user_verbs: couldn't register infinibandeventfs\n"); 869 - goto out_class; 870 - } 871 - 872 - uverbs_event_mnt = kern_mount(&uverbs_event_fs); 873 - if (IS_ERR(uverbs_event_mnt)) { 874 - ret = PTR_ERR(uverbs_event_mnt); 875 - printk(KERN_ERR "user_verbs: couldn't mount infinibandeventfs\n"); 876 - goto out_fs; 877 - } 878 - 879 867 ret = ib_register_client(&uverbs_client); 880 868 if (ret) { 881 869 printk(KERN_ERR "user_verbs: couldn't register client\n"); 882 - goto out_mnt; 870 + goto out_class; 883 871 } 884 872 885 873 return 0; 886 - 887 - out_mnt: 888 - mntput(uverbs_event_mnt); 889 - 890 - out_fs: 891 - unregister_filesystem(&uverbs_event_fs); 892 874 893 875 out_class: 894 876 class_destroy(uverbs_class); ··· 884 904 static void __exit ib_uverbs_cleanup(void) 885 905 { 886 906 ib_unregister_client(&uverbs_client); 887 - mntput(uverbs_event_mnt); 888 - unregister_filesystem(&uverbs_event_fs); 889 907 class_destroy(uverbs_class); 890 908 unregister_chrdev_region(IB_UVERBS_BASE_DEV, IB_UVERBS_MAX_DEVICES); 909 + if (overflow_maj) 910 + unregister_chrdev_region(overflow_maj, IB_UVERBS_MAX_DEVICES); 891 911 idr_destroy(&ib_uverbs_pd_idr); 892 912 idr_destroy(&ib_uverbs_mr_idr); 893 913 idr_destroy(&ib_uverbs_mw_idr);
+7 -8
drivers/infiniband/hw/cxgb3/cxio_hal.c
··· 109 109 while (!CQ_VLD_ENTRY(rptr, cq->size_log2, cqe)) { 110 110 udelay(1); 111 111 if (i++ > 1000000) { 112 - BUG_ON(1); 113 112 printk(KERN_ERR "%s: stalled rnic\n", 114 113 rdev_p->dev_name); 115 114 return -EIO; ··· 154 155 return iwch_cxgb3_ofld_send(rdev_p->t3cdev_p, skb); 155 156 } 156 157 157 - int cxio_create_cq(struct cxio_rdev *rdev_p, struct t3_cq *cq) 158 + int cxio_create_cq(struct cxio_rdev *rdev_p, struct t3_cq *cq, int kernel) 158 159 { 159 160 struct rdma_cq_setup setup; 160 161 int size = (1UL << (cq->size_log2)) * sizeof(struct t3_cqe); ··· 162 163 cq->cqid = cxio_hal_get_cqid(rdev_p->rscp); 163 164 if (!cq->cqid) 164 165 return -ENOMEM; 165 - cq->sw_queue = kzalloc(size, GFP_KERNEL); 166 - if (!cq->sw_queue) 167 - return -ENOMEM; 168 - cq->queue = dma_alloc_coherent(&(rdev_p->rnic_info.pdev->dev), 169 - (1UL << (cq->size_log2)) * 170 - sizeof(struct t3_cqe), 166 + if (kernel) { 167 + cq->sw_queue = kzalloc(size, GFP_KERNEL); 168 + if (!cq->sw_queue) 169 + return -ENOMEM; 170 + } 171 + cq->queue = dma_alloc_coherent(&(rdev_p->rnic_info.pdev->dev), size, 171 172 &(cq->dma_addr), GFP_KERNEL); 172 173 if (!cq->queue) { 173 174 kfree(cq->sw_queue);
+2 -2
drivers/infiniband/hw/cxgb3/cxio_hal.h
··· 53 53 #define T3_MAX_PBL_SIZE 256 54 54 #define T3_MAX_RQ_SIZE 1024 55 55 #define T3_MAX_QP_DEPTH (T3_MAX_RQ_SIZE-1) 56 - #define T3_MAX_CQ_DEPTH 8192 56 + #define T3_MAX_CQ_DEPTH 262144 57 57 #define T3_MAX_NUM_STAG (1<<15) 58 58 #define T3_MAX_MR_SIZE 0x100000000ULL 59 59 #define T3_PAGESIZE_MASK 0xffff000 /* 4KB-128MB */ ··· 157 157 void cxio_rdev_close(struct cxio_rdev *rdev); 158 158 int cxio_hal_cq_op(struct cxio_rdev *rdev, struct t3_cq *cq, 159 159 enum t3_cq_opcode op, u32 credit); 160 - int cxio_create_cq(struct cxio_rdev *rdev, struct t3_cq *cq); 160 + int cxio_create_cq(struct cxio_rdev *rdev, struct t3_cq *cq, int kernel); 161 161 int cxio_destroy_cq(struct cxio_rdev *rdev, struct t3_cq *cq); 162 162 int cxio_resize_cq(struct cxio_rdev *rdev, struct t3_cq *cq); 163 163 void cxio_release_ucontext(struct cxio_rdev *rdev, struct cxio_ucontext *uctx);
+16 -1
drivers/infiniband/hw/cxgb3/cxio_wr.h
··· 730 730 731 731 static inline void cxio_set_wq_in_error(struct t3_wq *wq) 732 732 { 733 - wq->queue->wq_in_err.err = 1; 733 + wq->queue->wq_in_err.err |= 1; 734 + } 735 + 736 + static inline void cxio_disable_wq_db(struct t3_wq *wq) 737 + { 738 + wq->queue->wq_in_err.err |= 2; 739 + } 740 + 741 + static inline void cxio_enable_wq_db(struct t3_wq *wq) 742 + { 743 + wq->queue->wq_in_err.err &= ~2; 744 + } 745 + 746 + static inline int cxio_wq_db_enabled(struct t3_wq *wq) 747 + { 748 + return !(wq->queue->wq_in_err.err & 2); 734 749 } 735 750 736 751 static inline struct t3_cqe *cxio_next_hw_cqe(struct t3_cq *cq)
+76 -4
drivers/infiniband/hw/cxgb3/iwch.c
··· 65 65 static LIST_HEAD(dev_list); 66 66 static DEFINE_MUTEX(dev_mutex); 67 67 68 + static int disable_qp_db(int id, void *p, void *data) 69 + { 70 + struct iwch_qp *qhp = p; 71 + 72 + cxio_disable_wq_db(&qhp->wq); 73 + return 0; 74 + } 75 + 76 + static int enable_qp_db(int id, void *p, void *data) 77 + { 78 + struct iwch_qp *qhp = p; 79 + 80 + if (data) 81 + ring_doorbell(qhp->rhp->rdev.ctrl_qp.doorbell, qhp->wq.qpid); 82 + cxio_enable_wq_db(&qhp->wq); 83 + return 0; 84 + } 85 + 86 + static void disable_dbs(struct iwch_dev *rnicp) 87 + { 88 + spin_lock_irq(&rnicp->lock); 89 + idr_for_each(&rnicp->qpidr, disable_qp_db, NULL); 90 + spin_unlock_irq(&rnicp->lock); 91 + } 92 + 93 + static void enable_dbs(struct iwch_dev *rnicp, int ring_db) 94 + { 95 + spin_lock_irq(&rnicp->lock); 96 + idr_for_each(&rnicp->qpidr, enable_qp_db, 97 + (void *)(unsigned long)ring_db); 98 + spin_unlock_irq(&rnicp->lock); 99 + } 100 + 101 + static void iwch_db_drop_task(struct work_struct *work) 102 + { 103 + struct iwch_dev *rnicp = container_of(work, struct iwch_dev, 104 + db_drop_task.work); 105 + enable_dbs(rnicp, 1); 106 + } 107 + 68 108 static void rnic_init(struct iwch_dev *rnicp) 69 109 { 70 110 PDBG("%s iwch_dev %p\n", __func__, rnicp); ··· 112 72 idr_init(&rnicp->qpidr); 113 73 idr_init(&rnicp->mmidr); 114 74 spin_lock_init(&rnicp->lock); 75 + INIT_DELAYED_WORK(&rnicp->db_drop_task, iwch_db_drop_task); 115 76 116 77 rnicp->attr.max_qps = T3_MAX_NUM_QP - 32; 117 78 rnicp->attr.max_wrs = T3_MAX_QP_DEPTH; ··· 188 147 mutex_lock(&dev_mutex); 189 148 list_for_each_entry_safe(dev, tmp, &dev_list, entry) { 190 149 if (dev->rdev.t3cdev_p == tdev) { 150 + dev->rdev.flags = CXIO_ERROR_FATAL; 151 + cancel_delayed_work_sync(&dev->db_drop_task); 191 152 list_del(&dev->entry); 192 153 iwch_unregister_device(dev); 193 154 cxio_rdev_close(&dev->rdev); ··· 208 165 struct cxio_rdev *rdev = tdev->ulp; 209 166 struct iwch_dev *rnicp; 210 167 struct ib_event event; 211 - u32 portnum = port_id + 1; 168 + u32 portnum = port_id + 1; 169 + int dispatch = 0; 212 170 213 171 if (!rdev) 214 172 return; ··· 218 174 case OFFLOAD_STATUS_DOWN: { 219 175 rdev->flags = CXIO_ERROR_FATAL; 220 176 event.event = IB_EVENT_DEVICE_FATAL; 177 + dispatch = 1; 221 178 break; 222 179 } 223 180 case OFFLOAD_PORT_DOWN: { 224 181 event.event = IB_EVENT_PORT_ERR; 182 + dispatch = 1; 225 183 break; 226 184 } 227 185 case OFFLOAD_PORT_UP: { 228 186 event.event = IB_EVENT_PORT_ACTIVE; 187 + dispatch = 1; 188 + break; 189 + } 190 + case OFFLOAD_DB_FULL: { 191 + disable_dbs(rnicp); 192 + break; 193 + } 194 + case OFFLOAD_DB_EMPTY: { 195 + enable_dbs(rnicp, 1); 196 + break; 197 + } 198 + case OFFLOAD_DB_DROP: { 199 + unsigned long delay = 1000; 200 + unsigned short r; 201 + 202 + disable_dbs(rnicp); 203 + get_random_bytes(&r, 2); 204 + delay += r & 1023; 205 + 206 + /* 207 + * delay is between 1000-2023 usecs. 208 + */ 209 + schedule_delayed_work(&rnicp->db_drop_task, 210 + usecs_to_jiffies(delay)); 229 211 break; 230 212 } 231 213 } 232 214 233 - event.device = &rnicp->ibdev; 234 - event.element.port_num = portnum; 235 - ib_dispatch_event(&event); 215 + if (dispatch) { 216 + event.device = &rnicp->ibdev; 217 + event.element.port_num = portnum; 218 + ib_dispatch_event(&event); 219 + } 236 220 237 221 return; 238 222 }
+2
drivers/infiniband/hw/cxgb3/iwch.h
··· 36 36 #include <linux/list.h> 37 37 #include <linux/spinlock.h> 38 38 #include <linux/idr.h> 39 + #include <linux/workqueue.h> 39 40 40 41 #include <rdma/ib_verbs.h> 41 42 ··· 111 110 struct idr mmidr; 112 111 spinlock_t lock; 113 112 struct list_head entry; 113 + struct delayed_work db_drop_task; 114 114 }; 115 115 116 116 static inline struct iwch_dev *to_iwch_dev(struct ib_device *ibdev)
+1 -1
drivers/infiniband/hw/cxgb3/iwch_provider.c
··· 187 187 entries = roundup_pow_of_two(entries); 188 188 chp->cq.size_log2 = ilog2(entries); 189 189 190 - if (cxio_create_cq(&rhp->rdev, &chp->cq)) { 190 + if (cxio_create_cq(&rhp->rdev, &chp->cq, !ucontext)) { 191 191 kfree(chp); 192 192 return ERR_PTR(-ENOMEM); 193 193 }
+6 -3
drivers/infiniband/hw/cxgb3/iwch_qp.c
··· 452 452 ++(qhp->wq.sq_wptr); 453 453 } 454 454 spin_unlock_irqrestore(&qhp->lock, flag); 455 - ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid); 455 + if (cxio_wq_db_enabled(&qhp->wq)) 456 + ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid); 456 457 457 458 out: 458 459 if (err) ··· 515 514 num_wrs--; 516 515 } 517 516 spin_unlock_irqrestore(&qhp->lock, flag); 518 - ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid); 517 + if (cxio_wq_db_enabled(&qhp->wq)) 518 + ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid); 519 519 520 520 out: 521 521 if (err) ··· 599 597 ++(qhp->wq.sq_wptr); 600 598 spin_unlock_irqrestore(&qhp->lock, flag); 601 599 602 - ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid); 600 + if (cxio_wq_db_enabled(&qhp->wq)) 601 + ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid); 603 602 604 603 return err; 605 604 }
+2 -3
drivers/infiniband/hw/ehca/ehca_irq.c
··· 548 548 struct ehca_eq *eq = &shca->eq; 549 549 struct ehca_eqe_cache_entry *eqe_cache = eq->eqe_cache; 550 550 u64 eqe_value, ret; 551 - unsigned long flags; 552 551 int eqe_cnt, i; 553 552 int eq_empty = 0; 554 553 555 - spin_lock_irqsave(&eq->irq_spinlock, flags); 554 + spin_lock(&eq->irq_spinlock); 556 555 if (is_irq) { 557 556 const int max_query_cnt = 100; 558 557 int query_cnt = 0; ··· 642 643 } while (1); 643 644 644 645 unlock_irq_spinlock: 645 - spin_unlock_irqrestore(&eq->irq_spinlock, flags); 646 + spin_unlock(&eq->irq_spinlock); 646 647 } 647 648 648 649 void ehca_tasklet_eq(unsigned long data)
+1 -3
drivers/infiniband/hw/ehca/ehca_qp.c
··· 55 55 /* 56 56 * attributes not supported by query qp 57 57 */ 58 - #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_MAX_DEST_RD_ATOMIC | \ 59 - IB_QP_MAX_QP_RD_ATOMIC | \ 60 - IB_QP_ACCESS_FLAGS | \ 58 + #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_ACCESS_FLAGS | \ 61 59 IB_QP_EN_SQD_ASYNC_NOTIFY) 62 60 63 61 /*
+1 -1
drivers/infiniband/hw/ehca/ehca_sqp.c
··· 222 222 { 223 223 int ret; 224 224 225 - if (!port_num || port_num > ibdev->phys_port_cnt) 225 + if (!port_num || port_num > ibdev->phys_port_cnt || !in_wc) 226 226 return IB_MAD_RESULT_FAILURE; 227 227 228 228 /* accept only pma request */
+1 -2
drivers/infiniband/hw/ipath/ipath_user_pages.c
··· 59 59 size_t got; 60 60 int ret; 61 61 62 - lock_limit = current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur >> 63 - PAGE_SHIFT; 62 + lock_limit = rlimit(RLIMIT_MEMLOCK) >> PAGE_SHIFT; 64 63 65 64 if (num_pages > lock_limit) { 66 65 ret = -ENOMEM;
+2 -2
drivers/infiniband/hw/mlx4/qp.c
··· 1214 1214 static int build_mlx_header(struct mlx4_ib_sqp *sqp, struct ib_send_wr *wr, 1215 1215 void *wqe, unsigned *mlx_seg_len) 1216 1216 { 1217 - struct ib_device *ib_dev = &to_mdev(sqp->qp.ibqp.device)->ib_dev; 1217 + struct ib_device *ib_dev = sqp->qp.ibqp.device; 1218 1218 struct mlx4_wqe_mlx_seg *mlx = wqe; 1219 1219 struct mlx4_wqe_inline_seg *inl = wqe + sizeof *mlx; 1220 1220 struct mlx4_ib_ah *ah = to_mah(wr->wr.ud.ah); ··· 1228 1228 for (i = 0; i < wr->num_sge; ++i) 1229 1229 send_size += wr->sg_list[i].length; 1230 1230 1231 - ib_ud_header_init(send_size, mlx4_ib_ah_grh_present(ah), &sqp->ud_header); 1231 + ib_ud_header_init(send_size, mlx4_ib_ah_grh_present(ah), 0, &sqp->ud_header); 1232 1232 1233 1233 sqp->ud_header.lrh.service_level = 1234 1234 be32_to_cpu(ah->av.sl_tclass_flowlabel) >> 28;
+1 -1
drivers/infiniband/hw/mthca/mthca_qp.c
··· 1494 1494 u16 pkey; 1495 1495 1496 1496 ib_ud_header_init(256, /* assume a MAD */ 1497 - mthca_ah_grh_present(to_mah(wr->wr.ud.ah)), 1497 + mthca_ah_grh_present(to_mah(wr->wr.ud.ah)), 0, 1498 1498 &sqp->ud_header); 1499 1499 1500 1500 err = mthca_read_ah(dev, to_mah(wr->wr.ud.ah), &sqp->ud_header);
+1
drivers/infiniband/hw/nes/nes.c
··· 110 110 111 111 static struct pci_device_id nes_pci_table[] = { 112 112 {PCI_VENDOR_ID_NETEFFECT, PCI_DEVICE_ID_NETEFFECT_NE020, PCI_ANY_ID, PCI_ANY_ID}, 113 + {PCI_VENDOR_ID_NETEFFECT, PCI_DEVICE_ID_NETEFFECT_NE020_KR, PCI_ANY_ID, PCI_ANY_ID}, 113 114 {0} 114 115 }; 115 116
+5 -4
drivers/infiniband/hw/nes/nes.h
··· 64 64 * NetEffect PCI vendor id and NE010 PCI device id. 65 65 */ 66 66 #ifndef PCI_VENDOR_ID_NETEFFECT /* not in pci.ids yet */ 67 - #define PCI_VENDOR_ID_NETEFFECT 0x1678 68 - #define PCI_DEVICE_ID_NETEFFECT_NE020 0x0100 67 + #define PCI_VENDOR_ID_NETEFFECT 0x1678 68 + #define PCI_DEVICE_ID_NETEFFECT_NE020 0x0100 69 + #define PCI_DEVICE_ID_NETEFFECT_NE020_KR 0x0110 69 70 #endif 70 71 71 72 #define NE020_REV 4 ··· 194 193 extern u32 cm_packets_received; 195 194 extern u32 cm_packets_dropped; 196 195 extern u32 cm_packets_retrans; 197 - extern u32 cm_listens_created; 198 - extern u32 cm_listens_destroyed; 196 + extern atomic_t cm_listens_created; 197 + extern atomic_t cm_listens_destroyed; 199 198 extern u32 cm_backlog_drops; 200 199 extern atomic_t cm_loopbacks; 201 200 extern atomic_t cm_nodes_created;
+6 -5
drivers/infiniband/hw/nes/nes_cm.c
··· 67 67 u32 cm_packets_retrans; 68 68 u32 cm_packets_created; 69 69 u32 cm_packets_received; 70 - u32 cm_listens_created; 71 - u32 cm_listens_destroyed; 70 + atomic_t cm_listens_created; 71 + atomic_t cm_listens_destroyed; 72 72 u32 cm_backlog_drops; 73 73 atomic_t cm_loopbacks; 74 74 atomic_t cm_nodes_created; ··· 1011 1011 event.cm_info.loc_port = 1012 1012 loopback->loc_port; 1013 1013 event.cm_info.cm_id = loopback->cm_id; 1014 + add_ref_cm_node(loopback); 1015 + loopback->state = NES_CM_STATE_CLOSED; 1014 1016 cm_event_connect_error(&event); 1015 1017 cm_node->state = NES_CM_STATE_LISTENER_DESTROYED; 1016 - loopback->state = NES_CM_STATE_CLOSED; 1017 1018 1018 1019 rem_ref_cm_node(cm_node->cm_core, 1019 1020 cm_node); ··· 1043 1042 kfree(listener); 1044 1043 listener = NULL; 1045 1044 ret = 0; 1046 - cm_listens_destroyed++; 1045 + atomic_inc(&cm_listens_destroyed); 1047 1046 } else { 1048 1047 spin_unlock_irqrestore(&cm_core->listen_list_lock, flags); 1049 1048 } ··· 3173 3172 g_cm_core->api->stop_listener(g_cm_core, (void *)cm_node); 3174 3173 return err; 3175 3174 } 3176 - cm_listens_created++; 3175 + atomic_inc(&cm_listens_created); 3177 3176 } 3178 3177 3179 3178 cm_id->add_ref(cm_id);
+265 -231
drivers/infiniband/hw/nes/nes_hw.c
··· 748 748 749 749 if (hw_rev != NE020_REV) { 750 750 /* init serdes 0 */ 751 - if (wide_ppm_offset && (nesadapter->phy_type[0] == NES_PHY_TYPE_CX4)) 752 - nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL0, 0x000FFFAA); 753 - else 751 + switch (nesadapter->phy_type[0]) { 752 + case NES_PHY_TYPE_CX4: 753 + if (wide_ppm_offset) 754 + nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL0, 0x000FFFAA); 755 + else 756 + nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL0, 0x000000FF); 757 + break; 758 + case NES_PHY_TYPE_KR: 754 759 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL0, 0x000000FF); 755 - 756 - if (nesadapter->phy_type[0] == NES_PHY_TYPE_PUMA_1G) { 760 + nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_EMP0, 0x00000000); 761 + break; 762 + case NES_PHY_TYPE_PUMA_1G: 763 + nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL0, 0x000000FF); 757 764 sds = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0); 758 765 sds |= 0x00000100; 759 766 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, sds); 767 + break; 768 + default: 769 + nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL0, 0x000000FF); 770 + break; 760 771 } 772 + 761 773 if (!OneG_Mode) 762 774 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_HIGHZ_LANE_MODE0, 0x11110000); 763 775 ··· 789 777 case NES_PHY_TYPE_CX4: 790 778 if (wide_ppm_offset) 791 779 nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL1, 0x000FFFAA); 780 + break; 781 + case NES_PHY_TYPE_KR: 782 + nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_EMP1, 0x00000000); 792 783 break; 793 784 case NES_PHY_TYPE_PUMA_1G: 794 785 sds = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL1); ··· 1294 1279 1295 1280 1296 1281 /** 1297 - * nes_init_phy 1282 + * nes_init_1g_phy 1298 1283 */ 1299 - int nes_init_phy(struct nes_device *nesdev) 1284 + int nes_init_1g_phy(struct nes_device *nesdev, u8 phy_type, u8 phy_index) 1300 1285 { 1301 - struct nes_adapter *nesadapter = nesdev->nesadapter; 1286 + u32 counter = 0; 1287 + u16 phy_data; 1288 + int ret = 0; 1289 + 1290 + nes_read_1G_phy_reg(nesdev, 1, phy_index, &phy_data); 1291 + nes_write_1G_phy_reg(nesdev, 23, phy_index, 0xb000); 1292 + 1293 + /* Reset the PHY */ 1294 + nes_write_1G_phy_reg(nesdev, 0, phy_index, 0x8000); 1295 + udelay(100); 1296 + counter = 0; 1297 + do { 1298 + nes_read_1G_phy_reg(nesdev, 0, phy_index, &phy_data); 1299 + if (counter++ > 100) { 1300 + ret = -1; 1301 + break; 1302 + } 1303 + } while (phy_data & 0x8000); 1304 + 1305 + /* Setting no phy loopback */ 1306 + phy_data &= 0xbfff; 1307 + phy_data |= 0x1140; 1308 + nes_write_1G_phy_reg(nesdev, 0, phy_index, phy_data); 1309 + nes_read_1G_phy_reg(nesdev, 0, phy_index, &phy_data); 1310 + nes_read_1G_phy_reg(nesdev, 0x17, phy_index, &phy_data); 1311 + nes_read_1G_phy_reg(nesdev, 0x1e, phy_index, &phy_data); 1312 + 1313 + /* Setting the interrupt mask */ 1314 + nes_read_1G_phy_reg(nesdev, 0x19, phy_index, &phy_data); 1315 + nes_write_1G_phy_reg(nesdev, 0x19, phy_index, 0xffee); 1316 + nes_read_1G_phy_reg(nesdev, 0x19, phy_index, &phy_data); 1317 + 1318 + /* turning on flow control */ 1319 + nes_read_1G_phy_reg(nesdev, 4, phy_index, &phy_data); 1320 + nes_write_1G_phy_reg(nesdev, 4, phy_index, (phy_data & ~(0x03E0)) | 0xc00); 1321 + nes_read_1G_phy_reg(nesdev, 4, phy_index, &phy_data); 1322 + 1323 + /* Clear Half duplex */ 1324 + nes_read_1G_phy_reg(nesdev, 9, phy_index, &phy_data); 1325 + nes_write_1G_phy_reg(nesdev, 9, phy_index, phy_data & ~(0x0100)); 1326 + nes_read_1G_phy_reg(nesdev, 9, phy_index, &phy_data); 1327 + 1328 + nes_read_1G_phy_reg(nesdev, 0, phy_index, &phy_data); 1329 + nes_write_1G_phy_reg(nesdev, 0, phy_index, phy_data | 0x0300); 1330 + 1331 + return ret; 1332 + } 1333 + 1334 + 1335 + /** 1336 + * nes_init_2025_phy 1337 + */ 1338 + int nes_init_2025_phy(struct nes_device *nesdev, u8 phy_type, u8 phy_index) 1339 + { 1340 + u32 temp_phy_data = 0; 1341 + u32 temp_phy_data2 = 0; 1302 1342 u32 counter = 0; 1303 1343 u32 sds; 1304 1344 u32 mac_index = nesdev->mac_index; 1305 - u32 tx_config = 0; 1306 - u16 phy_data; 1307 - u32 temp_phy_data = 0; 1308 - u32 temp_phy_data2 = 0; 1309 - u8 phy_type = nesadapter->phy_type[mac_index]; 1310 - u8 phy_index = nesadapter->phy_index[mac_index]; 1345 + int ret = 0; 1346 + unsigned int first_attempt = 1; 1311 1347 1312 - if ((nesadapter->OneG_Mode) && 1313 - (phy_type != NES_PHY_TYPE_PUMA_1G)) { 1314 - nes_debug(NES_DBG_PHY, "1G PHY, mac_index = %d.\n", mac_index); 1315 - if (phy_type == NES_PHY_TYPE_1G) { 1316 - tx_config = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONFIG); 1317 - tx_config &= 0xFFFFFFE3; 1318 - tx_config |= 0x04; 1319 - nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, tx_config); 1320 - } 1348 + /* Check firmware heartbeat */ 1349 + nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7ee); 1350 + temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 1351 + udelay(1500); 1352 + nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7ee); 1353 + temp_phy_data2 = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 1321 1354 1322 - nes_read_1G_phy_reg(nesdev, 1, phy_index, &phy_data); 1323 - nes_write_1G_phy_reg(nesdev, 23, phy_index, 0xb000); 1324 - 1325 - /* Reset the PHY */ 1326 - nes_write_1G_phy_reg(nesdev, 0, phy_index, 0x8000); 1327 - udelay(100); 1328 - counter = 0; 1329 - do { 1330 - nes_read_1G_phy_reg(nesdev, 0, phy_index, &phy_data); 1331 - if (counter++ > 100) 1332 - break; 1333 - } while (phy_data & 0x8000); 1334 - 1335 - /* Setting no phy loopback */ 1336 - phy_data &= 0xbfff; 1337 - phy_data |= 0x1140; 1338 - nes_write_1G_phy_reg(nesdev, 0, phy_index, phy_data); 1339 - nes_read_1G_phy_reg(nesdev, 0, phy_index, &phy_data); 1340 - nes_read_1G_phy_reg(nesdev, 0x17, phy_index, &phy_data); 1341 - nes_read_1G_phy_reg(nesdev, 0x1e, phy_index, &phy_data); 1342 - 1343 - /* Setting the interrupt mask */ 1344 - nes_read_1G_phy_reg(nesdev, 0x19, phy_index, &phy_data); 1345 - nes_write_1G_phy_reg(nesdev, 0x19, phy_index, 0xffee); 1346 - nes_read_1G_phy_reg(nesdev, 0x19, phy_index, &phy_data); 1347 - 1348 - /* turning on flow control */ 1349 - nes_read_1G_phy_reg(nesdev, 4, phy_index, &phy_data); 1350 - nes_write_1G_phy_reg(nesdev, 4, phy_index, (phy_data & ~(0x03E0)) | 0xc00); 1351 - nes_read_1G_phy_reg(nesdev, 4, phy_index, &phy_data); 1352 - 1353 - /* Clear Half duplex */ 1354 - nes_read_1G_phy_reg(nesdev, 9, phy_index, &phy_data); 1355 - nes_write_1G_phy_reg(nesdev, 9, phy_index, phy_data & ~(0x0100)); 1356 - nes_read_1G_phy_reg(nesdev, 9, phy_index, &phy_data); 1357 - 1358 - nes_read_1G_phy_reg(nesdev, 0, phy_index, &phy_data); 1359 - nes_write_1G_phy_reg(nesdev, 0, phy_index, phy_data | 0x0300); 1360 - 1361 - return 0; 1362 - } 1363 - 1364 - if ((phy_type == NES_PHY_TYPE_IRIS) || 1365 - (phy_type == NES_PHY_TYPE_ARGUS) || 1366 - (phy_type == NES_PHY_TYPE_SFP_D)) { 1367 - /* setup 10G MDIO operation */ 1368 - tx_config = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONFIG); 1369 - tx_config &= 0xFFFFFFE3; 1370 - tx_config |= 0x15; 1371 - nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, tx_config); 1372 - } 1373 - if ((phy_type == NES_PHY_TYPE_ARGUS) || 1374 - (phy_type == NES_PHY_TYPE_SFP_D)) { 1375 - u32 first_time = 1; 1376 - 1377 - /* Check firmware heartbeat */ 1378 - nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7ee); 1355 + if (temp_phy_data != temp_phy_data2) { 1356 + nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7fd); 1379 1357 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 1380 - udelay(1500); 1381 - nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7ee); 1382 - temp_phy_data2 = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 1358 + if ((temp_phy_data & 0xff) > 0x20) 1359 + return 0; 1360 + printk(PFX "Reinitialize external PHY\n"); 1361 + } 1383 1362 1384 - if (temp_phy_data != temp_phy_data2) { 1385 - nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7fd); 1386 - temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 1387 - if ((temp_phy_data & 0xff) > 0x20) 1388 - return 0; 1389 - printk(PFX "Reinitializing PHY\n"); 1390 - } 1363 + /* no heartbeat, configure the PHY */ 1364 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0x0000, 0x8000); 1365 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc300, 0x0000); 1366 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc316, 0x000A); 1367 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc318, 0x0052); 1391 1368 1392 - /* no heartbeat, configure the PHY */ 1393 - nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0x0000, 0x8000); 1394 - nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc300, 0x0000); 1369 + switch (phy_type) { 1370 + case NES_PHY_TYPE_ARGUS: 1395 1371 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc316, 0x000A); 1396 1372 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc318, 0x0052); 1397 - if (phy_type == NES_PHY_TYPE_ARGUS) { 1398 - nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc302, 0x000C); 1399 - nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc319, 0x0008); 1400 - nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0027, 0x0001); 1401 - } else { 1402 - nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc302, 0x0004); 1403 - nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc319, 0x0038); 1404 - nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0027, 0x0013); 1405 - } 1373 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc302, 0x000C); 1374 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc319, 0x0008); 1375 + nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0027, 0x0001); 1406 1376 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc31a, 0x0098); 1407 1377 nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0026, 0x0E00); 1408 1378 ··· 1395 1395 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xd006, 0x0007); 1396 1396 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xd007, 0x000A); 1397 1397 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xd008, 0x0009); 1398 + break; 1398 1399 1399 - nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0028, 0xA528); 1400 + case NES_PHY_TYPE_SFP_D: 1401 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc316, 0x000A); 1402 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc318, 0x0052); 1403 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc302, 0x0004); 1404 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc319, 0x0038); 1405 + nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0027, 0x0013); 1406 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc31a, 0x0098); 1407 + nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0026, 0x0E00); 1400 1408 1401 - /* Bring PHY out of reset */ 1402 - nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc300, 0x0002); 1409 + /* setup LEDs */ 1410 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xd006, 0x0007); 1411 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xd007, 0x000A); 1412 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xd008, 0x0009); 1413 + break; 1403 1414 1404 - /* Check for heartbeat */ 1405 - counter = 0; 1406 - mdelay(690); 1415 + case NES_PHY_TYPE_KR: 1416 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc316, 0x000A); 1417 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc318, 0x0052); 1418 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc302, 0x000C); 1419 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc319, 0x0010); 1420 + nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0027, 0x0013); 1421 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc31a, 0x0080); 1422 + nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0026, 0x0E00); 1423 + 1424 + /* setup LEDs */ 1425 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xd006, 0x000B); 1426 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xd007, 0x0003); 1427 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xd008, 0x0004); 1428 + 1429 + nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0022, 0x406D); 1430 + nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0023, 0x0020); 1431 + break; 1432 + } 1433 + 1434 + nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0028, 0xA528); 1435 + 1436 + /* Bring PHY out of reset */ 1437 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc300, 0x0002); 1438 + 1439 + /* Check for heartbeat */ 1440 + counter = 0; 1441 + mdelay(690); 1442 + nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7ee); 1443 + temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 1444 + do { 1445 + if (counter++ > 150) { 1446 + printk(PFX "No PHY heartbeat\n"); 1447 + break; 1448 + } 1449 + mdelay(1); 1407 1450 nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7ee); 1451 + temp_phy_data2 = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 1452 + } while ((temp_phy_data2 == temp_phy_data)); 1453 + 1454 + /* wait for tracking */ 1455 + counter = 0; 1456 + do { 1457 + nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7fd); 1408 1458 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 1409 - do { 1410 - if (counter++ > 150) { 1411 - printk(PFX "No PHY heartbeat\n"); 1459 + if (counter++ > 300) { 1460 + if (((temp_phy_data & 0xff) == 0x0) && first_attempt) { 1461 + first_attempt = 0; 1462 + counter = 0; 1463 + /* reset AMCC PHY and try again */ 1464 + nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0xe854, 0x00c0); 1465 + nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0xe854, 0x0040); 1466 + continue; 1467 + } else { 1468 + ret = 1; 1412 1469 break; 1413 1470 } 1414 - mdelay(1); 1415 - nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7ee); 1416 - temp_phy_data2 = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 1417 - } while ((temp_phy_data2 == temp_phy_data)); 1471 + } 1472 + mdelay(10); 1473 + } while ((temp_phy_data & 0xff) < 0x30); 1418 1474 1419 - /* wait for tracking */ 1420 - counter = 0; 1421 - do { 1422 - nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7fd); 1423 - temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 1424 - if (counter++ > 300) { 1425 - if (((temp_phy_data & 0xff) == 0x0) && first_time) { 1426 - first_time = 0; 1427 - counter = 0; 1428 - /* reset AMCC PHY and try again */ 1429 - nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0xe854, 0x00c0); 1430 - nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0xe854, 0x0040); 1431 - continue; 1432 - } else { 1433 - printk(PFX "PHY did not track\n"); 1434 - break; 1435 - } 1436 - } 1437 - mdelay(10); 1438 - } while ((temp_phy_data & 0xff) < 0x30); 1439 - 1440 - /* setup signal integrity */ 1441 - nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xd003, 0x0000); 1442 - nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xF00D, 0x00FE); 1443 - nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xF00E, 0x0032); 1475 + /* setup signal integrity */ 1476 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xd003, 0x0000); 1477 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xF00D, 0x00FE); 1478 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xF00E, 0x0032); 1479 + if (phy_type == NES_PHY_TYPE_KR) { 1480 + nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xF00F, 0x000C); 1481 + } else { 1444 1482 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xF00F, 0x0002); 1445 1483 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc314, 0x0063); 1446 - 1447 - /* reset serdes */ 1448 - sds = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0 + 1449 - mac_index * 0x200); 1450 - sds |= 0x1; 1451 - nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0 + 1452 - mac_index * 0x200, sds); 1453 - sds &= 0xfffffffe; 1454 - nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0 + 1455 - mac_index * 0x200, sds); 1456 - 1457 - counter = 0; 1458 - while (((nes_read32(nesdev->regs + NES_SOFTWARE_RESET) & 0x00000040) != 0x00000040) 1459 - && (counter++ < 5000)) 1460 - ; 1461 1484 } 1462 - return 0; 1485 + 1486 + /* reset serdes */ 1487 + sds = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0 + mac_index * 0x200); 1488 + sds |= 0x1; 1489 + nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0 + mac_index * 0x200, sds); 1490 + sds &= 0xfffffffe; 1491 + nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0 + mac_index * 0x200, sds); 1492 + 1493 + counter = 0; 1494 + while (((nes_read32(nesdev->regs + NES_SOFTWARE_RESET) & 0x00000040) != 0x00000040) 1495 + && (counter++ < 5000)) 1496 + ; 1497 + 1498 + return ret; 1499 + } 1500 + 1501 + 1502 + /** 1503 + * nes_init_phy 1504 + */ 1505 + int nes_init_phy(struct nes_device *nesdev) 1506 + { 1507 + struct nes_adapter *nesadapter = nesdev->nesadapter; 1508 + u32 mac_index = nesdev->mac_index; 1509 + u32 tx_config = 0; 1510 + unsigned long flags; 1511 + u8 phy_type = nesadapter->phy_type[mac_index]; 1512 + u8 phy_index = nesadapter->phy_index[mac_index]; 1513 + int ret = 0; 1514 + 1515 + tx_config = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONFIG); 1516 + if (phy_type == NES_PHY_TYPE_1G) { 1517 + /* setup 1G MDIO operation */ 1518 + tx_config &= 0xFFFFFFE3; 1519 + tx_config |= 0x04; 1520 + } else { 1521 + /* setup 10G MDIO operation */ 1522 + tx_config &= 0xFFFFFFE3; 1523 + tx_config |= 0x15; 1524 + } 1525 + nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, tx_config); 1526 + 1527 + spin_lock_irqsave(&nesdev->nesadapter->phy_lock, flags); 1528 + 1529 + switch (phy_type) { 1530 + case NES_PHY_TYPE_1G: 1531 + ret = nes_init_1g_phy(nesdev, phy_type, phy_index); 1532 + break; 1533 + case NES_PHY_TYPE_ARGUS: 1534 + case NES_PHY_TYPE_SFP_D: 1535 + case NES_PHY_TYPE_KR: 1536 + ret = nes_init_2025_phy(nesdev, phy_type, phy_index); 1537 + break; 1538 + } 1539 + 1540 + spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags); 1541 + 1542 + return ret; 1463 1543 } 1464 1544 1465 1545 ··· 2540 2460 } 2541 2461 } else { 2542 2462 switch (nesadapter->phy_type[mac_index]) { 2543 - case NES_PHY_TYPE_IRIS: 2544 - nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 1, 1); 2545 - temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 2546 - u32temp = 20; 2547 - do { 2548 - nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 1, 1); 2549 - phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 2550 - if ((phy_data == temp_phy_data) || (!(--u32temp))) 2551 - break; 2552 - temp_phy_data = phy_data; 2553 - } while (1); 2554 - nes_debug(NES_DBG_PHY, "%s: Phy data = 0x%04X, link was %s.\n", 2555 - __func__, phy_data, nesadapter->mac_link_down[mac_index] ? "DOWN" : "UP"); 2556 - break; 2557 - 2558 2463 case NES_PHY_TYPE_ARGUS: 2559 2464 case NES_PHY_TYPE_SFP_D: 2465 + case NES_PHY_TYPE_KR: 2560 2466 /* clear the alarms */ 2561 2467 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 4, 0x0008); 2562 2468 nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 4, 0xc001); ··· 3418 3352 u16 async_event_id; 3419 3353 u8 tcp_state; 3420 3354 u8 iwarp_state; 3421 - int must_disconn = 1; 3422 - int must_terminate = 0; 3423 3355 struct ib_event ibevent; 3424 3356 3425 3357 nes_debug(NES_DBG_AEQ, "\n"); ··· 3431 3367 BUG_ON(!context); 3432 3368 } 3433 3369 3370 + /* context is nesqp unless async_event_id == CQ ERROR */ 3371 + nesqp = (struct nes_qp *)(unsigned long)context; 3434 3372 async_event_id = (u16)aeq_info; 3435 3373 tcp_state = (aeq_info & NES_AEQE_TCP_STATE_MASK) >> NES_AEQE_TCP_STATE_SHIFT; 3436 3374 iwarp_state = (aeq_info & NES_AEQE_IWARP_STATE_MASK) >> NES_AEQE_IWARP_STATE_SHIFT; ··· 3444 3378 3445 3379 switch (async_event_id) { 3446 3380 case NES_AEQE_AEID_LLP_FIN_RECEIVED: 3447 - nesqp = (struct nes_qp *)(unsigned long)context; 3448 - 3449 3381 if (nesqp->term_flags) 3450 3382 return; /* Ignore it, wait for close complete */ 3451 3383 ··· 3458 3394 async_event_id, nesqp->last_aeq, tcp_state); 3459 3395 } 3460 3396 3461 - if ((tcp_state != NES_AEQE_TCP_STATE_CLOSE_WAIT) || 3462 - (nesqp->ibqp_state != IB_QPS_RTS)) { 3463 - /* FIN Received but tcp state or IB state moved on, 3464 - should expect a close complete */ 3465 - return; 3466 - } 3467 - 3397 + break; 3468 3398 case NES_AEQE_AEID_LLP_CLOSE_COMPLETE: 3469 - nesqp = (struct nes_qp *)(unsigned long)context; 3470 3399 if (nesqp->term_flags) { 3471 3400 nes_terminate_done(nesqp, 0); 3472 3401 return; 3473 3402 } 3403 + spin_lock_irqsave(&nesqp->lock, flags); 3404 + nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_CLOSING; 3405 + spin_unlock_irqrestore(&nesqp->lock, flags); 3406 + nes_hw_modify_qp(nesdev, nesqp, NES_CQP_QP_IWARP_STATE_CLOSING, 0, 0); 3407 + nes_cm_disconn(nesqp); 3408 + break; 3474 3409 3475 - case NES_AEQE_AEID_LLP_CONNECTION_RESET: 3476 3410 case NES_AEQE_AEID_RESET_SENT: 3477 - nesqp = (struct nes_qp *)(unsigned long)context; 3478 - if (async_event_id == NES_AEQE_AEID_RESET_SENT) { 3479 - tcp_state = NES_AEQE_TCP_STATE_CLOSED; 3480 - } 3411 + tcp_state = NES_AEQE_TCP_STATE_CLOSED; 3481 3412 spin_lock_irqsave(&nesqp->lock, flags); 3482 3413 nesqp->hw_iwarp_state = iwarp_state; 3483 3414 nesqp->hw_tcp_state = tcp_state; 3484 3415 nesqp->last_aeq = async_event_id; 3485 - 3486 - if ((tcp_state == NES_AEQE_TCP_STATE_CLOSED) || 3487 - (tcp_state == NES_AEQE_TCP_STATE_TIME_WAIT)) { 3488 - nesqp->hte_added = 0; 3489 - next_iwarp_state = NES_CQP_QP_IWARP_STATE_ERROR | NES_CQP_QP_DEL_HTE; 3490 - } 3491 - 3492 - if ((nesqp->ibqp_state == IB_QPS_RTS) && 3493 - ((tcp_state == NES_AEQE_TCP_STATE_CLOSE_WAIT) || 3494 - (async_event_id == NES_AEQE_AEID_LLP_CONNECTION_RESET))) { 3495 - switch (nesqp->hw_iwarp_state) { 3496 - case NES_AEQE_IWARP_STATE_RTS: 3497 - next_iwarp_state = NES_CQP_QP_IWARP_STATE_CLOSING; 3498 - nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_CLOSING; 3499 - break; 3500 - case NES_AEQE_IWARP_STATE_TERMINATE: 3501 - must_disconn = 0; /* terminate path takes care of disconn */ 3502 - if (nesqp->term_flags == 0) 3503 - must_terminate = 1; 3504 - break; 3505 - } 3506 - } else { 3507 - if (async_event_id == NES_AEQE_AEID_LLP_FIN_RECEIVED) { 3508 - /* FIN Received but ib state not RTS, 3509 - close complete will be on its way */ 3510 - must_disconn = 0; 3511 - } 3512 - } 3416 + nesqp->hte_added = 0; 3513 3417 spin_unlock_irqrestore(&nesqp->lock, flags); 3418 + next_iwarp_state = NES_CQP_QP_IWARP_STATE_ERROR | NES_CQP_QP_DEL_HTE; 3419 + nes_hw_modify_qp(nesdev, nesqp, next_iwarp_state, 0, 0); 3420 + nes_cm_disconn(nesqp); 3421 + break; 3514 3422 3515 - if (must_terminate) 3516 - nes_terminate_connection(nesdev, nesqp, aeqe, IB_EVENT_QP_FATAL); 3517 - else if (must_disconn) { 3518 - if (next_iwarp_state) { 3519 - nes_debug(NES_DBG_AEQ, "issuing hw modifyqp for QP%u. next state = 0x%08X\n", 3520 - nesqp->hwqp.qp_id, next_iwarp_state); 3521 - nes_hw_modify_qp(nesdev, nesqp, next_iwarp_state, 0, 0); 3522 - } 3523 - nes_cm_disconn(nesqp); 3524 - } 3423 + case NES_AEQE_AEID_LLP_CONNECTION_RESET: 3424 + if (atomic_read(&nesqp->close_timer_started)) 3425 + return; 3426 + spin_lock_irqsave(&nesqp->lock, flags); 3427 + nesqp->hw_iwarp_state = iwarp_state; 3428 + nesqp->hw_tcp_state = tcp_state; 3429 + nesqp->last_aeq = async_event_id; 3430 + spin_unlock_irqrestore(&nesqp->lock, flags); 3431 + nes_cm_disconn(nesqp); 3525 3432 break; 3526 3433 3527 3434 case NES_AEQE_AEID_TERMINATE_SENT: 3528 - nesqp = (struct nes_qp *)(unsigned long)context; 3529 3435 nes_terminate_send_fin(nesdev, nesqp, aeqe); 3530 3436 break; 3531 3437 3532 3438 case NES_AEQE_AEID_LLP_TERMINATE_RECEIVED: 3533 - nesqp = (struct nes_qp *)(unsigned long)context; 3534 3439 nes_terminate_received(nesdev, nesqp, aeqe); 3535 3440 break; 3536 3441 ··· 3513 3480 case NES_AEQE_AEID_DDP_UBE_DDP_MESSAGE_TOO_LONG_FOR_AVAILABLE_BUFFER: 3514 3481 case NES_AEQE_AEID_AMP_BOUNDS_VIOLATION: 3515 3482 case NES_AEQE_AEID_AMP_TO_WRAP: 3516 - nesqp = (struct nes_qp *)(unsigned long)context; 3483 + printk(KERN_ERR PFX "QP[%u] async_event_id=0x%04X IB_EVENT_QP_ACCESS_ERR\n", 3484 + nesqp->hwqp.qp_id, async_event_id); 3517 3485 nes_terminate_connection(nesdev, nesqp, aeqe, IB_EVENT_QP_ACCESS_ERR); 3518 3486 break; 3519 3487 ··· 3522 3488 case NES_AEQE_AEID_LLP_SEGMENT_TOO_SMALL: 3523 3489 case NES_AEQE_AEID_DDP_UBE_INVALID_MO: 3524 3490 case NES_AEQE_AEID_DDP_UBE_INVALID_QN: 3525 - nesqp = (struct nes_qp *)(unsigned long)context; 3526 3491 if (iwarp_opcode(nesqp, aeq_info) > IWARP_OPCODE_TERM) { 3527 3492 aeq_info &= 0xffff0000; 3528 3493 aeq_info |= NES_AEQE_AEID_RDMAP_ROE_UNEXPECTED_OPCODE; ··· 3563 3530 case NES_AEQE_AEID_STAG_ZERO_INVALID: 3564 3531 case NES_AEQE_AEID_ROE_INVALID_RDMA_READ_REQUEST: 3565 3532 case NES_AEQE_AEID_ROE_INVALID_RDMA_WRITE_OR_READ_RESP: 3566 - nesqp = (struct nes_qp *)(unsigned long)context; 3533 + printk(KERN_ERR PFX "QP[%u] async_event_id=0x%04X IB_EVENT_QP_FATAL\n", 3534 + nesqp->hwqp.qp_id, async_event_id); 3567 3535 nes_terminate_connection(nesdev, nesqp, aeqe, IB_EVENT_QP_FATAL); 3568 3536 break; 3569 3537
+1 -1
drivers/infiniband/hw/nes/nes_hw.h
··· 37 37 38 38 #define NES_PHY_TYPE_CX4 1 39 39 #define NES_PHY_TYPE_1G 2 40 - #define NES_PHY_TYPE_IRIS 3 41 40 #define NES_PHY_TYPE_ARGUS 4 42 41 #define NES_PHY_TYPE_PUMA_1G 5 43 42 #define NES_PHY_TYPE_PUMA_10G 6 44 43 #define NES_PHY_TYPE_GLADIUS 7 45 44 #define NES_PHY_TYPE_SFP_D 8 45 + #define NES_PHY_TYPE_KR 9 46 46 47 47 #define NES_MULTICAST_PF_MAX 8 48 48
+9 -52
drivers/infiniband/hw/nes/nes_nic.c
··· 1243 1243 target_stat_values[++index] = cm_packets_received; 1244 1244 target_stat_values[++index] = cm_packets_dropped; 1245 1245 target_stat_values[++index] = cm_packets_retrans; 1246 - target_stat_values[++index] = cm_listens_created; 1247 - target_stat_values[++index] = cm_listens_destroyed; 1246 + target_stat_values[++index] = atomic_read(&cm_listens_created); 1247 + target_stat_values[++index] = atomic_read(&cm_listens_destroyed); 1248 1248 target_stat_values[++index] = cm_backlog_drops; 1249 1249 target_stat_values[++index] = atomic_read(&cm_loopbacks); 1250 1250 target_stat_values[++index] = atomic_read(&cm_nodes_created); ··· 1474 1474 } 1475 1475 return 0; 1476 1476 } 1477 - if ((phy_type == NES_PHY_TYPE_IRIS) || 1478 - (phy_type == NES_PHY_TYPE_ARGUS) || 1479 - (phy_type == NES_PHY_TYPE_SFP_D)) { 1477 + if ((phy_type == NES_PHY_TYPE_ARGUS) || 1478 + (phy_type == NES_PHY_TYPE_SFP_D) || 1479 + (phy_type == NES_PHY_TYPE_KR)) { 1480 1480 et_cmd->transceiver = XCVR_EXTERNAL; 1481 1481 et_cmd->port = PORT_FIBRE; 1482 1482 et_cmd->supported = SUPPORTED_FIBRE; ··· 1596 1596 struct net_device *netdev; 1597 1597 struct nic_qp_map *curr_qp_map; 1598 1598 u32 u32temp; 1599 - u16 phy_data; 1600 - u16 temp_phy_data; 1599 + u8 phy_type = nesdev->nesadapter->phy_type[nesdev->mac_index]; 1601 1600 1602 1601 netdev = alloc_etherdev(sizeof(struct nes_vnic)); 1603 1602 if (!netdev) { ··· 1704 1705 1705 1706 if ((nesdev->netdev_count == 0) && 1706 1707 ((PCI_FUNC(nesdev->pcidev->devfn) == nesdev->mac_index) || 1707 - ((nesdev->nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_PUMA_1G) && 1708 + ((phy_type == NES_PHY_TYPE_PUMA_1G) && 1708 1709 (((PCI_FUNC(nesdev->pcidev->devfn) == 1) && (nesdev->mac_index == 2)) || 1709 1710 ((PCI_FUNC(nesdev->pcidev->devfn) == 2) && (nesdev->mac_index == 1)))))) { 1710 - /* 1711 - * nes_debug(NES_DBG_INIT, "Setting up PHY interrupt mask. Using register index 0x%04X\n", 1712 - * NES_IDX_PHY_PCS_CONTROL_STATUS0 + (0x200 * (nesvnic->logical_port & 1))); 1713 - */ 1714 1711 u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 + 1715 1712 (0x200 * (nesdev->mac_index & 1))); 1716 - if (nesdev->nesadapter->phy_type[nesdev->mac_index] != NES_PHY_TYPE_PUMA_1G) { 1713 + if (phy_type != NES_PHY_TYPE_PUMA_1G) { 1717 1714 u32temp |= 0x00200000; 1718 1715 nes_write_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 + 1719 1716 (0x200 * (nesdev->mac_index & 1)), u32temp); 1720 1717 } 1721 1718 1722 - u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 + 1723 - (0x200 * (nesdev->mac_index & 1))); 1724 - 1725 - if ((u32temp&0x0f1f0000) == 0x0f0f0000) { 1726 - if (nesdev->nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_IRIS) { 1727 - nes_init_phy(nesdev); 1728 - nes_read_10G_phy_reg(nesdev, nesdev->nesadapter->phy_index[nesdev->mac_index], 1, 1); 1729 - temp_phy_data = (u16)nes_read_indexed(nesdev, 1730 - NES_IDX_MAC_MDIO_CONTROL); 1731 - u32temp = 20; 1732 - do { 1733 - nes_read_10G_phy_reg(nesdev, nesdev->nesadapter->phy_index[nesdev->mac_index], 1, 1); 1734 - phy_data = (u16)nes_read_indexed(nesdev, 1735 - NES_IDX_MAC_MDIO_CONTROL); 1736 - if ((phy_data == temp_phy_data) || (!(--u32temp))) 1737 - break; 1738 - temp_phy_data = phy_data; 1739 - } while (1); 1740 - if (phy_data & 4) { 1741 - nes_debug(NES_DBG_INIT, "The Link is UP!!.\n"); 1742 - nesvnic->linkup = 1; 1743 - } else { 1744 - nes_debug(NES_DBG_INIT, "The Link is DOWN!!.\n"); 1745 - } 1746 - } else { 1747 - nes_debug(NES_DBG_INIT, "The Link is UP!!.\n"); 1748 - nesvnic->linkup = 1; 1749 - } 1750 - } else if (nesdev->nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_PUMA_1G) { 1751 - nes_debug(NES_DBG_INIT, "mac_index=%d, logical_port=%d, u32temp=0x%04X, PCI_FUNC=%d\n", 1752 - nesdev->mac_index, nesvnic->logical_port, u32temp, PCI_FUNC(nesdev->pcidev->devfn)); 1753 - if (((nesdev->mac_index < 2) && ((u32temp&0x01010000) == 0x01010000)) || 1754 - ((nesdev->mac_index > 1) && ((u32temp&0x02020000) == 0x02020000))) { 1755 - nes_debug(NES_DBG_INIT, "The Link is UP!!.\n"); 1756 - nesvnic->linkup = 1; 1757 - } 1758 - } 1759 1719 /* clear the MAC interrupt status, assumes direct logical to physical mapping */ 1760 1720 u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index)); 1761 1721 nes_debug(NES_DBG_INIT, "Phy interrupt status = 0x%X.\n", u32temp); 1762 1722 nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index), u32temp); 1763 1723 1764 - if (nesdev->nesadapter->phy_type[nesdev->mac_index] != NES_PHY_TYPE_IRIS) 1765 - nes_init_phy(nesdev); 1724 + nes_init_phy(nesdev); 1766 1725 1767 1726 } 1768 1727
+3 -3
drivers/infiniband/hw/nes/nes_verbs.c
··· 228 228 /* Check for SQ overflow */ 229 229 if (((head + (2 * qsize) - nesqp->hwqp.sq_tail) % qsize) == (qsize - 1)) { 230 230 spin_unlock_irqrestore(&nesqp->lock, flags); 231 - return -EINVAL; 231 + return -ENOMEM; 232 232 } 233 233 234 234 wqe = &nesqp->hwqp.sq_vbase[head]; ··· 3294 3294 3295 3295 /* Check for SQ overflow */ 3296 3296 if (((head + (2 * qsize) - nesqp->hwqp.sq_tail) % qsize) == (qsize - 1)) { 3297 - err = -EINVAL; 3297 + err = -ENOMEM; 3298 3298 break; 3299 3299 } 3300 3300 ··· 3577 3577 } 3578 3578 /* Check for RQ overflow */ 3579 3579 if (((head + (2 * qsize) - nesqp->hwqp.rq_tail) % qsize) == (qsize - 1)) { 3580 - err = -EINVAL; 3580 + err = -ENOMEM; 3581 3581 break; 3582 3582 } 3583 3583
+2 -8
drivers/infiniband/ulp/ipoib/ipoib_ethtool.c
··· 55 55 struct ipoib_dev_priv *priv = netdev_priv(dev); 56 56 57 57 coal->rx_coalesce_usecs = priv->ethtool.coalesce_usecs; 58 - coal->tx_coalesce_usecs = priv->ethtool.coalesce_usecs; 59 58 coal->rx_max_coalesced_frames = priv->ethtool.max_coalesced_frames; 60 - coal->tx_max_coalesced_frames = priv->ethtool.max_coalesced_frames; 61 59 62 60 return 0; 63 61 } ··· 67 69 int ret; 68 70 69 71 /* 70 - * Since IPoIB uses a single CQ for both rx and tx, we assume 71 - * that rx params dictate the configuration. These values are 72 - * saved in the private data and returned when ipoib_get_coalesce() 73 - * is called. 72 + * These values are saved in the private data and returned 73 + * when ipoib_get_coalesce() is called 74 74 */ 75 75 if (coal->rx_coalesce_usecs > 0xffff || 76 76 coal->rx_max_coalesced_frames > 0xffff) ··· 81 85 return ret; 82 86 } 83 87 84 - coal->tx_coalesce_usecs = coal->rx_coalesce_usecs; 85 - coal->tx_max_coalesced_frames = coal->rx_max_coalesced_frames; 86 88 priv->ethtool.coalesce_usecs = coal->rx_coalesce_usecs; 87 89 priv->ethtool.max_coalesced_frames = coal->rx_max_coalesced_frames; 88 90
+32 -15
drivers/infiniband/ulp/iser/iscsi_iser.c
··· 128 128 return 0; 129 129 } 130 130 131 + int iser_initialize_task_headers(struct iscsi_task *task, 132 + struct iser_tx_desc *tx_desc) 133 + { 134 + struct iscsi_iser_conn *iser_conn = task->conn->dd_data; 135 + struct iser_device *device = iser_conn->ib_conn->device; 136 + struct iscsi_iser_task *iser_task = task->dd_data; 137 + u64 dma_addr; 138 + 139 + dma_addr = ib_dma_map_single(device->ib_device, (void *)tx_desc, 140 + ISER_HEADERS_LEN, DMA_TO_DEVICE); 141 + if (ib_dma_mapping_error(device->ib_device, dma_addr)) 142 + return -ENOMEM; 143 + 144 + tx_desc->dma_addr = dma_addr; 145 + tx_desc->tx_sg[0].addr = tx_desc->dma_addr; 146 + tx_desc->tx_sg[0].length = ISER_HEADERS_LEN; 147 + tx_desc->tx_sg[0].lkey = device->mr->lkey; 148 + 149 + iser_task->headers_initialized = 1; 150 + iser_task->iser_conn = iser_conn; 151 + return 0; 152 + } 131 153 /** 132 154 * iscsi_iser_task_init - Initialize task 133 155 * @task: iscsi task ··· 159 137 static int 160 138 iscsi_iser_task_init(struct iscsi_task *task) 161 139 { 162 - struct iscsi_iser_conn *iser_conn = task->conn->dd_data; 163 140 struct iscsi_iser_task *iser_task = task->dd_data; 164 141 142 + if (!iser_task->headers_initialized) 143 + if (iser_initialize_task_headers(task, &iser_task->desc)) 144 + return -ENOMEM; 145 + 165 146 /* mgmt task */ 166 - if (!task->sc) { 167 - iser_task->desc.data = task->data; 147 + if (!task->sc) 168 148 return 0; 169 - } 170 149 171 150 iser_task->command_sent = 0; 172 - iser_task->iser_conn = iser_conn; 173 151 iser_task_rdma_init(iser_task); 174 152 return 0; 175 153 } ··· 190 168 { 191 169 int error = 0; 192 170 193 - iser_dbg("task deq [cid %d itt 0x%x]\n", conn->id, task->itt); 171 + iser_dbg("mtask xmit [cid %d itt 0x%x]\n", conn->id, task->itt); 194 172 195 173 error = iser_send_control(conn, task); 196 174 ··· 200 178 * - if yes, the task is recycled at iscsi_complete_pdu 201 179 * - if no, the task is recycled at iser_snd_completion 202 180 */ 203 - if (error && error != -ENOBUFS) 204 - iscsi_conn_failure(conn, ISCSI_ERR_CONN_FAILED); 205 - 206 181 return error; 207 182 } 208 183 ··· 251 232 task->imm_count, task->unsol_r2t.data_length); 252 233 } 253 234 254 - iser_dbg("task deq [cid %d itt 0x%x]\n", 235 + iser_dbg("ctask xmit [cid %d itt 0x%x]\n", 255 236 conn->id, task->itt); 256 237 257 238 /* Send the cmd PDU */ ··· 267 248 error = iscsi_iser_task_xmit_unsol_data(conn, task); 268 249 269 250 iscsi_iser_task_xmit_exit: 270 - if (error && error != -ENOBUFS) 271 - iscsi_conn_failure(conn, ISCSI_ERR_CONN_FAILED); 272 251 return error; 273 252 } 274 253 ··· 300 283 * due to issues with the login code re iser sematics 301 284 * this not set in iscsi_conn_setup - FIXME 302 285 */ 303 - conn->max_recv_dlength = 128; 286 + conn->max_recv_dlength = ISER_RECV_DATA_SEG_LEN; 304 287 305 288 iser_conn = conn->dd_data; 306 289 conn->dd_data = iser_conn; ··· 418 401 struct Scsi_Host *shost; 419 402 struct iser_conn *ib_conn; 420 403 421 - shost = iscsi_host_alloc(&iscsi_iser_sht, 0, 1); 404 + shost = iscsi_host_alloc(&iscsi_iser_sht, 0, 0); 422 405 if (!shost) 423 406 return NULL; 424 407 shost->transportt = iscsi_iser_scsi_transport; ··· 692 675 memset(&ig, 0, sizeof(struct iser_global)); 693 676 694 677 ig.desc_cache = kmem_cache_create("iser_descriptors", 695 - sizeof (struct iser_desc), 678 + sizeof(struct iser_tx_desc), 696 679 0, SLAB_HWCACHE_ALIGN, 697 680 NULL); 698 681 if (ig.desc_cache == NULL)
+47 -50
drivers/infiniband/ulp/iser/iscsi_iser.h
··· 102 102 #define ISER_MAX_TX_MISC_PDUS 6 /* NOOP_OUT(2), TEXT(1), * 103 103 * SCSI_TMFUNC(2), LOGOUT(1) */ 104 104 105 - #define ISER_QP_MAX_RECV_DTOS (ISCSI_DEF_XMIT_CMDS_MAX + \ 106 - ISER_MAX_RX_MISC_PDUS + \ 107 - ISER_MAX_TX_MISC_PDUS) 105 + #define ISER_QP_MAX_RECV_DTOS (ISCSI_DEF_XMIT_CMDS_MAX) 106 + 107 + #define ISER_MIN_POSTED_RX (ISCSI_DEF_XMIT_CMDS_MAX >> 2) 108 108 109 109 /* the max TX (send) WR supported by the iSER QP is defined by * 110 110 * max_send_wr = T * (1 + D) + C ; D is how many inflight dataouts we expect * ··· 132 132 __be64 read_va; 133 133 } __attribute__((packed)); 134 134 135 + /* Constant PDU lengths calculations */ 136 + #define ISER_HEADERS_LEN (sizeof(struct iser_hdr) + sizeof(struct iscsi_hdr)) 137 + 138 + #define ISER_RECV_DATA_SEG_LEN 128 139 + #define ISER_RX_PAYLOAD_SIZE (ISER_HEADERS_LEN + ISER_RECV_DATA_SEG_LEN) 140 + #define ISER_RX_LOGIN_SIZE (ISER_HEADERS_LEN + ISCSI_DEF_MAX_RECV_SEG_LEN) 135 141 136 142 /* Length of an object name string */ 137 143 #define ISER_OBJECT_NAME_SIZE 64 ··· 193 187 struct iser_mem_reg reg; /* memory registration info */ 194 188 void *virt_addr; 195 189 struct iser_device *device; /* device->device for dma_unmap */ 196 - u64 dma_addr; /* if non zero, addr for dma_unmap */ 197 190 enum dma_data_direction direction; /* direction for dma_unmap */ 198 191 unsigned int data_size; 199 - atomic_t ref_count; /* refcount, freed when dec to 0 */ 200 - }; 201 - 202 - #define MAX_REGD_BUF_VECTOR_LEN 2 203 - 204 - struct iser_dto { 205 - struct iscsi_iser_task *task; 206 - struct iser_conn *ib_conn; 207 - int notify_enable; 208 - 209 - /* vector of registered buffers */ 210 - unsigned int regd_vector_len; 211 - struct iser_regd_buf *regd[MAX_REGD_BUF_VECTOR_LEN]; 212 - 213 - /* offset into the registered buffer may be specified */ 214 - unsigned int offset[MAX_REGD_BUF_VECTOR_LEN]; 215 - 216 - /* a smaller size may be specified, if 0, then full size is used */ 217 - unsigned int used_sz[MAX_REGD_BUF_VECTOR_LEN]; 218 192 }; 219 193 220 194 enum iser_desc_type { 221 - ISCSI_RX, 222 195 ISCSI_TX_CONTROL , 223 196 ISCSI_TX_SCSI_COMMAND, 224 197 ISCSI_TX_DATAOUT 225 198 }; 226 199 227 - struct iser_desc { 200 + struct iser_tx_desc { 228 201 struct iser_hdr iser_header; 229 202 struct iscsi_hdr iscsi_header; 230 - struct iser_regd_buf hdr_regd_buf; 231 - void *data; /* used by RX & TX_CONTROL */ 232 - struct iser_regd_buf data_regd_buf; /* used by RX & TX_CONTROL */ 233 203 enum iser_desc_type type; 234 - struct iser_dto dto; 204 + u64 dma_addr; 205 + /* sg[0] points to iser/iscsi headers, sg[1] optionally points to either 206 + of immediate data, unsolicited data-out or control (login,text) */ 207 + struct ib_sge tx_sg[2]; 208 + int num_sge; 235 209 }; 210 + 211 + #define ISER_RX_PAD_SIZE (256 - (ISER_RX_PAYLOAD_SIZE + \ 212 + sizeof(u64) + sizeof(struct ib_sge))) 213 + struct iser_rx_desc { 214 + struct iser_hdr iser_header; 215 + struct iscsi_hdr iscsi_header; 216 + char data[ISER_RECV_DATA_SEG_LEN]; 217 + u64 dma_addr; 218 + struct ib_sge rx_sg; 219 + char pad[ISER_RX_PAD_SIZE]; 220 + } __attribute__((packed)); 236 221 237 222 struct iser_device { 238 223 struct ib_device *ib_device; 239 224 struct ib_pd *pd; 240 - struct ib_cq *cq; 225 + struct ib_cq *rx_cq; 226 + struct ib_cq *tx_cq; 241 227 struct ib_mr *mr; 242 228 struct tasklet_struct cq_tasklet; 243 229 struct list_head ig_list; /* entry in ig devices list */ ··· 248 250 struct ib_fmr_pool *fmr_pool; /* pool of IB FMRs */ 249 251 int disc_evt_flag; /* disconn event delivered */ 250 252 wait_queue_head_t wait; /* waitq for conn/disconn */ 251 - atomic_t post_recv_buf_count; /* posted rx count */ 253 + int post_recv_buf_count; /* posted rx count */ 252 254 atomic_t post_send_buf_count; /* posted tx count */ 253 - atomic_t unexpected_pdu_count;/* count of received * 254 - * unexpected pdus * 255 - * not yet retired */ 256 255 char name[ISER_OBJECT_NAME_SIZE]; 257 256 struct iser_page_vec *page_vec; /* represents SG to fmr maps* 258 257 * maps serialized as tx is*/ 259 258 struct list_head conn_list; /* entry in ig conn list */ 259 + 260 + char *login_buf; 261 + u64 login_dma; 262 + unsigned int rx_desc_head; 263 + struct iser_rx_desc *rx_descs; 264 + struct ib_recv_wr rx_wr[ISER_MIN_POSTED_RX]; 260 265 }; 261 266 262 267 struct iscsi_iser_conn { ··· 268 267 }; 269 268 270 269 struct iscsi_iser_task { 271 - struct iser_desc desc; 270 + struct iser_tx_desc desc; 272 271 struct iscsi_iser_conn *iser_conn; 273 272 enum iser_task_status status; 274 273 int command_sent; /* set if command sent */ ··· 276 275 struct iser_regd_buf rdma_regd[ISER_DIRS_NUM];/* regd rdma buf */ 277 276 struct iser_data_buf data[ISER_DIRS_NUM]; /* orig. data des*/ 278 277 struct iser_data_buf data_copy[ISER_DIRS_NUM];/* contig. copy */ 278 + int headers_initialized; 279 279 }; 280 280 281 281 struct iser_page_vec { ··· 324 322 325 323 void iser_conn_terminate(struct iser_conn *ib_conn); 326 324 327 - void iser_rcv_completion(struct iser_desc *desc, 328 - unsigned long dto_xfer_len); 325 + void iser_rcv_completion(struct iser_rx_desc *desc, 326 + unsigned long dto_xfer_len, 327 + struct iser_conn *ib_conn); 329 328 330 - void iser_snd_completion(struct iser_desc *desc); 329 + void iser_snd_completion(struct iser_tx_desc *desc, struct iser_conn *ib_conn); 331 330 332 331 void iser_task_rdma_init(struct iscsi_iser_task *task); 333 332 334 333 void iser_task_rdma_finalize(struct iscsi_iser_task *task); 335 334 336 - void iser_dto_buffs_release(struct iser_dto *dto); 337 - 338 - int iser_regd_buff_release(struct iser_regd_buf *regd_buf); 339 - 340 - void iser_reg_single(struct iser_device *device, 341 - struct iser_regd_buf *regd_buf, 342 - enum dma_data_direction direction); 335 + void iser_free_rx_descriptors(struct iser_conn *ib_conn); 343 336 344 337 void iser_finalize_rdma_unaligned_sg(struct iscsi_iser_task *task, 345 338 enum iser_data_dir cmd_dir); ··· 353 356 354 357 void iser_unreg_mem(struct iser_mem_reg *mem_reg); 355 358 356 - int iser_post_recv(struct iser_desc *rx_desc); 357 - int iser_post_send(struct iser_desc *tx_desc); 358 - 359 - int iser_conn_state_comp(struct iser_conn *ib_conn, 360 - enum iser_ib_conn_state comp); 359 + int iser_post_recvl(struct iser_conn *ib_conn); 360 + int iser_post_recvm(struct iser_conn *ib_conn, int count); 361 + int iser_post_send(struct iser_conn *ib_conn, struct iser_tx_desc *tx_desc); 361 362 362 363 int iser_dma_map_task_data(struct iscsi_iser_task *iser_task, 363 364 struct iser_data_buf *data, ··· 363 368 enum dma_data_direction dma_dir); 364 369 365 370 void iser_dma_unmap_task_data(struct iscsi_iser_task *iser_task); 371 + int iser_initialize_task_headers(struct iscsi_task *task, 372 + struct iser_tx_desc *tx_desc); 366 373 #endif
+174 -354
drivers/infiniband/ulp/iser/iser_initiator.c
··· 39 39 40 40 #include "iscsi_iser.h" 41 41 42 - /* Constant PDU lengths calculations */ 43 - #define ISER_TOTAL_HEADERS_LEN (sizeof (struct iser_hdr) + \ 44 - sizeof (struct iscsi_hdr)) 45 - 46 - /* iser_dto_add_regd_buff - increments the reference count for * 47 - * the registered buffer & adds it to the DTO object */ 48 - static void iser_dto_add_regd_buff(struct iser_dto *dto, 49 - struct iser_regd_buf *regd_buf, 50 - unsigned long use_offset, 51 - unsigned long use_size) 52 - { 53 - int add_idx; 54 - 55 - atomic_inc(&regd_buf->ref_count); 56 - 57 - add_idx = dto->regd_vector_len; 58 - dto->regd[add_idx] = regd_buf; 59 - dto->used_sz[add_idx] = use_size; 60 - dto->offset[add_idx] = use_offset; 61 - 62 - dto->regd_vector_len++; 63 - } 64 - 65 42 /* Register user buffer memory and initialize passive rdma 66 43 * dto descriptor. Total data size is stored in 67 44 * iser_task->data[ISER_DIR_IN].data_len ··· 99 122 struct iscsi_iser_task *iser_task = task->dd_data; 100 123 struct iser_regd_buf *regd_buf; 101 124 int err; 102 - struct iser_dto *send_dto = &iser_task->desc.dto; 103 125 struct iser_hdr *hdr = &iser_task->desc.iser_header; 104 126 struct iser_data_buf *buf_out = &iser_task->data[ISER_DIR_OUT]; 127 + struct ib_sge *tx_dsg = &iser_task->desc.tx_sg[1]; 105 128 106 129 err = iser_dma_map_task_data(iser_task, 107 130 buf_out, ··· 140 163 if (imm_sz > 0) { 141 164 iser_dbg("Cmd itt:%d, WRITE, adding imm.data sz: %d\n", 142 165 task->itt, imm_sz); 143 - iser_dto_add_regd_buff(send_dto, 144 - regd_buf, 145 - 0, 146 - imm_sz); 166 + tx_dsg->addr = regd_buf->reg.va; 167 + tx_dsg->length = imm_sz; 168 + tx_dsg->lkey = regd_buf->reg.lkey; 169 + iser_task->desc.num_sge = 2; 147 170 } 148 171 149 172 return 0; 150 - } 151 - 152 - /** 153 - * iser_post_receive_control - allocates, initializes and posts receive DTO. 154 - */ 155 - static int iser_post_receive_control(struct iscsi_conn *conn) 156 - { 157 - struct iscsi_iser_conn *iser_conn = conn->dd_data; 158 - struct iser_desc *rx_desc; 159 - struct iser_regd_buf *regd_hdr; 160 - struct iser_regd_buf *regd_data; 161 - struct iser_dto *recv_dto = NULL; 162 - struct iser_device *device = iser_conn->ib_conn->device; 163 - int rx_data_size, err; 164 - int posts, outstanding_unexp_pdus; 165 - 166 - /* for the login sequence we must support rx of upto 8K; login is done 167 - * after conn create/bind (connect) and conn stop/bind (reconnect), 168 - * what's common for both schemes is that the connection is not started 169 - */ 170 - if (conn->c_stage != ISCSI_CONN_STARTED) 171 - rx_data_size = ISCSI_DEF_MAX_RECV_SEG_LEN; 172 - else /* FIXME till user space sets conn->max_recv_dlength correctly */ 173 - rx_data_size = 128; 174 - 175 - outstanding_unexp_pdus = 176 - atomic_xchg(&iser_conn->ib_conn->unexpected_pdu_count, 0); 177 - 178 - /* 179 - * in addition to the response buffer, replace those consumed by 180 - * unexpected pdus. 181 - */ 182 - for (posts = 0; posts < 1 + outstanding_unexp_pdus; posts++) { 183 - rx_desc = kmem_cache_alloc(ig.desc_cache, GFP_NOIO); 184 - if (rx_desc == NULL) { 185 - iser_err("Failed to alloc desc for post recv %d\n", 186 - posts); 187 - err = -ENOMEM; 188 - goto post_rx_cache_alloc_failure; 189 - } 190 - rx_desc->type = ISCSI_RX; 191 - rx_desc->data = kmalloc(rx_data_size, GFP_NOIO); 192 - if (rx_desc->data == NULL) { 193 - iser_err("Failed to alloc data buf for post recv %d\n", 194 - posts); 195 - err = -ENOMEM; 196 - goto post_rx_kmalloc_failure; 197 - } 198 - 199 - recv_dto = &rx_desc->dto; 200 - recv_dto->ib_conn = iser_conn->ib_conn; 201 - recv_dto->regd_vector_len = 0; 202 - 203 - regd_hdr = &rx_desc->hdr_regd_buf; 204 - memset(regd_hdr, 0, sizeof(struct iser_regd_buf)); 205 - regd_hdr->device = device; 206 - regd_hdr->virt_addr = rx_desc; /* == &rx_desc->iser_header */ 207 - regd_hdr->data_size = ISER_TOTAL_HEADERS_LEN; 208 - 209 - iser_reg_single(device, regd_hdr, DMA_FROM_DEVICE); 210 - 211 - iser_dto_add_regd_buff(recv_dto, regd_hdr, 0, 0); 212 - 213 - regd_data = &rx_desc->data_regd_buf; 214 - memset(regd_data, 0, sizeof(struct iser_regd_buf)); 215 - regd_data->device = device; 216 - regd_data->virt_addr = rx_desc->data; 217 - regd_data->data_size = rx_data_size; 218 - 219 - iser_reg_single(device, regd_data, DMA_FROM_DEVICE); 220 - 221 - iser_dto_add_regd_buff(recv_dto, regd_data, 0, 0); 222 - 223 - err = iser_post_recv(rx_desc); 224 - if (err) { 225 - iser_err("Failed iser_post_recv for post %d\n", posts); 226 - goto post_rx_post_recv_failure; 227 - } 228 - } 229 - /* all posts successful */ 230 - return 0; 231 - 232 - post_rx_post_recv_failure: 233 - iser_dto_buffs_release(recv_dto); 234 - kfree(rx_desc->data); 235 - post_rx_kmalloc_failure: 236 - kmem_cache_free(ig.desc_cache, rx_desc); 237 - post_rx_cache_alloc_failure: 238 - if (posts > 0) { 239 - /* 240 - * response buffer posted, but did not replace all unexpected 241 - * pdu recv bufs. Ignore error, retry occurs next send 242 - */ 243 - outstanding_unexp_pdus -= (posts - 1); 244 - err = 0; 245 - } 246 - atomic_add(outstanding_unexp_pdus, 247 - &iser_conn->ib_conn->unexpected_pdu_count); 248 - 249 - return err; 250 173 } 251 174 252 175 /* creates a new tx descriptor and adds header regd buffer */ 253 - static void iser_create_send_desc(struct iscsi_iser_conn *iser_conn, 254 - struct iser_desc *tx_desc) 176 + static void iser_create_send_desc(struct iser_conn *ib_conn, 177 + struct iser_tx_desc *tx_desc) 255 178 { 256 - struct iser_regd_buf *regd_hdr = &tx_desc->hdr_regd_buf; 257 - struct iser_dto *send_dto = &tx_desc->dto; 179 + struct iser_device *device = ib_conn->device; 258 180 259 - memset(regd_hdr, 0, sizeof(struct iser_regd_buf)); 260 - regd_hdr->device = iser_conn->ib_conn->device; 261 - regd_hdr->virt_addr = tx_desc; /* == &tx_desc->iser_header */ 262 - regd_hdr->data_size = ISER_TOTAL_HEADERS_LEN; 263 - 264 - send_dto->ib_conn = iser_conn->ib_conn; 265 - send_dto->notify_enable = 1; 266 - send_dto->regd_vector_len = 0; 181 + ib_dma_sync_single_for_cpu(device->ib_device, 182 + tx_desc->dma_addr, ISER_HEADERS_LEN, DMA_TO_DEVICE); 267 183 268 184 memset(&tx_desc->iser_header, 0, sizeof(struct iser_hdr)); 269 185 tx_desc->iser_header.flags = ISER_VER; 270 186 271 - iser_dto_add_regd_buff(send_dto, regd_hdr, 0, 0); 187 + tx_desc->num_sge = 1; 188 + 189 + if (tx_desc->tx_sg[0].lkey != device->mr->lkey) { 190 + tx_desc->tx_sg[0].lkey = device->mr->lkey; 191 + iser_dbg("sdesc %p lkey mismatch, fixing\n", tx_desc); 192 + } 193 + } 194 + 195 + 196 + int iser_alloc_rx_descriptors(struct iser_conn *ib_conn) 197 + { 198 + int i, j; 199 + u64 dma_addr; 200 + struct iser_rx_desc *rx_desc; 201 + struct ib_sge *rx_sg; 202 + struct iser_device *device = ib_conn->device; 203 + 204 + ib_conn->rx_descs = kmalloc(ISER_QP_MAX_RECV_DTOS * 205 + sizeof(struct iser_rx_desc), GFP_KERNEL); 206 + if (!ib_conn->rx_descs) 207 + goto rx_desc_alloc_fail; 208 + 209 + rx_desc = ib_conn->rx_descs; 210 + 211 + for (i = 0; i < ISER_QP_MAX_RECV_DTOS; i++, rx_desc++) { 212 + dma_addr = ib_dma_map_single(device->ib_device, (void *)rx_desc, 213 + ISER_RX_PAYLOAD_SIZE, DMA_FROM_DEVICE); 214 + if (ib_dma_mapping_error(device->ib_device, dma_addr)) 215 + goto rx_desc_dma_map_failed; 216 + 217 + rx_desc->dma_addr = dma_addr; 218 + 219 + rx_sg = &rx_desc->rx_sg; 220 + rx_sg->addr = rx_desc->dma_addr; 221 + rx_sg->length = ISER_RX_PAYLOAD_SIZE; 222 + rx_sg->lkey = device->mr->lkey; 223 + } 224 + 225 + ib_conn->rx_desc_head = 0; 226 + return 0; 227 + 228 + rx_desc_dma_map_failed: 229 + rx_desc = ib_conn->rx_descs; 230 + for (j = 0; j < i; j++, rx_desc++) 231 + ib_dma_unmap_single(device->ib_device, rx_desc->dma_addr, 232 + ISER_RX_PAYLOAD_SIZE, DMA_FROM_DEVICE); 233 + kfree(ib_conn->rx_descs); 234 + ib_conn->rx_descs = NULL; 235 + rx_desc_alloc_fail: 236 + iser_err("failed allocating rx descriptors / data buffers\n"); 237 + return -ENOMEM; 238 + } 239 + 240 + void iser_free_rx_descriptors(struct iser_conn *ib_conn) 241 + { 242 + int i; 243 + struct iser_rx_desc *rx_desc; 244 + struct iser_device *device = ib_conn->device; 245 + 246 + if (ib_conn->login_buf) { 247 + ib_dma_unmap_single(device->ib_device, ib_conn->login_dma, 248 + ISER_RX_LOGIN_SIZE, DMA_FROM_DEVICE); 249 + kfree(ib_conn->login_buf); 250 + } 251 + 252 + if (!ib_conn->rx_descs) 253 + return; 254 + 255 + rx_desc = ib_conn->rx_descs; 256 + for (i = 0; i < ISER_QP_MAX_RECV_DTOS; i++, rx_desc++) 257 + ib_dma_unmap_single(device->ib_device, rx_desc->dma_addr, 258 + ISER_RX_PAYLOAD_SIZE, DMA_FROM_DEVICE); 259 + kfree(ib_conn->rx_descs); 272 260 } 273 261 274 262 /** ··· 243 301 { 244 302 struct iscsi_iser_conn *iser_conn = conn->dd_data; 245 303 246 - int i; 247 - /* 248 - * FIXME this value should be declared to the target during login with 249 - * the MaxOutstandingUnexpectedPDUs key when supported 250 - */ 251 - int initial_post_recv_bufs_num = ISER_MAX_RX_MISC_PDUS; 252 - 253 - iser_dbg("Initially post: %d\n", initial_post_recv_bufs_num); 304 + iser_dbg("Initially post: %d\n", ISER_MIN_POSTED_RX); 254 305 255 306 /* Check that there is no posted recv or send buffers left - */ 256 307 /* they must be consumed during the login phase */ 257 - BUG_ON(atomic_read(&iser_conn->ib_conn->post_recv_buf_count) != 0); 308 + BUG_ON(iser_conn->ib_conn->post_recv_buf_count != 0); 258 309 BUG_ON(atomic_read(&iser_conn->ib_conn->post_send_buf_count) != 0); 259 310 311 + if (iser_alloc_rx_descriptors(iser_conn->ib_conn)) 312 + return -ENOMEM; 313 + 260 314 /* Initial post receive buffers */ 261 - for (i = 0; i < initial_post_recv_bufs_num; i++) { 262 - if (iser_post_receive_control(conn) != 0) { 263 - iser_err("Failed to post recv bufs at:%d conn:0x%p\n", 264 - i, conn); 265 - return -ENOMEM; 266 - } 267 - } 268 - iser_dbg("Posted %d post recv bufs, conn:0x%p\n", i, conn); 315 + if (iser_post_recvm(iser_conn->ib_conn, ISER_MIN_POSTED_RX)) 316 + return -ENOMEM; 317 + 269 318 return 0; 270 319 } 271 - 272 - static int 273 - iser_check_xmit(struct iscsi_conn *conn, void *task) 274 - { 275 - struct iscsi_iser_conn *iser_conn = conn->dd_data; 276 - 277 - if (atomic_read(&iser_conn->ib_conn->post_send_buf_count) == 278 - ISER_QP_MAX_REQ_DTOS) { 279 - iser_dbg("%ld can't xmit task %p\n",jiffies,task); 280 - return -ENOBUFS; 281 - } 282 - return 0; 283 - } 284 - 285 320 286 321 /** 287 322 * iser_send_command - send command PDU ··· 268 349 { 269 350 struct iscsi_iser_conn *iser_conn = conn->dd_data; 270 351 struct iscsi_iser_task *iser_task = task->dd_data; 271 - struct iser_dto *send_dto = NULL; 272 352 unsigned long edtl; 273 - int err = 0; 353 + int err; 274 354 struct iser_data_buf *data_buf; 275 355 struct iscsi_cmd *hdr = (struct iscsi_cmd *)task->hdr; 276 356 struct scsi_cmnd *sc = task->sc; 277 - 278 - if (!iser_conn_state_comp(iser_conn->ib_conn, ISER_CONN_UP)) { 279 - iser_err("Failed to send, conn: 0x%p is not up\n", iser_conn->ib_conn); 280 - return -EPERM; 281 - } 282 - if (iser_check_xmit(conn, task)) 283 - return -ENOBUFS; 357 + struct iser_tx_desc *tx_desc = &iser_task->desc; 284 358 285 359 edtl = ntohl(hdr->data_length); 286 360 287 361 /* build the tx desc regd header and add it to the tx desc dto */ 288 - iser_task->desc.type = ISCSI_TX_SCSI_COMMAND; 289 - send_dto = &iser_task->desc.dto; 290 - send_dto->task = iser_task; 291 - iser_create_send_desc(iser_conn, &iser_task->desc); 362 + tx_desc->type = ISCSI_TX_SCSI_COMMAND; 363 + iser_create_send_desc(iser_conn->ib_conn, tx_desc); 292 364 293 365 if (hdr->flags & ISCSI_FLAG_CMD_READ) 294 366 data_buf = &iser_task->data[ISER_DIR_IN]; ··· 308 398 goto send_command_error; 309 399 } 310 400 311 - iser_reg_single(iser_conn->ib_conn->device, 312 - send_dto->regd[0], DMA_TO_DEVICE); 313 - 314 - if (iser_post_receive_control(conn) != 0) { 315 - iser_err("post_recv failed!\n"); 316 - err = -ENOMEM; 317 - goto send_command_error; 318 - } 319 - 320 401 iser_task->status = ISER_TASK_STATUS_STARTED; 321 402 322 - err = iser_post_send(&iser_task->desc); 403 + err = iser_post_send(iser_conn->ib_conn, tx_desc); 323 404 if (!err) 324 405 return 0; 325 406 326 407 send_command_error: 327 - iser_dto_buffs_release(send_dto); 328 408 iser_err("conn %p failed task->itt %d err %d\n",conn, task->itt, err); 329 409 return err; 330 410 } ··· 328 428 { 329 429 struct iscsi_iser_conn *iser_conn = conn->dd_data; 330 430 struct iscsi_iser_task *iser_task = task->dd_data; 331 - struct iser_desc *tx_desc = NULL; 332 - struct iser_dto *send_dto = NULL; 431 + struct iser_tx_desc *tx_desc = NULL; 432 + struct iser_regd_buf *regd_buf; 333 433 unsigned long buf_offset; 334 434 unsigned long data_seg_len; 335 435 uint32_t itt; 336 436 int err = 0; 337 - 338 - if (!iser_conn_state_comp(iser_conn->ib_conn, ISER_CONN_UP)) { 339 - iser_err("Failed to send, conn: 0x%p is not up\n", iser_conn->ib_conn); 340 - return -EPERM; 341 - } 342 - 343 - if (iser_check_xmit(conn, task)) 344 - return -ENOBUFS; 437 + struct ib_sge *tx_dsg; 345 438 346 439 itt = (__force uint32_t)hdr->itt; 347 440 data_seg_len = ntoh24(hdr->dlength); ··· 343 450 iser_dbg("%s itt %d dseg_len %d offset %d\n", 344 451 __func__,(int)itt,(int)data_seg_len,(int)buf_offset); 345 452 346 - tx_desc = kmem_cache_alloc(ig.desc_cache, GFP_NOIO); 453 + tx_desc = kmem_cache_zalloc(ig.desc_cache, GFP_ATOMIC); 347 454 if (tx_desc == NULL) { 348 455 iser_err("Failed to alloc desc for post dataout\n"); 349 456 return -ENOMEM; 350 457 } 351 458 352 459 tx_desc->type = ISCSI_TX_DATAOUT; 460 + tx_desc->iser_header.flags = ISER_VER; 353 461 memcpy(&tx_desc->iscsi_header, hdr, sizeof(struct iscsi_hdr)); 354 462 355 - /* build the tx desc regd header and add it to the tx desc dto */ 356 - send_dto = &tx_desc->dto; 357 - send_dto->task = iser_task; 358 - iser_create_send_desc(iser_conn, tx_desc); 463 + /* build the tx desc */ 464 + iser_initialize_task_headers(task, tx_desc); 359 465 360 - iser_reg_single(iser_conn->ib_conn->device, 361 - send_dto->regd[0], DMA_TO_DEVICE); 362 - 363 - /* all data was registered for RDMA, we can use the lkey */ 364 - iser_dto_add_regd_buff(send_dto, 365 - &iser_task->rdma_regd[ISER_DIR_OUT], 366 - buf_offset, 367 - data_seg_len); 466 + regd_buf = &iser_task->rdma_regd[ISER_DIR_OUT]; 467 + tx_dsg = &tx_desc->tx_sg[1]; 468 + tx_dsg->addr = regd_buf->reg.va + buf_offset; 469 + tx_dsg->length = data_seg_len; 470 + tx_dsg->lkey = regd_buf->reg.lkey; 471 + tx_desc->num_sge = 2; 368 472 369 473 if (buf_offset + data_seg_len > iser_task->data[ISER_DIR_OUT].data_len) { 370 474 iser_err("Offset:%ld & DSL:%ld in Data-Out " ··· 375 485 itt, buf_offset, data_seg_len); 376 486 377 487 378 - err = iser_post_send(tx_desc); 488 + err = iser_post_send(iser_conn->ib_conn, tx_desc); 379 489 if (!err) 380 490 return 0; 381 491 382 492 send_data_out_error: 383 - iser_dto_buffs_release(send_dto); 384 493 kmem_cache_free(ig.desc_cache, tx_desc); 385 494 iser_err("conn %p failed err %d\n",conn, err); 386 495 return err; ··· 390 501 { 391 502 struct iscsi_iser_conn *iser_conn = conn->dd_data; 392 503 struct iscsi_iser_task *iser_task = task->dd_data; 393 - struct iser_desc *mdesc = &iser_task->desc; 394 - struct iser_dto *send_dto = NULL; 504 + struct iser_tx_desc *mdesc = &iser_task->desc; 395 505 unsigned long data_seg_len; 396 506 int err = 0; 397 - struct iser_regd_buf *regd_buf; 398 507 struct iser_device *device; 399 - unsigned char opcode; 400 - 401 - if (!iser_conn_state_comp(iser_conn->ib_conn, ISER_CONN_UP)) { 402 - iser_err("Failed to send, conn: 0x%p is not up\n", iser_conn->ib_conn); 403 - return -EPERM; 404 - } 405 - 406 - if (iser_check_xmit(conn, task)) 407 - return -ENOBUFS; 408 508 409 509 /* build the tx desc regd header and add it to the tx desc dto */ 410 510 mdesc->type = ISCSI_TX_CONTROL; 411 - send_dto = &mdesc->dto; 412 - send_dto->task = NULL; 413 - iser_create_send_desc(iser_conn, mdesc); 511 + iser_create_send_desc(iser_conn->ib_conn, mdesc); 414 512 415 513 device = iser_conn->ib_conn->device; 416 - 417 - iser_reg_single(device, send_dto->regd[0], DMA_TO_DEVICE); 418 514 419 515 data_seg_len = ntoh24(task->hdr->dlength); 420 516 421 517 if (data_seg_len > 0) { 422 - regd_buf = &mdesc->data_regd_buf; 423 - memset(regd_buf, 0, sizeof(struct iser_regd_buf)); 424 - regd_buf->device = device; 425 - regd_buf->virt_addr = task->data; 426 - regd_buf->data_size = task->data_count; 427 - iser_reg_single(device, regd_buf, 428 - DMA_TO_DEVICE); 429 - iser_dto_add_regd_buff(send_dto, regd_buf, 430 - 0, 431 - data_seg_len); 432 - } 433 - 434 - opcode = task->hdr->opcode & ISCSI_OPCODE_MASK; 435 - 436 - /* post recv buffer for response if one is expected */ 437 - if (!(opcode == ISCSI_OP_NOOP_OUT && task->hdr->itt == RESERVED_ITT)) { 438 - if (iser_post_receive_control(conn) != 0) { 439 - iser_err("post_rcv_buff failed!\n"); 440 - err = -ENOMEM; 518 + struct ib_sge *tx_dsg = &mdesc->tx_sg[1]; 519 + if (task != conn->login_task) { 520 + iser_err("data present on non login task!!!\n"); 441 521 goto send_control_error; 442 522 } 523 + memcpy(iser_conn->ib_conn->login_buf, task->data, 524 + task->data_count); 525 + tx_dsg->addr = iser_conn->ib_conn->login_dma; 526 + tx_dsg->length = data_seg_len; 527 + tx_dsg->lkey = device->mr->lkey; 528 + mdesc->num_sge = 2; 443 529 } 444 530 445 - err = iser_post_send(mdesc); 531 + if (task == conn->login_task) { 532 + err = iser_post_recvl(iser_conn->ib_conn); 533 + if (err) 534 + goto send_control_error; 535 + } 536 + 537 + err = iser_post_send(iser_conn->ib_conn, mdesc); 446 538 if (!err) 447 539 return 0; 448 540 449 541 send_control_error: 450 - iser_dto_buffs_release(send_dto); 451 542 iser_err("conn %p failed err %d\n",conn, err); 452 543 return err; 453 544 } ··· 435 566 /** 436 567 * iser_rcv_dto_completion - recv DTO completion 437 568 */ 438 - void iser_rcv_completion(struct iser_desc *rx_desc, 439 - unsigned long dto_xfer_len) 569 + void iser_rcv_completion(struct iser_rx_desc *rx_desc, 570 + unsigned long rx_xfer_len, 571 + struct iser_conn *ib_conn) 440 572 { 441 - struct iser_dto *dto = &rx_desc->dto; 442 - struct iscsi_iser_conn *conn = dto->ib_conn->iser_conn; 443 - struct iscsi_task *task; 444 - struct iscsi_iser_task *iser_task; 573 + struct iscsi_iser_conn *conn = ib_conn->iser_conn; 445 574 struct iscsi_hdr *hdr; 446 - char *rx_data = NULL; 447 - int rx_data_len = 0; 448 - unsigned char opcode; 575 + u64 rx_dma; 576 + int rx_buflen, outstanding, count, err; 577 + 578 + /* differentiate between login to all other PDUs */ 579 + if ((char *)rx_desc == ib_conn->login_buf) { 580 + rx_dma = ib_conn->login_dma; 581 + rx_buflen = ISER_RX_LOGIN_SIZE; 582 + } else { 583 + rx_dma = rx_desc->dma_addr; 584 + rx_buflen = ISER_RX_PAYLOAD_SIZE; 585 + } 586 + 587 + ib_dma_sync_single_for_cpu(ib_conn->device->ib_device, rx_dma, 588 + rx_buflen, DMA_FROM_DEVICE); 449 589 450 590 hdr = &rx_desc->iscsi_header; 451 591 452 - iser_dbg("op 0x%x itt 0x%x\n", hdr->opcode,hdr->itt); 592 + iser_dbg("op 0x%x itt 0x%x dlen %d\n", hdr->opcode, 593 + hdr->itt, (int)(rx_xfer_len - ISER_HEADERS_LEN)); 453 594 454 - if (dto_xfer_len > ISER_TOTAL_HEADERS_LEN) { /* we have data */ 455 - rx_data_len = dto_xfer_len - ISER_TOTAL_HEADERS_LEN; 456 - rx_data = dto->regd[1]->virt_addr; 457 - rx_data += dto->offset[1]; 458 - } 595 + iscsi_iser_recv(conn->iscsi_conn, hdr, 596 + rx_desc->data, rx_xfer_len - ISER_HEADERS_LEN); 459 597 460 - opcode = hdr->opcode & ISCSI_OPCODE_MASK; 461 - 462 - if (opcode == ISCSI_OP_SCSI_CMD_RSP) { 463 - spin_lock(&conn->iscsi_conn->session->lock); 464 - task = iscsi_itt_to_ctask(conn->iscsi_conn, hdr->itt); 465 - if (task) 466 - __iscsi_get_task(task); 467 - spin_unlock(&conn->iscsi_conn->session->lock); 468 - 469 - if (!task) 470 - iser_err("itt can't be matched to task!!! " 471 - "conn %p opcode %d itt %d\n", 472 - conn->iscsi_conn, opcode, hdr->itt); 473 - else { 474 - iser_task = task->dd_data; 475 - iser_dbg("itt %d task %p\n",hdr->itt, task); 476 - iser_task->status = ISER_TASK_STATUS_COMPLETED; 477 - iser_task_rdma_finalize(iser_task); 478 - iscsi_put_task(task); 479 - } 480 - } 481 - iser_dto_buffs_release(dto); 482 - 483 - iscsi_iser_recv(conn->iscsi_conn, hdr, rx_data, rx_data_len); 484 - 485 - kfree(rx_desc->data); 486 - kmem_cache_free(ig.desc_cache, rx_desc); 598 + ib_dma_sync_single_for_device(ib_conn->device->ib_device, rx_dma, 599 + rx_buflen, DMA_FROM_DEVICE); 487 600 488 601 /* decrementing conn->post_recv_buf_count only --after-- freeing the * 489 602 * task eliminates the need to worry on tasks which are completed in * 490 603 * parallel to the execution of iser_conn_term. So the code that waits * 491 604 * for the posted rx bufs refcount to become zero handles everything */ 492 - atomic_dec(&conn->ib_conn->post_recv_buf_count); 605 + conn->ib_conn->post_recv_buf_count--; 493 606 494 - /* 495 - * if an unexpected PDU was received then the recv wr consumed must 496 - * be replaced, this is done in the next send of a control-type PDU 497 - */ 498 - if (opcode == ISCSI_OP_NOOP_IN && hdr->itt == RESERVED_ITT) { 499 - /* nop-in with itt = 0xffffffff */ 500 - atomic_inc(&conn->ib_conn->unexpected_pdu_count); 607 + if (rx_dma == ib_conn->login_dma) 608 + return; 609 + 610 + outstanding = ib_conn->post_recv_buf_count; 611 + if (outstanding + ISER_MIN_POSTED_RX <= ISER_QP_MAX_RECV_DTOS) { 612 + count = min(ISER_QP_MAX_RECV_DTOS - outstanding, 613 + ISER_MIN_POSTED_RX); 614 + err = iser_post_recvm(ib_conn, count); 615 + if (err) 616 + iser_err("posting %d rx bufs err %d\n", count, err); 501 617 } 502 - else if (opcode == ISCSI_OP_ASYNC_EVENT) { 503 - /* asyncronous message */ 504 - atomic_inc(&conn->ib_conn->unexpected_pdu_count); 505 - } 506 - /* a reject PDU consumes the recv buf posted for the response */ 507 618 } 508 619 509 - void iser_snd_completion(struct iser_desc *tx_desc) 620 + void iser_snd_completion(struct iser_tx_desc *tx_desc, 621 + struct iser_conn *ib_conn) 510 622 { 511 - struct iser_dto *dto = &tx_desc->dto; 512 - struct iser_conn *ib_conn = dto->ib_conn; 513 - struct iscsi_iser_conn *iser_conn = ib_conn->iser_conn; 514 - struct iscsi_conn *conn = iser_conn->iscsi_conn; 515 623 struct iscsi_task *task; 516 - int resume_tx = 0; 624 + struct iser_device *device = ib_conn->device; 517 625 518 - iser_dbg("Initiator, Data sent dto=0x%p\n", dto); 519 - 520 - iser_dto_buffs_release(dto); 521 - 522 - if (tx_desc->type == ISCSI_TX_DATAOUT) 626 + if (tx_desc->type == ISCSI_TX_DATAOUT) { 627 + ib_dma_unmap_single(device->ib_device, tx_desc->dma_addr, 628 + ISER_HEADERS_LEN, DMA_TO_DEVICE); 523 629 kmem_cache_free(ig.desc_cache, tx_desc); 524 - 525 - if (atomic_read(&iser_conn->ib_conn->post_send_buf_count) == 526 - ISER_QP_MAX_REQ_DTOS) 527 - resume_tx = 1; 630 + } 528 631 529 632 atomic_dec(&ib_conn->post_send_buf_count); 530 - 531 - if (resume_tx) { 532 - iser_dbg("%ld resuming tx\n",jiffies); 533 - iscsi_conn_queue_work(conn); 534 - } 535 633 536 634 if (tx_desc->type == ISCSI_TX_CONTROL) { 537 635 /* this arithmetic is legal by libiscsi dd_data allocation */ ··· 528 692 529 693 void iser_task_rdma_finalize(struct iscsi_iser_task *iser_task) 530 694 { 531 - int deferred; 532 695 int is_rdma_aligned = 1; 533 696 struct iser_regd_buf *regd; 534 697 ··· 545 710 546 711 if (iser_task->dir[ISER_DIR_IN]) { 547 712 regd = &iser_task->rdma_regd[ISER_DIR_IN]; 548 - deferred = iser_regd_buff_release(regd); 549 - if (deferred) { 550 - iser_err("%d references remain for BUF-IN rdma reg\n", 551 - atomic_read(&regd->ref_count)); 552 - } 713 + if (regd->reg.is_fmr) 714 + iser_unreg_mem(&regd->reg); 553 715 } 554 716 555 717 if (iser_task->dir[ISER_DIR_OUT]) { 556 718 regd = &iser_task->rdma_regd[ISER_DIR_OUT]; 557 - deferred = iser_regd_buff_release(regd); 558 - if (deferred) { 559 - iser_err("%d references remain for BUF-OUT rdma reg\n", 560 - atomic_read(&regd->ref_count)); 561 - } 719 + if (regd->reg.is_fmr) 720 + iser_unreg_mem(&regd->reg); 562 721 } 563 722 564 723 /* if the data was unaligned, it was already unmapped and then copied */ 565 724 if (is_rdma_aligned) 566 725 iser_dma_unmap_task_data(iser_task); 567 726 } 568 - 569 - void iser_dto_buffs_release(struct iser_dto *dto) 570 - { 571 - int i; 572 - 573 - for (i = 0; i < dto->regd_vector_len; i++) 574 - iser_regd_buff_release(dto->regd[i]); 575 - } 576 -
+2 -62
drivers/infiniband/ulp/iser/iser_memory.c
··· 41 41 #define ISER_KMALLOC_THRESHOLD 0x20000 /* 128K - kmalloc limit */ 42 42 43 43 /** 44 - * Decrements the reference count for the 45 - * registered buffer & releases it 46 - * 47 - * returns 0 if released, 1 if deferred 48 - */ 49 - int iser_regd_buff_release(struct iser_regd_buf *regd_buf) 50 - { 51 - struct ib_device *dev; 52 - 53 - if ((atomic_read(&regd_buf->ref_count) == 0) || 54 - atomic_dec_and_test(&regd_buf->ref_count)) { 55 - /* if we used the dma mr, unreg is just NOP */ 56 - if (regd_buf->reg.is_fmr) 57 - iser_unreg_mem(&regd_buf->reg); 58 - 59 - if (regd_buf->dma_addr) { 60 - dev = regd_buf->device->ib_device; 61 - ib_dma_unmap_single(dev, 62 - regd_buf->dma_addr, 63 - regd_buf->data_size, 64 - regd_buf->direction); 65 - } 66 - /* else this regd buf is associated with task which we */ 67 - /* dma_unmap_single/sg later */ 68 - return 0; 69 - } else { 70 - iser_dbg("Release deferred, regd.buff: 0x%p\n", regd_buf); 71 - return 1; 72 - } 73 - } 74 - 75 - /** 76 - * iser_reg_single - fills registered buffer descriptor with 77 - * registration information 78 - */ 79 - void iser_reg_single(struct iser_device *device, 80 - struct iser_regd_buf *regd_buf, 81 - enum dma_data_direction direction) 82 - { 83 - u64 dma_addr; 84 - 85 - dma_addr = ib_dma_map_single(device->ib_device, 86 - regd_buf->virt_addr, 87 - regd_buf->data_size, direction); 88 - BUG_ON(ib_dma_mapping_error(device->ib_device, dma_addr)); 89 - 90 - regd_buf->reg.lkey = device->mr->lkey; 91 - regd_buf->reg.len = regd_buf->data_size; 92 - regd_buf->reg.va = dma_addr; 93 - regd_buf->reg.is_fmr = 0; 94 - 95 - regd_buf->dma_addr = dma_addr; 96 - regd_buf->direction = direction; 97 - } 98 - 99 - /** 100 44 * iser_start_rdma_unaligned_sg 101 45 */ 102 46 static int iser_start_rdma_unaligned_sg(struct iscsi_iser_task *iser_task, ··· 53 109 unsigned long cmd_data_len = data->data_len; 54 110 55 111 if (cmd_data_len > ISER_KMALLOC_THRESHOLD) 56 - mem = (void *)__get_free_pages(GFP_NOIO, 112 + mem = (void *)__get_free_pages(GFP_ATOMIC, 57 113 ilog2(roundup_pow_of_two(cmd_data_len)) - PAGE_SHIFT); 58 114 else 59 - mem = kmalloc(cmd_data_len, GFP_NOIO); 115 + mem = kmalloc(cmd_data_len, GFP_ATOMIC); 60 116 61 117 if (mem == NULL) { 62 118 iser_err("Failed to allocate mem size %d %d for copying sglist\n", ··· 418 474 return err; 419 475 } 420 476 } 421 - 422 - /* take a reference on this regd buf such that it will not be released * 423 - * (eg in send dto completion) before we get the scsi response */ 424 - atomic_inc(&regd_buf->ref_count); 425 477 return 0; 426 478 }
+150 -137
drivers/infiniband/ulp/iser/iser_verbs.c
··· 37 37 #include "iscsi_iser.h" 38 38 39 39 #define ISCSI_ISER_MAX_CONN 8 40 - #define ISER_MAX_CQ_LEN ((ISER_QP_MAX_RECV_DTOS + \ 41 - ISER_QP_MAX_REQ_DTOS) * \ 42 - ISCSI_ISER_MAX_CONN) 40 + #define ISER_MAX_RX_CQ_LEN (ISER_QP_MAX_RECV_DTOS * ISCSI_ISER_MAX_CONN) 41 + #define ISER_MAX_TX_CQ_LEN (ISER_QP_MAX_REQ_DTOS * ISCSI_ISER_MAX_CONN) 43 42 44 43 static void iser_cq_tasklet_fn(unsigned long data); 45 44 static void iser_cq_callback(struct ib_cq *cq, void *cq_context); ··· 66 67 if (IS_ERR(device->pd)) 67 68 goto pd_err; 68 69 69 - device->cq = ib_create_cq(device->ib_device, 70 + device->rx_cq = ib_create_cq(device->ib_device, 70 71 iser_cq_callback, 71 72 iser_cq_event_callback, 72 73 (void *)device, 73 - ISER_MAX_CQ_LEN, 0); 74 - if (IS_ERR(device->cq)) 75 - goto cq_err; 74 + ISER_MAX_RX_CQ_LEN, 0); 75 + if (IS_ERR(device->rx_cq)) 76 + goto rx_cq_err; 76 77 77 - if (ib_req_notify_cq(device->cq, IB_CQ_NEXT_COMP)) 78 + device->tx_cq = ib_create_cq(device->ib_device, 79 + NULL, iser_cq_event_callback, 80 + (void *)device, 81 + ISER_MAX_TX_CQ_LEN, 0); 82 + 83 + if (IS_ERR(device->tx_cq)) 84 + goto tx_cq_err; 85 + 86 + if (ib_req_notify_cq(device->rx_cq, IB_CQ_NEXT_COMP)) 78 87 goto cq_arm_err; 79 88 80 89 tasklet_init(&device->cq_tasklet, ··· 100 93 dma_mr_err: 101 94 tasklet_kill(&device->cq_tasklet); 102 95 cq_arm_err: 103 - ib_destroy_cq(device->cq); 104 - cq_err: 96 + ib_destroy_cq(device->tx_cq); 97 + tx_cq_err: 98 + ib_destroy_cq(device->rx_cq); 99 + rx_cq_err: 105 100 ib_dealloc_pd(device->pd); 106 101 pd_err: 107 102 iser_err("failed to allocate an IB resource\n"); ··· 121 112 tasklet_kill(&device->cq_tasklet); 122 113 123 114 (void)ib_dereg_mr(device->mr); 124 - (void)ib_destroy_cq(device->cq); 115 + (void)ib_destroy_cq(device->tx_cq); 116 + (void)ib_destroy_cq(device->rx_cq); 125 117 (void)ib_dealloc_pd(device->pd); 126 118 127 119 device->mr = NULL; 128 - device->cq = NULL; 120 + device->tx_cq = NULL; 121 + device->rx_cq = NULL; 129 122 device->pd = NULL; 130 123 } 131 124 ··· 140 129 { 141 130 struct iser_device *device; 142 131 struct ib_qp_init_attr init_attr; 143 - int ret; 132 + int ret = -ENOMEM; 144 133 struct ib_fmr_pool_param params; 145 134 146 135 BUG_ON(ib_conn->device == NULL); 147 136 148 137 device = ib_conn->device; 138 + 139 + ib_conn->login_buf = kmalloc(ISER_RX_LOGIN_SIZE, GFP_KERNEL); 140 + if (!ib_conn->login_buf) { 141 + goto alloc_err; 142 + ret = -ENOMEM; 143 + } 144 + 145 + ib_conn->login_dma = ib_dma_map_single(ib_conn->device->ib_device, 146 + (void *)ib_conn->login_buf, ISER_RX_LOGIN_SIZE, 147 + DMA_FROM_DEVICE); 149 148 150 149 ib_conn->page_vec = kmalloc(sizeof(struct iser_page_vec) + 151 150 (sizeof(u64) * (ISCSI_ISER_SG_TABLESIZE +1)), ··· 190 169 191 170 init_attr.event_handler = iser_qp_event_callback; 192 171 init_attr.qp_context = (void *)ib_conn; 193 - init_attr.send_cq = device->cq; 194 - init_attr.recv_cq = device->cq; 172 + init_attr.send_cq = device->tx_cq; 173 + init_attr.recv_cq = device->rx_cq; 195 174 init_attr.cap.max_send_wr = ISER_QP_MAX_REQ_DTOS; 196 175 init_attr.cap.max_recv_wr = ISER_QP_MAX_RECV_DTOS; 197 - init_attr.cap.max_send_sge = MAX_REGD_BUF_VECTOR_LEN; 198 - init_attr.cap.max_recv_sge = 2; 176 + init_attr.cap.max_send_sge = 2; 177 + init_attr.cap.max_recv_sge = 1; 199 178 init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; 200 179 init_attr.qp_type = IB_QPT_RC; 201 180 ··· 213 192 (void)ib_destroy_fmr_pool(ib_conn->fmr_pool); 214 193 fmr_pool_err: 215 194 kfree(ib_conn->page_vec); 195 + kfree(ib_conn->login_buf); 216 196 alloc_err: 217 197 iser_err("unable to alloc mem or create resource, err %d\n", ret); 218 198 return ret; ··· 300 278 mutex_unlock(&ig.device_list_mutex); 301 279 } 302 280 303 - int iser_conn_state_comp(struct iser_conn *ib_conn, 304 - enum iser_ib_conn_state comp) 305 - { 306 - int ret; 307 - 308 - spin_lock_bh(&ib_conn->lock); 309 - ret = (ib_conn->state == comp); 310 - spin_unlock_bh(&ib_conn->lock); 311 - return ret; 312 - } 313 - 314 281 static int iser_conn_state_comp_exch(struct iser_conn *ib_conn, 315 282 enum iser_ib_conn_state comp, 316 283 enum iser_ib_conn_state exch) ··· 325 314 mutex_lock(&ig.connlist_mutex); 326 315 list_del(&ib_conn->conn_list); 327 316 mutex_unlock(&ig.connlist_mutex); 328 - 317 + iser_free_rx_descriptors(ib_conn); 329 318 iser_free_ib_conn_res(ib_conn); 330 319 ib_conn->device = NULL; 331 320 /* on EVENT_ADDR_ERROR there's no device yet for this conn */ ··· 453 442 ISCSI_ERR_CONN_FAILED); 454 443 455 444 /* Complete the termination process if no posts are pending */ 456 - if ((atomic_read(&ib_conn->post_recv_buf_count) == 0) && 445 + if (ib_conn->post_recv_buf_count == 0 && 457 446 (atomic_read(&ib_conn->post_send_buf_count) == 0)) { 458 447 ib_conn->state = ISER_CONN_DOWN; 459 448 wake_up_interruptible(&ib_conn->wait); ··· 500 489 { 501 490 ib_conn->state = ISER_CONN_INIT; 502 491 init_waitqueue_head(&ib_conn->wait); 503 - atomic_set(&ib_conn->post_recv_buf_count, 0); 492 + ib_conn->post_recv_buf_count = 0; 504 493 atomic_set(&ib_conn->post_send_buf_count, 0); 505 - atomic_set(&ib_conn->unexpected_pdu_count, 0); 506 494 atomic_set(&ib_conn->refcount, 1); 507 495 INIT_LIST_HEAD(&ib_conn->conn_list); 508 496 spin_lock_init(&ib_conn->lock); ··· 636 626 reg->mem_h = NULL; 637 627 } 638 628 639 - /** 640 - * iser_dto_to_iov - builds IOV from a dto descriptor 641 - */ 642 - static void iser_dto_to_iov(struct iser_dto *dto, struct ib_sge *iov, int iov_len) 629 + int iser_post_recvl(struct iser_conn *ib_conn) 643 630 { 644 - int i; 645 - struct ib_sge *sge; 646 - struct iser_regd_buf *regd_buf; 631 + struct ib_recv_wr rx_wr, *rx_wr_failed; 632 + struct ib_sge sge; 633 + int ib_ret; 647 634 648 - if (dto->regd_vector_len > iov_len) { 649 - iser_err("iov size %d too small for posting dto of len %d\n", 650 - iov_len, dto->regd_vector_len); 651 - BUG(); 652 - } 635 + sge.addr = ib_conn->login_dma; 636 + sge.length = ISER_RX_LOGIN_SIZE; 637 + sge.lkey = ib_conn->device->mr->lkey; 653 638 654 - for (i = 0; i < dto->regd_vector_len; i++) { 655 - sge = &iov[i]; 656 - regd_buf = dto->regd[i]; 639 + rx_wr.wr_id = (unsigned long)ib_conn->login_buf; 640 + rx_wr.sg_list = &sge; 641 + rx_wr.num_sge = 1; 642 + rx_wr.next = NULL; 657 643 658 - sge->addr = regd_buf->reg.va; 659 - sge->length = regd_buf->reg.len; 660 - sge->lkey = regd_buf->reg.lkey; 661 - 662 - if (dto->used_sz[i] > 0) /* Adjust size */ 663 - sge->length = dto->used_sz[i]; 664 - 665 - /* offset and length should not exceed the regd buf length */ 666 - if (sge->length + dto->offset[i] > regd_buf->reg.len) { 667 - iser_err("Used len:%ld + offset:%d, exceed reg.buf.len:" 668 - "%ld in dto:0x%p [%d], va:0x%08lX\n", 669 - (unsigned long)sge->length, dto->offset[i], 670 - (unsigned long)regd_buf->reg.len, dto, i, 671 - (unsigned long)sge->addr); 672 - BUG(); 673 - } 674 - 675 - sge->addr += dto->offset[i]; /* Adjust offset */ 676 - } 677 - } 678 - 679 - /** 680 - * iser_post_recv - Posts a receive buffer. 681 - * 682 - * returns 0 on success, -1 on failure 683 - */ 684 - int iser_post_recv(struct iser_desc *rx_desc) 685 - { 686 - int ib_ret, ret_val = 0; 687 - struct ib_recv_wr recv_wr, *recv_wr_failed; 688 - struct ib_sge iov[2]; 689 - struct iser_conn *ib_conn; 690 - struct iser_dto *recv_dto = &rx_desc->dto; 691 - 692 - /* Retrieve conn */ 693 - ib_conn = recv_dto->ib_conn; 694 - 695 - iser_dto_to_iov(recv_dto, iov, 2); 696 - 697 - recv_wr.next = NULL; 698 - recv_wr.sg_list = iov; 699 - recv_wr.num_sge = recv_dto->regd_vector_len; 700 - recv_wr.wr_id = (unsigned long)rx_desc; 701 - 702 - atomic_inc(&ib_conn->post_recv_buf_count); 703 - ib_ret = ib_post_recv(ib_conn->qp, &recv_wr, &recv_wr_failed); 644 + ib_conn->post_recv_buf_count++; 645 + ib_ret = ib_post_recv(ib_conn->qp, &rx_wr, &rx_wr_failed); 704 646 if (ib_ret) { 705 647 iser_err("ib_post_recv failed ret=%d\n", ib_ret); 706 - atomic_dec(&ib_conn->post_recv_buf_count); 707 - ret_val = -1; 648 + ib_conn->post_recv_buf_count--; 649 + } 650 + return ib_ret; 651 + } 652 + 653 + int iser_post_recvm(struct iser_conn *ib_conn, int count) 654 + { 655 + struct ib_recv_wr *rx_wr, *rx_wr_failed; 656 + int i, ib_ret; 657 + unsigned int my_rx_head = ib_conn->rx_desc_head; 658 + struct iser_rx_desc *rx_desc; 659 + 660 + for (rx_wr = ib_conn->rx_wr, i = 0; i < count; i++, rx_wr++) { 661 + rx_desc = &ib_conn->rx_descs[my_rx_head]; 662 + rx_wr->wr_id = (unsigned long)rx_desc; 663 + rx_wr->sg_list = &rx_desc->rx_sg; 664 + rx_wr->num_sge = 1; 665 + rx_wr->next = rx_wr + 1; 666 + my_rx_head = (my_rx_head + 1) & (ISER_QP_MAX_RECV_DTOS - 1); 708 667 } 709 668 710 - return ret_val; 669 + rx_wr--; 670 + rx_wr->next = NULL; /* mark end of work requests list */ 671 + 672 + ib_conn->post_recv_buf_count += count; 673 + ib_ret = ib_post_recv(ib_conn->qp, ib_conn->rx_wr, &rx_wr_failed); 674 + if (ib_ret) { 675 + iser_err("ib_post_recv failed ret=%d\n", ib_ret); 676 + ib_conn->post_recv_buf_count -= count; 677 + } else 678 + ib_conn->rx_desc_head = my_rx_head; 679 + return ib_ret; 711 680 } 681 + 712 682 713 683 /** 714 684 * iser_start_send - Initiate a Send DTO operation 715 685 * 716 686 * returns 0 on success, -1 on failure 717 687 */ 718 - int iser_post_send(struct iser_desc *tx_desc) 688 + int iser_post_send(struct iser_conn *ib_conn, struct iser_tx_desc *tx_desc) 719 689 { 720 - int ib_ret, ret_val = 0; 690 + int ib_ret; 721 691 struct ib_send_wr send_wr, *send_wr_failed; 722 - struct ib_sge iov[MAX_REGD_BUF_VECTOR_LEN]; 723 - struct iser_conn *ib_conn; 724 - struct iser_dto *dto = &tx_desc->dto; 725 692 726 - ib_conn = dto->ib_conn; 727 - 728 - iser_dto_to_iov(dto, iov, MAX_REGD_BUF_VECTOR_LEN); 693 + ib_dma_sync_single_for_device(ib_conn->device->ib_device, 694 + tx_desc->dma_addr, ISER_HEADERS_LEN, DMA_TO_DEVICE); 729 695 730 696 send_wr.next = NULL; 731 697 send_wr.wr_id = (unsigned long)tx_desc; 732 - send_wr.sg_list = iov; 733 - send_wr.num_sge = dto->regd_vector_len; 698 + send_wr.sg_list = tx_desc->tx_sg; 699 + send_wr.num_sge = tx_desc->num_sge; 734 700 send_wr.opcode = IB_WR_SEND; 735 - send_wr.send_flags = dto->notify_enable ? IB_SEND_SIGNALED : 0; 701 + send_wr.send_flags = IB_SEND_SIGNALED; 736 702 737 703 atomic_inc(&ib_conn->post_send_buf_count); 738 704 739 705 ib_ret = ib_post_send(ib_conn->qp, &send_wr, &send_wr_failed); 740 706 if (ib_ret) { 741 - iser_err("Failed to start SEND DTO, dto: 0x%p, IOV len: %d\n", 742 - dto, dto->regd_vector_len); 743 707 iser_err("ib_post_send failed, ret:%d\n", ib_ret); 744 708 atomic_dec(&ib_conn->post_send_buf_count); 745 - ret_val = -1; 746 709 } 747 - 748 - return ret_val; 710 + return ib_ret; 749 711 } 750 712 751 - static void iser_handle_comp_error(struct iser_desc *desc) 713 + static void iser_handle_comp_error(struct iser_tx_desc *desc, 714 + struct iser_conn *ib_conn) 752 715 { 753 - struct iser_dto *dto = &desc->dto; 754 - struct iser_conn *ib_conn = dto->ib_conn; 755 - 756 - iser_dto_buffs_release(dto); 757 - 758 - if (desc->type == ISCSI_RX) { 759 - kfree(desc->data); 716 + if (desc && desc->type == ISCSI_TX_DATAOUT) 760 717 kmem_cache_free(ig.desc_cache, desc); 761 - atomic_dec(&ib_conn->post_recv_buf_count); 762 - } else { /* type is TX control/command/dataout */ 763 - if (desc->type == ISCSI_TX_DATAOUT) 764 - kmem_cache_free(ig.desc_cache, desc); 765 - atomic_dec(&ib_conn->post_send_buf_count); 766 - } 767 718 768 - if (atomic_read(&ib_conn->post_recv_buf_count) == 0 && 719 + if (ib_conn->post_recv_buf_count == 0 && 769 720 atomic_read(&ib_conn->post_send_buf_count) == 0) { 770 721 /* getting here when the state is UP means that the conn is * 771 722 * being terminated asynchronously from the iSCSI layer's * ··· 745 774 } 746 775 } 747 776 777 + static int iser_drain_tx_cq(struct iser_device *device) 778 + { 779 + struct ib_cq *cq = device->tx_cq; 780 + struct ib_wc wc; 781 + struct iser_tx_desc *tx_desc; 782 + struct iser_conn *ib_conn; 783 + int completed_tx = 0; 784 + 785 + while (ib_poll_cq(cq, 1, &wc) == 1) { 786 + tx_desc = (struct iser_tx_desc *) (unsigned long) wc.wr_id; 787 + ib_conn = wc.qp->qp_context; 788 + if (wc.status == IB_WC_SUCCESS) { 789 + if (wc.opcode == IB_WC_SEND) 790 + iser_snd_completion(tx_desc, ib_conn); 791 + else 792 + iser_err("expected opcode %d got %d\n", 793 + IB_WC_SEND, wc.opcode); 794 + } else { 795 + iser_err("tx id %llx status %d vend_err %x\n", 796 + wc.wr_id, wc.status, wc.vendor_err); 797 + atomic_dec(&ib_conn->post_send_buf_count); 798 + iser_handle_comp_error(tx_desc, ib_conn); 799 + } 800 + completed_tx++; 801 + } 802 + return completed_tx; 803 + } 804 + 805 + 748 806 static void iser_cq_tasklet_fn(unsigned long data) 749 807 { 750 808 struct iser_device *device = (struct iser_device *)data; 751 - struct ib_cq *cq = device->cq; 809 + struct ib_cq *cq = device->rx_cq; 752 810 struct ib_wc wc; 753 - struct iser_desc *desc; 811 + struct iser_rx_desc *desc; 754 812 unsigned long xfer_len; 813 + struct iser_conn *ib_conn; 814 + int completed_tx, completed_rx; 815 + completed_tx = completed_rx = 0; 755 816 756 817 while (ib_poll_cq(cq, 1, &wc) == 1) { 757 - desc = (struct iser_desc *) (unsigned long) wc.wr_id; 818 + desc = (struct iser_rx_desc *) (unsigned long) wc.wr_id; 758 819 BUG_ON(desc == NULL); 759 - 820 + ib_conn = wc.qp->qp_context; 760 821 if (wc.status == IB_WC_SUCCESS) { 761 - if (desc->type == ISCSI_RX) { 822 + if (wc.opcode == IB_WC_RECV) { 762 823 xfer_len = (unsigned long)wc.byte_len; 763 - iser_rcv_completion(desc, xfer_len); 764 - } else /* type == ISCSI_TX_CONTROL/SCSI_CMD/DOUT */ 765 - iser_snd_completion(desc); 824 + iser_rcv_completion(desc, xfer_len, ib_conn); 825 + } else 826 + iser_err("expected opcode %d got %d\n", 827 + IB_WC_RECV, wc.opcode); 766 828 } else { 767 - iser_err("comp w. error op %d status %d\n",desc->type,wc.status); 768 - iser_handle_comp_error(desc); 829 + if (wc.status != IB_WC_WR_FLUSH_ERR) 830 + iser_err("rx id %llx status %d vend_err %x\n", 831 + wc.wr_id, wc.status, wc.vendor_err); 832 + ib_conn->post_recv_buf_count--; 833 + iser_handle_comp_error(NULL, ib_conn); 769 834 } 835 + completed_rx++; 836 + if (!(completed_rx & 63)) 837 + completed_tx += iser_drain_tx_cq(device); 770 838 } 771 839 /* #warning "it is assumed here that arming CQ only once its empty" * 772 840 * " would not cause interrupts to be missed" */ 773 841 ib_req_notify_cq(cq, IB_CQ_NEXT_COMP); 842 + 843 + completed_tx += iser_drain_tx_cq(device); 844 + iser_dbg("got %d rx %d tx completions\n", completed_rx, completed_tx); 774 845 } 775 846 776 847 static void iser_cq_callback(struct ib_cq *cq, void *cq_context)
+63 -28
drivers/infiniband/ulp/srp/ib_srp.c
··· 80 80 81 81 static void srp_add_one(struct ib_device *device); 82 82 static void srp_remove_one(struct ib_device *device); 83 - static void srp_completion(struct ib_cq *cq, void *target_ptr); 83 + static void srp_recv_completion(struct ib_cq *cq, void *target_ptr); 84 + static void srp_send_completion(struct ib_cq *cq, void *target_ptr); 84 85 static int srp_cm_handler(struct ib_cm_id *cm_id, struct ib_cm_event *event); 85 86 86 87 static struct scsi_transport_template *ib_srp_transport_template; ··· 228 227 if (!init_attr) 229 228 return -ENOMEM; 230 229 231 - target->cq = ib_create_cq(target->srp_host->srp_dev->dev, 232 - srp_completion, NULL, target, SRP_CQ_SIZE, 0); 233 - if (IS_ERR(target->cq)) { 234 - ret = PTR_ERR(target->cq); 235 - goto out; 230 + target->recv_cq = ib_create_cq(target->srp_host->srp_dev->dev, 231 + srp_recv_completion, NULL, target, SRP_RQ_SIZE, 0); 232 + if (IS_ERR(target->recv_cq)) { 233 + ret = PTR_ERR(target->recv_cq); 234 + goto err; 236 235 } 237 236 238 - ib_req_notify_cq(target->cq, IB_CQ_NEXT_COMP); 237 + target->send_cq = ib_create_cq(target->srp_host->srp_dev->dev, 238 + srp_send_completion, NULL, target, SRP_SQ_SIZE, 0); 239 + if (IS_ERR(target->send_cq)) { 240 + ret = PTR_ERR(target->send_cq); 241 + goto err_recv_cq; 242 + } 243 + 244 + ib_req_notify_cq(target->recv_cq, IB_CQ_NEXT_COMP); 239 245 240 246 init_attr->event_handler = srp_qp_event; 241 247 init_attr->cap.max_send_wr = SRP_SQ_SIZE; ··· 251 243 init_attr->cap.max_send_sge = 1; 252 244 init_attr->sq_sig_type = IB_SIGNAL_ALL_WR; 253 245 init_attr->qp_type = IB_QPT_RC; 254 - init_attr->send_cq = target->cq; 255 - init_attr->recv_cq = target->cq; 246 + init_attr->send_cq = target->send_cq; 247 + init_attr->recv_cq = target->recv_cq; 256 248 257 249 target->qp = ib_create_qp(target->srp_host->srp_dev->pd, init_attr); 258 250 if (IS_ERR(target->qp)) { 259 251 ret = PTR_ERR(target->qp); 260 - ib_destroy_cq(target->cq); 261 - goto out; 252 + goto err_send_cq; 262 253 } 263 254 264 255 ret = srp_init_qp(target, target->qp); 265 - if (ret) { 266 - ib_destroy_qp(target->qp); 267 - ib_destroy_cq(target->cq); 268 - goto out; 269 - } 256 + if (ret) 257 + goto err_qp; 270 258 271 - out: 259 + kfree(init_attr); 260 + return 0; 261 + 262 + err_qp: 263 + ib_destroy_qp(target->qp); 264 + 265 + err_send_cq: 266 + ib_destroy_cq(target->send_cq); 267 + 268 + err_recv_cq: 269 + ib_destroy_cq(target->recv_cq); 270 + 271 + err: 272 272 kfree(init_attr); 273 273 return ret; 274 274 } ··· 286 270 int i; 287 271 288 272 ib_destroy_qp(target->qp); 289 - ib_destroy_cq(target->cq); 273 + ib_destroy_cq(target->send_cq); 274 + ib_destroy_cq(target->recv_cq); 290 275 291 276 for (i = 0; i < SRP_RQ_SIZE; ++i) 292 277 srp_free_iu(target->srp_host, target->rx_ring[i]); ··· 585 568 if (ret) 586 569 goto err; 587 570 588 - while (ib_poll_cq(target->cq, 1, &wc) > 0) 571 + while (ib_poll_cq(target->recv_cq, 1, &wc) > 0) 572 + ; /* nothing */ 573 + while (ib_poll_cq(target->send_cq, 1, &wc) > 0) 589 574 ; /* nothing */ 590 575 591 576 spin_lock_irq(target->scsi_host->host_lock); ··· 870 851 struct srp_iu *iu; 871 852 u8 opcode; 872 853 873 - iu = target->rx_ring[wc->wr_id & ~SRP_OP_RECV]; 854 + iu = target->rx_ring[wc->wr_id]; 874 855 875 856 dev = target->srp_host->srp_dev->dev; 876 857 ib_dma_sync_single_for_cpu(dev, iu->dma, target->max_ti_iu_len, ··· 917 898 DMA_FROM_DEVICE); 918 899 } 919 900 920 - static void srp_completion(struct ib_cq *cq, void *target_ptr) 901 + static void srp_recv_completion(struct ib_cq *cq, void *target_ptr) 921 902 { 922 903 struct srp_target_port *target = target_ptr; 923 904 struct ib_wc wc; ··· 926 907 while (ib_poll_cq(cq, 1, &wc) > 0) { 927 908 if (wc.status) { 928 909 shost_printk(KERN_ERR, target->scsi_host, 929 - PFX "failed %s status %d\n", 930 - wc.wr_id & SRP_OP_RECV ? "receive" : "send", 910 + PFX "failed receive status %d\n", 931 911 wc.status); 932 912 target->qp_in_error = 1; 933 913 break; 934 914 } 935 915 936 - if (wc.wr_id & SRP_OP_RECV) 937 - srp_handle_recv(target, &wc); 938 - else 939 - ++target->tx_tail; 916 + srp_handle_recv(target, &wc); 917 + } 918 + } 919 + 920 + static void srp_send_completion(struct ib_cq *cq, void *target_ptr) 921 + { 922 + struct srp_target_port *target = target_ptr; 923 + struct ib_wc wc; 924 + 925 + while (ib_poll_cq(cq, 1, &wc) > 0) { 926 + if (wc.status) { 927 + shost_printk(KERN_ERR, target->scsi_host, 928 + PFX "failed send status %d\n", 929 + wc.status); 930 + target->qp_in_error = 1; 931 + break; 932 + } 933 + 934 + ++target->tx_tail; 940 935 } 941 936 } 942 937 ··· 963 930 int ret; 964 931 965 932 next = target->rx_head & (SRP_RQ_SIZE - 1); 966 - wr.wr_id = next | SRP_OP_RECV; 933 + wr.wr_id = next; 967 934 iu = target->rx_ring[next]; 968 935 969 936 list.addr = iu->dma; ··· 1002 969 enum srp_request_type req_type) 1003 970 { 1004 971 s32 min = (req_type == SRP_REQ_TASK_MGMT) ? 1 : 2; 972 + 973 + srp_send_completion(target->send_cq, target); 1005 974 1006 975 if (target->tx_head - target->tx_tail >= SRP_SQ_SIZE) 1007 976 return NULL;
+2 -4
drivers/infiniband/ulp/srp/ib_srp.h
··· 60 60 SRP_RQ_SHIFT = 6, 61 61 SRP_RQ_SIZE = 1 << SRP_RQ_SHIFT, 62 62 SRP_SQ_SIZE = SRP_RQ_SIZE - 1, 63 - SRP_CQ_SIZE = SRP_SQ_SIZE + SRP_RQ_SIZE, 64 63 65 64 SRP_TAG_TSK_MGMT = 1 << (SRP_RQ_SHIFT + 1), 66 65 ··· 67 68 SRP_FMR_POOL_SIZE = 1024, 68 69 SRP_FMR_DIRTY_SIZE = SRP_FMR_POOL_SIZE / 4 69 70 }; 70 - 71 - #define SRP_OP_RECV (1 << 31) 72 71 73 72 enum srp_target_state { 74 73 SRP_TARGET_LIVE, ··· 130 133 int path_query_id; 131 134 132 135 struct ib_cm_id *cm_id; 133 - struct ib_cq *cq; 136 + struct ib_cq *recv_cq; 137 + struct ib_cq *send_cq; 134 138 struct ib_qp *qp; 135 139 136 140 int max_ti_iu_len;
+5
drivers/net/cxgb3/adapter.h
··· 264 264 struct work_struct fatal_error_handler_task; 265 265 struct work_struct link_fault_handler_task; 266 266 267 + struct work_struct db_full_task; 268 + struct work_struct db_empty_task; 269 + struct work_struct db_drop_task; 270 + 267 271 struct dentry *debugfs_root; 268 272 269 273 struct mutex mdio_lock; ··· 339 335 int t3_get_desc(const struct sge_qset *qs, unsigned int qnum, unsigned int idx, 340 336 unsigned char *data); 341 337 irqreturn_t t3_sge_intr_msix(int irq, void *cookie); 338 + extern struct workqueue_struct *cxgb3_wq; 342 339 343 340 int t3_get_edc_fw(struct cphy *phy, int edc_idx, int size); 344 341
+56 -1
drivers/net/cxgb3/cxgb3_main.c
··· 45 45 #include <linux/firmware.h> 46 46 #include <linux/log2.h> 47 47 #include <linux/stringify.h> 48 + #include <linux/sched.h> 48 49 #include <asm/uaccess.h> 49 50 50 51 #include "common.h" ··· 141 140 * will block keventd as it needs the rtnl lock, and we'll deadlock waiting 142 141 * for our work to complete. Get our own work queue to solve this. 143 142 */ 144 - static struct workqueue_struct *cxgb3_wq; 143 + struct workqueue_struct *cxgb3_wq; 145 144 146 145 /** 147 146 * link_report - show link status and link speed/duplex ··· 585 584 t3_config_rss(adap, F_RQFEEDBACKENABLE | F_TNLLKPEN | F_TNLMAPEN | 586 585 F_TNLPRTEN | F_TNL2TUPEN | F_TNL4TUPEN | 587 586 V_RRCPLCPUSIZE(6) | F_HASHTOEPLITZ, cpus, rspq_map); 587 + } 588 + 589 + static void ring_dbs(struct adapter *adap) 590 + { 591 + int i, j; 592 + 593 + for (i = 0; i < SGE_QSETS; i++) { 594 + struct sge_qset *qs = &adap->sge.qs[i]; 595 + 596 + if (qs->adap) 597 + for (j = 0; j < SGE_TXQ_PER_SET; j++) 598 + t3_write_reg(adap, A_SG_KDOORBELL, F_SELEGRCNTX | V_EGRCNTX(qs->txq[j].cntxt_id)); 599 + } 588 600 } 589 601 590 602 static void init_napi(struct adapter *adap) ··· 2764 2750 spin_unlock_irq(&adapter->work_lock); 2765 2751 } 2766 2752 2753 + static void db_full_task(struct work_struct *work) 2754 + { 2755 + struct adapter *adapter = container_of(work, struct adapter, 2756 + db_full_task); 2757 + 2758 + cxgb3_event_notify(&adapter->tdev, OFFLOAD_DB_FULL, 0); 2759 + } 2760 + 2761 + static void db_empty_task(struct work_struct *work) 2762 + { 2763 + struct adapter *adapter = container_of(work, struct adapter, 2764 + db_empty_task); 2765 + 2766 + cxgb3_event_notify(&adapter->tdev, OFFLOAD_DB_EMPTY, 0); 2767 + } 2768 + 2769 + static void db_drop_task(struct work_struct *work) 2770 + { 2771 + struct adapter *adapter = container_of(work, struct adapter, 2772 + db_drop_task); 2773 + unsigned long delay = 1000; 2774 + unsigned short r; 2775 + 2776 + cxgb3_event_notify(&adapter->tdev, OFFLOAD_DB_DROP, 0); 2777 + 2778 + /* 2779 + * Sleep a while before ringing the driver qset dbs. 2780 + * The delay is between 1000-2023 usecs. 2781 + */ 2782 + get_random_bytes(&r, 2); 2783 + delay += r & 1023; 2784 + set_current_state(TASK_UNINTERRUPTIBLE); 2785 + schedule_timeout(usecs_to_jiffies(delay)); 2786 + ring_dbs(adapter); 2787 + } 2788 + 2767 2789 /* 2768 2790 * Processes external (PHY) interrupts in process context. 2769 2791 */ ··· 3268 3218 INIT_LIST_HEAD(&adapter->adapter_list); 3269 3219 INIT_WORK(&adapter->ext_intr_handler_task, ext_intr_task); 3270 3220 INIT_WORK(&adapter->fatal_error_handler_task, fatal_error_task); 3221 + 3222 + INIT_WORK(&adapter->db_full_task, db_full_task); 3223 + INIT_WORK(&adapter->db_empty_task, db_empty_task); 3224 + INIT_WORK(&adapter->db_drop_task, db_drop_task); 3225 + 3271 3226 INIT_DELAYED_WORK(&adapter->adap_check_task, t3_adap_check_task); 3272 3227 3273 3228 for (i = 0; i < ai->nports0 + ai->nports1; ++i) {
+4 -1
drivers/net/cxgb3/cxgb3_offload.h
··· 73 73 OFFLOAD_STATUS_UP, 74 74 OFFLOAD_STATUS_DOWN, 75 75 OFFLOAD_PORT_DOWN, 76 - OFFLOAD_PORT_UP 76 + OFFLOAD_PORT_UP, 77 + OFFLOAD_DB_FULL, 78 + OFFLOAD_DB_EMPTY, 79 + OFFLOAD_DB_DROP 77 80 }; 78 81 79 82 struct cxgb3_client {
+16
drivers/net/cxgb3/regs.h
··· 254 254 #define V_LOPIODRBDROPERR(x) ((x) << S_LOPIODRBDROPERR) 255 255 #define F_LOPIODRBDROPERR V_LOPIODRBDROPERR(1U) 256 256 257 + #define S_HIPRIORITYDBFULL 7 258 + #define V_HIPRIORITYDBFULL(x) ((x) << S_HIPRIORITYDBFULL) 259 + #define F_HIPRIORITYDBFULL V_HIPRIORITYDBFULL(1U) 260 + 261 + #define S_HIPRIORITYDBEMPTY 6 262 + #define V_HIPRIORITYDBEMPTY(x) ((x) << S_HIPRIORITYDBEMPTY) 263 + #define F_HIPRIORITYDBEMPTY V_HIPRIORITYDBEMPTY(1U) 264 + 265 + #define S_LOPRIORITYDBFULL 5 266 + #define V_LOPRIORITYDBFULL(x) ((x) << S_LOPRIORITYDBFULL) 267 + #define F_LOPRIORITYDBFULL V_LOPRIORITYDBFULL(1U) 268 + 269 + #define S_LOPRIORITYDBEMPTY 4 270 + #define V_LOPRIORITYDBEMPTY(x) ((x) << S_LOPRIORITYDBEMPTY) 271 + #define F_LOPRIORITYDBEMPTY V_LOPRIORITYDBEMPTY(1U) 272 + 257 273 #define S_RSPQDISABLED 3 258 274 #define V_RSPQDISABLED(x) ((x) << S_RSPQDISABLED) 259 275 #define F_RSPQDISABLED V_RSPQDISABLED(1U)
+8 -2
drivers/net/cxgb3/sge.c
··· 42 42 #include "sge_defs.h" 43 43 #include "t3_cpl.h" 44 44 #include "firmware_exports.h" 45 + #include "cxgb3_offload.h" 45 46 46 47 #define USE_GTS 0 47 48 ··· 2842 2841 } 2843 2842 2844 2843 if (status & (F_HIPIODRBDROPERR | F_LOPIODRBDROPERR)) 2845 - CH_ALERT(adapter, "SGE dropped %s priority doorbell\n", 2846 - status & F_HIPIODRBDROPERR ? "high" : "lo"); 2844 + queue_work(cxgb3_wq, &adapter->db_drop_task); 2845 + 2846 + if (status & (F_HIPRIORITYDBFULL | F_LOPRIORITYDBFULL)) 2847 + queue_work(cxgb3_wq, &adapter->db_full_task); 2848 + 2849 + if (status & (F_HIPRIORITYDBEMPTY | F_LOPRIORITYDBEMPTY)) 2850 + queue_work(cxgb3_wq, &adapter->db_empty_task); 2847 2851 2848 2852 t3_write_reg(adapter, A_SG_INT_CAUSE, status); 2849 2853 if (status & SGE_FATALERR)
+4 -1
drivers/net/cxgb3/t3_hw.c
··· 1433 1433 F_IRPARITYERROR | V_ITPARITYERROR(M_ITPARITYERROR) | \ 1434 1434 V_FLPARITYERROR(M_FLPARITYERROR) | F_LODRBPARITYERROR | \ 1435 1435 F_HIDRBPARITYERROR | F_LORCQPARITYERROR | \ 1436 - F_HIRCQPARITYERROR) 1436 + F_HIRCQPARITYERROR | F_LOPRIORITYDBFULL | \ 1437 + F_HIPRIORITYDBFULL | F_LOPRIORITYDBEMPTY | \ 1438 + F_HIPRIORITYDBEMPTY | F_HIPIODRBDROPERR | \ 1439 + F_LOPIODRBDROPERR) 1437 1440 #define MC5_INTR_MASK (F_PARITYERR | F_ACTRGNFULL | F_UNKNOWNCMD | \ 1438 1441 F_REQQPARERR | F_DISPQPARERR | F_DELACTEMPTY | \ 1439 1442 F_NFASRCHFAIL)
+1
include/rdma/ib_pack.h
··· 232 232 233 233 void ib_ud_header_init(int payload_bytes, 234 234 int grh_present, 235 + int immediate_present, 235 236 struct ib_ud_header *header); 236 237 237 238 int ib_ud_header_pack(struct ib_ud_header *header,
+2 -2
include/rdma/ib_verbs.h
··· 984 984 struct list_head event_handler_list; 985 985 spinlock_t event_handler_lock; 986 986 987 + spinlock_t client_data_lock; 987 988 struct list_head core_list; 988 989 struct list_head client_data_list; 989 - spinlock_t client_data_lock; 990 990 991 991 struct ib_cache cache; 992 992 int *pkey_tbl_len; ··· 1144 1144 IB_DEV_UNREGISTERED 1145 1145 } reg_state; 1146 1146 1147 - u64 uverbs_cmd_mask; 1148 1147 int uverbs_abi_ver; 1148 + u64 uverbs_cmd_mask; 1149 1149 1150 1150 char node_desc[64]; 1151 1151 __be64 node_guid;
-1
include/rdma/rdma_cm.h
··· 67 67 RDMA_PS_IPOIB = 0x0002, 68 68 RDMA_PS_TCP = 0x0106, 69 69 RDMA_PS_UDP = 0x0111, 70 - RDMA_PS_SCTP = 0x0183 71 70 }; 72 71 73 72 struct rdma_addr {