Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

arm: dts: mt7623: extend common file reused by all boards with MT7623 SoCs

Move all possible setups for pio into SoC level DTSI file mt7623.dtsi in
order to introduce more boards such as official MT7623A reference boards
without copy-n-pasting almost the same content of nodes in pio into every
new file.

So, it should be better to reuse those nodes by consolidating them into
the common file mt7623.dtsi from the current existent DTS and allow new
DTS files to refer to them.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

authored by

Sean Wang and committed by
Matthias Brugger
3f7dd2da 50ad3231

+246 -248
+246
arch/arm/boot/dts/mt7623.dtsi
··· 935 935 status = "disabled"; 936 936 }; 937 937 }; 938 + 939 + &pio { 940 + cir_pins_a:cir-default { 941 + pins-cir { 942 + pinmux = <MT7623_PIN_46_IR_FUNC_IR>; 943 + bias-disable; 944 + }; 945 + }; 946 + 947 + i2c0_pins_a: i2c0-default { 948 + pins-i2c0 { 949 + pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>, 950 + <MT7623_PIN_76_SCL0_FUNC_SCL0>; 951 + bias-disable; 952 + }; 953 + }; 954 + 955 + i2c1_pins_a: i2c1-default { 956 + pin-i2c1 { 957 + pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>, 958 + <MT7623_PIN_58_SCL1_FUNC_SCL1>; 959 + bias-disable; 960 + }; 961 + }; 962 + 963 + i2s0_pins_a: i2s0-default { 964 + pin-i2s0 { 965 + pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>, 966 + <MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>, 967 + <MT7623_PIN_73_I2S0_LRCK_FUNC_I2S0_LRCK>, 968 + <MT7623_PIN_74_I2S0_BCK_FUNC_I2S0_BCK>, 969 + <MT7623_PIN_126_I2S0_MCLK_FUNC_I2S0_MCLK>; 970 + drive-strength = <MTK_DRIVE_12mA>; 971 + bias-pull-down; 972 + }; 973 + }; 974 + 975 + i2s1_pins_a: i2s1-default { 976 + pin-i2s1 { 977 + pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>, 978 + <MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>, 979 + <MT7623_PIN_35_I2S1_BCK_FUNC_I2S1_BCK>, 980 + <MT7623_PIN_36_I2S1_LRCK_FUNC_I2S1_LRCK>, 981 + <MT7623_PIN_37_I2S1_MCLK_FUNC_I2S1_MCLK>; 982 + drive-strength = <MTK_DRIVE_12mA>; 983 + bias-pull-down; 984 + }; 985 + }; 986 + 987 + key_pins_a: keys-alt { 988 + pins-keys { 989 + pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>, 990 + <MT7623_PIN_257_GPIO257_FUNC_GPIO257> ; 991 + input-enable; 992 + }; 993 + }; 994 + 995 + led_pins_a: leds-alt { 996 + pins-leds { 997 + pinmux = <MT7623_PIN_239_EXT_SDIO0_FUNC_GPIO239>, 998 + <MT7623_PIN_240_EXT_XCS_FUNC_GPIO240>, 999 + <MT7623_PIN_241_EXT_SCK_FUNC_GPIO241>; 1000 + }; 1001 + }; 1002 + 1003 + mmc0_pins_default: mmc0default { 1004 + pins-cmd-dat { 1005 + pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>, 1006 + <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>, 1007 + <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>, 1008 + <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>, 1009 + <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>, 1010 + <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>, 1011 + <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>, 1012 + <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>, 1013 + <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>; 1014 + input-enable; 1015 + bias-pull-up; 1016 + }; 1017 + 1018 + pins-clk { 1019 + pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>; 1020 + bias-pull-down; 1021 + }; 1022 + 1023 + pins-rst { 1024 + pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>; 1025 + bias-pull-up; 1026 + }; 1027 + }; 1028 + 1029 + mmc0_pins_uhs: mmc0 { 1030 + pins-cmd-dat { 1031 + pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>, 1032 + <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>, 1033 + <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>, 1034 + <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>, 1035 + <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>, 1036 + <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>, 1037 + <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>, 1038 + <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>, 1039 + <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>; 1040 + input-enable; 1041 + drive-strength = <MTK_DRIVE_2mA>; 1042 + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1043 + }; 1044 + 1045 + pins-clk { 1046 + pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>; 1047 + drive-strength = <MTK_DRIVE_2mA>; 1048 + bias-pull-down = <MTK_PUPD_SET_R1R0_01>; 1049 + }; 1050 + 1051 + pins-rst { 1052 + pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>; 1053 + bias-pull-up; 1054 + }; 1055 + }; 1056 + 1057 + mmc1_pins_default: mmc1default { 1058 + pins-cmd-dat { 1059 + pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>, 1060 + <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>, 1061 + <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>, 1062 + <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>, 1063 + <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>; 1064 + input-enable; 1065 + drive-strength = <MTK_DRIVE_4mA>; 1066 + bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 1067 + }; 1068 + 1069 + pins-clk { 1070 + pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>; 1071 + bias-pull-down; 1072 + drive-strength = <MTK_DRIVE_4mA>; 1073 + }; 1074 + 1075 + pins-wp { 1076 + pinmux = <MT7623_PIN_29_EINT7_FUNC_MSDC1_WP>; 1077 + input-enable; 1078 + bias-pull-up; 1079 + }; 1080 + 1081 + pins-insert { 1082 + pinmux = <MT7623_PIN_261_MSDC1_INS_FUNC_GPIO261>; 1083 + bias-pull-up; 1084 + }; 1085 + }; 1086 + 1087 + mmc1_pins_uhs: mmc1 { 1088 + pins-cmd-dat { 1089 + pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>, 1090 + <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>, 1091 + <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>, 1092 + <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>, 1093 + <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>; 1094 + input-enable; 1095 + drive-strength = <MTK_DRIVE_4mA>; 1096 + bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 1097 + }; 1098 + 1099 + pins-clk { 1100 + pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>; 1101 + drive-strength = <MTK_DRIVE_4mA>; 1102 + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 1103 + }; 1104 + }; 1105 + 1106 + nand_pins_default: nanddefault { 1107 + pins-ale { 1108 + pinmux = <MT7623_PIN_116_MSDC0_CMD_FUNC_NALE>; 1109 + drive-strength = <MTK_DRIVE_8mA>; 1110 + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 1111 + }; 1112 + 1113 + pins-dat { 1114 + pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_NLD7>, 1115 + <MT7623_PIN_112_MSDC0_DAT6_FUNC_NLD6>, 1116 + <MT7623_PIN_114_MSDC0_DAT4_FUNC_NLD4>, 1117 + <MT7623_PIN_118_MSDC0_DAT3_FUNC_NLD3>, 1118 + <MT7623_PIN_121_MSDC0_DAT0_FUNC_NLD0>, 1119 + <MT7623_PIN_120_MSDC0_DAT1_FUNC_NLD1>, 1120 + <MT7623_PIN_113_MSDC0_DAT5_FUNC_NLD5>, 1121 + <MT7623_PIN_115_MSDC0_RSTB_FUNC_NLD8>, 1122 + <MT7623_PIN_119_MSDC0_DAT2_FUNC_NLD2>; 1123 + input-enable; 1124 + drive-strength = <MTK_DRIVE_8mA>; 1125 + bias-pull-up; 1126 + }; 1127 + 1128 + pins-we { 1129 + pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_NWEB>; 1130 + drive-strength = <MTK_DRIVE_8mA>; 1131 + bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 1132 + }; 1133 + }; 1134 + 1135 + pcie_default: pcie_pin_default { 1136 + pins_cmd_dat { 1137 + pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>, 1138 + <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>; 1139 + bias-disable; 1140 + }; 1141 + }; 1142 + 1143 + pwm_pins_a: pwm-default { 1144 + pins-pwm { 1145 + pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>, 1146 + <MT7623_PIN_204_PWM1_FUNC_PWM1>, 1147 + <MT7623_PIN_205_PWM2_FUNC_PWM2>, 1148 + <MT7623_PIN_206_PWM3_FUNC_PWM3>, 1149 + <MT7623_PIN_207_PWM4_FUNC_PWM4>; 1150 + }; 1151 + }; 1152 + 1153 + spi0_pins_a: spi0-default { 1154 + pins-spi { 1155 + pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>, 1156 + <MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>, 1157 + <MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>, 1158 + <MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO>; 1159 + bias-disable; 1160 + }; 1161 + }; 1162 + 1163 + uart0_pins_a: uart0-default { 1164 + pins-dat { 1165 + pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>, 1166 + <MT7623_PIN_80_UTXD0_FUNC_UTXD0>; 1167 + }; 1168 + }; 1169 + 1170 + uart1_pins_a: uart1-default { 1171 + pins-dat { 1172 + pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>, 1173 + <MT7623_PIN_82_UTXD1_FUNC_UTXD1>; 1174 + }; 1175 + }; 1176 + 1177 + uart2_pins_a: uart2-default { 1178 + pins-dat { 1179 + pinmux = <MT7623_PIN_14_GPIO14_FUNC_URXD2>, 1180 + <MT7623_PIN_15_GPIO15_FUNC_UTXD2>; 1181 + }; 1182 + }; 1183 + };
-217
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
··· 281 281 status = "okay"; 282 282 }; 283 283 284 - &pio { 285 - cir_pins_a:cir-default { 286 - pins-cir { 287 - pinmux = <MT7623_PIN_46_IR_FUNC_IR>; 288 - bias-disable; 289 - }; 290 - }; 291 - 292 - i2c0_pins_a: i2c0-default { 293 - pins-i2c0 { 294 - pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>, 295 - <MT7623_PIN_76_SCL0_FUNC_SCL0>; 296 - bias-disable; 297 - }; 298 - }; 299 - 300 - i2c1_pins_a: i2c1-default { 301 - pin-i2c1 { 302 - pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>, 303 - <MT7623_PIN_58_SCL1_FUNC_SCL1>; 304 - bias-disable; 305 - }; 306 - }; 307 - 308 - i2s0_pins_a: i2s0-default { 309 - pin-i2s0 { 310 - pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>, 311 - <MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>, 312 - <MT7623_PIN_73_I2S0_LRCK_FUNC_I2S0_LRCK>, 313 - <MT7623_PIN_74_I2S0_BCK_FUNC_I2S0_BCK>, 314 - <MT7623_PIN_126_I2S0_MCLK_FUNC_I2S0_MCLK>; 315 - drive-strength = <MTK_DRIVE_12mA>; 316 - bias-pull-down; 317 - }; 318 - }; 319 - 320 - i2s1_pins_a: i2s1-default { 321 - pin-i2s1 { 322 - pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>, 323 - <MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>, 324 - <MT7623_PIN_35_I2S1_BCK_FUNC_I2S1_BCK>, 325 - <MT7623_PIN_36_I2S1_LRCK_FUNC_I2S1_LRCK>, 326 - <MT7623_PIN_37_I2S1_MCLK_FUNC_I2S1_MCLK>; 327 - drive-strength = <MTK_DRIVE_12mA>; 328 - bias-pull-down; 329 - }; 330 - }; 331 - 332 - key_pins_a: keys-alt { 333 - pins-keys { 334 - pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>, 335 - <MT7623_PIN_257_GPIO257_FUNC_GPIO257> ; 336 - input-enable; 337 - }; 338 - }; 339 - 340 - led_pins_a: leds-alt { 341 - pins-leds { 342 - pinmux = <MT7623_PIN_239_EXT_SDIO0_FUNC_GPIO239>, 343 - <MT7623_PIN_240_EXT_XCS_FUNC_GPIO240>, 344 - <MT7623_PIN_241_EXT_SCK_FUNC_GPIO241>; 345 - }; 346 - }; 347 - 348 - mmc0_pins_default: mmc0default { 349 - pins-cmd-dat { 350 - pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>, 351 - <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>, 352 - <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>, 353 - <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>, 354 - <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>, 355 - <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>, 356 - <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>, 357 - <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>, 358 - <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>; 359 - input-enable; 360 - bias-pull-up; 361 - }; 362 - 363 - pins-clk { 364 - pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>; 365 - bias-pull-down; 366 - }; 367 - 368 - pins-rst { 369 - pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>; 370 - bias-pull-up; 371 - }; 372 - }; 373 - 374 - mmc0_pins_uhs: mmc0 { 375 - pins-cmd-dat { 376 - pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>, 377 - <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>, 378 - <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>, 379 - <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>, 380 - <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>, 381 - <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>, 382 - <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>, 383 - <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>, 384 - <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>; 385 - input-enable; 386 - drive-strength = <MTK_DRIVE_2mA>; 387 - bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 388 - }; 389 - 390 - pins-clk { 391 - pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>; 392 - drive-strength = <MTK_DRIVE_2mA>; 393 - bias-pull-down = <MTK_PUPD_SET_R1R0_01>; 394 - }; 395 - 396 - pins-rst { 397 - pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>; 398 - bias-pull-up; 399 - }; 400 - }; 401 - 402 - mmc1_pins_default: mmc1default { 403 - pins-cmd-dat { 404 - pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>, 405 - <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>, 406 - <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>, 407 - <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>, 408 - <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>; 409 - input-enable; 410 - drive-strength = <MTK_DRIVE_4mA>; 411 - bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 412 - }; 413 - 414 - pins-clk { 415 - pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>; 416 - bias-pull-down; 417 - drive-strength = <MTK_DRIVE_4mA>; 418 - }; 419 - 420 - pins-wp { 421 - pinmux = <MT7623_PIN_29_EINT7_FUNC_MSDC1_WP>; 422 - input-enable; 423 - bias-pull-up; 424 - }; 425 - 426 - pins-insert { 427 - pinmux = <MT7623_PIN_261_MSDC1_INS_FUNC_GPIO261>; 428 - bias-pull-up; 429 - }; 430 - }; 431 - 432 - mmc1_pins_uhs: mmc1 { 433 - pins-cmd-dat { 434 - pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>, 435 - <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>, 436 - <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>, 437 - <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>, 438 - <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>; 439 - input-enable; 440 - drive-strength = <MTK_DRIVE_4mA>; 441 - bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 442 - }; 443 - 444 - pins-clk { 445 - pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>; 446 - drive-strength = <MTK_DRIVE_4mA>; 447 - bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 448 - }; 449 - }; 450 - 451 - pcie_default: pcie_pin_default { 452 - pins_cmd_dat { 453 - pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>, 454 - <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>; 455 - bias-disable; 456 - }; 457 - }; 458 - 459 - pwm_pins_a: pwm-default { 460 - pins-pwm { 461 - pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>, 462 - <MT7623_PIN_204_PWM1_FUNC_PWM1>, 463 - <MT7623_PIN_205_PWM2_FUNC_PWM2>, 464 - <MT7623_PIN_206_PWM3_FUNC_PWM3>, 465 - <MT7623_PIN_207_PWM4_FUNC_PWM4>; 466 - }; 467 - }; 468 - 469 - spi0_pins_a: spi0-default { 470 - pins-spi { 471 - pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>, 472 - <MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>, 473 - <MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>, 474 - <MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO>; 475 - bias-disable; 476 - }; 477 - }; 478 - 479 - uart0_pins_a: uart0-default { 480 - pins-dat { 481 - pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>, 482 - <MT7623_PIN_80_UTXD0_FUNC_UTXD0>; 483 - }; 484 - }; 485 - 486 - uart1_pins_a: uart1-default { 487 - pins-dat { 488 - pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>, 489 - <MT7623_PIN_82_UTXD1_FUNC_UTXD1>; 490 - }; 491 - }; 492 - 493 - uart2_pins_a: uart2-default { 494 - pins-dat { 495 - pinmux = <MT7623_PIN_14_GPIO14_FUNC_URXD2>, 496 - <MT7623_PIN_15_GPIO15_FUNC_UTXD2>; 497 - }; 498 - }; 499 - }; 500 - 501 284 &pwm { 502 285 pinctrl-names = "default"; 503 286 pinctrl-0 = <&pwm_pins_a>;
-31
arch/arm/boot/dts/mt7623n-rfb-nand.dts
··· 71 71 }; 72 72 }; 73 73 }; 74 - 75 - &pio { 76 - nand_pins_default: nanddefault { 77 - pins-ale { 78 - pinmux = <MT7623_PIN_116_MSDC0_CMD_FUNC_NALE>; 79 - drive-strength = <MTK_DRIVE_8mA>; 80 - bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 81 - }; 82 - 83 - pins-dat { 84 - pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_NLD7>, 85 - <MT7623_PIN_112_MSDC0_DAT6_FUNC_NLD6>, 86 - <MT7623_PIN_114_MSDC0_DAT4_FUNC_NLD4>, 87 - <MT7623_PIN_118_MSDC0_DAT3_FUNC_NLD3>, 88 - <MT7623_PIN_121_MSDC0_DAT0_FUNC_NLD0>, 89 - <MT7623_PIN_120_MSDC0_DAT1_FUNC_NLD1>, 90 - <MT7623_PIN_113_MSDC0_DAT5_FUNC_NLD5>, 91 - <MT7623_PIN_115_MSDC0_RSTB_FUNC_NLD8>, 92 - <MT7623_PIN_119_MSDC0_DAT2_FUNC_NLD2>; 93 - input-enable; 94 - drive-strength = <MTK_DRIVE_8mA>; 95 - bias-pull-up; 96 - }; 97 - 98 - pins-we { 99 - pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_NWEB>; 100 - drive-strength = <MTK_DRIVE_8mA>; 101 - bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 102 - }; 103 - }; 104 - };