Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'drivers-fixes-for-6.11' into HEAD

Merge drivers-fixes-for-6.11 branch into drivers-for-6.12 to avoid the
(trivial) merge conflict occuring related to the qcom_pdm_domains
update.

+30 -63
+2
.mailmap
··· 353 353 Kiran Gunda <quic_kgunda@quicinc.com> <kgunda@codeaurora.org> 354 354 Kirill Tkhai <tkhai@ya.ru> <ktkhai@virtuozzo.com> 355 355 Kishon Vijay Abraham I <kishon@kernel.org> <kishon@ti.com> 356 + Konrad Dybcio <konradybcio@kernel.org> <konrad.dybcio@linaro.org> 357 + Konrad Dybcio <konradybcio@kernel.org> <konrad.dybcio@somainline.org> 356 358 Konstantin Khlebnikov <koct9i@gmail.com> <khlebnikov@yandex-team.ru> 357 359 Konstantin Khlebnikov <koct9i@gmail.com> <k.khlebnikov@samsung.com> 358 360 Koushik <raghavendra.koushik@neterion.com>
+3 -3
MAINTAINERS
··· 2745 2745 2746 2746 ARM/QUALCOMM SUPPORT 2747 2747 M: Bjorn Andersson <andersson@kernel.org> 2748 - M: Konrad Dybcio <konrad.dybcio@linaro.org> 2748 + M: Konrad Dybcio <konradybcio@kernel.org> 2749 2749 L: linux-arm-msm@vger.kernel.org 2750 2750 S: Maintained 2751 2751 T: git git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git ··· 7106 7106 DRM DRIVER for Qualcomm Adreno GPUs 7107 7107 M: Rob Clark <robdclark@gmail.com> 7108 7108 R: Sean Paul <sean@poorly.run> 7109 - R: Konrad Dybcio <konrad.dybcio@linaro.org> 7109 + R: Konrad Dybcio <konradybcio@kernel.org> 7110 7110 L: linux-arm-msm@vger.kernel.org 7111 7111 L: dri-devel@lists.freedesktop.org 7112 7112 L: freedreno@lists.freedesktop.org ··· 18771 18771 18772 18772 QUALCOMM CORE POWER REDUCTION (CPR) AVS DRIVER 18773 18773 M: Bjorn Andersson <andersson@kernel.org> 18774 - M: Konrad Dybcio <konrad.dybcio@linaro.org> 18774 + M: Konrad Dybcio <konradybcio@kernel.org> 18775 18775 L: linux-pm@vger.kernel.org 18776 18776 L: linux-arm-msm@vger.kernel.org 18777 18777 S: Maintained
+1 -1
drivers/firmware/qcom/qcom_scm-smc.c
··· 73 73 struct arm_smccc_res get_wq_res; 74 74 struct arm_smccc_args get_wq_ctx = {0}; 75 75 76 - get_wq_ctx.args[0] = ARM_SMCCC_CALL_VAL(ARM_SMCCC_STD_CALL, 76 + get_wq_ctx.args[0] = ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, 77 77 ARM_SMCCC_SMC_64, ARM_SMCCC_OWNER_SIP, 78 78 SCM_SMC_FNID(QCOM_SCM_SVC_WAITQ, QCOM_SCM_WAITQ_GET_WQ_CTX)); 79 79
+21 -11
drivers/firmware/qcom/qcom_tzmem.c
··· 40 40 }; 41 41 42 42 struct qcom_tzmem_chunk { 43 - phys_addr_t paddr; 44 43 size_t size; 45 44 struct qcom_tzmem_pool *owner; 46 45 }; ··· 384 385 return NULL; 385 386 } 386 387 387 - chunk->paddr = gen_pool_virt_to_phys(pool->genpool, vaddr); 388 388 chunk->size = size; 389 389 chunk->owner = pool; 390 390 ··· 429 431 EXPORT_SYMBOL_GPL(qcom_tzmem_free); 430 432 431 433 /** 432 - * qcom_tzmem_to_phys() - Map the virtual address of a TZ buffer to physical. 433 - * @vaddr: Virtual address of the buffer allocated from a TZ memory pool. 434 + * qcom_tzmem_to_phys() - Map the virtual address of TZ memory to physical. 435 + * @vaddr: Virtual address of memory allocated from a TZ memory pool. 434 436 * 435 - * Can be used in any context. The address must have been returned by a call 436 - * to qcom_tzmem_alloc(). 437 + * Can be used in any context. The address must point to memory allocated 438 + * using qcom_tzmem_alloc(). 437 439 * 438 - * Returns: Physical address of the buffer. 440 + * Returns: 441 + * Physical address mapped from the virtual or 0 if the mapping failed. 439 442 */ 440 443 phys_addr_t qcom_tzmem_to_phys(void *vaddr) 441 444 { 442 445 struct qcom_tzmem_chunk *chunk; 446 + struct radix_tree_iter iter; 447 + void __rcu **slot; 448 + phys_addr_t ret; 443 449 444 450 guard(spinlock_irqsave)(&qcom_tzmem_chunks_lock); 445 451 446 - chunk = radix_tree_lookup(&qcom_tzmem_chunks, (unsigned long)vaddr); 447 - if (!chunk) 448 - return 0; 452 + radix_tree_for_each_slot(slot, &qcom_tzmem_chunks, &iter, 0) { 453 + chunk = radix_tree_deref_slot_protected(slot, 454 + &qcom_tzmem_chunks_lock); 449 455 450 - return chunk->paddr; 456 + ret = gen_pool_virt_to_phys(chunk->owner->genpool, 457 + (unsigned long)vaddr); 458 + if (ret == -1) 459 + continue; 460 + 461 + return ret; 462 + } 463 + 464 + return 0; 451 465 } 452 466 EXPORT_SYMBOL_GPL(qcom_tzmem_to_phys); 453 467
+1 -1
drivers/soc/qcom/Kconfig
··· 77 77 select QCOM_QMI_HELPERS 78 78 select QCOM_PDR_MSG 79 79 select AUXILIARY_BUS 80 - depends on NET && QRTR 80 + depends on NET && QRTR && (ARCH_QCOM || COMPILE_TEST) 81 81 default QCOM_RPROC_COMMON 82 82 help 83 83 The Protection Domain Mapper maps registered services to the domains
+1 -1
drivers/soc/qcom/cmd-db.c
··· 349 349 return -EINVAL; 350 350 } 351 351 352 - cmd_db_header = memremap(rmem->base, rmem->size, MEMREMAP_WB); 352 + cmd_db_header = memremap(rmem->base, rmem->size, MEMREMAP_WC); 353 353 if (!cmd_db_header) { 354 354 ret = -ENOMEM; 355 355 cmd_db_header = NULL;
+1 -1
drivers/soc/qcom/qcom_pd_mapper.c
··· 517 517 NULL, 518 518 }; 519 519 520 - static const struct of_device_id qcom_pdm_domains[] = { 520 + static const struct of_device_id qcom_pdm_domains[] __maybe_unused = { 521 521 { .compatible = "qcom,apq8064", .data = NULL, }, 522 522 { .compatible = "qcom,apq8074", .data = NULL, }, 523 523 { .compatible = "qcom,apq8084", .data = NULL, },
-45
include/linux/firmware/qcom/qcom_qseecom.h
··· 26 26 }; 27 27 28 28 /** 29 - * qseecom_scm_dev() - Get the SCM device associated with the QSEECOM client. 30 - * @client: The QSEECOM client device. 31 - * 32 - * Returns the SCM device under which the provided QSEECOM client device 33 - * operates. This function is intended to be used for DMA allocations. 34 - */ 35 - static inline struct device *qseecom_scm_dev(struct qseecom_client *client) 36 - { 37 - return client->aux_dev.dev.parent->parent; 38 - } 39 - 40 - /** 41 - * qseecom_dma_alloc() - Allocate DMA memory for a QSEECOM client. 42 - * @client: The QSEECOM client to allocate the memory for. 43 - * @size: The number of bytes to allocate. 44 - * @dma_handle: Pointer to where the DMA address should be stored. 45 - * @gfp: Allocation flags. 46 - * 47 - * Wrapper function for dma_alloc_coherent(), allocating DMA memory usable for 48 - * TZ/QSEECOM communication. Refer to dma_alloc_coherent() for details. 49 - */ 50 - static inline void *qseecom_dma_alloc(struct qseecom_client *client, size_t size, 51 - dma_addr_t *dma_handle, gfp_t gfp) 52 - { 53 - return dma_alloc_coherent(qseecom_scm_dev(client), size, dma_handle, gfp); 54 - } 55 - 56 - /** 57 - * dma_free_coherent() - Free QSEECOM DMA memory. 58 - * @client: The QSEECOM client for which the memory has been allocated. 59 - * @size: The number of bytes allocated. 60 - * @cpu_addr: Virtual memory address to free. 61 - * @dma_handle: DMA memory address to free. 62 - * 63 - * Wrapper function for dma_free_coherent(), freeing memory previously 64 - * allocated with qseecom_dma_alloc(). Refer to dma_free_coherent() for 65 - * details. 66 - */ 67 - static inline void qseecom_dma_free(struct qseecom_client *client, size_t size, 68 - void *cpu_addr, dma_addr_t dma_handle) 69 - { 70 - return dma_free_coherent(qseecom_scm_dev(client), size, cpu_addr, dma_handle); 71 - } 72 - 73 - /** 74 29 * qcom_qseecom_app_send() - Send to and receive data from a given QSEE app. 75 30 * @client: The QSEECOM client associated with the target app. 76 31 * @req: Request buffer sent to the app (must be TZ memory).