tjh.dev / kernel
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media: verisilicon: postproc: 4K support

Support input larger than 4096x2048 using extended input width/height
fields of swreg92.
This is needed to decode large WebP or JPEG pictures.

Signed-off-by: Hugues Fruchet <hugues.fruchet@foss.st.com>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>

authored by

Hugues Fruchet and committed by
Hans Verkuil 3f6702e1 f7546da1

+8 -2
+2
drivers/media/platform/verisilicon/hantro.h
··· 323 323 struct hantro_reg output_fmt; 324 324 struct hantro_reg orig_width; 325 325 struct hantro_reg display_width; 326 + struct hantro_reg input_width_ext; 327 + struct hantro_reg input_height_ext; 326 328 }; 327 329 328 330 struct hantro_vp9_decoded_buffer_info {
+1 -1
drivers/media/platform/verisilicon/hantro_g1_regs.h
··· 350 350 #define G1_REG_PP_CONTROL_OUT_WIDTH(v) (((v) << 4) & GENMASK(14, 4)) 351 351 #define G1_REG_PP_MASK1_ORIG_WIDTH G1_SWREG(88) 352 352 #define G1_REG_PP_ORIG_WIDTH(v) (((v) << 23) & GENMASK(31, 23)) 353 - #define G1_REG_PP_DISPLAY_WIDTH G1_SWREG(92) 353 + #define G1_REG_PP_DISPLAY_WIDTH_IN_EXT G1_SWREG(92) 354 354 #define G1_REG_PP_FUSE G1_SWREG(99) 355 355 356 356 #endif /* HANTRO_G1_REGS_H_ */
+5 -1
drivers/media/platform/verisilicon/hantro_postproc.c
··· 49 49 .input_fmt = {G1_REG_PP_CONTROL, 29, 0x7}, 50 50 .output_fmt = {G1_REG_PP_CONTROL, 26, 0x7}, 51 51 .orig_width = {G1_REG_PP_MASK1_ORIG_WIDTH, 23, 0x1ff}, 52 - .display_width = {G1_REG_PP_DISPLAY_WIDTH, 0, 0xfff}, 52 + .display_width = {G1_REG_PP_DISPLAY_WIDTH_IN_EXT, 0, 0xfff}, 53 + .input_width_ext = {G1_REG_PP_DISPLAY_WIDTH_IN_EXT, 26, 0x7}, 54 + .input_height_ext = {G1_REG_PP_DISPLAY_WIDTH_IN_EXT, 29, 0x7}, 53 55 }; 54 56 55 57 bool hantro_needs_postproc(const struct hantro_ctx *ctx, ··· 105 103 HANTRO_PP_REG_WRITE(vpu, output_height, ctx->dst_fmt.height); 106 104 HANTRO_PP_REG_WRITE(vpu, orig_width, MB_WIDTH(ctx->dst_fmt.width)); 107 105 HANTRO_PP_REG_WRITE(vpu, display_width, ctx->dst_fmt.width); 106 + HANTRO_PP_REG_WRITE(vpu, input_width_ext, MB_WIDTH(ctx->dst_fmt.width) >> 9); 107 + HANTRO_PP_REG_WRITE(vpu, input_height_ext, MB_HEIGHT(ctx->dst_fmt.height >> 8)); 108 108 } 109 109 110 110 static int down_scale_factor(struct hantro_ctx *ctx)