net: ethernet: mtk_wed: debugfs: add WED 3.0 debugfs entries

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Introduce WED3.0 debugfs entries useful for debugging.

Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

authored by

Sujuan Chen and committed by

Paolo Abeni 2 years ago 3f3de094 4b7e02bb

+369 -2

1 changed file

expand all

drivers

net

ethernet

mediatek

mtk_wed_debugfs.c

+369 -2

drivers/net/ethernet/mediatek/mtk_wed_debugfs.c

··· 11 11 u16 offset; 12 12 u8 type; 13 13 u8 base; 14 + u32 mask; 14 15 }; 15 16 16 17 enum { ··· 26 25 27 26 #define DUMP_STR(_str) { _str, 0, DUMP_TYPE_STRING } 28 27 #define DUMP_REG(_reg, ...) { #_reg, MTK_##_reg, __VA_ARGS__ } 28 + #define DUMP_REG_MASK(_reg, _mask) \ 29 + { #_mask, MTK_##_reg, DUMP_TYPE_WED, 0, MTK_##_mask } 29 30 #define DUMP_RING(_prefix, _base, ...) \ 30 31 { _prefix " BASE", _base, __VA_ARGS__ }, \ 31 32 { _prefix " CNT", _base + 0x4, __VA_ARGS__ }, \ ··· 35 32 { _prefix " DIDX", _base + 0xc, __VA_ARGS__ } 36 33 37 34 #define DUMP_WED(_reg) DUMP_REG(_reg, DUMP_TYPE_WED) 35 + #define DUMP_WED_MASK(_reg, _mask) DUMP_REG_MASK(_reg, _mask) 38 36 #define DUMP_WED_RING(_base) DUMP_RING(#_base, MTK_##_base, DUMP_TYPE_WED) 39 37 40 38 #define DUMP_WDMA(_reg) DUMP_REG(_reg, DUMP_TYPE_WDMA) ··· 216 212 DUMP_WED(WED_RTQM_Q2B_MIB), 217 213 DUMP_WED(WED_RTQM_PFDBK_MIB), 218 214 }; 215 + static const struct reg_dump regs_wed_v3[] = { 216 + DUMP_STR("WED RX RRO DATA"), 217 + DUMP_WED_RING(WED_RRO_RX_D_RX(0)), 218 + DUMP_WED_RING(WED_RRO_RX_D_RX(1)), 219 + 220 + DUMP_STR("WED RX MSDU PAGE"), 221 + DUMP_WED_RING(WED_RRO_MSDU_PG_CTRL0(0)), 222 + DUMP_WED_RING(WED_RRO_MSDU_PG_CTRL0(1)), 223 + DUMP_WED_RING(WED_RRO_MSDU_PG_CTRL0(2)), 224 + 225 + DUMP_STR("WED RX IND CMD"), 226 + DUMP_WED(WED_IND_CMD_RX_CTRL1), 227 + DUMP_WED_MASK(WED_IND_CMD_RX_CTRL2, WED_IND_CMD_MAX_CNT), 228 + DUMP_WED_MASK(WED_IND_CMD_RX_CTRL0, WED_IND_CMD_PROC_IDX), 229 + DUMP_WED_MASK(RRO_IND_CMD_SIGNATURE, RRO_IND_CMD_DMA_IDX), 230 + DUMP_WED_MASK(WED_IND_CMD_RX_CTRL0, WED_IND_CMD_MAGIC_CNT), 231 + DUMP_WED_MASK(RRO_IND_CMD_SIGNATURE, RRO_IND_CMD_MAGIC_CNT), 232 + DUMP_WED_MASK(WED_IND_CMD_RX_CTRL0, 233 + WED_IND_CMD_PREFETCH_FREE_CNT), 234 + DUMP_WED_MASK(WED_RRO_CFG1, WED_RRO_CFG1_PARTICL_SE_ID), 235 + 236 + DUMP_STR("WED ADDR ELEM"), 237 + DUMP_WED(WED_ADDR_ELEM_CFG0), 238 + DUMP_WED_MASK(WED_ADDR_ELEM_CFG1, 239 + WED_ADDR_ELEM_PREFETCH_FREE_CNT), 240 + 241 + DUMP_STR("WED Route QM"), 242 + DUMP_WED(WED_RTQM_ENQ_I2Q_DMAD_CNT), 243 + DUMP_WED(WED_RTQM_ENQ_I2N_DMAD_CNT), 244 + DUMP_WED(WED_RTQM_ENQ_I2Q_PKT_CNT), 245 + DUMP_WED(WED_RTQM_ENQ_I2N_PKT_CNT), 246 + DUMP_WED(WED_RTQM_ENQ_USED_ENTRY_CNT), 247 + DUMP_WED(WED_RTQM_ENQ_ERR_CNT), 248 + 249 + DUMP_WED(WED_RTQM_DEQ_DMAD_CNT), 250 + DUMP_WED(WED_RTQM_DEQ_Q2I_DMAD_CNT), 251 + DUMP_WED(WED_RTQM_DEQ_PKT_CNT), 252 + DUMP_WED(WED_RTQM_DEQ_Q2I_PKT_CNT), 253 + DUMP_WED(WED_RTQM_DEQ_USED_PFDBK_CNT), 254 + DUMP_WED(WED_RTQM_DEQ_ERR_CNT), 255 + }; 219 256 struct mtk_wed_hw *hw = s->private; 220 257 struct mtk_wed_device *dev = hw->wed_dev; 221 258 222 259 if (dev) { 223 260 dump_wed_regs(s, dev, regs_common, ARRAY_SIZE(regs_common)); 224 - dump_wed_regs(s, dev, regs_wed_v2, ARRAY_SIZE(regs_wed_v2)); 261 + if (mtk_wed_is_v2(hw)) 262 + dump_wed_regs(s, dev, 263 + regs_wed_v2, ARRAY_SIZE(regs_wed_v2)); 264 + else 265 + dump_wed_regs(s, dev, 266 + regs_wed_v3, ARRAY_SIZE(regs_wed_v3)); 225 267 } 226 268 227 269 return 0; 228 270 } 229 271 DEFINE_SHOW_ATTRIBUTE(wed_rxinfo); 272 + 273 + static int 274 + wed_amsdu_show(struct seq_file *s, void *data) 275 + { 276 + static const struct reg_dump regs[] = { 277 + DUMP_STR("WED AMDSU INFO"), 278 + DUMP_WED(WED_MON_AMSDU_FIFO_DMAD), 279 + 280 + DUMP_STR("WED AMDSU ENG0 INFO"), 281 + DUMP_WED(WED_MON_AMSDU_ENG_DMAD(0)), 282 + DUMP_WED(WED_MON_AMSDU_ENG_QFPL(0)), 283 + DUMP_WED(WED_MON_AMSDU_ENG_QENI(0)), 284 + DUMP_WED(WED_MON_AMSDU_ENG_QENO(0)), 285 + DUMP_WED(WED_MON_AMSDU_ENG_MERG(0)), 286 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(0), 287 + WED_AMSDU_ENG_MAX_PL_CNT), 288 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(0), 289 + WED_AMSDU_ENG_MAX_QGPP_CNT), 290 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(0), 291 + WED_AMSDU_ENG_CUR_ENTRY), 292 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(0), 293 + WED_AMSDU_ENG_MAX_BUF_MERGED), 294 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(0), 295 + WED_AMSDU_ENG_MAX_MSDU_MERGED), 296 + 297 + DUMP_STR("WED AMDSU ENG1 INFO"), 298 + DUMP_WED(WED_MON_AMSDU_ENG_DMAD(1)), 299 + DUMP_WED(WED_MON_AMSDU_ENG_QFPL(1)), 300 + DUMP_WED(WED_MON_AMSDU_ENG_QENI(1)), 301 + DUMP_WED(WED_MON_AMSDU_ENG_QENO(1)), 302 + DUMP_WED(WED_MON_AMSDU_ENG_MERG(1)), 303 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(1), 304 + WED_AMSDU_ENG_MAX_PL_CNT), 305 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(1), 306 + WED_AMSDU_ENG_MAX_QGPP_CNT), 307 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(1), 308 + WED_AMSDU_ENG_CUR_ENTRY), 309 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(2), 310 + WED_AMSDU_ENG_MAX_BUF_MERGED), 311 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(2), 312 + WED_AMSDU_ENG_MAX_MSDU_MERGED), 313 + 314 + DUMP_STR("WED AMDSU ENG2 INFO"), 315 + DUMP_WED(WED_MON_AMSDU_ENG_DMAD(2)), 316 + DUMP_WED(WED_MON_AMSDU_ENG_QFPL(2)), 317 + DUMP_WED(WED_MON_AMSDU_ENG_QENI(2)), 318 + DUMP_WED(WED_MON_AMSDU_ENG_QENO(2)), 319 + DUMP_WED(WED_MON_AMSDU_ENG_MERG(2)), 320 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(2), 321 + WED_AMSDU_ENG_MAX_PL_CNT), 322 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(2), 323 + WED_AMSDU_ENG_MAX_QGPP_CNT), 324 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(2), 325 + WED_AMSDU_ENG_CUR_ENTRY), 326 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(2), 327 + WED_AMSDU_ENG_MAX_BUF_MERGED), 328 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(2), 329 + WED_AMSDU_ENG_MAX_MSDU_MERGED), 330 + 331 + DUMP_STR("WED AMDSU ENG3 INFO"), 332 + DUMP_WED(WED_MON_AMSDU_ENG_DMAD(3)), 333 + DUMP_WED(WED_MON_AMSDU_ENG_QFPL(3)), 334 + DUMP_WED(WED_MON_AMSDU_ENG_QENI(3)), 335 + DUMP_WED(WED_MON_AMSDU_ENG_QENO(3)), 336 + DUMP_WED(WED_MON_AMSDU_ENG_MERG(3)), 337 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(3), 338 + WED_AMSDU_ENG_MAX_PL_CNT), 339 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(3), 340 + WED_AMSDU_ENG_MAX_QGPP_CNT), 341 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(3), 342 + WED_AMSDU_ENG_CUR_ENTRY), 343 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(3), 344 + WED_AMSDU_ENG_MAX_BUF_MERGED), 345 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(3), 346 + WED_AMSDU_ENG_MAX_MSDU_MERGED), 347 + 348 + DUMP_STR("WED AMDSU ENG4 INFO"), 349 + DUMP_WED(WED_MON_AMSDU_ENG_DMAD(4)), 350 + DUMP_WED(WED_MON_AMSDU_ENG_QFPL(4)), 351 + DUMP_WED(WED_MON_AMSDU_ENG_QENI(4)), 352 + DUMP_WED(WED_MON_AMSDU_ENG_QENO(4)), 353 + DUMP_WED(WED_MON_AMSDU_ENG_MERG(4)), 354 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(4), 355 + WED_AMSDU_ENG_MAX_PL_CNT), 356 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(4), 357 + WED_AMSDU_ENG_MAX_QGPP_CNT), 358 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(4), 359 + WED_AMSDU_ENG_CUR_ENTRY), 360 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(4), 361 + WED_AMSDU_ENG_MAX_BUF_MERGED), 362 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(4), 363 + WED_AMSDU_ENG_MAX_MSDU_MERGED), 364 + 365 + DUMP_STR("WED AMDSU ENG5 INFO"), 366 + DUMP_WED(WED_MON_AMSDU_ENG_DMAD(5)), 367 + DUMP_WED(WED_MON_AMSDU_ENG_QFPL(5)), 368 + DUMP_WED(WED_MON_AMSDU_ENG_QENI(5)), 369 + DUMP_WED(WED_MON_AMSDU_ENG_QENO(5)), 370 + DUMP_WED(WED_MON_AMSDU_ENG_MERG(5)), 371 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(5), 372 + WED_AMSDU_ENG_MAX_PL_CNT), 373 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(5), 374 + WED_AMSDU_ENG_MAX_QGPP_CNT), 375 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(5), 376 + WED_AMSDU_ENG_CUR_ENTRY), 377 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(5), 378 + WED_AMSDU_ENG_MAX_BUF_MERGED), 379 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(5), 380 + WED_AMSDU_ENG_MAX_MSDU_MERGED), 381 + 382 + DUMP_STR("WED AMDSU ENG6 INFO"), 383 + DUMP_WED(WED_MON_AMSDU_ENG_DMAD(6)), 384 + DUMP_WED(WED_MON_AMSDU_ENG_QFPL(6)), 385 + DUMP_WED(WED_MON_AMSDU_ENG_QENI(6)), 386 + DUMP_WED(WED_MON_AMSDU_ENG_QENO(6)), 387 + DUMP_WED(WED_MON_AMSDU_ENG_MERG(6)), 388 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(6), 389 + WED_AMSDU_ENG_MAX_PL_CNT), 390 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(6), 391 + WED_AMSDU_ENG_MAX_QGPP_CNT), 392 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(6), 393 + WED_AMSDU_ENG_CUR_ENTRY), 394 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(6), 395 + WED_AMSDU_ENG_MAX_BUF_MERGED), 396 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(6), 397 + WED_AMSDU_ENG_MAX_MSDU_MERGED), 398 + 399 + DUMP_STR("WED AMDSU ENG7 INFO"), 400 + DUMP_WED(WED_MON_AMSDU_ENG_DMAD(7)), 401 + DUMP_WED(WED_MON_AMSDU_ENG_QFPL(7)), 402 + DUMP_WED(WED_MON_AMSDU_ENG_QENI(7)), 403 + DUMP_WED(WED_MON_AMSDU_ENG_QENO(7)), 404 + DUMP_WED(WED_MON_AMSDU_ENG_MERG(7)), 405 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(7), 406 + WED_AMSDU_ENG_MAX_PL_CNT), 407 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(7), 408 + WED_AMSDU_ENG_MAX_QGPP_CNT), 409 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(7), 410 + WED_AMSDU_ENG_CUR_ENTRY), 411 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(7), 412 + WED_AMSDU_ENG_MAX_BUF_MERGED), 413 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(4), 414 + WED_AMSDU_ENG_MAX_MSDU_MERGED), 415 + 416 + DUMP_STR("WED AMDSU ENG8 INFO"), 417 + DUMP_WED(WED_MON_AMSDU_ENG_DMAD(8)), 418 + DUMP_WED(WED_MON_AMSDU_ENG_QFPL(8)), 419 + DUMP_WED(WED_MON_AMSDU_ENG_QENI(8)), 420 + DUMP_WED(WED_MON_AMSDU_ENG_QENO(8)), 421 + DUMP_WED(WED_MON_AMSDU_ENG_MERG(8)), 422 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(8), 423 + WED_AMSDU_ENG_MAX_PL_CNT), 424 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT8(8), 425 + WED_AMSDU_ENG_MAX_QGPP_CNT), 426 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(8), 427 + WED_AMSDU_ENG_CUR_ENTRY), 428 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(8), 429 + WED_AMSDU_ENG_MAX_BUF_MERGED), 430 + DUMP_WED_MASK(WED_MON_AMSDU_ENG_CNT9(8), 431 + WED_AMSDU_ENG_MAX_MSDU_MERGED), 432 + 433 + DUMP_STR("WED QMEM INFO"), 434 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_CNT(0), WED_AMSDU_QMEM_FQ_CNT), 435 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_CNT(0), WED_AMSDU_QMEM_SP_QCNT), 436 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_CNT(1), WED_AMSDU_QMEM_TID0_QCNT), 437 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_CNT(1), WED_AMSDU_QMEM_TID1_QCNT), 438 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_CNT(2), WED_AMSDU_QMEM_TID2_QCNT), 439 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_CNT(2), WED_AMSDU_QMEM_TID3_QCNT), 440 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_CNT(3), WED_AMSDU_QMEM_TID4_QCNT), 441 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_CNT(3), WED_AMSDU_QMEM_TID5_QCNT), 442 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_CNT(4), WED_AMSDU_QMEM_TID6_QCNT), 443 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_CNT(4), WED_AMSDU_QMEM_TID7_QCNT), 444 + 445 + DUMP_STR("WED QMEM HEAD INFO"), 446 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(0), WED_AMSDU_QMEM_FQ_HEAD), 447 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(0), WED_AMSDU_QMEM_SP_QHEAD), 448 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(1), WED_AMSDU_QMEM_TID0_QHEAD), 449 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(1), WED_AMSDU_QMEM_TID1_QHEAD), 450 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(2), WED_AMSDU_QMEM_TID2_QHEAD), 451 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(2), WED_AMSDU_QMEM_TID3_QHEAD), 452 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(3), WED_AMSDU_QMEM_TID4_QHEAD), 453 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(3), WED_AMSDU_QMEM_TID5_QHEAD), 454 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(4), WED_AMSDU_QMEM_TID6_QHEAD), 455 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(4), WED_AMSDU_QMEM_TID7_QHEAD), 456 + 457 + DUMP_STR("WED QMEM TAIL INFO"), 458 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(5), WED_AMSDU_QMEM_FQ_TAIL), 459 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(5), WED_AMSDU_QMEM_SP_QTAIL), 460 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(6), WED_AMSDU_QMEM_TID0_QTAIL), 461 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(6), WED_AMSDU_QMEM_TID1_QTAIL), 462 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(7), WED_AMSDU_QMEM_TID2_QTAIL), 463 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(7), WED_AMSDU_QMEM_TID3_QTAIL), 464 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(8), WED_AMSDU_QMEM_TID4_QTAIL), 465 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(8), WED_AMSDU_QMEM_TID5_QTAIL), 466 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(9), WED_AMSDU_QMEM_TID6_QTAIL), 467 + DUMP_WED_MASK(WED_MON_AMSDU_QMEM_PTR(9), WED_AMSDU_QMEM_TID7_QTAIL), 468 + 469 + DUMP_STR("WED HIFTXD MSDU INFO"), 470 + DUMP_WED(WED_MON_AMSDU_HIFTXD_FETCH_MSDU(1)), 471 + DUMP_WED(WED_MON_AMSDU_HIFTXD_FETCH_MSDU(2)), 472 + DUMP_WED(WED_MON_AMSDU_HIFTXD_FETCH_MSDU(3)), 473 + DUMP_WED(WED_MON_AMSDU_HIFTXD_FETCH_MSDU(4)), 474 + DUMP_WED(WED_MON_AMSDU_HIFTXD_FETCH_MSDU(5)), 475 + DUMP_WED(WED_MON_AMSDU_HIFTXD_FETCH_MSDU(6)), 476 + DUMP_WED(WED_MON_AMSDU_HIFTXD_FETCH_MSDU(7)), 477 + DUMP_WED(WED_MON_AMSDU_HIFTXD_FETCH_MSDU(8)), 478 + DUMP_WED(WED_MON_AMSDU_HIFTXD_FETCH_MSDU(9)), 479 + DUMP_WED(WED_MON_AMSDU_HIFTXD_FETCH_MSDU(10)), 480 + DUMP_WED(WED_MON_AMSDU_HIFTXD_FETCH_MSDU(11)), 481 + DUMP_WED(WED_MON_AMSDU_HIFTXD_FETCH_MSDU(12)), 482 + DUMP_WED(WED_MON_AMSDU_HIFTXD_FETCH_MSDU(13)), 483 + }; 484 + struct mtk_wed_hw *hw = s->private; 485 + struct mtk_wed_device *dev = hw->wed_dev; 486 + 487 + if (dev) 488 + dump_wed_regs(s, dev, regs, ARRAY_SIZE(regs)); 489 + 490 + return 0; 491 + } 492 + DEFINE_SHOW_ATTRIBUTE(wed_amsdu); 493 + 494 + static int 495 + wed_rtqm_show(struct seq_file *s, void *data) 496 + { 497 + static const struct reg_dump regs[] = { 498 + DUMP_STR("WED Route QM IGRS0(N2H + Recycle)"), 499 + DUMP_WED(WED_RTQM_IGRS0_I2HW_DMAD_CNT), 500 + DUMP_WED(WED_RTQM_IGRS0_I2H_DMAD_CNT(0)), 501 + DUMP_WED(WED_RTQM_IGRS0_I2H_DMAD_CNT(1)), 502 + DUMP_WED(WED_RTQM_IGRS0_I2HW_PKT_CNT), 503 + DUMP_WED(WED_RTQM_IGRS0_I2H_PKT_CNT(0)), 504 + DUMP_WED(WED_RTQM_IGRS0_I2H_PKT_CNT(0)), 505 + DUMP_WED(WED_RTQM_IGRS0_FDROP_CNT), 506 + 507 + DUMP_STR("WED Route QM IGRS1(Legacy)"), 508 + DUMP_WED(WED_RTQM_IGRS1_I2HW_DMAD_CNT), 509 + DUMP_WED(WED_RTQM_IGRS1_I2H_DMAD_CNT(0)), 510 + DUMP_WED(WED_RTQM_IGRS1_I2H_DMAD_CNT(1)), 511 + DUMP_WED(WED_RTQM_IGRS1_I2HW_PKT_CNT), 512 + DUMP_WED(WED_RTQM_IGRS1_I2H_PKT_CNT(0)), 513 + DUMP_WED(WED_RTQM_IGRS1_I2H_PKT_CNT(1)), 514 + DUMP_WED(WED_RTQM_IGRS1_FDROP_CNT), 515 + 516 + DUMP_STR("WED Route QM IGRS2(RRO3.0)"), 517 + DUMP_WED(WED_RTQM_IGRS2_I2HW_DMAD_CNT), 518 + DUMP_WED(WED_RTQM_IGRS2_I2H_DMAD_CNT(0)), 519 + DUMP_WED(WED_RTQM_IGRS2_I2H_DMAD_CNT(1)), 520 + DUMP_WED(WED_RTQM_IGRS2_I2HW_PKT_CNT), 521 + DUMP_WED(WED_RTQM_IGRS2_I2H_PKT_CNT(0)), 522 + DUMP_WED(WED_RTQM_IGRS2_I2H_PKT_CNT(1)), 523 + DUMP_WED(WED_RTQM_IGRS2_FDROP_CNT), 524 + 525 + DUMP_STR("WED Route QM IGRS3(DEBUG)"), 526 + DUMP_WED(WED_RTQM_IGRS2_I2HW_DMAD_CNT), 527 + DUMP_WED(WED_RTQM_IGRS3_I2H_DMAD_CNT(0)), 528 + DUMP_WED(WED_RTQM_IGRS3_I2H_DMAD_CNT(1)), 529 + DUMP_WED(WED_RTQM_IGRS3_I2HW_PKT_CNT), 530 + DUMP_WED(WED_RTQM_IGRS3_I2H_PKT_CNT(0)), 531 + DUMP_WED(WED_RTQM_IGRS3_I2H_PKT_CNT(1)), 532 + DUMP_WED(WED_RTQM_IGRS3_FDROP_CNT), 533 + }; 534 + struct mtk_wed_hw *hw = s->private; 535 + struct mtk_wed_device *dev = hw->wed_dev; 536 + 537 + if (dev) 538 + dump_wed_regs(s, dev, regs, ARRAY_SIZE(regs)); 539 + 540 + return 0; 541 + } 542 + DEFINE_SHOW_ATTRIBUTE(wed_rtqm); 543 + 544 + static int 545 + wed_rro_show(struct seq_file *s, void *data) 546 + { 547 + static const struct reg_dump regs[] = { 548 + DUMP_STR("RRO/IND CMD CNT"), 549 + DUMP_WED(WED_RX_IND_CMD_CNT(1)), 550 + DUMP_WED(WED_RX_IND_CMD_CNT(2)), 551 + DUMP_WED(WED_RX_IND_CMD_CNT(3)), 552 + DUMP_WED(WED_RX_IND_CMD_CNT(4)), 553 + DUMP_WED(WED_RX_IND_CMD_CNT(5)), 554 + DUMP_WED(WED_RX_IND_CMD_CNT(6)), 555 + DUMP_WED(WED_RX_IND_CMD_CNT(7)), 556 + DUMP_WED(WED_RX_IND_CMD_CNT(8)), 557 + DUMP_WED_MASK(WED_RX_IND_CMD_CNT(9), 558 + WED_IND_CMD_MAGIC_CNT_FAIL_CNT), 559 + 560 + DUMP_WED(WED_RX_ADDR_ELEM_CNT(0)), 561 + DUMP_WED_MASK(WED_RX_ADDR_ELEM_CNT(1), 562 + WED_ADDR_ELEM_SIG_FAIL_CNT), 563 + DUMP_WED(WED_RX_MSDU_PG_CNT(1)), 564 + DUMP_WED(WED_RX_MSDU_PG_CNT(2)), 565 + DUMP_WED(WED_RX_MSDU_PG_CNT(3)), 566 + DUMP_WED(WED_RX_MSDU_PG_CNT(4)), 567 + DUMP_WED(WED_RX_MSDU_PG_CNT(5)), 568 + DUMP_WED_MASK(WED_RX_PN_CHK_CNT, 569 + WED_PN_CHK_FAIL_CNT), 570 + }; 571 + struct mtk_wed_hw *hw = s->private; 572 + struct mtk_wed_device *dev = hw->wed_dev; 573 + 574 + if (dev) 575 + dump_wed_regs(s, dev, regs, ARRAY_SIZE(regs)); 576 + 577 + return 0; 578 + } 579 + DEFINE_SHOW_ATTRIBUTE(wed_rro); 230 580 231 581 static int 232 582 mtk_wed_reg_set(void *data, u64 val) ··· 622 264 debugfs_create_u32("regidx", 0600, dir, &hw->debugfs_reg); 623 265 debugfs_create_file_unsafe("regval", 0600, dir, hw, &fops_regval); 624 266 debugfs_create_file_unsafe("txinfo", 0400, dir, hw, &wed_txinfo_fops); 625 - if (!mtk_wed_is_v1(hw)) 267 + if (!mtk_wed_is_v1(hw)) { 626 268 debugfs_create_file_unsafe("rxinfo", 0400, dir, hw, 627 269 &wed_rxinfo_fops); 270 + if (mtk_wed_is_v3_or_greater(hw)) { 271 + debugfs_create_file_unsafe("amsdu", 0400, dir, hw, 272 + &wed_amsdu_fops); 273 + debugfs_create_file_unsafe("rtqm", 0400, dir, hw, 274 + &wed_rtqm_fops); 275 + debugfs_create_file_unsafe("rro", 0400, dir, hw, 276 + &wed_rro_fops); 277 + } 278 + } 628 279 }