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kernel os linux

ARM: dts: am335x-sancloud-bbe: Extract common code

The Sancloud BBE, BBE Lite and BBE Extended+WiFi share a common hardware
base so we can avoid duplication via a dtsi file.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

authored by

Paul Barker and committed by
Tony Lindgren
3ed92653 feb29cf3

+97 -90
+96
arch/arm/boot/dts/am335x-sancloud-bbe-common.dtsi
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + /* 3 + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 4 + */ 5 + 6 + &am33xx_pinmux { 7 + cpsw_default: cpsw_default { 8 + pinctrl-single,pins = < 9 + /* Slave 1 */ 10 + AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */ 11 + AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ 12 + AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ 13 + AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ 14 + AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ 15 + AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ 16 + AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ 17 + AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ 18 + AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ 19 + AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ 20 + AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ 21 + AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ 22 + >; 23 + }; 24 + 25 + cpsw_sleep: cpsw_sleep { 26 + pinctrl-single,pins = < 27 + /* Slave 1 reset value */ 28 + AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 29 + AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 30 + AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 31 + AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 32 + AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 33 + AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 34 + AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 35 + AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 36 + AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 37 + AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 38 + AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 39 + AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 40 + >; 41 + }; 42 + 43 + davinci_mdio_default: davinci_mdio_default { 44 + pinctrl-single,pins = < 45 + /* MDIO */ 46 + AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) 47 + AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) 48 + >; 49 + }; 50 + 51 + davinci_mdio_sleep: davinci_mdio_sleep { 52 + pinctrl-single,pins = < 53 + /* MDIO reset value */ 54 + AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) 55 + AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7) 56 + >; 57 + }; 58 + 59 + usb_hub_ctrl: usb_hub_ctrl { 60 + pinctrl-single,pins = < 61 + AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* rmii1_refclk.gpio0_29 */ 62 + >; 63 + }; 64 + }; 65 + 66 + &mac { 67 + pinctrl-names = "default", "sleep"; 68 + pinctrl-0 = <&cpsw_default>; 69 + pinctrl-1 = <&cpsw_sleep>; 70 + status = "okay"; 71 + }; 72 + 73 + &davinci_mdio { 74 + pinctrl-names = "default", "sleep"; 75 + pinctrl-0 = <&davinci_mdio_default>; 76 + pinctrl-1 = <&davinci_mdio_sleep>; 77 + status = "okay"; 78 + 79 + ethphy0: ethernet-phy@0 { 80 + reg = <0>; 81 + }; 82 + }; 83 + 84 + &cpsw_emac0 { 85 + phy-handle = <&ethphy0>; 86 + phy-mode = "rgmii-id"; 87 + }; 88 + 89 + &i2c0 { 90 + usb2512b: usb-hub@2c { 91 + compatible = "microchip,usb2512b"; 92 + reg = <0x2c>; 93 + reset-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; 94 + /* wifi on port 4 */ 95 + }; 96 + };
+1 -90
arch/arm/boot/dts/am335x-sancloud-bbe.dts
··· 8 8 #include "am335x-bone-common.dtsi" 9 9 #include "am335x-boneblack-common.dtsi" 10 10 #include "am335x-boneblack-hdmi.dtsi" 11 + #include "am335x-sancloud-bbe-common.dtsi" 11 12 #include <dt-bindings/interrupt-controller/irq.h> 12 13 13 14 / { ··· 17 16 }; 18 17 19 18 &am33xx_pinmux { 20 - pinctrl-names = "default"; 21 - 22 - cpsw_default: cpsw_default { 23 - pinctrl-single,pins = < 24 - /* Slave 1 */ 25 - AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */ 26 - AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ 27 - AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ 28 - AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ 29 - AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ 30 - AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ 31 - AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ 32 - AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ 33 - AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ 34 - AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ 35 - AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ 36 - AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ 37 - >; 38 - }; 39 - 40 - cpsw_sleep: cpsw_sleep { 41 - pinctrl-single,pins = < 42 - /* Slave 1 reset value */ 43 - AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 44 - AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 45 - AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 46 - AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 47 - AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 48 - AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 49 - AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 50 - AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 51 - AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 52 - AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 53 - AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 54 - AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 55 - >; 56 - }; 57 - 58 - davinci_mdio_default: davinci_mdio_default { 59 - pinctrl-single,pins = < 60 - /* MDIO */ 61 - AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) 62 - AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) 63 - >; 64 - }; 65 - 66 - davinci_mdio_sleep: davinci_mdio_sleep { 67 - pinctrl-single,pins = < 68 - /* MDIO reset value */ 69 - AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) 70 - AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7) 71 - >; 72 - }; 73 - 74 - usb_hub_ctrl: usb_hub_ctrl { 75 - pinctrl-single,pins = < 76 - AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* rmii1_refclk.gpio0_29 */ 77 - >; 78 - }; 79 - 80 19 mpu6050_pins: pinmux_mpu6050_pins { 81 20 pinctrl-single,pins = < 82 21 AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT, MUX_MODE7) /* uart0_ctsn.gpio1_8 */ ··· 28 87 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7) /* gpmc_a10.gpio1_26 */ 29 88 >; 30 89 }; 31 - }; 32 - 33 - &mac { 34 - pinctrl-names = "default", "sleep"; 35 - pinctrl-0 = <&cpsw_default>; 36 - pinctrl-1 = <&cpsw_sleep>; 37 - status = "okay"; 38 - }; 39 - 40 - &davinci_mdio { 41 - pinctrl-names = "default", "sleep"; 42 - pinctrl-0 = <&davinci_mdio_default>; 43 - pinctrl-1 = <&davinci_mdio_sleep>; 44 - status = "okay"; 45 - 46 - ethphy0: ethernet-phy@0 { 47 - reg = <0>; 48 - }; 49 - }; 50 - 51 - &cpsw_emac0 { 52 - phy-handle = <&ethphy0>; 53 - phy-mode = "rgmii-id"; 54 90 }; 55 91 56 92 &i2c0 { ··· 45 127 interrupt-parent = <&gpio0>; 46 128 interrupts = <2 IRQ_TYPE_EDGE_RISING>; 47 129 orientation = <0xff 0 0 0 1 0 0 0 0xff>; 48 - }; 49 - 50 - usb2512b: usb-hub@2c { 51 - compatible = "microchip,usb2512b"; 52 - reg = <0x2c>; 53 - reset-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; 54 - /* wifi on port 4 */ 55 130 }; 56 131 };