Merge branch 'usbhost17-for-mfd' of git://github.com/rogerq/linux into for-next

+332 -226

drivers/mfd/omap-usb-host.c

··· 23 23 #include <linux/delay.h> 24 24 #include <linux/clk.h> 25 25 #include <linux/dma-mapping.h> 26 - #include <linux/spinlock.h> 27 26 #include <linux/gpio.h> 28 27 #include <linux/platform_device.h> 29 28 #include <linux/platform_data/usb-omap.h> ··· 90 91 91 92 92 93 struct usbhs_hcd_omap { 94 + int nports; 95 + struct clk **utmi_clk; 96 + struct clk **hsic60m_clk; 97 + struct clk **hsic480m_clk; 98 + 93 99 struct clk *xclk60mhsp1_ck; 94 100 struct clk *xclk60mhsp2_ck; 95 - struct clk *utmi_p1_fck; 96 - struct clk *usbhost_p1_fck; 97 - struct clk *utmi_p2_fck; 98 - struct clk *usbhost_p2_fck; 101 + struct clk *utmi_p1_gfclk; 102 + struct clk *utmi_p2_gfclk; 99 103 struct clk *init_60m_fclk; 100 104 struct clk *ehci_logic_fck; 101 105 102 106 void __iomem *uhh_base; 103 107 104 - struct usbhs_omap_platform_data platdata; 108 + struct usbhs_omap_platform_data *pdata; 105 109 106 110 u32 usbhs_rev; 107 - spinlock_t lock; 108 111 }; 109 112 /*-------------------------------------------------------------------------*/ 110 113 ··· 185 184 static int omap_usbhs_alloc_children(struct platform_device *pdev) 186 185 { 187 186 struct device *dev = &pdev->dev; 188 - struct usbhs_hcd_omap *omap; 189 - struct ehci_hcd_omap_platform_data *ehci_data; 190 - struct ohci_hcd_omap_platform_data *ohci_data; 187 + struct usbhs_omap_platform_data *pdata = dev->platform_data; 191 188 struct platform_device *ehci; 192 189 struct platform_device *ohci; 193 190 struct resource *res; 194 191 struct resource resources[2]; 195 192 int ret; 196 - 197 - omap = platform_get_drvdata(pdev); 198 - ehci_data = omap->platdata.ehci_data; 199 - ohci_data = omap->platdata.ohci_data; 200 193 201 194 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ehci"); 202 195 if (!res) { ··· 208 213 } 209 214 resources[1] = *res; 210 215 211 - ehci = omap_usbhs_alloc_child(OMAP_EHCI_DEVICE, resources, 2, ehci_data, 212 - sizeof(*ehci_data), dev); 216 + ehci = omap_usbhs_alloc_child(OMAP_EHCI_DEVICE, resources, 2, pdata, 217 + sizeof(*pdata), dev); 213 218 214 219 if (!ehci) { 215 220 dev_err(dev, "omap_usbhs_alloc_child failed\n"); ··· 233 238 } 234 239 resources[1] = *res; 235 240 236 - ohci = omap_usbhs_alloc_child(OMAP_OHCI_DEVICE, resources, 2, ohci_data, 237 - sizeof(*ohci_data), dev); 241 + ohci = omap_usbhs_alloc_child(OMAP_OHCI_DEVICE, resources, 2, pdata, 242 + sizeof(*pdata), dev); 238 243 if (!ohci) { 239 244 dev_err(dev, "omap_usbhs_alloc_child failed\n"); 240 245 ret = -ENOMEM; ··· 273 278 static int usbhs_runtime_resume(struct device *dev) 274 279 { 275 280 struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); 276 - struct usbhs_omap_platform_data *pdata = &omap->platdata; 277 - unsigned long flags; 281 + struct usbhs_omap_platform_data *pdata = omap->pdata; 282 + int i, r; 278 283 279 284 dev_dbg(dev, "usbhs_runtime_resume\n"); 280 285 281 - if (!pdata) { 282 - dev_dbg(dev, "missing platform_data\n"); 283 - return -ENODEV; 284 - } 285 - 286 286 omap_tll_enable(); 287 - spin_lock_irqsave(&omap->lock, flags); 288 287 289 - if (omap->ehci_logic_fck && !IS_ERR(omap->ehci_logic_fck)) 288 + if (!IS_ERR(omap->ehci_logic_fck)) 290 289 clk_enable(omap->ehci_logic_fck); 291 290 292 - if (is_ehci_tll_mode(pdata->port_mode[0])) 293 - clk_enable(omap->usbhost_p1_fck); 294 - if (is_ehci_tll_mode(pdata->port_mode[1])) 295 - clk_enable(omap->usbhost_p2_fck); 291 + for (i = 0; i < omap->nports; i++) { 292 + switch (pdata->port_mode[i]) { 293 + case OMAP_EHCI_PORT_MODE_HSIC: 294 + if (!IS_ERR(omap->hsic60m_clk[i])) { 295 + r = clk_enable(omap->hsic60m_clk[i]); 296 + if (r) { 297 + dev_err(dev, 298 + "Can't enable port %d hsic60m clk:%d\n", 299 + i, r); 300 + } 301 + } 296 302 297 - clk_enable(omap->utmi_p1_fck); 298 - clk_enable(omap->utmi_p2_fck); 303 + if (!IS_ERR(omap->hsic480m_clk[i])) { 304 + r = clk_enable(omap->hsic480m_clk[i]); 305 + if (r) { 306 + dev_err(dev, 307 + "Can't enable port %d hsic480m clk:%d\n", 308 + i, r); 309 + } 310 + } 311 + /* Fall through as HSIC mode needs utmi_clk */ 299 312 300 - spin_unlock_irqrestore(&omap->lock, flags); 313 + case OMAP_EHCI_PORT_MODE_TLL: 314 + if (!IS_ERR(omap->utmi_clk[i])) { 315 + r = clk_enable(omap->utmi_clk[i]); 316 + if (r) { 317 + dev_err(dev, 318 + "Can't enable port %d clk : %d\n", 319 + i, r); 320 + } 321 + } 322 + break; 323 + default: 324 + break; 325 + } 326 + } 301 327 302 328 return 0; 303 329 } ··· 326 310 static int usbhs_runtime_suspend(struct device *dev) 327 311 { 328 312 struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); 329 - struct usbhs_omap_platform_data *pdata = &omap->platdata; 330 - unsigned long flags; 313 + struct usbhs_omap_platform_data *pdata = omap->pdata; 314 + int i; 331 315 332 316 dev_dbg(dev, "usbhs_runtime_suspend\n"); 333 317 334 - if (!pdata) { 335 - dev_dbg(dev, "missing platform_data\n"); 336 - return -ENODEV; 318 + for (i = 0; i < omap->nports; i++) { 319 + switch (pdata->port_mode[i]) { 320 + case OMAP_EHCI_PORT_MODE_HSIC: 321 + if (!IS_ERR(omap->hsic60m_clk[i])) 322 + clk_disable(omap->hsic60m_clk[i]); 323 + 324 + if (!IS_ERR(omap->hsic480m_clk[i])) 325 + clk_disable(omap->hsic480m_clk[i]); 326 + /* Fall through as utmi_clks were used in HSIC mode */ 327 + 328 + case OMAP_EHCI_PORT_MODE_TLL: 329 + if (!IS_ERR(omap->utmi_clk[i])) 330 + clk_disable(omap->utmi_clk[i]); 331 + break; 332 + default: 333 + break; 334 + } 337 335 } 338 336 339 - spin_lock_irqsave(&omap->lock, flags); 340 - 341 - if (is_ehci_tll_mode(pdata->port_mode[0])) 342 - clk_disable(omap->usbhost_p1_fck); 343 - if (is_ehci_tll_mode(pdata->port_mode[1])) 344 - clk_disable(omap->usbhost_p2_fck); 345 - 346 - clk_disable(omap->utmi_p2_fck); 347 - clk_disable(omap->utmi_p1_fck); 348 - 349 - if (omap->ehci_logic_fck && !IS_ERR(omap->ehci_logic_fck)) 337 + if (!IS_ERR(omap->ehci_logic_fck)) 350 338 clk_disable(omap->ehci_logic_fck); 351 339 352 - spin_unlock_irqrestore(&omap->lock, flags); 353 340 omap_tll_disable(); 354 341 355 342 return 0; 356 343 } 357 344 345 + static unsigned omap_usbhs_rev1_hostconfig(struct usbhs_hcd_omap *omap, 346 + unsigned reg) 347 + { 348 + struct usbhs_omap_platform_data *pdata = omap->pdata; 349 + int i; 350 + 351 + for (i = 0; i < omap->nports; i++) { 352 + switch (pdata->port_mode[i]) { 353 + case OMAP_USBHS_PORT_MODE_UNUSED: 354 + reg &= ~(OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS << i); 355 + break; 356 + case OMAP_EHCI_PORT_MODE_PHY: 357 + if (pdata->single_ulpi_bypass) 358 + break; 359 + 360 + if (i == 0) 361 + reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS; 362 + else 363 + reg &= ~(OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS 364 + << (i-1)); 365 + break; 366 + default: 367 + if (pdata->single_ulpi_bypass) 368 + break; 369 + 370 + if (i == 0) 371 + reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS; 372 + else 373 + reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS 374 + << (i-1); 375 + break; 376 + } 377 + } 378 + 379 + if (pdata->single_ulpi_bypass) { 380 + /* bypass ULPI only if none of the ports use PHY mode */ 381 + reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS; 382 + 383 + for (i = 0; i < omap->nports; i++) { 384 + if (is_ehci_phy_mode(pdata->port_mode[i])) { 385 + reg &= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS; 386 + break; 387 + } 388 + } 389 + } 390 + 391 + return reg; 392 + } 393 + 394 + static unsigned omap_usbhs_rev2_hostconfig(struct usbhs_hcd_omap *omap, 395 + unsigned reg) 396 + { 397 + struct usbhs_omap_platform_data *pdata = omap->pdata; 398 + int i; 399 + 400 + for (i = 0; i < omap->nports; i++) { 401 + /* Clear port mode fields for PHY mode */ 402 + reg &= ~(OMAP4_P1_MODE_CLEAR << 2 * i); 403 + 404 + if (is_ehci_tll_mode(pdata->port_mode[i]) || 405 + (is_ohci_port(pdata->port_mode[i]))) 406 + reg |= OMAP4_P1_MODE_TLL << 2 * i; 407 + else if (is_ehci_hsic_mode(pdata->port_mode[i])) 408 + reg |= OMAP4_P1_MODE_HSIC << 2 * i; 409 + } 410 + 411 + return reg; 412 + } 413 + 358 414 static void omap_usbhs_init(struct device *dev) 359 415 { 360 416 struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); 361 - struct usbhs_omap_platform_data *pdata = &omap->platdata; 362 - unsigned long flags; 417 + struct usbhs_omap_platform_data *pdata = omap->pdata; 363 418 unsigned reg; 364 419 365 420 dev_dbg(dev, "starting TI HSUSB Controller\n"); 366 421 367 - if (pdata->ehci_data->phy_reset) { 368 - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) 369 - gpio_request_one(pdata->ehci_data->reset_gpio_port[0], 422 + if (pdata->phy_reset) { 423 + if (gpio_is_valid(pdata->reset_gpio_port[0])) 424 + gpio_request_one(pdata->reset_gpio_port[0], 370 425 GPIOF_OUT_INIT_LOW, "USB1 PHY reset"); 371 426 372 - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) 373 - gpio_request_one(pdata->ehci_data->reset_gpio_port[1], 427 + if (gpio_is_valid(pdata->reset_gpio_port[1])) 428 + gpio_request_one(pdata->reset_gpio_port[1], 374 429 GPIOF_OUT_INIT_LOW, "USB2 PHY reset"); 375 430 376 431 /* Hold the PHY in RESET for enough time till DIR is high */ ··· 449 362 } 450 363 451 364 pm_runtime_get_sync(dev); 452 - spin_lock_irqsave(&omap->lock, flags); 453 - omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION); 454 - dev_dbg(dev, "OMAP UHH_REVISION 0x%x\n", omap->usbhs_rev); 455 365 456 366 reg = usbhs_read(omap->uhh_base, OMAP_UHH_HOSTCONFIG); 457 367 /* setup ULPI bypass and burst configurations */ ··· 458 374 reg |= OMAP4_UHH_HOSTCONFIG_APP_START_CLK; 459 375 reg &= ~OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN; 460 376 461 - if (is_omap_usbhs_rev1(omap)) { 462 - if (pdata->port_mode[0] == OMAP_USBHS_PORT_MODE_UNUSED) 463 - reg &= ~OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS; 464 - if (pdata->port_mode[1] == OMAP_USBHS_PORT_MODE_UNUSED) 465 - reg &= ~OMAP_UHH_HOSTCONFIG_P2_CONNECT_STATUS; 466 - if (pdata->port_mode[2] == OMAP_USBHS_PORT_MODE_UNUSED) 467 - reg &= ~OMAP_UHH_HOSTCONFIG_P3_CONNECT_STATUS; 377 + switch (omap->usbhs_rev) { 378 + case OMAP_USBHS_REV1: 379 + omap_usbhs_rev1_hostconfig(omap, reg); 380 + break; 468 381 469 - /* Bypass the TLL module for PHY mode operation */ 470 - if (pdata->single_ulpi_bypass) { 471 - dev_dbg(dev, "OMAP3 ES version <= ES2.1\n"); 472 - if (is_ehci_phy_mode(pdata->port_mode[0]) || 473 - is_ehci_phy_mode(pdata->port_mode[1]) || 474 - is_ehci_phy_mode(pdata->port_mode[2])) 475 - reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_BYPASS; 476 - else 477 - reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS; 478 - } else { 479 - dev_dbg(dev, "OMAP3 ES version > ES2.1\n"); 480 - if (is_ehci_phy_mode(pdata->port_mode[0])) 481 - reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS; 482 - else 483 - reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS; 484 - if (is_ehci_phy_mode(pdata->port_mode[1])) 485 - reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS; 486 - else 487 - reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS; 488 - if (is_ehci_phy_mode(pdata->port_mode[2])) 489 - reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS; 490 - else 491 - reg |= OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS; 492 - } 493 - } else if (is_omap_usbhs_rev2(omap)) { 494 - /* Clear port mode fields for PHY mode*/ 495 - reg &= ~OMAP4_P1_MODE_CLEAR; 496 - reg &= ~OMAP4_P2_MODE_CLEAR; 382 + case OMAP_USBHS_REV2: 383 + omap_usbhs_rev2_hostconfig(omap, reg); 384 + break; 497 385 498 - if (is_ehci_tll_mode(pdata->port_mode[0]) || 499 - (is_ohci_port(pdata->port_mode[0]))) 500 - reg |= OMAP4_P1_MODE_TLL; 501 - else if (is_ehci_hsic_mode(pdata->port_mode[0])) 502 - reg |= OMAP4_P1_MODE_HSIC; 503 - 504 - if (is_ehci_tll_mode(pdata->port_mode[1]) || 505 - (is_ohci_port(pdata->port_mode[1]))) 506 - reg |= OMAP4_P2_MODE_TLL; 507 - else if (is_ehci_hsic_mode(pdata->port_mode[1])) 508 - reg |= OMAP4_P2_MODE_HSIC; 386 + default: /* newer revisions */ 387 + omap_usbhs_rev2_hostconfig(omap, reg); 388 + break; 509 389 } 510 390 511 391 usbhs_write(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg); 512 392 dev_dbg(dev, "UHH setup done, uhh_hostconfig=%x\n", reg); 513 393 514 - spin_unlock_irqrestore(&omap->lock, flags); 515 - 516 394 pm_runtime_put_sync(dev); 517 - if (pdata->ehci_data->phy_reset) { 395 + if (pdata->phy_reset) { 518 396 /* Hold the PHY in RESET for enough time till 519 397 * PHY is settled and ready 520 398 */ 521 399 udelay(10); 522 400 523 - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) 401 + if (gpio_is_valid(pdata->reset_gpio_port[0])) 524 402 gpio_set_value_cansleep 525 - (pdata->ehci_data->reset_gpio_port[0], 1); 403 + (pdata->reset_gpio_port[0], 1); 526 404 527 - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) 405 + if (gpio_is_valid(pdata->reset_gpio_port[1])) 528 406 gpio_set_value_cansleep 529 - (pdata->ehci_data->reset_gpio_port[1], 1); 407 + (pdata->reset_gpio_port[1], 1); 530 408 } 531 409 } 532 410 533 411 static void omap_usbhs_deinit(struct device *dev) 534 412 { 535 413 struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); 536 - struct usbhs_omap_platform_data *pdata = &omap->platdata; 414 + struct usbhs_omap_platform_data *pdata = omap->pdata; 537 415 538 - if (pdata->ehci_data->phy_reset) { 539 - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) 540 - gpio_free(pdata->ehci_data->reset_gpio_port[0]); 416 + if (pdata->phy_reset) { 417 + if (gpio_is_valid(pdata->reset_gpio_port[0])) 418 + gpio_free(pdata->reset_gpio_port[0]); 541 419 542 - if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) 543 - gpio_free(pdata->ehci_data->reset_gpio_port[1]); 420 + if (gpio_is_valid(pdata->reset_gpio_port[1])) 421 + gpio_free(pdata->reset_gpio_port[1]); 544 422 } 545 423 } 546 424 ··· 520 474 struct resource *res; 521 475 int ret = 0; 522 476 int i; 477 + bool need_logic_fck; 523 478 524 479 if (!pdata) { 525 480 dev_err(dev, "Missing platform data\n"); 526 - ret = -ENOMEM; 527 - goto end_probe; 481 + return -ENODEV; 528 482 } 529 483 530 - omap = kzalloc(sizeof(*omap), GFP_KERNEL); 484 + omap = devm_kzalloc(dev, sizeof(*omap), GFP_KERNEL); 531 485 if (!omap) { 532 486 dev_err(dev, "Memory allocation failed\n"); 533 - ret = -ENOMEM; 534 - goto end_probe; 487 + return -ENOMEM; 535 488 } 536 489 537 - spin_lock_init(&omap->lock); 490 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "uhh"); 491 + omap->uhh_base = devm_request_and_ioremap(dev, res); 492 + if (!omap->uhh_base) { 493 + dev_err(dev, "Resource request/ioremap failed\n"); 494 + return -EADDRNOTAVAIL; 495 + } 538 496 539 - for (i = 0; i < OMAP3_HS_USB_PORTS; i++) 540 - omap->platdata.port_mode[i] = pdata->port_mode[i]; 541 - 542 - omap->platdata.ehci_data = pdata->ehci_data; 543 - omap->platdata.ohci_data = pdata->ohci_data; 497 + omap->pdata = pdata; 544 498 545 499 pm_runtime_enable(dev); 546 500 501 + platform_set_drvdata(pdev, omap); 502 + pm_runtime_get_sync(dev); 547 503 548 - for (i = 0; i < OMAP3_HS_USB_PORTS; i++) 549 - if (is_ehci_phy_mode(i) || is_ehci_tll_mode(i) || 550 - is_ehci_hsic_mode(i)) { 551 - omap->ehci_logic_fck = clk_get(dev, "ehci_logic_fck"); 552 - if (IS_ERR(omap->ehci_logic_fck)) { 553 - ret = PTR_ERR(omap->ehci_logic_fck); 554 - dev_warn(dev, "ehci_logic_fck failed:%d\n", 555 - ret); 556 - } 504 + omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION); 505 + 506 + /* we need to call runtime suspend before we update omap->nports 507 + * to prevent unbalanced clk_disable() 508 + */ 509 + pm_runtime_put_sync(dev); 510 + 511 + /* 512 + * If platform data contains nports then use that 513 + * else make out number of ports from USBHS revision 514 + */ 515 + if (pdata->nports) { 516 + omap->nports = pdata->nports; 517 + } else { 518 + switch (omap->usbhs_rev) { 519 + case OMAP_USBHS_REV1: 520 + omap->nports = 3; 521 + break; 522 + case OMAP_USBHS_REV2: 523 + omap->nports = 2; 524 + break; 525 + default: 526 + omap->nports = OMAP3_HS_USB_PORTS; 527 + dev_dbg(dev, 528 + "USB HOST Rev:0x%d not recognized, assuming %d ports\n", 529 + omap->usbhs_rev, omap->nports); 557 530 break; 558 531 } 532 + } 559 533 560 - omap->utmi_p1_fck = clk_get(dev, "utmi_p1_gfclk"); 561 - if (IS_ERR(omap->utmi_p1_fck)) { 562 - ret = PTR_ERR(omap->utmi_p1_fck); 563 - dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret); 564 - goto err_end; 534 + i = sizeof(struct clk *) * omap->nports; 535 + omap->utmi_clk = devm_kzalloc(dev, i, GFP_KERNEL); 536 + omap->hsic480m_clk = devm_kzalloc(dev, i, GFP_KERNEL); 537 + omap->hsic60m_clk = devm_kzalloc(dev, i, GFP_KERNEL); 538 + 539 + if (!omap->utmi_clk || !omap->hsic480m_clk || !omap->hsic60m_clk) { 540 + dev_err(dev, "Memory allocation failed\n"); 541 + ret = -ENOMEM; 542 + goto err_mem; 543 + } 544 + 545 + need_logic_fck = false; 546 + for (i = 0; i < omap->nports; i++) { 547 + if (is_ehci_phy_mode(i) || is_ehci_tll_mode(i) || 548 + is_ehci_hsic_mode(i)) 549 + need_logic_fck |= true; 550 + } 551 + 552 + omap->ehci_logic_fck = ERR_PTR(-EINVAL); 553 + if (need_logic_fck) { 554 + omap->ehci_logic_fck = clk_get(dev, "ehci_logic_fck"); 555 + if (IS_ERR(omap->ehci_logic_fck)) { 556 + ret = PTR_ERR(omap->ehci_logic_fck); 557 + dev_dbg(dev, "ehci_logic_fck failed:%d\n", ret); 558 + } 559 + } 560 + 561 + omap->utmi_p1_gfclk = clk_get(dev, "utmi_p1_gfclk"); 562 + if (IS_ERR(omap->utmi_p1_gfclk)) { 563 + ret = PTR_ERR(omap->utmi_p1_gfclk); 564 + dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret); 565 + goto err_p1_gfclk; 566 + } 567 + 568 + omap->utmi_p2_gfclk = clk_get(dev, "utmi_p2_gfclk"); 569 + if (IS_ERR(omap->utmi_p2_gfclk)) { 570 + ret = PTR_ERR(omap->utmi_p2_gfclk); 571 + dev_err(dev, "utmi_p2_gfclk failed error:%d\n", ret); 572 + goto err_p2_gfclk; 565 573 } 566 574 567 575 omap->xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck"); 568 576 if (IS_ERR(omap->xclk60mhsp1_ck)) { 569 577 ret = PTR_ERR(omap->xclk60mhsp1_ck); 570 578 dev_err(dev, "xclk60mhsp1_ck failed error:%d\n", ret); 571 - goto err_utmi_p1_fck; 572 - } 573 - 574 - omap->utmi_p2_fck = clk_get(dev, "utmi_p2_gfclk"); 575 - if (IS_ERR(omap->utmi_p2_fck)) { 576 - ret = PTR_ERR(omap->utmi_p2_fck); 577 - dev_err(dev, "utmi_p2_gfclk failed error:%d\n", ret); 578 - goto err_xclk60mhsp1_ck; 579 + goto err_xclk60mhsp1; 579 580 } 580 581 581 582 omap->xclk60mhsp2_ck = clk_get(dev, "xclk60mhsp2_ck"); 582 583 if (IS_ERR(omap->xclk60mhsp2_ck)) { 583 584 ret = PTR_ERR(omap->xclk60mhsp2_ck); 584 585 dev_err(dev, "xclk60mhsp2_ck failed error:%d\n", ret); 585 - goto err_utmi_p2_fck; 586 - } 587 - 588 - omap->usbhost_p1_fck = clk_get(dev, "usb_host_hs_utmi_p1_clk"); 589 - if (IS_ERR(omap->usbhost_p1_fck)) { 590 - ret = PTR_ERR(omap->usbhost_p1_fck); 591 - dev_err(dev, "usbhost_p1_fck failed error:%d\n", ret); 592 - goto err_xclk60mhsp2_ck; 593 - } 594 - 595 - omap->usbhost_p2_fck = clk_get(dev, "usb_host_hs_utmi_p2_clk"); 596 - if (IS_ERR(omap->usbhost_p2_fck)) { 597 - ret = PTR_ERR(omap->usbhost_p2_fck); 598 - dev_err(dev, "usbhost_p2_fck failed error:%d\n", ret); 599 - goto err_usbhost_p1_fck; 586 + goto err_xclk60mhsp2; 600 587 } 601 588 602 589 omap->init_60m_fclk = clk_get(dev, "init_60m_fclk"); 603 590 if (IS_ERR(omap->init_60m_fclk)) { 604 591 ret = PTR_ERR(omap->init_60m_fclk); 605 592 dev_err(dev, "init_60m_fclk failed error:%d\n", ret); 606 - goto err_usbhost_p2_fck; 593 + goto err_init60m; 594 + } 595 + 596 + for (i = 0; i < omap->nports; i++) { 597 + char clkname[30]; 598 + 599 + /* clock names are indexed from 1*/ 600 + snprintf(clkname, sizeof(clkname), 601 + "usb_host_hs_utmi_p%d_clk", i + 1); 602 + 603 + /* If a clock is not found we won't bail out as not all 604 + * platforms have all clocks and we can function without 605 + * them 606 + */ 607 + omap->utmi_clk[i] = clk_get(dev, clkname); 608 + if (IS_ERR(omap->utmi_clk[i])) 609 + dev_dbg(dev, "Failed to get clock : %s : %ld\n", 610 + clkname, PTR_ERR(omap->utmi_clk[i])); 611 + 612 + snprintf(clkname, sizeof(clkname), 613 + "usb_host_hs_hsic480m_p%d_clk", i + 1); 614 + omap->hsic480m_clk[i] = clk_get(dev, clkname); 615 + if (IS_ERR(omap->hsic480m_clk[i])) 616 + dev_dbg(dev, "Failed to get clock : %s : %ld\n", 617 + clkname, PTR_ERR(omap->hsic480m_clk[i])); 618 + 619 + snprintf(clkname, sizeof(clkname), 620 + "usb_host_hs_hsic60m_p%d_clk", i + 1); 621 + omap->hsic60m_clk[i] = clk_get(dev, clkname); 622 + if (IS_ERR(omap->hsic60m_clk[i])) 623 + dev_dbg(dev, "Failed to get clock : %s : %ld\n", 624 + clkname, PTR_ERR(omap->hsic60m_clk[i])); 607 625 } 608 626 609 627 if (is_ehci_phy_mode(pdata->port_mode[0])) { 610 - /* for OMAP3 , the clk set paretn fails */ 611 - ret = clk_set_parent(omap->utmi_p1_fck, 628 + /* for OMAP3, clk_set_parent fails */ 629 + ret = clk_set_parent(omap->utmi_p1_gfclk, 612 630 omap->xclk60mhsp1_ck); 613 631 if (ret != 0) 614 - dev_err(dev, "xclk60mhsp1_ck set parent" 615 - "failed error:%d\n", ret); 632 + dev_dbg(dev, "xclk60mhsp1_ck set parent failed: %d\n", 633 + ret); 616 634 } else if (is_ehci_tll_mode(pdata->port_mode[0])) { 617 - ret = clk_set_parent(omap->utmi_p1_fck, 635 + ret = clk_set_parent(omap->utmi_p1_gfclk, 618 636 omap->init_60m_fclk); 619 637 if (ret != 0) 620 - dev_err(dev, "init_60m_fclk set parent" 621 - "failed error:%d\n", ret); 638 + dev_dbg(dev, "P0 init_60m_fclk set parent failed: %d\n", 639 + ret); 622 640 } 623 641 624 642 if (is_ehci_phy_mode(pdata->port_mode[1])) { 625 - ret = clk_set_parent(omap->utmi_p2_fck, 643 + ret = clk_set_parent(omap->utmi_p2_gfclk, 626 644 omap->xclk60mhsp2_ck); 627 645 if (ret != 0) 628 - dev_err(dev, "xclk60mhsp2_ck set parent" 629 - "failed error:%d\n", ret); 646 + dev_dbg(dev, "xclk60mhsp2_ck set parent failed: %d\n", 647 + ret); 630 648 } else if (is_ehci_tll_mode(pdata->port_mode[1])) { 631 - ret = clk_set_parent(omap->utmi_p2_fck, 649 + ret = clk_set_parent(omap->utmi_p2_gfclk, 632 650 omap->init_60m_fclk); 633 651 if (ret != 0) 634 - dev_err(dev, "init_60m_fclk set parent" 635 - "failed error:%d\n", ret); 652 + dev_dbg(dev, "P1 init_60m_fclk set parent failed: %d\n", 653 + ret); 636 654 } 637 - 638 - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "uhh"); 639 - if (!res) { 640 - dev_err(dev, "UHH EHCI get resource failed\n"); 641 - ret = -ENODEV; 642 - goto err_init_60m_fclk; 643 - } 644 - 645 - omap->uhh_base = ioremap(res->start, resource_size(res)); 646 - if (!omap->uhh_base) { 647 - dev_err(dev, "UHH ioremap failed\n"); 648 - ret = -ENOMEM; 649 - goto err_init_60m_fclk; 650 - } 651 - 652 - platform_set_drvdata(pdev, omap); 653 655 654 656 omap_usbhs_init(dev); 655 657 ret = omap_usbhs_alloc_children(pdev); ··· 706 612 goto err_alloc; 707 613 } 708 614 709 - goto end_probe; 615 + return 0; 710 616 711 617 err_alloc: 712 618 omap_usbhs_deinit(&pdev->dev); 713 - iounmap(omap->uhh_base); 714 619 715 - err_init_60m_fclk: 620 + for (i = 0; i < omap->nports; i++) { 621 + if (!IS_ERR(omap->utmi_clk[i])) 622 + clk_put(omap->utmi_clk[i]); 623 + if (!IS_ERR(omap->hsic60m_clk[i])) 624 + clk_put(omap->hsic60m_clk[i]); 625 + if (!IS_ERR(omap->hsic480m_clk[i])) 626 + clk_put(omap->hsic480m_clk[i]); 627 + } 628 + 716 629 clk_put(omap->init_60m_fclk); 717 630 718 - err_usbhost_p2_fck: 719 - clk_put(omap->usbhost_p2_fck); 720 - 721 - err_usbhost_p1_fck: 722 - clk_put(omap->usbhost_p1_fck); 723 - 724 - err_xclk60mhsp2_ck: 631 + err_init60m: 725 632 clk_put(omap->xclk60mhsp2_ck); 726 633 727 - err_utmi_p2_fck: 728 - clk_put(omap->utmi_p2_fck); 729 - 730 - err_xclk60mhsp1_ck: 634 + err_xclk60mhsp2: 731 635 clk_put(omap->xclk60mhsp1_ck); 732 636 733 - err_utmi_p1_fck: 734 - clk_put(omap->utmi_p1_fck); 637 + err_xclk60mhsp1: 638 + clk_put(omap->utmi_p2_gfclk); 735 639 736 - err_end: 737 - clk_put(omap->ehci_logic_fck); 640 + err_p2_gfclk: 641 + clk_put(omap->utmi_p1_gfclk); 642 + 643 + err_p1_gfclk: 644 + if (!IS_ERR(omap->ehci_logic_fck)) 645 + clk_put(omap->ehci_logic_fck); 646 + 647 + err_mem: 738 648 pm_runtime_disable(dev); 739 - kfree(omap); 740 649 741 - end_probe: 742 650 return ret; 743 651 } 744 652 ··· 753 657 static int usbhs_omap_remove(struct platform_device *pdev) 754 658 { 755 659 struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev); 660 + int i; 756 661 757 662 omap_usbhs_deinit(&pdev->dev); 758 - iounmap(omap->uhh_base); 663 + 664 + for (i = 0; i < omap->nports; i++) { 665 + if (!IS_ERR(omap->utmi_clk[i])) 666 + clk_put(omap->utmi_clk[i]); 667 + if (!IS_ERR(omap->hsic60m_clk[i])) 668 + clk_put(omap->hsic60m_clk[i]); 669 + if (!IS_ERR(omap->hsic480m_clk[i])) 670 + clk_put(omap->hsic480m_clk[i]); 671 + } 672 + 759 673 clk_put(omap->init_60m_fclk); 760 - clk_put(omap->usbhost_p2_fck); 761 - clk_put(omap->usbhost_p1_fck); 674 + clk_put(omap->utmi_p1_gfclk); 675 + clk_put(omap->utmi_p2_gfclk); 762 676 clk_put(omap->xclk60mhsp2_ck); 763 - clk_put(omap->utmi_p2_fck); 764 677 clk_put(omap->xclk60mhsp1_ck); 765 - clk_put(omap->utmi_p1_fck); 766 - clk_put(omap->ehci_logic_fck); 678 + 679 + if (!IS_ERR(omap->ehci_logic_fck)) 680 + clk_put(omap->ehci_logic_fck); 681 + 767 682 pm_runtime_disable(&pdev->dev); 768 - kfree(omap); 769 683 770 684 return 0; 771 685 } ··· 791 685 .owner = THIS_MODULE, 792 686 .pm = &usbhsomap_dev_pm_ops, 793 687 }, 794 - .remove = __exit_p(usbhs_omap_remove), 688 + .remove = usbhs_omap_remove, 795 689 }; 796 690 797 691 MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");

+136 -111

drivers/mfd/omap-usb-tll.c

··· 54 54 55 55 #define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num) 56 56 #define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24 57 + #define OMAP_TLL_CHANNEL_CONF_DRVVBUS (1 << 16) 58 + #define OMAP_TLL_CHANNEL_CONF_CHRGVBUS (1 << 15) 57 59 #define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11) 58 60 #define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10) 59 61 #define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9) 60 62 #define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8) 63 + #define OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI (2 << 1) 61 64 #define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1) 62 65 #define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0) 63 66 ··· 95 92 #define OMAP_USBTLL_REV1 0x00000015 /* OMAP3 */ 96 93 #define OMAP_USBTLL_REV2 0x00000018 /* OMAP 3630 */ 97 94 #define OMAP_USBTLL_REV3 0x00000004 /* OMAP4 */ 95 + #define OMAP_USBTLL_REV4 0x00000006 /* OMAP5 */ 98 96 99 97 #define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL) 100 98 99 + /* only PHY and UNUSED modes don't need TLL */ 100 + #define omap_usb_mode_needs_tll(x) ((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\ 101 + (x) != OMAP_EHCI_PORT_MODE_PHY) 102 + 101 103 struct usbtll_omap { 102 - struct clk *usbtll_p1_fck; 103 - struct clk *usbtll_p2_fck; 104 - struct usbtll_omap_platform_data platdata; 105 - /* secure the register updates */ 106 - spinlock_t lock; 104 + int nch; /* num. of channels */ 105 + struct usbhs_omap_platform_data *pdata; 106 + struct clk **ch_clk; 107 107 }; 108 108 109 109 /*-------------------------------------------------------------------------*/ 110 110 111 - const char usbtll_driver_name[] = USBTLL_DRIVER_NAME; 112 - struct platform_device *tll_pdev; 111 + static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME; 112 + static struct device *tll_dev; 113 + static DEFINE_SPINLOCK(tll_lock); /* serialize access to tll_dev */ 113 114 114 115 /*-------------------------------------------------------------------------*/ 115 116 ··· 210 203 static int usbtll_omap_probe(struct platform_device *pdev) 211 204 { 212 205 struct device *dev = &pdev->dev; 213 - struct usbtll_omap_platform_data *pdata = dev->platform_data; 206 + struct usbhs_omap_platform_data *pdata = dev->platform_data; 214 207 void __iomem *base; 215 208 struct resource *res; 216 209 struct usbtll_omap *tll; 217 210 unsigned reg; 218 - unsigned long flags; 219 211 int ret = 0; 220 - int i, ver, count; 212 + int i, ver; 213 + bool needs_tll; 221 214 222 215 dev_dbg(dev, "starting TI HSUSB TLL Controller\n"); 223 216 224 - tll = kzalloc(sizeof(struct usbtll_omap), GFP_KERNEL); 217 + tll = devm_kzalloc(dev, sizeof(struct usbtll_omap), GFP_KERNEL); 225 218 if (!tll) { 226 219 dev_err(dev, "Memory allocation failed\n"); 227 - ret = -ENOMEM; 228 - goto end; 220 + return -ENOMEM; 229 221 } 230 222 231 - spin_lock_init(&tll->lock); 232 - 233 - for (i = 0; i < OMAP3_HS_USB_PORTS; i++) 234 - tll->platdata.port_mode[i] = pdata->port_mode[i]; 235 - 236 - tll->usbtll_p1_fck = clk_get(dev, "usb_tll_hs_usb_ch0_clk"); 237 - if (IS_ERR(tll->usbtll_p1_fck)) { 238 - ret = PTR_ERR(tll->usbtll_p1_fck); 239 - dev_err(dev, "usbtll_p1_fck failed error:%d\n", ret); 240 - goto err_tll; 223 + if (!pdata) { 224 + dev_err(dev, "Platform data missing\n"); 225 + return -ENODEV; 241 226 } 242 227 243 - tll->usbtll_p2_fck = clk_get(dev, "usb_tll_hs_usb_ch1_clk"); 244 - if (IS_ERR(tll->usbtll_p2_fck)) { 245 - ret = PTR_ERR(tll->usbtll_p2_fck); 246 - dev_err(dev, "usbtll_p2_fck failed error:%d\n", ret); 247 - goto err_usbtll_p1_fck; 248 - } 228 + tll->pdata = pdata; 249 229 250 230 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 251 - if (!res) { 252 - dev_err(dev, "usb tll get resource failed\n"); 253 - ret = -ENODEV; 254 - goto err_usbtll_p2_fck; 255 - } 256 - 257 - base = ioremap(res->start, resource_size(res)); 231 + base = devm_request_and_ioremap(dev, res); 258 232 if (!base) { 259 - dev_err(dev, "TLL ioremap failed\n"); 260 - ret = -ENOMEM; 261 - goto err_usbtll_p2_fck; 233 + ret = -EADDRNOTAVAIL; 234 + dev_err(dev, "Resource request/ioremap failed:%d\n", ret); 235 + return ret; 262 236 } 263 237 264 238 platform_set_drvdata(pdev, tll); 265 239 pm_runtime_enable(dev); 266 240 pm_runtime_get_sync(dev); 267 241 268 - spin_lock_irqsave(&tll->lock, flags); 269 - 270 242 ver = usbtll_read(base, OMAP_USBTLL_REVISION); 271 243 switch (ver) { 272 244 case OMAP_USBTLL_REV1: 273 - case OMAP_USBTLL_REV2: 274 - count = OMAP_TLL_CHANNEL_COUNT; 245 + case OMAP_USBTLL_REV4: 246 + tll->nch = OMAP_TLL_CHANNEL_COUNT; 275 247 break; 248 + case OMAP_USBTLL_REV2: 276 249 case OMAP_USBTLL_REV3: 277 - count = OMAP_REV2_TLL_CHANNEL_COUNT; 250 + tll->nch = OMAP_REV2_TLL_CHANNEL_COUNT; 278 251 break; 279 252 default: 280 - dev_err(dev, "TLL version failed\n"); 281 - ret = -ENODEV; 282 - goto err_ioremap; 253 + tll->nch = OMAP_TLL_CHANNEL_COUNT; 254 + dev_dbg(dev, 255 + "USB TLL Rev : 0x%x not recognized, assuming %d channels\n", 256 + ver, tll->nch); 257 + break; 283 258 } 284 259 285 - if (is_ehci_tll_mode(pdata->port_mode[0]) || 286 - is_ehci_tll_mode(pdata->port_mode[1]) || 287 - is_ehci_tll_mode(pdata->port_mode[2]) || 288 - is_ohci_port(pdata->port_mode[0]) || 289 - is_ohci_port(pdata->port_mode[1]) || 290 - is_ohci_port(pdata->port_mode[2])) { 260 + tll->ch_clk = devm_kzalloc(dev, sizeof(struct clk * [tll->nch]), 261 + GFP_KERNEL); 262 + if (!tll->ch_clk) { 263 + ret = -ENOMEM; 264 + dev_err(dev, "Couldn't allocate memory for channel clocks\n"); 265 + goto err_clk_alloc; 266 + } 267 + 268 + for (i = 0; i < tll->nch; i++) { 269 + char clkname[] = "usb_tll_hs_usb_chx_clk"; 270 + 271 + snprintf(clkname, sizeof(clkname), 272 + "usb_tll_hs_usb_ch%d_clk", i); 273 + tll->ch_clk[i] = clk_get(dev, clkname); 274 + 275 + if (IS_ERR(tll->ch_clk[i])) 276 + dev_dbg(dev, "can't get clock : %s\n", clkname); 277 + } 278 + 279 + needs_tll = false; 280 + for (i = 0; i < tll->nch; i++) 281 + needs_tll |= omap_usb_mode_needs_tll(pdata->port_mode[i]); 282 + 283 + if (needs_tll) { 291 284 292 285 /* Program Common TLL register */ 293 286 reg = usbtll_read(base, OMAP_TLL_SHARED_CONF); ··· 299 292 usbtll_write(base, OMAP_TLL_SHARED_CONF, reg); 300 293 301 294 /* Enable channels now */ 302 - for (i = 0; i < count; i++) { 295 + for (i = 0; i < tll->nch; i++) { 303 296 reg = usbtll_read(base, OMAP_TLL_CHANNEL_CONF(i)); 304 297 305 298 if (is_ohci_port(pdata->port_mode[i])) { ··· 315 308 reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE 316 309 | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF 317 310 | OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE); 311 + } else if (pdata->port_mode[i] == 312 + OMAP_EHCI_PORT_MODE_HSIC) { 313 + /* 314 + * HSIC Mode requires UTMI port configurations 315 + */ 316 + reg |= OMAP_TLL_CHANNEL_CONF_DRVVBUS 317 + | OMAP_TLL_CHANNEL_CONF_CHRGVBUS 318 + | OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI 319 + | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF; 318 320 } else { 319 321 continue; 320 322 } ··· 336 320 } 337 321 } 338 322 339 - err_ioremap: 340 - spin_unlock_irqrestore(&tll->lock, flags); 341 - iounmap(base); 342 323 pm_runtime_put_sync(dev); 343 - tll_pdev = pdev; 344 - if (!ret) 345 - goto end; 324 + /* only after this can omap_tll_enable/disable work */ 325 + spin_lock(&tll_lock); 326 + tll_dev = dev; 327 + spin_unlock(&tll_lock); 328 + 329 + return 0; 330 + 331 + err_clk_alloc: 332 + pm_runtime_put_sync(dev); 346 333 pm_runtime_disable(dev); 347 334 348 - err_usbtll_p2_fck: 349 - clk_put(tll->usbtll_p2_fck); 350 - 351 - err_usbtll_p1_fck: 352 - clk_put(tll->usbtll_p1_fck); 353 - 354 - err_tll: 355 - kfree(tll); 356 - 357 - end: 358 335 return ret; 359 336 } 360 337 ··· 360 351 static int usbtll_omap_remove(struct platform_device *pdev) 361 352 { 362 353 struct usbtll_omap *tll = platform_get_drvdata(pdev); 354 + int i; 363 355 364 - clk_put(tll->usbtll_p2_fck); 365 - clk_put(tll->usbtll_p1_fck); 356 + spin_lock(&tll_lock); 357 + tll_dev = NULL; 358 + spin_unlock(&tll_lock); 359 + 360 + for (i = 0; i < tll->nch; i++) 361 + if (!IS_ERR(tll->ch_clk[i])) 362 + clk_put(tll->ch_clk[i]); 363 + 366 364 pm_runtime_disable(&pdev->dev); 367 - kfree(tll); 368 365 return 0; 369 366 } 370 367 371 368 static int usbtll_runtime_resume(struct device *dev) 372 369 { 373 370 struct usbtll_omap *tll = dev_get_drvdata(dev); 374 - struct usbtll_omap_platform_data *pdata = &tll->platdata; 375 - unsigned long flags; 371 + struct usbhs_omap_platform_data *pdata = tll->pdata; 372 + int i; 376 373 377 374 dev_dbg(dev, "usbtll_runtime_resume\n"); 378 375 379 - if (!pdata) { 380 - dev_dbg(dev, "missing platform_data\n"); 381 - return -ENODEV; 376 + for (i = 0; i < tll->nch; i++) { 377 + if (omap_usb_mode_needs_tll(pdata->port_mode[i])) { 378 + int r; 379 + 380 + if (IS_ERR(tll->ch_clk[i])) 381 + continue; 382 + 383 + r = clk_enable(tll->ch_clk[i]); 384 + if (r) { 385 + dev_err(dev, 386 + "Error enabling ch %d clock: %d\n", i, r); 387 + } 388 + } 382 389 } 383 - 384 - spin_lock_irqsave(&tll->lock, flags); 385 - 386 - if (is_ehci_tll_mode(pdata->port_mode[0])) 387 - clk_enable(tll->usbtll_p1_fck); 388 - 389 - if (is_ehci_tll_mode(pdata->port_mode[1])) 390 - clk_enable(tll->usbtll_p2_fck); 391 - 392 - spin_unlock_irqrestore(&tll->lock, flags); 393 390 394 391 return 0; 395 392 } ··· 403 388 static int usbtll_runtime_suspend(struct device *dev) 404 389 { 405 390 struct usbtll_omap *tll = dev_get_drvdata(dev); 406 - struct usbtll_omap_platform_data *pdata = &tll->platdata; 407 - unsigned long flags; 391 + struct usbhs_omap_platform_data *pdata = tll->pdata; 392 + int i; 408 393 409 394 dev_dbg(dev, "usbtll_runtime_suspend\n"); 410 395 411 - if (!pdata) { 412 - dev_dbg(dev, "missing platform_data\n"); 413 - return -ENODEV; 396 + for (i = 0; i < tll->nch; i++) { 397 + if (omap_usb_mode_needs_tll(pdata->port_mode[i])) { 398 + if (!IS_ERR(tll->ch_clk[i])) 399 + clk_disable(tll->ch_clk[i]); 400 + } 414 401 } 415 - 416 - spin_lock_irqsave(&tll->lock, flags); 417 - 418 - if (is_ehci_tll_mode(pdata->port_mode[0])) 419 - clk_disable(tll->usbtll_p1_fck); 420 - 421 - if (is_ehci_tll_mode(pdata->port_mode[1])) 422 - clk_disable(tll->usbtll_p2_fck); 423 - 424 - spin_unlock_irqrestore(&tll->lock, flags); 425 402 426 403 return 0; 427 404 } ··· 436 429 437 430 int omap_tll_enable(void) 438 431 { 439 - if (!tll_pdev) { 440 - pr_err("missing omap usbhs tll platform_data\n"); 441 - return -ENODEV; 432 + int ret; 433 + 434 + spin_lock(&tll_lock); 435 + 436 + if (!tll_dev) { 437 + pr_err("%s: OMAP USB TLL not initialized\n", __func__); 438 + ret = -ENODEV; 439 + } else { 440 + ret = pm_runtime_get_sync(tll_dev); 442 441 } 443 - return pm_runtime_get_sync(&tll_pdev->dev); 442 + 443 + spin_unlock(&tll_lock); 444 + 445 + return ret; 444 446 } 445 447 EXPORT_SYMBOL_GPL(omap_tll_enable); 446 448 447 449 int omap_tll_disable(void) 448 450 { 449 - if (!tll_pdev) { 450 - pr_err("missing omap usbhs tll platform_data\n"); 451 - return -ENODEV; 451 + int ret; 452 + 453 + spin_lock(&tll_lock); 454 + 455 + if (!tll_dev) { 456 + pr_err("%s: OMAP USB TLL not initialized\n", __func__); 457 + ret = -ENODEV; 458 + } else { 459 + ret = pm_runtime_put_sync(tll_dev); 452 460 } 453 - return pm_runtime_put_sync(&tll_pdev->dev); 461 + 462 + spin_unlock(&tll_lock); 463 + 464 + return ret; 454 465 } 455 466 EXPORT_SYMBOL_GPL(omap_tll_disable); 456 467

+3 -3

drivers/usb/host/ehci-omap.c

··· 107 107 { 108 108 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 109 109 int rc; 110 - struct ehci_hcd_omap_platform_data *pdata; 110 + struct usbhs_omap_platform_data *pdata; 111 111 112 112 pdata = hcd->self.controller->platform_data; 113 113 ··· 151 151 } 152 152 153 153 static void disable_put_regulator( 154 - struct ehci_hcd_omap_platform_data *pdata) 154 + struct usbhs_omap_platform_data *pdata) 155 155 { 156 156 int i; 157 157 ··· 176 176 static int ehci_hcd_omap_probe(struct platform_device *pdev) 177 177 { 178 178 struct device *dev = &pdev->dev; 179 - struct ehci_hcd_omap_platform_data *pdata = dev->platform_data; 179 + struct usbhs_omap_platform_data *pdata = dev->platform_data; 180 180 struct resource *res; 181 181 struct usb_hcd *hcd; 182 182 void __iomem *regs;

+1

include/linux/platform_data/usb-omap.h

··· 55 55 }; 56 56 57 57 struct usbhs_omap_platform_data { 58 + int nports; 58 59 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; 59 60 int reset_gpio_port[OMAP3_HS_USB_PORTS]; 60 61 struct regulator *regulator[OMAP3_HS_USB_PORTS];