Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'perf/urgent' into perf/core, to pick up fixes before merging new changes

Signed-off-by: Ingo Molnar <mingo@kernel.org>

+2471 -1530
+6 -1
MAINTAINERS
··· 595 595 L: linux-alpha@vger.kernel.org 596 596 F: arch/alpha/ 597 597 598 + ALPS PS/2 TOUCHPAD DRIVER 599 + R: Pali Rohár <pali.rohar@gmail.com> 600 + F: drivers/input/mouse/alps.* 601 + 598 602 ALTERA MAILBOX DRIVER 599 603 M: Ley Foon Tan <lftan@altera.com> 600 604 L: nios2-dev@lists.rocketboards.org (moderated for non-subscribers) ··· 7424 7420 F: drivers/scsi/megaraid/ 7425 7421 7426 7422 MELLANOX ETHERNET DRIVER (mlx4_en) 7427 - M: Eugenia Emantayev <eugenia@mellanox.com> 7423 + M: Tariq Toukan <tariqt@mellanox.com> 7428 7424 L: netdev@vger.kernel.org 7429 7425 S: Supported 7430 7426 W: http://www.mellanox.com ··· 8963 8959 T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git 8964 8960 S: Maintained 8965 8961 F: Documentation/devicetree/bindings/pinctrl/ 8962 + F: Documentation/pinctrl.txt 8966 8963 F: drivers/pinctrl/ 8967 8964 F: include/linux/pinctrl/ 8968 8965
+2
Makefile
··· 363 363 364 364 CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \ 365 365 -Wbitwise -Wno-return-void $(CF) 366 + NOSTDINC_FLAGS = 366 367 CFLAGS_MODULE = 367 368 AFLAGS_MODULE = 368 369 LDFLAGS_MODULE = 369 370 CFLAGS_KERNEL = 370 371 AFLAGS_KERNEL = 372 + LDFLAGS_vmlinux = 371 373 CFLAGS_GCOV = -fprofile-arcs -ftest-coverage -fno-tree-loop-im -Wno-maybe-uninitialized 372 374 CFLAGS_KCOV = -fsanitize-coverage=trace-pc 373 375
-2
arch/arc/Makefile
··· 66 66 67 67 endif 68 68 69 - cflags-$(CONFIG_ARC_DW2_UNWIND) += -fasynchronous-unwind-tables 70 - 71 69 # By default gcc 4.8 generates dwarf4 which kernel unwinder can't grok 72 70 ifeq ($(atleast_gcc48),y) 73 71 cflags-$(CONFIG_ARC_DW2_UNWIND) += -gdwarf-2
+1 -1
arch/arc/kernel/stacktrace.c
··· 142 142 * prelogue is setup (callee regs saved and then fp set and not other 143 143 * way around 144 144 */ 145 - pr_warn("CONFIG_ARC_DW2_UNWIND needs to be enabled\n"); 145 + pr_warn_once("CONFIG_ARC_DW2_UNWIND needs to be enabled\n"); 146 146 return 0; 147 147 148 148 #endif
+1
arch/arm/kvm/arm.c
··· 263 263 kvm_timer_vcpu_terminate(vcpu); 264 264 kvm_vgic_vcpu_destroy(vcpu); 265 265 kvm_pmu_vcpu_destroy(vcpu); 266 + kvm_vcpu_uninit(vcpu); 266 267 kmem_cache_free(kvm_vcpu_cache, vcpu); 267 268 } 268 269
+6 -4
arch/mips/include/asm/pgtable.h
··· 24 24 struct vm_area_struct; 25 25 26 26 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_NO_READ | \ 27 - _CACHE_CACHABLE_NONCOHERENT) 27 + _page_cachable_default) 28 28 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | \ 29 29 _page_cachable_default) 30 30 #define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_NO_EXEC | \ ··· 476 476 pte.pte_low &= (_PAGE_MODIFIED | _PAGE_ACCESSED | _PFNX_MASK); 477 477 pte.pte_high &= (_PFN_MASK | _CACHE_MASK); 478 478 pte.pte_low |= pgprot_val(newprot) & ~_PFNX_MASK; 479 - pte.pte_high |= pgprot_val(newprot) & ~_PFN_MASK; 479 + pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK); 480 480 return pte; 481 481 } 482 482 #elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) ··· 491 491 #else 492 492 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 493 493 { 494 - return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)); 494 + return __pte((pte_val(pte) & _PAGE_CHG_MASK) | 495 + (pgprot_val(newprot) & ~_PAGE_CHG_MASK)); 495 496 } 496 497 #endif 497 498 ··· 633 632 634 633 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 635 634 { 636 - pmd_val(pmd) = (pmd_val(pmd) & _PAGE_CHG_MASK) | pgprot_val(newprot); 635 + pmd_val(pmd) = (pmd_val(pmd) & _PAGE_CHG_MASK) | 636 + (pgprot_val(newprot) & ~_PAGE_CHG_MASK); 637 637 return pmd; 638 638 } 639 639
+1
arch/powerpc/include/asm/book3s/64/pgtable.h
··· 230 230 #define KERN_VIRT_SIZE __kernel_virt_size 231 231 extern struct page *vmemmap; 232 232 extern unsigned long ioremap_bot; 233 + extern unsigned long pci_io_base; 233 234 #endif /* __ASSEMBLY__ */ 234 235 235 236 #include <asm/book3s/64/hash.h>
+1 -1
arch/powerpc/kernel/eeh_driver.c
··· 647 647 pci_unlock_rescan_remove(); 648 648 } 649 649 } else if (frozen_bus) { 650 - eeh_pe_dev_traverse(pe, eeh_rmv_device, &rmv_data); 650 + eeh_pe_dev_traverse(pe, eeh_rmv_device, rmv_data); 651 651 } 652 652 653 653 /*
-1
arch/powerpc/kernel/pci_64.c
··· 47 47 48 48 printk(KERN_INFO "PCI: Probing PCI hardware\n"); 49 49 50 - pci_io_base = ISA_IO_BASE; 51 50 /* For now, override phys_mem_access_prot. If we need it,g 52 51 * later, we may move that initialization to each ppc_md 53 52 */
+10
arch/powerpc/kernel/process.c
··· 1505 1505 current->thread.regs = regs - 1; 1506 1506 } 1507 1507 1508 + #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1509 + /* 1510 + * Clear any transactional state, we're exec()ing. The cause is 1511 + * not important as there will never be a recheckpoint so it's not 1512 + * user visible. 1513 + */ 1514 + if (MSR_TM_SUSPENDED(mfmsr())) 1515 + tm_reclaim_current(0); 1516 + #endif 1517 + 1508 1518 memset(regs->gpr, 0, sizeof(regs->gpr)); 1509 1519 regs->ctr = 0; 1510 1520 regs->link = 0;
+44 -17
arch/powerpc/kernel/tm.S
··· 110 110 std r3, STK_PARAM(R3)(r1) 111 111 SAVE_NVGPRS(r1) 112 112 113 - /* We need to setup MSR for VSX register save instructions. Here we 114 - * also clear the MSR RI since when we do the treclaim, we won't have a 115 - * valid kernel pointer for a while. We clear RI here as it avoids 116 - * adding another mtmsr closer to the treclaim. This makes the region 117 - * maked as non-recoverable wider than it needs to be but it saves on 118 - * inserting another mtmsrd later. 119 - */ 113 + /* We need to setup MSR for VSX register save instructions. */ 120 114 mfmsr r14 121 115 mr r15, r14 122 116 ori r15, r15, MSR_FP 123 - li r16, MSR_RI 117 + li r16, 0 124 118 ori r16, r16, MSR_EE /* IRQs hard off */ 125 119 andc r15, r15, r16 126 120 oris r15, r15, MSR_VEC@h ··· 170 176 1: tdeqi r6, 0 171 177 EMIT_BUG_ENTRY 1b,__FILE__,__LINE__,0 172 178 173 - /* The moment we treclaim, ALL of our GPRs will switch 179 + /* Clear MSR RI since we are about to change r1, EE is already off. */ 180 + li r4, 0 181 + mtmsrd r4, 1 182 + 183 + /* 184 + * BE CAREFUL HERE: 185 + * At this point we can't take an SLB miss since we have MSR_RI 186 + * off. Load only to/from the stack/paca which are in SLB bolted regions 187 + * until we turn MSR RI back on. 188 + * 189 + * The moment we treclaim, ALL of our GPRs will switch 174 190 * to user register state. (FPRs, CCR etc. also!) 175 191 * Use an sprg and a tm_scratch in the PACA to shuffle. 176 192 */ ··· 201 197 202 198 /* Store the PPR in r11 and reset to decent value */ 203 199 std r11, GPR11(r1) /* Temporary stash */ 200 + 201 + /* Reset MSR RI so we can take SLB faults again */ 202 + li r11, MSR_RI 203 + mtmsrd r11, 1 204 + 204 205 mfspr r11, SPRN_PPR 205 206 HMT_MEDIUM 206 207 ··· 406 397 ld r5, THREAD_TM_DSCR(r3) 407 398 ld r6, THREAD_TM_PPR(r3) 408 399 409 - /* Clear the MSR RI since we are about to change R1. EE is already off 410 - */ 411 - li r4, 0 412 - mtmsrd r4, 1 413 - 414 400 REST_GPR(0, r7) /* GPR0 */ 415 401 REST_2GPRS(2, r7) /* GPR2-3 */ 416 402 REST_GPR(4, r7) /* GPR4 */ ··· 443 439 ld r6, _CCR(r7) 444 440 mtcr r6 445 441 446 - REST_GPR(1, r7) /* GPR1 */ 447 - REST_GPR(5, r7) /* GPR5-7 */ 448 442 REST_GPR(6, r7) 449 - ld r7, GPR7(r7) 443 + 444 + /* 445 + * Store r1 and r5 on the stack so that we can access them 446 + * after we clear MSR RI. 447 + */ 448 + 449 + REST_GPR(5, r7) 450 + std r5, -8(r1) 451 + ld r5, GPR1(r7) 452 + std r5, -16(r1) 453 + 454 + REST_GPR(7, r7) 455 + 456 + /* Clear MSR RI since we are about to change r1. EE is already off */ 457 + li r5, 0 458 + mtmsrd r5, 1 459 + 460 + /* 461 + * BE CAREFUL HERE: 462 + * At this point we can't take an SLB miss since we have MSR_RI 463 + * off. Load only to/from the stack/paca which are in SLB bolted regions 464 + * until we turn MSR RI back on. 465 + */ 466 + 467 + ld r5, -8(r1) 468 + ld r1, -16(r1) 450 469 451 470 /* Commit register state as checkpointed state: */ 452 471 TRECHKPT
+4
arch/powerpc/mm/hash_utils_64.c
··· 922 922 vmemmap = (struct page *)H_VMEMMAP_BASE; 923 923 ioremap_bot = IOREMAP_BASE; 924 924 925 + #ifdef CONFIG_PCI 926 + pci_io_base = ISA_IO_BASE; 927 + #endif 928 + 925 929 /* Initialize the MMU Hash table and create the linear mapping 926 930 * of memory. Has to be done before SLB initialization as this is 927 931 * currently where the page size encoding is obtained.
+5
arch/powerpc/mm/pgtable-radix.c
··· 328 328 __vmalloc_end = RADIX_VMALLOC_END; 329 329 vmemmap = (struct page *)RADIX_VMEMMAP_BASE; 330 330 ioremap_bot = IOREMAP_BASE; 331 + 332 + #ifdef CONFIG_PCI 333 + pci_io_base = ISA_IO_BASE; 334 + #endif 335 + 331 336 /* 332 337 * For now radix also use the same frag size 333 338 */
+1 -1
arch/s390/include/asm/fpu/api.h
··· 22 22 " la %0,0\n" 23 23 "1:\n" 24 24 EX_TABLE(0b,1b) 25 - : "=d" (rc), "=d" (orig_fpc) 25 + : "=d" (rc), "=&d" (orig_fpc) 26 26 : "d" (fpc), "0" (-EINVAL)); 27 27 return rc; 28 28 }
-7
arch/s390/kernel/ipl.c
··· 2064 2064 S390_lowcore.program_new_psw.addr = 2065 2065 (unsigned long) s390_base_pgm_handler; 2066 2066 2067 - /* 2068 - * Clear subchannel ID and number to signal new kernel that no CCW or 2069 - * SCSI IPL has been done (for kexec and kdump) 2070 - */ 2071 - S390_lowcore.subchannel_id = 0; 2072 - S390_lowcore.subchannel_nr = 0; 2073 - 2074 2067 do_reset_calls(); 2075 2068 }
+6 -5
arch/x86/events/core.c
··· 2342 2342 perf_callchain_user(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs) 2343 2343 { 2344 2344 struct stack_frame frame; 2345 - const void __user *fp; 2345 + const unsigned long __user *fp; 2346 2346 2347 2347 if (perf_guest_cbs && perf_guest_cbs->is_in_guest()) { 2348 2348 /* TODO: We don't support guest os callchain now */ ··· 2355 2355 if (regs->flags & (X86_VM_MASK | PERF_EFLAGS_VM)) 2356 2356 return; 2357 2357 2358 - fp = (void __user *)regs->bp; 2358 + fp = (unsigned long __user *)regs->bp; 2359 2359 2360 2360 perf_callchain_store(entry, regs->ip); 2361 2361 ··· 2368 2368 pagefault_disable(); 2369 2369 while (entry->nr < entry->max_stack) { 2370 2370 unsigned long bytes; 2371 + 2371 2372 frame.next_frame = NULL; 2372 2373 frame.return_address = 0; 2373 2374 2374 - if (!access_ok(VERIFY_READ, fp, 16)) 2375 + if (!access_ok(VERIFY_READ, fp, sizeof(*fp) * 2)) 2375 2376 break; 2376 2377 2377 - bytes = __copy_from_user_nmi(&frame.next_frame, fp, 8); 2378 + bytes = __copy_from_user_nmi(&frame.next_frame, fp, sizeof(*fp)); 2378 2379 if (bytes != 0) 2379 2380 break; 2380 - bytes = __copy_from_user_nmi(&frame.return_address, fp+8, 8); 2381 + bytes = __copy_from_user_nmi(&frame.return_address, fp + 1, sizeof(*fp)); 2381 2382 if (bytes != 0) 2382 2383 break; 2383 2384
+2 -2
arch/x86/events/intel/Makefile
··· 1 1 obj-$(CONFIG_CPU_SUP_INTEL) += core.o bts.o cqm.o 2 2 obj-$(CONFIG_CPU_SUP_INTEL) += ds.o knc.o 3 3 obj-$(CONFIG_CPU_SUP_INTEL) += lbr.o p4.o p6.o pt.o 4 - obj-$(CONFIG_PERF_EVENTS_INTEL_RAPL) += intel-rapl.o 5 - intel-rapl-objs := rapl.o 4 + obj-$(CONFIG_PERF_EVENTS_INTEL_RAPL) += intel-rapl-perf.o 5 + intel-rapl-perf-objs := rapl.o 6 6 obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE) += intel-uncore.o 7 7 intel-uncore-objs := uncore.o uncore_nhmex.o uncore_snb.o uncore_snbep.o 8 8 obj-$(CONFIG_PERF_EVENTS_INTEL_CSTATE) += intel-cstate.o
+29
arch/x86/events/intel/core.c
··· 116 116 INTEL_UEVENT_CONSTRAINT(0x04a3, 0xf), /* CYCLE_ACTIVITY.CYCLES_NO_DISPATCH */ 117 117 INTEL_UEVENT_CONSTRAINT(0x02a3, 0x4), /* CYCLE_ACTIVITY.CYCLES_L1D_PENDING */ 118 118 119 + /* 120 + * When HT is off these events can only run on the bottom 4 counters 121 + * When HT is on, they are impacted by the HT bug and require EXCL access 122 + */ 119 123 INTEL_EXCLEVT_CONSTRAINT(0xd0, 0xf), /* MEM_UOPS_RETIRED.* */ 120 124 INTEL_EXCLEVT_CONSTRAINT(0xd1, 0xf), /* MEM_LOAD_UOPS_RETIRED.* */ 121 125 INTEL_EXCLEVT_CONSTRAINT(0xd2, 0xf), /* MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */ ··· 144 140 INTEL_UEVENT_CONSTRAINT(0x0ca3, 0x4), /* CYCLE_ACTIVITY.STALLS_L1D_PENDING */ 145 141 INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PREC_DIST */ 146 142 143 + /* 144 + * When HT is off these events can only run on the bottom 4 counters 145 + * When HT is on, they are impacted by the HT bug and require EXCL access 146 + */ 147 147 INTEL_EXCLEVT_CONSTRAINT(0xd0, 0xf), /* MEM_UOPS_RETIRED.* */ 148 148 INTEL_EXCLEVT_CONSTRAINT(0xd1, 0xf), /* MEM_LOAD_UOPS_RETIRED.* */ 149 149 INTEL_EXCLEVT_CONSTRAINT(0xd2, 0xf), /* MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */ ··· 191 183 FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */ 192 184 FIXED_EVENT_CONSTRAINT(0x0300, 2), /* CPU_CLK_UNHALTED.REF */ 193 185 INTEL_UEVENT_CONSTRAINT(0x1c0, 0x2), /* INST_RETIRED.PREC_DIST */ 186 + 187 + /* 188 + * when HT is off, these can only run on the bottom 4 counters 189 + */ 190 + INTEL_EVENT_CONSTRAINT(0xd0, 0xf), /* MEM_INST_RETIRED.* */ 191 + INTEL_EVENT_CONSTRAINT(0xd1, 0xf), /* MEM_LOAD_RETIRED.* */ 192 + INTEL_EVENT_CONSTRAINT(0xd2, 0xf), /* MEM_LOAD_L3_HIT_RETIRED.* */ 193 + INTEL_EVENT_CONSTRAINT(0xcd, 0xf), /* MEM_TRANS_RETIRED.* */ 194 + INTEL_EVENT_CONSTRAINT(0xc6, 0xf), /* FRONTEND_RETIRED.* */ 195 + 194 196 EVENT_CONSTRAINT_END 195 197 }; 196 198 ··· 304 286 /* CYCLE_ACTIVITY.CYCLES_NO_EXECUTE */ 305 287 INTEL_UEVENT_CONSTRAINT(0x04a3, 0xf), 306 288 289 + /* 290 + * When HT is off these events can only run on the bottom 4 counters 291 + * When HT is on, they are impacted by the HT bug and require EXCL access 292 + */ 307 293 INTEL_EXCLEVT_CONSTRAINT(0xd0, 0xf), /* MEM_UOPS_RETIRED.* */ 308 294 INTEL_EXCLEVT_CONSTRAINT(0xd1, 0xf), /* MEM_LOAD_UOPS_RETIRED.* */ 309 295 INTEL_EXCLEVT_CONSTRAINT(0xd2, 0xf), /* MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */ ··· 322 300 FIXED_EVENT_CONSTRAINT(0x0300, 2), /* CPU_CLK_UNHALTED.REF */ 323 301 INTEL_UEVENT_CONSTRAINT(0x148, 0x4), /* L1D_PEND_MISS.PENDING */ 324 302 INTEL_UBIT_EVENT_CONSTRAINT(0x8a3, 0x4), /* CYCLE_ACTIVITY.CYCLES_L1D_MISS */ 303 + /* 304 + * when HT is off, these can only run on the bottom 4 counters 305 + */ 306 + INTEL_EVENT_CONSTRAINT(0xd0, 0xf), /* MEM_INST_RETIRED.* */ 307 + INTEL_EVENT_CONSTRAINT(0xd1, 0xf), /* MEM_LOAD_RETIRED.* */ 308 + INTEL_EVENT_CONSTRAINT(0xd2, 0xf), /* MEM_LOAD_L3_HIT_RETIRED.* */ 309 + INTEL_EVENT_CONSTRAINT(0xcd, 0xf), /* MEM_TRANS_RETIRED.* */ 325 310 EVENT_CONSTRAINT_END 326 311 }; 327 312
+9 -16
arch/x86/include/asm/pvclock.h
··· 69 69 } 70 70 71 71 static __always_inline 72 - u64 pvclock_get_nsec_offset(const struct pvclock_vcpu_time_info *src) 73 - { 74 - u64 delta = rdtsc_ordered() - src->tsc_timestamp; 75 - return pvclock_scale_delta(delta, src->tsc_to_system_mul, 76 - src->tsc_shift); 77 - } 78 - 79 - static __always_inline 80 72 unsigned __pvclock_read_cycles(const struct pvclock_vcpu_time_info *src, 81 73 cycle_t *cycles, u8 *flags) 82 74 { 83 75 unsigned version; 84 - cycle_t ret, offset; 85 - u8 ret_flags; 76 + cycle_t offset; 77 + u64 delta; 86 78 87 79 version = src->version; 80 + /* Make the latest version visible */ 81 + smp_rmb(); 88 82 89 - offset = pvclock_get_nsec_offset(src); 90 - ret = src->system_time + offset; 91 - ret_flags = src->flags; 92 - 93 - *cycles = ret; 94 - *flags = ret_flags; 83 + delta = rdtsc_ordered() - src->tsc_timestamp; 84 + offset = pvclock_scale_delta(delta, src->tsc_to_system_mul, 85 + src->tsc_shift); 86 + *cycles = src->system_time + offset; 87 + *flags = src->flags; 95 88 return version; 96 89 } 97 90
+9 -2
arch/x86/kernel/pvclock.c
··· 61 61 u8 pvclock_read_flags(struct pvclock_vcpu_time_info *src) 62 62 { 63 63 unsigned version; 64 - cycle_t ret; 65 64 u8 flags; 66 65 67 66 do { 68 - version = __pvclock_read_cycles(src, &ret, &flags); 67 + version = src->version; 68 + /* Make the latest version visible */ 69 + smp_rmb(); 70 + 71 + flags = src->flags; 72 + /* Make sure that the version double-check is last. */ 73 + smp_rmb(); 69 74 } while ((src->version & 1) || version != src->version); 70 75 71 76 return flags & valid_flags; ··· 85 80 86 81 do { 87 82 version = __pvclock_read_cycles(src, &ret, &flags); 83 + /* Make sure that the version double-check is last. */ 84 + smp_rmb(); 88 85 } while ((src->version & 1) || version != src->version); 89 86 90 87 if (unlikely((flags & PVCLOCK_GUEST_STOPPED) != 0)) {
+2 -1
arch/x86/kvm/lapic.c
··· 1310 1310 1311 1311 /* __delay is delay_tsc whenever the hardware has TSC, thus always. */ 1312 1312 if (guest_tsc < tsc_deadline) 1313 - __delay(tsc_deadline - guest_tsc); 1313 + __delay(min(tsc_deadline - guest_tsc, 1314 + nsec_to_cycles(vcpu, lapic_timer_advance_ns))); 1314 1315 } 1315 1316 1316 1317 static void start_apic_timer(struct kvm_lapic *apic)
+11 -12
arch/x86/kvm/vmx.c
··· 6671 6671 6672 6672 /* Checks for #GP/#SS exceptions. */ 6673 6673 exn = false; 6674 - if (is_protmode(vcpu)) { 6674 + if (is_long_mode(vcpu)) { 6675 + /* Long mode: #GP(0)/#SS(0) if the memory address is in a 6676 + * non-canonical form. This is the only check on the memory 6677 + * destination for long mode! 6678 + */ 6679 + exn = is_noncanonical_address(*ret); 6680 + } else if (is_protmode(vcpu)) { 6675 6681 /* Protected mode: apply checks for segment validity in the 6676 6682 * following order: 6677 6683 * - segment type check (#GP(0) may be thrown) ··· 6694 6688 * execute-only code segment 6695 6689 */ 6696 6690 exn = ((s.type & 0xa) == 8); 6697 - } 6698 - if (exn) { 6699 - kvm_queue_exception_e(vcpu, GP_VECTOR, 0); 6700 - return 1; 6701 - } 6702 - if (is_long_mode(vcpu)) { 6703 - /* Long mode: #GP(0)/#SS(0) if the memory address is in a 6704 - * non-canonical form. This is an only check for long mode. 6705 - */ 6706 - exn = is_noncanonical_address(*ret); 6707 - } else if (is_protmode(vcpu)) { 6691 + if (exn) { 6692 + kvm_queue_exception_e(vcpu, GP_VECTOR, 0); 6693 + return 1; 6694 + } 6708 6695 /* Protected mode: #GP(0)/#SS(0) if the segment is unusable. 6709 6696 */ 6710 6697 exn = (s.unusable != 0);
-6
arch/x86/kvm/x86.c
··· 1244 1244 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz); 1245 1245 static unsigned long max_tsc_khz; 1246 1246 1247 - static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec) 1248 - { 1249 - return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult, 1250 - vcpu->arch.virtual_tsc_shift); 1251 - } 1252 - 1253 1247 static u32 adjust_tsc_khz(u32 khz, s32 ppm) 1254 1248 { 1255 1249 u64 v = (u64)khz * (1000000 + ppm);
+7
arch/x86/kvm/x86.h
··· 2 2 #define ARCH_X86_KVM_X86_H 3 3 4 4 #include <linux/kvm_host.h> 5 + #include <asm/pvclock.h> 5 6 #include "kvm_cache_regs.h" 6 7 7 8 #define MSR_IA32_CR_PAT_DEFAULT 0x0007040600070406ULL ··· 195 194 extern unsigned int lapic_timer_advance_ns; 196 195 197 196 extern struct static_key kvm_no_apic_vcpu; 197 + 198 + static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec) 199 + { 200 + return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult, 201 + vcpu->arch.virtual_tsc_shift); 202 + } 198 203 199 204 /* Same "calling convention" as do_div: 200 205 * - divide (n << 32) by base
+1
crypto/crypto_user.c
··· 455 455 [CRYPTO_MSG_NEWALG - CRYPTO_MSG_BASE] = MSGSIZE(crypto_user_alg), 456 456 [CRYPTO_MSG_DELALG - CRYPTO_MSG_BASE] = MSGSIZE(crypto_user_alg), 457 457 [CRYPTO_MSG_UPDATEALG - CRYPTO_MSG_BASE] = MSGSIZE(crypto_user_alg), 458 + [CRYPTO_MSG_GETALG - CRYPTO_MSG_BASE] = MSGSIZE(crypto_user_alg), 458 459 [CRYPTO_MSG_DELRNG - CRYPTO_MSG_BASE] = 0, 459 460 }; 460 461
+6 -6
drivers/acpi/nfit.c
··· 928 928 { 929 929 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); 930 930 931 - return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->code)); 931 + return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code)); 932 932 } 933 933 static DEVICE_ATTR_RO(format); 934 934 ··· 961 961 continue; 962 962 if (nfit_dcr->dcr->code == dcr->code) 963 963 continue; 964 - rc = sprintf(buf, "%#x\n", 965 - be16_to_cpu(nfit_dcr->dcr->code)); 964 + rc = sprintf(buf, "0x%04x\n", 965 + le16_to_cpu(nfit_dcr->dcr->code)); 966 966 break; 967 967 } 968 968 if (rc != ENXIO) ··· 1131 1131 1132 1132 /* 1133 1133 * Until standardization materializes we need to consider up to 3 1134 - * different command sets. Note, that checking for function0 (bit0) 1135 - * tells us if any commands are reachable through this uuid. 1134 + * different command sets. Note, that checking for zero functions 1135 + * tells us if any commands might be reachable through this uuid. 1136 1136 */ 1137 1137 for (i = NVDIMM_FAMILY_INTEL; i <= NVDIMM_FAMILY_HPE2; i++) 1138 - if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1)) 1138 + if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 0)) 1139 1139 break; 1140 1140 1141 1141 /* limit the supported commands to those that are publicly documented */
+5 -5
drivers/acpi/nfit.h
··· 53 53 }; 54 54 55 55 /* 56 - * Region format interface codes are stored as an array of bytes in the 57 - * NFIT DIMM Control Region structure 56 + * Region format interface codes are stored with the interface as the 57 + * LSB and the function as the MSB. 58 58 */ 59 - #define NFIT_FIC_BYTE cpu_to_be16(0x101) /* byte-addressable energy backed */ 60 - #define NFIT_FIC_BLK cpu_to_be16(0x201) /* block-addressable non-energy backed */ 61 - #define NFIT_FIC_BYTEN cpu_to_be16(0x301) /* byte-addressable non-energy backed */ 59 + #define NFIT_FIC_BYTE cpu_to_le16(0x101) /* byte-addressable energy backed */ 60 + #define NFIT_FIC_BLK cpu_to_le16(0x201) /* block-addressable non-energy backed */ 61 + #define NFIT_FIC_BYTEN cpu_to_le16(0x301) /* byte-addressable non-energy backed */ 62 62 63 63 enum { 64 64 NFIT_BLK_READ_FLUSH = 1,
+1 -1
drivers/acpi/pci_link.c
··· 839 839 { 840 840 if ((irq >= 0) && (irq < ARRAY_SIZE(acpi_isa_irq_penalty))) 841 841 acpi_isa_irq_penalty[irq] = acpi_irq_get_penalty(irq) + 842 - active ? PIRQ_PENALTY_ISA_USED : PIRQ_PENALTY_PCI_USING; 842 + (active ? PIRQ_PENALTY_ISA_USED : PIRQ_PENALTY_PCI_USING); 843 843 } 844 844 845 845 bool acpi_isa_irq_available(int irq)
+3 -3
drivers/acpi/utils.c
··· 680 680 u64 mask = 0; 681 681 union acpi_object *obj; 682 682 683 - if (funcs == 0) 684 - return false; 685 - 686 683 obj = acpi_evaluate_dsm(handle, uuid, rev, 0, NULL); 687 684 if (!obj) 688 685 return false; ··· 691 694 for (i = 0; i < obj->buffer.length && i < 8; i++) 692 695 mask |= (((u64)obj->buffer.pointer[i]) << (i * 8)); 693 696 ACPI_FREE(obj); 697 + 698 + if (funcs == 0) 699 + return true; 694 700 695 701 /* 696 702 * Bit 0 indicates whether there's support for any functions other than
+1 -1
drivers/ata/ahci_seattle.c
··· 137 137 u32 val; 138 138 139 139 plat_data = devm_kzalloc(dev, sizeof(*plat_data), GFP_KERNEL); 140 - if (IS_ERR(plat_data)) 140 + if (!plat_data) 141 141 return &ahci_port_info; 142 142 143 143 plat_data->sgpio_ctrl = devm_ioremap_resource(dev,
+1 -1
drivers/ata/sata_mv.c
··· 986 986 * Looks like a lot of fuss, but it avoids an unnecessary 987 987 * +1 usec read-after-write delay for unaffected registers. 988 988 */ 989 - laddr = (long)addr & 0xffff; 989 + laddr = (unsigned long)addr & 0xffff; 990 990 if (laddr >= 0x300 && laddr <= 0x33c) { 991 991 laddr &= 0x000f; 992 992 if (laddr == 0x4 || laddr == 0xc) {
+2 -2
drivers/clk/clk-oxnas.c
··· 144 144 return -ENOMEM; 145 145 146 146 regmap = syscon_node_to_regmap(of_get_parent(np)); 147 - if (!regmap) { 147 + if (IS_ERR(regmap)) { 148 148 dev_err(&pdev->dev, "failed to have parent regmap\n"); 149 - return -EINVAL; 149 + return PTR_ERR(regmap); 150 150 } 151 151 152 152 for (i = 0; i < ARRAY_SIZE(clk_oxnas_init); i++) {
+2 -2
drivers/clk/rockchip/clk-cpu.c
··· 321 321 } 322 322 323 323 cclk = clk_register(NULL, &cpuclk->hw); 324 - if (IS_ERR(clk)) { 324 + if (IS_ERR(cclk)) { 325 325 pr_err("%s: could not register cpuclk %s\n", __func__, name); 326 - ret = PTR_ERR(clk); 326 + ret = PTR_ERR(cclk); 327 327 goto free_rate_table; 328 328 } 329 329
+1 -11
drivers/clk/rockchip/clk-mmc-phase.c
··· 41 41 #define ROCKCHIP_MMC_DEGREE_MASK 0x3 42 42 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 2 43 43 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET) 44 - #define ROCKCHIP_MMC_INIT_STATE_RESET 0x1 45 - #define ROCKCHIP_MMC_INIT_STATE_SHIFT 1 46 44 47 45 #define PSECS_PER_SEC 1000000000000LL 48 46 ··· 152 154 return ERR_PTR(-ENOMEM); 153 155 154 156 init.name = name; 157 + init.flags = 0; 155 158 init.num_parents = num_parents; 156 159 init.parent_names = parent_names; 157 160 init.ops = &rockchip_mmc_clk_ops; ··· 160 161 mmc_clock->hw.init = &init; 161 162 mmc_clock->reg = reg; 162 163 mmc_clock->shift = shift; 163 - 164 - /* 165 - * Assert init_state to soft reset the CLKGEN 166 - * for mmc tuning phase and degree 167 - */ 168 - if (mmc_clock->shift == ROCKCHIP_MMC_INIT_STATE_SHIFT) 169 - writel(HIWORD_UPDATE(ROCKCHIP_MMC_INIT_STATE_RESET, 170 - ROCKCHIP_MMC_INIT_STATE_RESET, 171 - mmc_clock->shift), mmc_clock->reg); 172 164 173 165 clk = clk_register(NULL, &mmc_clock->hw); 174 166 if (IS_ERR(clk))
+6 -2
drivers/clk/rockchip/clk-rk3399.c
··· 832 832 RK3399_CLKGATE_CON(13), 1, GFLAGS), 833 833 834 834 /* perihp */ 835 - GATE(0, "cpll_aclk_perihp_src", "gpll", CLK_IGNORE_UNUSED, 835 + GATE(0, "cpll_aclk_perihp_src", "cpll", CLK_IGNORE_UNUSED, 836 836 RK3399_CLKGATE_CON(5), 0, GFLAGS), 837 - GATE(0, "gpll_aclk_perihp_src", "cpll", CLK_IGNORE_UNUSED, 837 + GATE(0, "gpll_aclk_perihp_src", "gpll", CLK_IGNORE_UNUSED, 838 838 RK3399_CLKGATE_CON(5), 1, GFLAGS), 839 839 COMPOSITE(ACLK_PERIHP, "aclk_perihp", mux_aclk_perihp_p, CLK_IGNORE_UNUSED, 840 840 RK3399_CLKSEL_CON(14), 7, 1, MFLAGS, 0, 5, DFLAGS, ··· 1466 1466 1467 1467 static const char *const rk3399_cru_critical_clocks[] __initconst = { 1468 1468 "aclk_cci_pre", 1469 + "aclk_gic", 1470 + "aclk_gic_noc", 1469 1471 "pclk_perilp0", 1470 1472 "pclk_perilp0", 1471 1473 "hclk_perilp0", ··· 1510 1508 ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS); 1511 1509 if (IS_ERR(ctx)) { 1512 1510 pr_err("%s: rockchip clk init failed\n", __func__); 1511 + iounmap(reg_base); 1513 1512 return; 1514 1513 } 1515 1514 ··· 1556 1553 ctx = rockchip_clk_init(np, reg_base, CLKPMU_NR_CLKS); 1557 1554 if (IS_ERR(ctx)) { 1558 1555 pr_err("%s: rockchip pmu clk init failed\n", __func__); 1556 + iounmap(reg_base); 1559 1557 return; 1560 1558 } 1561 1559
+22 -21
drivers/connector/cn_proc.c
··· 56 56 /* proc_event_counts is used as the sequence number of the netlink message */ 57 57 static DEFINE_PER_CPU(__u32, proc_event_counts) = { 0 }; 58 58 59 - static inline void get_seq(__u32 *ts, int *cpu) 59 + static inline void send_msg(struct cn_msg *msg) 60 60 { 61 61 preempt_disable(); 62 - *ts = __this_cpu_inc_return(proc_event_counts) - 1; 63 - *cpu = smp_processor_id(); 62 + 63 + msg->seq = __this_cpu_inc_return(proc_event_counts) - 1; 64 + ((struct proc_event *)msg->data)->cpu = smp_processor_id(); 65 + 66 + /* 67 + * Preemption remains disabled during send to ensure the messages are 68 + * ordered according to their sequence numbers. 69 + * 70 + * If cn_netlink_send() fails, the data is not sent. 71 + */ 72 + cn_netlink_send(msg, 0, CN_IDX_PROC, GFP_NOWAIT); 73 + 64 74 preempt_enable(); 65 75 } 66 76 ··· 87 77 msg = buffer_to_cn_msg(buffer); 88 78 ev = (struct proc_event *)msg->data; 89 79 memset(&ev->event_data, 0, sizeof(ev->event_data)); 90 - get_seq(&msg->seq, &ev->cpu); 91 80 ev->timestamp_ns = ktime_get_ns(); 92 81 ev->what = PROC_EVENT_FORK; 93 82 rcu_read_lock(); ··· 101 92 msg->ack = 0; /* not used */ 102 93 msg->len = sizeof(*ev); 103 94 msg->flags = 0; /* not used */ 104 - /* If cn_netlink_send() failed, the data is not sent */ 105 - cn_netlink_send(msg, 0, CN_IDX_PROC, GFP_KERNEL); 95 + send_msg(msg); 106 96 } 107 97 108 98 void proc_exec_connector(struct task_struct *task) ··· 116 108 msg = buffer_to_cn_msg(buffer); 117 109 ev = (struct proc_event *)msg->data; 118 110 memset(&ev->event_data, 0, sizeof(ev->event_data)); 119 - get_seq(&msg->seq, &ev->cpu); 120 111 ev->timestamp_ns = ktime_get_ns(); 121 112 ev->what = PROC_EVENT_EXEC; 122 113 ev->event_data.exec.process_pid = task->pid; ··· 125 118 msg->ack = 0; /* not used */ 126 119 msg->len = sizeof(*ev); 127 120 msg->flags = 0; /* not used */ 128 - cn_netlink_send(msg, 0, CN_IDX_PROC, GFP_KERNEL); 121 + send_msg(msg); 129 122 } 130 123 131 124 void proc_id_connector(struct task_struct *task, int which_id) ··· 157 150 return; 158 151 } 159 152 rcu_read_unlock(); 160 - get_seq(&msg->seq, &ev->cpu); 161 153 ev->timestamp_ns = ktime_get_ns(); 162 154 163 155 memcpy(&msg->id, &cn_proc_event_id, sizeof(msg->id)); 164 156 msg->ack = 0; /* not used */ 165 157 msg->len = sizeof(*ev); 166 158 msg->flags = 0; /* not used */ 167 - cn_netlink_send(msg, 0, CN_IDX_PROC, GFP_KERNEL); 159 + send_msg(msg); 168 160 } 169 161 170 162 void proc_sid_connector(struct task_struct *task) ··· 178 172 msg = buffer_to_cn_msg(buffer); 179 173 ev = (struct proc_event *)msg->data; 180 174 memset(&ev->event_data, 0, sizeof(ev->event_data)); 181 - get_seq(&msg->seq, &ev->cpu); 182 175 ev->timestamp_ns = ktime_get_ns(); 183 176 ev->what = PROC_EVENT_SID; 184 177 ev->event_data.sid.process_pid = task->pid; ··· 187 182 msg->ack = 0; /* not used */ 188 183 msg->len = sizeof(*ev); 189 184 msg->flags = 0; /* not used */ 190 - cn_netlink_send(msg, 0, CN_IDX_PROC, GFP_KERNEL); 185 + send_msg(msg); 191 186 } 192 187 193 188 void proc_ptrace_connector(struct task_struct *task, int ptrace_id) ··· 202 197 msg = buffer_to_cn_msg(buffer); 203 198 ev = (struct proc_event *)msg->data; 204 199 memset(&ev->event_data, 0, sizeof(ev->event_data)); 205 - get_seq(&msg->seq, &ev->cpu); 206 200 ev->timestamp_ns = ktime_get_ns(); 207 201 ev->what = PROC_EVENT_PTRACE; 208 202 ev->event_data.ptrace.process_pid = task->pid; ··· 219 215 msg->ack = 0; /* not used */ 220 216 msg->len = sizeof(*ev); 221 217 msg->flags = 0; /* not used */ 222 - cn_netlink_send(msg, 0, CN_IDX_PROC, GFP_KERNEL); 218 + send_msg(msg); 223 219 } 224 220 225 221 void proc_comm_connector(struct task_struct *task) ··· 234 230 msg = buffer_to_cn_msg(buffer); 235 231 ev = (struct proc_event *)msg->data; 236 232 memset(&ev->event_data, 0, sizeof(ev->event_data)); 237 - get_seq(&msg->seq, &ev->cpu); 238 233 ev->timestamp_ns = ktime_get_ns(); 239 234 ev->what = PROC_EVENT_COMM; 240 235 ev->event_data.comm.process_pid = task->pid; ··· 244 241 msg->ack = 0; /* not used */ 245 242 msg->len = sizeof(*ev); 246 243 msg->flags = 0; /* not used */ 247 - cn_netlink_send(msg, 0, CN_IDX_PROC, GFP_KERNEL); 244 + send_msg(msg); 248 245 } 249 246 250 247 void proc_coredump_connector(struct task_struct *task) ··· 259 256 msg = buffer_to_cn_msg(buffer); 260 257 ev = (struct proc_event *)msg->data; 261 258 memset(&ev->event_data, 0, sizeof(ev->event_data)); 262 - get_seq(&msg->seq, &ev->cpu); 263 259 ev->timestamp_ns = ktime_get_ns(); 264 260 ev->what = PROC_EVENT_COREDUMP; 265 261 ev->event_data.coredump.process_pid = task->pid; ··· 268 266 msg->ack = 0; /* not used */ 269 267 msg->len = sizeof(*ev); 270 268 msg->flags = 0; /* not used */ 271 - cn_netlink_send(msg, 0, CN_IDX_PROC, GFP_KERNEL); 269 + send_msg(msg); 272 270 } 273 271 274 272 void proc_exit_connector(struct task_struct *task) ··· 283 281 msg = buffer_to_cn_msg(buffer); 284 282 ev = (struct proc_event *)msg->data; 285 283 memset(&ev->event_data, 0, sizeof(ev->event_data)); 286 - get_seq(&msg->seq, &ev->cpu); 287 284 ev->timestamp_ns = ktime_get_ns(); 288 285 ev->what = PROC_EVENT_EXIT; 289 286 ev->event_data.exit.process_pid = task->pid; ··· 294 293 msg->ack = 0; /* not used */ 295 294 msg->len = sizeof(*ev); 296 295 msg->flags = 0; /* not used */ 297 - cn_netlink_send(msg, 0, CN_IDX_PROC, GFP_KERNEL); 296 + send_msg(msg); 298 297 } 299 298 300 299 /* ··· 326 325 msg->ack = rcvd_ack + 1; 327 326 msg->len = sizeof(*ev); 328 327 msg->flags = 0; /* not used */ 329 - cn_netlink_send(msg, 0, CN_IDX_PROC, GFP_KERNEL); 328 + send_msg(msg); 330 329 } 331 330 332 331 /**
+4 -3
drivers/cpufreq/cpufreq-dt-platdev.c
··· 79 79 static int __init cpufreq_dt_platdev_init(void) 80 80 { 81 81 struct device_node *np = of_find_node_by_path("/"); 82 + const struct of_device_id *match; 82 83 83 84 if (!np) 84 85 return -ENODEV; 85 86 86 - if (!of_match_node(machines, np)) 87 + match = of_match_node(machines, np); 88 + of_node_put(np); 89 + if (!match) 87 90 return -ENODEV; 88 - 89 - of_node_put(of_root); 90 91 91 92 return PTR_ERR_OR_ZERO(platform_device_register_simple("cpufreq-dt", -1, 92 93 NULL, 0));
+4
drivers/cpufreq/cpufreq.c
··· 2261 2261 * -> ask driver for current freq and notify governors about a change 2262 2262 */ 2263 2263 if (cpufreq_driver->get && !cpufreq_driver->setpolicy) { 2264 + if (cpufreq_suspended) { 2265 + ret = -EAGAIN; 2266 + goto unlock; 2267 + } 2264 2268 new_policy.cur = cpufreq_update_current_freq(policy); 2265 2269 if (WARN_ON(!new_policy.cur)) { 2266 2270 ret = -EIO;
+3 -2
drivers/cpufreq/intel_pstate.c
··· 1400 1400 { 1401 1401 struct cpudata *cpu = all_cpu_data[cpu_num]; 1402 1402 1403 + if (cpu->update_util_set) 1404 + return; 1405 + 1403 1406 /* Prevent intel_pstate_update_util() from using stale data. */ 1404 1407 cpu->sample.time = 0; 1405 1408 cpufreq_add_update_util_hook(cpu_num, &cpu->update_util, ··· 1442 1439 1443 1440 if (!policy->cpuinfo.max_freq) 1444 1441 return -ENODEV; 1445 - 1446 - intel_pstate_clear_update_util_hook(policy->cpu); 1447 1442 1448 1443 pr_debug("set_policy cpuinfo.max %u policy->max %u\n", 1449 1444 policy->cpuinfo.max_freq, policy->max);
+2 -2
drivers/crypto/ux500/hash/hash_core.c
··· 781 781 &device_data->state); 782 782 memmove(req_ctx->state.buffer, 783 783 device_data->state.buffer, 784 - HASH_BLOCK_SIZE / sizeof(u32)); 784 + HASH_BLOCK_SIZE); 785 785 if (ret) { 786 786 dev_err(device_data->dev, 787 787 "%s: hash_resume_state() failed!\n", ··· 832 832 833 833 memmove(device_data->state.buffer, 834 834 req_ctx->state.buffer, 835 - HASH_BLOCK_SIZE / sizeof(u32)); 835 + HASH_BLOCK_SIZE); 836 836 if (ret) { 837 837 dev_err(device_data->dev, "%s: hash_save_state() failed!\n", 838 838 __func__);
+1 -1
drivers/crypto/vmx/aes_cbc.c
··· 182 182 .cra_name = "cbc(aes)", 183 183 .cra_driver_name = "p8_aes_cbc", 184 184 .cra_module = THIS_MODULE, 185 - .cra_priority = 1000, 185 + .cra_priority = 2000, 186 186 .cra_type = &crypto_blkcipher_type, 187 187 .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER | CRYPTO_ALG_NEED_FALLBACK, 188 188 .cra_alignmask = 0,
+1 -1
drivers/crypto/vmx/aes_ctr.c
··· 166 166 .cra_name = "ctr(aes)", 167 167 .cra_driver_name = "p8_aes_ctr", 168 168 .cra_module = THIS_MODULE, 169 - .cra_priority = 1000, 169 + .cra_priority = 2000, 170 170 .cra_type = &crypto_blkcipher_type, 171 171 .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER | CRYPTO_ALG_NEED_FALLBACK, 172 172 .cra_alignmask = 0,
+1 -1
drivers/crypto/vmx/ppc-xlate.pl
··· 141 141 142 142 # Some ABIs specify vrsave, special-purpose register #256, as reserved 143 143 # for system use. 144 - my $no_vrsave = ($flavour =~ /aix|linux64le/); 144 + my $no_vrsave = ($flavour =~ /linux-ppc64le/); 145 145 my $mtspr = sub { 146 146 my ($f,$idx,$ra) = @_; 147 147 if ($idx == 256 && $no_vrsave) {
+7 -2
drivers/gpio/gpio-tegra.c
··· 98 98 const struct tegra_gpio_soc_config *soc; 99 99 struct gpio_chip gc; 100 100 struct irq_chip ic; 101 - struct lock_class_key lock_class; 102 101 u32 bank_count; 103 102 }; 104 103 ··· 546 547 SET_SYSTEM_SLEEP_PM_OPS(tegra_gpio_suspend, tegra_gpio_resume) 547 548 }; 548 549 550 + /* 551 + * This lock class tells lockdep that GPIO irqs are in a different category 552 + * than their parents, so it won't report false recursion. 553 + */ 554 + static struct lock_class_key gpio_lock_class; 555 + 549 556 static int tegra_gpio_probe(struct platform_device *pdev) 550 557 { 551 558 const struct tegra_gpio_soc_config *config; ··· 665 660 666 661 bank = &tgi->bank_info[GPIO_BANK(gpio)]; 667 662 668 - irq_set_lockdep_class(irq, &tgi->lock_class); 663 + irq_set_lockdep_class(irq, &gpio_lock_class); 669 664 irq_set_chip_data(irq, bank); 670 665 irq_set_chip_and_handler(irq, &tgi->ic, handle_simple_irq); 671 666 }
+4
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
··· 1106 1106 if (fences == 0 && handles == 0) { 1107 1107 if (adev->pm.dpm_enabled) { 1108 1108 amdgpu_dpm_enable_uvd(adev, false); 1109 + /* just work around for uvd clock remain high even 1110 + * when uvd dpm disabled on Polaris10 */ 1111 + if (adev->asic_type == CHIP_POLARIS10) 1112 + amdgpu_asic_set_uvd_clocks(adev, 0, 0); 1109 1113 } else { 1110 1114 amdgpu_asic_set_uvd_clocks(adev, 0, 0); 1111 1115 }
+3
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
··· 47 47 #include "dce/dce_10_0_d.h" 48 48 #include "dce/dce_10_0_sh_mask.h" 49 49 50 + #include "smu/smu_7_1_3_d.h" 51 + 50 52 #define GFX8_NUM_GFX_RINGS 1 51 53 #define GFX8_NUM_COMPUTE_RINGS 8 52 54 ··· 695 693 amdgpu_program_register_sequence(adev, 696 694 polaris10_golden_common_all, 697 695 (const u32)ARRAY_SIZE(polaris10_golden_common_all)); 696 + WREG32_SMC(ixCG_ACLK_CNTL, 0x0000001C); 698 697 break; 699 698 case CHIP_CARRIZO: 700 699 amdgpu_program_register_sequence(adev,
+124 -55
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
··· 98 98 #define PCIE_BUS_CLK 10000 99 99 #define TCLK (PCIE_BUS_CLK / 10) 100 100 101 + #define CEILING_UCHAR(double) ((double-(uint8_t)(double)) > 0 ? (uint8_t)(double+1) : (uint8_t)(double)) 101 102 102 103 static const uint16_t polaris10_clock_stretcher_lookup_table[2][4] = 103 104 { {600, 1050, 3, 0}, {600, 1050, 6, 1} }; ··· 1423 1422 1424 1423 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; 1425 1424 1426 - if (!data->sclk_dpm_key_disabled) { 1427 - /* Get MinVoltage and Frequency from DPM0, 1428 - * already converted to SMC_UL */ 1429 - sclk_frequency = data->dpm_table.sclk_table.dpm_levels[0].value; 1430 - result = polaris10_get_dependency_volt_by_clk(hwmgr, 1431 - table_info->vdd_dep_on_sclk, 1432 - table->ACPILevel.SclkFrequency, 1433 - &table->ACPILevel.MinVoltage, &mvdd); 1434 - PP_ASSERT_WITH_CODE((0 == result), 1435 - "Cannot find ACPI VDDC voltage value " 1436 - "in Clock Dependency Table", ); 1437 - } else { 1438 - sclk_frequency = data->vbios_boot_state.sclk_bootup_value; 1439 - table->ACPILevel.MinVoltage = 1440 - data->vbios_boot_state.vddc_bootup_value * VOLTAGE_SCALE; 1441 - } 1425 + 1426 + /* Get MinVoltage and Frequency from DPM0, 1427 + * already converted to SMC_UL */ 1428 + sclk_frequency = data->dpm_table.sclk_table.dpm_levels[0].value; 1429 + result = polaris10_get_dependency_volt_by_clk(hwmgr, 1430 + table_info->vdd_dep_on_sclk, 1431 + sclk_frequency, 1432 + &table->ACPILevel.MinVoltage, &mvdd); 1433 + PP_ASSERT_WITH_CODE((0 == result), 1434 + "Cannot find ACPI VDDC voltage value " 1435 + "in Clock Dependency Table", 1436 + ); 1437 + 1442 1438 1443 1439 result = polaris10_calculate_sclk_params(hwmgr, sclk_frequency, &(table->ACPILevel.SclkSetting)); 1444 1440 PP_ASSERT_WITH_CODE(result == 0, "Error retrieving Engine Clock dividers from VBIOS.", return result); ··· 1460 1462 CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Fcw1_frac); 1461 1463 CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Sclk_ss_slew_rate); 1462 1464 1463 - if (!data->mclk_dpm_key_disabled) { 1464 - /* Get MinVoltage and Frequency from DPM0, already converted to SMC_UL */ 1465 - table->MemoryACPILevel.MclkFrequency = 1466 - data->dpm_table.mclk_table.dpm_levels[0].value; 1467 - result = polaris10_get_dependency_volt_by_clk(hwmgr, 1468 - table_info->vdd_dep_on_mclk, 1469 - table->MemoryACPILevel.MclkFrequency, 1470 - &table->MemoryACPILevel.MinVoltage, &mvdd); 1471 - PP_ASSERT_WITH_CODE((0 == result), 1472 - "Cannot find ACPI VDDCI voltage value " 1473 - "in Clock Dependency Table", 1474 - ); 1475 - } else { 1476 - table->MemoryACPILevel.MclkFrequency = 1477 - data->vbios_boot_state.mclk_bootup_value; 1478 - table->MemoryACPILevel.MinVoltage = 1479 - data->vbios_boot_state.vddci_bootup_value * VOLTAGE_SCALE; 1480 - } 1465 + 1466 + /* Get MinVoltage and Frequency from DPM0, already converted to SMC_UL */ 1467 + table->MemoryACPILevel.MclkFrequency = 1468 + data->dpm_table.mclk_table.dpm_levels[0].value; 1469 + result = polaris10_get_dependency_volt_by_clk(hwmgr, 1470 + table_info->vdd_dep_on_mclk, 1471 + table->MemoryACPILevel.MclkFrequency, 1472 + &table->MemoryACPILevel.MinVoltage, &mvdd); 1473 + PP_ASSERT_WITH_CODE((0 == result), 1474 + "Cannot find ACPI VDDCI voltage value " 1475 + "in Clock Dependency Table", 1476 + ); 1481 1477 1482 1478 us_mvdd = 0; 1483 1479 if ((POLARIS10_VOLTAGE_CONTROL_NONE == data->mvdd_control) || ··· 1516 1524 struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table = 1517 1525 table_info->mm_dep_table; 1518 1526 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); 1527 + uint32_t vddci; 1519 1528 1520 1529 table->VceLevelCount = (uint8_t)(mm_table->count); 1521 1530 table->VceBootLevel = 0; ··· 1526 1533 table->VceLevel[count].MinVoltage = 0; 1527 1534 table->VceLevel[count].MinVoltage |= 1528 1535 (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; 1536 + 1537 + if (POLARIS10_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) 1538 + vddci = (uint32_t)phm_find_closest_vddci(&(data->vddci_voltage_table), 1539 + mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); 1540 + else if (POLARIS10_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) 1541 + vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA; 1542 + else 1543 + vddci = (data->vbios_boot_state.vddci_bootup_value * VOLTAGE_SCALE) << VDDCI_SHIFT; 1544 + 1545 + 1529 1546 table->VceLevel[count].MinVoltage |= 1530 - ((mm_table->entries[count].vddc - data->vddc_vddci_delta) * 1531 - VOLTAGE_SCALE) << VDDCI_SHIFT; 1547 + (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT; 1532 1548 table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT; 1533 1549 1534 1550 /*retrieve divider value for VBIOS */ ··· 1566 1564 struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table = 1567 1565 table_info->mm_dep_table; 1568 1566 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); 1567 + uint32_t vddci; 1569 1568 1570 1569 table->SamuBootLevel = 0; 1571 1570 table->SamuLevelCount = (uint8_t)(mm_table->count); ··· 1577 1574 table->SamuLevel[count].Frequency = mm_table->entries[count].samclock; 1578 1575 table->SamuLevel[count].MinVoltage |= (mm_table->entries[count].vddc * 1579 1576 VOLTAGE_SCALE) << VDDC_SHIFT; 1580 - table->SamuLevel[count].MinVoltage |= ((mm_table->entries[count].vddc - 1581 - data->vddc_vddci_delta) * VOLTAGE_SCALE) << VDDCI_SHIFT; 1577 + 1578 + if (POLARIS10_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) 1579 + vddci = (uint32_t)phm_find_closest_vddci(&(data->vddci_voltage_table), 1580 + mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); 1581 + else if (POLARIS10_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) 1582 + vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA; 1583 + else 1584 + vddci = (data->vbios_boot_state.vddci_bootup_value * VOLTAGE_SCALE) << VDDCI_SHIFT; 1585 + 1586 + table->SamuLevel[count].MinVoltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT; 1582 1587 table->SamuLevel[count].MinVoltage |= 1 << PHASES_SHIFT; 1583 1588 1584 1589 /* retrieve divider value for VBIOS */ ··· 1669 1658 struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table = 1670 1659 table_info->mm_dep_table; 1671 1660 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); 1661 + uint32_t vddci; 1672 1662 1673 1663 table->UvdLevelCount = (uint8_t)(mm_table->count); 1674 1664 table->UvdBootLevel = 0; ··· 1680 1668 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; 1681 1669 table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * 1682 1670 VOLTAGE_SCALE) << VDDC_SHIFT; 1683 - table->UvdLevel[count].MinVoltage |= ((mm_table->entries[count].vddc - 1684 - data->vddc_vddci_delta) * VOLTAGE_SCALE) << VDDCI_SHIFT; 1671 + 1672 + if (POLARIS10_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) 1673 + vddci = (uint32_t)phm_find_closest_vddci(&(data->vddci_voltage_table), 1674 + mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); 1675 + else if (POLARIS10_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) 1676 + vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA; 1677 + else 1678 + vddci = (data->vbios_boot_state.vddci_bootup_value * VOLTAGE_SCALE) << VDDCI_SHIFT; 1679 + 1680 + table->UvdLevel[count].MinVoltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT; 1685 1681 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT; 1686 1682 1687 1683 /* retrieve divider value for VBIOS */ ··· 1710 1690 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); 1711 1691 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency); 1712 1692 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].MinVoltage); 1713 - 1714 1693 } 1694 + 1715 1695 return result; 1716 1696 } 1717 1697 ··· 1807 1787 1808 1788 ro = efuse * (max -min)/255 + min; 1809 1789 1810 - /* Populate Sclk_CKS_masterEn0_7 and Sclk_voltageOffset */ 1790 + /* Populate Sclk_CKS_masterEn0_7 and Sclk_voltageOffset 1791 + * there is a little difference in calculating 1792 + * volt_with_cks with windows */ 1811 1793 for (i = 0; i < sclk_table->count; i++) { 1812 1794 data->smc_state_table.Sclk_CKS_masterEn0_7 |= 1813 1795 sclk_table->entries[i].cks_enable << i; 1814 - 1815 - volt_without_cks = (uint32_t)(((ro - 40) * 1000 - 2753594 - sclk_table->entries[i].clk/100 * 136418 /1000) / \ 1816 - (sclk_table->entries[i].clk/100 * 1132925 /10000 - 242418)/100); 1817 - 1818 - volt_with_cks = (uint32_t)((ro * 1000 -2396351 - sclk_table->entries[i].clk/100 * 329021/1000) / \ 1819 - (sclk_table->entries[i].clk/10000 * 649434 /1000 - 18005)/10); 1796 + if (hwmgr->chip_id == CHIP_POLARIS10) { 1797 + volt_without_cks = (uint32_t)((2753594000 + (sclk_table->entries[i].clk/100) * 136418 -(ro - 70) * 1000000) / \ 1798 + (2424180 - (sclk_table->entries[i].clk/100) * 1132925/1000)); 1799 + volt_with_cks = (uint32_t)((279720200 + sclk_table->entries[i].clk * 3232 - (ro - 65) * 100000000) / \ 1800 + (252248000 - sclk_table->entries[i].clk/100 * 115764)); 1801 + } else { 1802 + volt_without_cks = (uint32_t)((2416794800 + (sclk_table->entries[i].clk/100) * 1476925/10 -(ro - 50) * 1000000) / \ 1803 + (2625416 - (sclk_table->entries[i].clk/100) * 12586807/10000)); 1804 + volt_with_cks = (uint32_t)((2999656000 + sclk_table->entries[i].clk * 392803/100 - (ro - 44) * 1000000) / \ 1805 + (3422454 - sclk_table->entries[i].clk/100 * 18886376/10000)); 1806 + } 1820 1807 1821 1808 if (volt_without_cks >= volt_with_cks) 1822 - volt_offset = (uint8_t)(((volt_without_cks - volt_with_cks + 1823 - sclk_table->entries[i].cks_voffset) * 100 / 625) + 1); 1809 + volt_offset = (uint8_t)CEILING_UCHAR((volt_without_cks - volt_with_cks + 1810 + sclk_table->entries[i].cks_voffset) * 100 / 625); 1824 1811 1825 1812 data->smc_state_table.Sclk_voltageOffset[i] = volt_offset; 1826 1813 } 1827 1814 1815 + data->smc_state_table.LdoRefSel = (table_info->cac_dtp_table->ucCKS_LDO_REFSEL != 0) ? table_info->cac_dtp_table->ucCKS_LDO_REFSEL : 6; 1828 1816 /* Populate CKS Lookup Table */ 1829 1817 if (stretch_amount == 1 || stretch_amount == 2 || stretch_amount == 5) 1830 1818 stretch_amount2 = 0; ··· 2515 2487 PP_ASSERT_WITH_CODE((0 == tmp_result), 2516 2488 "Failed to enable VR hot GPIO interrupt!", result = tmp_result); 2517 2489 2490 + smum_send_msg_to_smc(hwmgr->smumgr, (PPSMC_Msg)PPSMC_HasDisplay); 2491 + 2518 2492 tmp_result = polaris10_enable_sclk_control(hwmgr); 2519 2493 PP_ASSERT_WITH_CODE((0 == tmp_result), 2520 2494 "Failed to enable SCLK control!", result = tmp_result); ··· 2943 2913 return 0; 2944 2914 } 2945 2915 2916 + int polaris10_patch_voltage_workaround(struct pp_hwmgr *hwmgr) 2917 + { 2918 + struct phm_ppt_v1_information *table_info = 2919 + (struct phm_ppt_v1_information *)(hwmgr->pptable); 2920 + struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table = 2921 + table_info->vdd_dep_on_mclk; 2922 + struct phm_ppt_v1_voltage_lookup_table *lookup_table = 2923 + table_info->vddc_lookup_table; 2924 + uint32_t i; 2925 + 2926 + if (hwmgr->chip_id == CHIP_POLARIS10 && hwmgr->hw_revision == 0xC7) { 2927 + if (lookup_table->entries[dep_mclk_table->entries[dep_mclk_table->count-1].vddInd].us_vdd >= 1000) 2928 + return 0; 2929 + 2930 + for (i = 0; i < lookup_table->count; i++) { 2931 + if (lookup_table->entries[i].us_vdd < 0xff01 && lookup_table->entries[i].us_vdd >= 1000) { 2932 + dep_mclk_table->entries[dep_mclk_table->count-1].vddInd = (uint8_t) i; 2933 + return 0; 2934 + } 2935 + } 2936 + } 2937 + return 0; 2938 + } 2939 + 2940 + 2946 2941 int polaris10_hwmgr_backend_init(struct pp_hwmgr *hwmgr) 2947 2942 { 2948 2943 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); ··· 3045 2990 3046 2991 polaris10_set_features_platform_caps(hwmgr); 3047 2992 2993 + polaris10_patch_voltage_workaround(hwmgr); 3048 2994 polaris10_init_dpm_defaults(hwmgr); 3049 2995 3050 2996 /* Get leakage voltage based on leakage ID. */ ··· 4415 4359 return 0; 4416 4360 } 4417 4361 4362 + static int polaris10_notify_smc_display(struct pp_hwmgr *hwmgr) 4363 + { 4364 + struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); 4365 + 4366 + smum_send_msg_to_smc_with_parameter(hwmgr->smumgr, 4367 + (PPSMC_Msg)PPSMC_MSG_SetVBITimeout, data->frame_time_x2); 4368 + return (smum_send_msg_to_smc(hwmgr->smumgr, (PPSMC_Msg)PPSMC_HasDisplay) == 0) ? 0 : -EINVAL; 4369 + } 4370 + 4418 4371 static int polaris10_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input) 4419 4372 { 4420 4373 int tmp_result, result = 0; ··· 4472 4407 "Failed to program memory timing parameters!", 4473 4408 result = tmp_result); 4474 4409 4410 + tmp_result = polaris10_notify_smc_display(hwmgr); 4411 + PP_ASSERT_WITH_CODE((0 == tmp_result), 4412 + "Failed to notify smc display settings!", 4413 + result = tmp_result); 4414 + 4475 4415 tmp_result = polaris10_unfreeze_sclk_mclk_dpm(hwmgr); 4476 4416 PP_ASSERT_WITH_CODE((0 == tmp_result), 4477 4417 "Failed to unfreeze SCLK MCLK DPM!", ··· 4511 4441 PPSMC_MSG_SetFanPwmMax, us_max_fan_pwm); 4512 4442 } 4513 4443 4444 + 4514 4445 int polaris10_notify_smc_display_change(struct pp_hwmgr *hwmgr, bool has_display) 4515 4446 { 4516 4447 PPSMC_Msg msg = has_display ? (PPSMC_Msg)PPSMC_HasDisplay : (PPSMC_Msg)PPSMC_NoDisplay; ··· 4531 4460 4532 4461 if (num_active_displays > 1) /* to do && (pHwMgr->pPECI->displayConfiguration.bMultiMonitorInSync != TRUE)) */ 4533 4462 polaris10_notify_smc_display_change(hwmgr, false); 4534 - else 4535 - polaris10_notify_smc_display_change(hwmgr, true); 4536 4463 4537 4464 return 0; 4538 4465 } ··· 4571 4502 frame_time_in_us = 1000000 / refresh_rate; 4572 4503 4573 4504 pre_vbi_time_in_us = frame_time_in_us - 200 - mode_info.vblank_time_us; 4505 + data->frame_time_x2 = frame_time_in_us * 2 / 100; 4506 + 4574 4507 display_gap2 = pre_vbi_time_in_us * (ref_clock / 100); 4575 4508 4576 4509 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_DISPLAY_GAP_CNTL2, display_gap2); ··· 4580 4509 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, data->soft_regs_start + offsetof(SMU74_SoftRegisters, PreVBlankGap), 0x64); 4581 4510 4582 4511 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, data->soft_regs_start + offsetof(SMU74_SoftRegisters, VBlankTimeout), (frame_time_in_us - pre_vbi_time_in_us)); 4583 - 4584 - polaris10_notify_smc_display_change(hwmgr, num_active_displays != 0); 4585 4512 4586 4513 return 0; 4587 4514 } ··· 4692 4623 return 0; 4693 4624 } 4694 4625 4695 - data->need_long_memory_training = true; 4626 + data->need_long_memory_training = false; 4696 4627 4697 4628 /* 4698 4629 * PPMCME_FirmwareDescriptorEntry *pfd = NULL;
+1
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.h
··· 315 315 316 316 uint32_t avfs_vdroop_override_setting; 317 317 bool apply_avfs_cks_off_voltage; 318 + uint32_t frame_time_x2; 318 319 }; 319 320 320 321 /* To convert to Q8.8 format for firmware */
+2
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
··· 411 411 uint8_t ucVr_I2C_Line; 412 412 uint8_t ucPlx_I2C_address; 413 413 uint8_t ucPlx_I2C_Line; 414 + uint32_t usBoostPowerLimit; 415 + uint8_t ucCKS_LDO_REFSEL; 414 416 }; 415 417 416 418 struct phm_ppm_table {
+2
drivers/gpu/drm/amd/powerplay/inc/polaris10_ppsmc.h
··· 392 392 #define PPSMC_MSG_SetGpuPllDfsForSclk ((uint16_t) 0x300) 393 393 #define PPSMC_MSG_Didt_Block_Function ((uint16_t) 0x301) 394 394 395 + #define PPSMC_MSG_SetVBITimeout ((uint16_t) 0x306) 396 + 395 397 #define PPSMC_MSG_SecureSRBMWrite ((uint16_t) 0x600) 396 398 #define PPSMC_MSG_SecureSRBMRead ((uint16_t) 0x601) 397 399 #define PPSMC_MSG_SetAddress ((uint16_t) 0x800)
+2 -1
drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h
··· 270 270 uint8_t BootPhases; 271 271 272 272 uint8_t VRHotLevel; 273 - uint8_t Reserved1[3]; 273 + uint8_t LdoRefSel; 274 + uint8_t Reserved1[2]; 274 275 uint16_t FanStartTemperature; 275 276 uint16_t FanStopTemperature; 276 277 uint16_t MaxVoltage;
+2 -2
drivers/gpu/drm/i915/i915_debugfs.c
··· 2365 2365 task = get_pid_task(file->pid, PIDTYPE_PID); 2366 2366 if (!task) { 2367 2367 ret = -ESRCH; 2368 - goto out_put; 2368 + goto out_unlock; 2369 2369 } 2370 2370 seq_printf(m, "\nproc: %s\n", task->comm); 2371 2371 put_task_struct(task); 2372 2372 idr_for_each(&file_priv->context_idr, per_file_ctx, 2373 2373 (void *)(unsigned long)m); 2374 2374 } 2375 + out_unlock: 2375 2376 mutex_unlock(&dev->filelist_mutex); 2376 2377 2377 - out_put: 2378 2378 intel_runtime_pm_put(dev_priv); 2379 2379 mutex_unlock(&dev->struct_mutex); 2380 2380
+8 -8
drivers/gpu/drm/i915/intel_display.c
··· 8447 8447 tmp |= FDI_MPHY_IOSFSB_RESET_CTL; 8448 8448 I915_WRITE(SOUTH_CHICKEN2, tmp); 8449 8449 8450 - if (wait_for_atomic_us(I915_READ(SOUTH_CHICKEN2) & 8451 - FDI_MPHY_IOSFSB_RESET_STATUS, 100)) 8450 + if (wait_for_us(I915_READ(SOUTH_CHICKEN2) & 8451 + FDI_MPHY_IOSFSB_RESET_STATUS, 100)) 8452 8452 DRM_ERROR("FDI mPHY reset assert timeout\n"); 8453 8453 8454 8454 tmp = I915_READ(SOUTH_CHICKEN2); 8455 8455 tmp &= ~FDI_MPHY_IOSFSB_RESET_CTL; 8456 8456 I915_WRITE(SOUTH_CHICKEN2, tmp); 8457 8457 8458 - if (wait_for_atomic_us((I915_READ(SOUTH_CHICKEN2) & 8459 - FDI_MPHY_IOSFSB_RESET_STATUS) == 0, 100)) 8458 + if (wait_for_us((I915_READ(SOUTH_CHICKEN2) & 8459 + FDI_MPHY_IOSFSB_RESET_STATUS) == 0, 100)) 8460 8460 DRM_ERROR("FDI mPHY reset de-assert timeout\n"); 8461 8461 } 8462 8462 ··· 9440 9440 val |= LCPLL_CD_SOURCE_FCLK; 9441 9441 I915_WRITE(LCPLL_CTL, val); 9442 9442 9443 - if (wait_for_atomic_us(I915_READ(LCPLL_CTL) & 9444 - LCPLL_CD_SOURCE_FCLK_DONE, 1)) 9443 + if (wait_for_us(I915_READ(LCPLL_CTL) & 9444 + LCPLL_CD_SOURCE_FCLK_DONE, 1)) 9445 9445 DRM_ERROR("Switching to FCLK failed\n"); 9446 9446 9447 9447 val = I915_READ(LCPLL_CTL); ··· 9514 9514 val &= ~LCPLL_CD_SOURCE_FCLK; 9515 9515 I915_WRITE(LCPLL_CTL, val); 9516 9516 9517 - if (wait_for_atomic_us((I915_READ(LCPLL_CTL) & 9518 - LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1)) 9517 + if (wait_for_us((I915_READ(LCPLL_CTL) & 9518 + LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1)) 9519 9519 DRM_ERROR("Switching back to LCPLL failed\n"); 9520 9520 } 9521 9521
+6 -4
drivers/gpu/drm/i915/intel_dp.c
··· 663 663 done = wait_event_timeout(dev_priv->gmbus_wait_queue, C, 664 664 msecs_to_jiffies_timeout(10)); 665 665 else 666 - done = wait_for_atomic(C, 10) == 0; 666 + done = wait_for(C, 10) == 0; 667 667 if (!done) 668 668 DRM_ERROR("dp aux hw did not signal timeout (has irq: %i)!\n", 669 669 has_aux_irq); ··· 4899 4899 4900 4900 void intel_dp_encoder_reset(struct drm_encoder *encoder) 4901 4901 { 4902 - struct intel_dp *intel_dp; 4902 + struct drm_i915_private *dev_priv = to_i915(encoder->dev); 4903 + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 4904 + 4905 + if (!HAS_DDI(dev_priv)) 4906 + intel_dp->DP = I915_READ(intel_dp->output_reg); 4903 4907 4904 4908 if (to_intel_encoder(encoder)->type != INTEL_OUTPUT_EDP) 4905 4909 return; 4906 - 4907 - intel_dp = enc_to_intel_dp(encoder); 4908 4910 4909 4911 pps_lock(intel_dp); 4910 4912
+2 -2
drivers/gpu/drm/i915/intel_dpll_mgr.c
··· 1377 1377 I915_WRITE(BXT_PORT_PLL_ENABLE(port), temp); 1378 1378 POSTING_READ(BXT_PORT_PLL_ENABLE(port)); 1379 1379 1380 - if (wait_for_atomic_us((I915_READ(BXT_PORT_PLL_ENABLE(port)) & 1381 - PORT_PLL_LOCK), 200)) 1380 + if (wait_for_us((I915_READ(BXT_PORT_PLL_ENABLE(port)) & PORT_PLL_LOCK), 1381 + 200)) 1382 1382 DRM_ERROR("PLL %d not locked\n", port); 1383 1383 1384 1384 /*
+14 -7
drivers/hid/hid-multitouch.c
··· 61 61 #define MT_QUIRK_ALWAYS_VALID (1 << 4) 62 62 #define MT_QUIRK_VALID_IS_INRANGE (1 << 5) 63 63 #define MT_QUIRK_VALID_IS_CONFIDENCE (1 << 6) 64 + #define MT_QUIRK_CONFIDENCE (1 << 7) 64 65 #define MT_QUIRK_SLOT_IS_CONTACTID_MINUS_ONE (1 << 8) 65 66 #define MT_QUIRK_NO_AREA (1 << 9) 66 67 #define MT_QUIRK_IGNORE_DUPLICATES (1 << 10) ··· 79 78 __s32 contactid; /* the device ContactID assigned to this slot */ 80 79 bool touch_state; /* is the touch valid? */ 81 80 bool inrange_state; /* is the finger in proximity of the sensor? */ 81 + bool confidence_state; /* is the touch made by a finger? */ 82 82 }; 83 83 84 84 struct mt_class { ··· 505 503 return 1; 506 504 case HID_DG_CONFIDENCE: 507 505 if (cls->name == MT_CLS_WIN_8 && 508 - field->application == HID_DG_TOUCHPAD) { 509 - cls->quirks &= ~MT_QUIRK_ALWAYS_VALID; 510 - cls->quirks |= MT_QUIRK_VALID_IS_CONFIDENCE; 511 - } 506 + field->application == HID_DG_TOUCHPAD) 507 + cls->quirks |= MT_QUIRK_CONFIDENCE; 512 508 mt_store_field(usage, td, hi); 513 509 return 1; 514 510 case HID_DG_TIPSWITCH: ··· 619 619 return; 620 620 621 621 if (td->curvalid || (td->mtclass.quirks & MT_QUIRK_ALWAYS_VALID)) { 622 + int active; 622 623 int slotnum = mt_compute_slot(td, input); 623 624 struct mt_slot *s = &td->curdata; 624 625 struct input_mt *mt = input->mt; ··· 634 633 return; 635 634 } 636 635 636 + if (!(td->mtclass.quirks & MT_QUIRK_CONFIDENCE)) 637 + s->confidence_state = 1; 638 + active = (s->touch_state || s->inrange_state) && 639 + s->confidence_state; 640 + 637 641 input_mt_slot(input, slotnum); 638 - input_mt_report_slot_state(input, MT_TOOL_FINGER, 639 - s->touch_state || s->inrange_state); 640 - if (s->touch_state || s->inrange_state) { 642 + input_mt_report_slot_state(input, MT_TOOL_FINGER, active); 643 + if (active) { 641 644 /* this finger is in proximity of the sensor */ 642 645 int wide = (s->w > s->h); 643 646 /* divided by two to match visual scale of touch */ ··· 706 701 td->curdata.touch_state = value; 707 702 break; 708 703 case HID_DG_CONFIDENCE: 704 + if (quirks & MT_QUIRK_CONFIDENCE) 705 + td->curdata.confidence_state = value; 709 706 if (quirks & MT_QUIRK_VALID_IS_CONFIDENCE) 710 707 td->curvalid = value; 711 708 break;
+2 -2
drivers/iio/accel/kxsd9.c
··· 81 81 82 82 mutex_lock(&st->buf_lock); 83 83 ret = spi_w8r8(st->us, KXSD9_READ(KXSD9_REG_CTRL_C)); 84 - if (ret) 84 + if (ret < 0) 85 85 goto error_ret; 86 86 st->tx[0] = KXSD9_WRITE(KXSD9_REG_CTRL_C); 87 87 st->tx[1] = (ret & ~KXSD9_FS_MASK) | i; ··· 163 163 break; 164 164 case IIO_CHAN_INFO_SCALE: 165 165 ret = spi_w8r8(st->us, KXSD9_READ(KXSD9_REG_CTRL_C)); 166 - if (ret) 166 + if (ret < 0) 167 167 goto error_ret; 168 168 *val2 = kxsd9_micro_scales[ret & KXSD9_FS_MASK]; 169 169 ret = IIO_VAL_INT_PLUS_MICRO;
+5 -2
drivers/iio/adc/ad7266.c
··· 396 396 397 397 st = iio_priv(indio_dev); 398 398 399 - st->reg = devm_regulator_get(&spi->dev, "vref"); 400 - if (!IS_ERR_OR_NULL(st->reg)) { 399 + st->reg = devm_regulator_get_optional(&spi->dev, "vref"); 400 + if (!IS_ERR(st->reg)) { 401 401 ret = regulator_enable(st->reg); 402 402 if (ret) 403 403 return ret; ··· 408 408 409 409 st->vref_mv = ret / 1000; 410 410 } else { 411 + /* Any other error indicates that the regulator does exist */ 412 + if (PTR_ERR(st->reg) != -ENODEV) 413 + return PTR_ERR(st->reg); 411 414 /* Use internal reference */ 412 415 st->vref_mv = 2500; 413 416 }
+3 -2
drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c
··· 56 56 int i; 57 57 acpi_status status; 58 58 union acpi_object *cpm; 59 + int ret; 59 60 60 61 status = acpi_evaluate_object(adev->handle, "CNF0", NULL, &buffer); 61 62 if (ACPI_FAILURE(status)) ··· 83 82 } 84 83 } 85 84 } 86 - 85 + ret = cpm->package.count; 87 86 kfree(buffer.pointer); 88 87 89 - return cpm->package.count; 88 + return ret; 90 89 } 91 90 92 91 static int acpi_i2c_check_resource(struct acpi_resource *ares, void *data)
+21 -18
drivers/input/joystick/xpad.c
··· 1031 1031 1032 1032 case XTYPE_XBOXONE: 1033 1033 packet->data[0] = 0x09; /* activate rumble */ 1034 - packet->data[1] = 0x08; 1034 + packet->data[1] = 0x00; 1035 1035 packet->data[2] = xpad->odata_serial++; 1036 - packet->data[3] = 0x08; /* continuous effect */ 1037 - packet->data[4] = 0x00; /* simple rumble mode */ 1038 - packet->data[5] = 0x03; /* L and R actuator only */ 1039 - packet->data[6] = 0x00; /* TODO: LT actuator */ 1040 - packet->data[7] = 0x00; /* TODO: RT actuator */ 1036 + packet->data[3] = 0x09; 1037 + packet->data[4] = 0x00; 1038 + packet->data[5] = 0x0F; 1039 + packet->data[6] = 0x00; 1040 + packet->data[7] = 0x00; 1041 1041 packet->data[8] = strong / 512; /* left actuator */ 1042 1042 packet->data[9] = weak / 512; /* right actuator */ 1043 - packet->data[10] = 0x80; /* length of pulse */ 1044 - packet->data[11] = 0x00; /* stop period of pulse */ 1043 + packet->data[10] = 0xFF; 1044 + packet->data[11] = 0x00; 1045 1045 packet->data[12] = 0x00; 1046 1046 packet->len = 13; 1047 1047 packet->pending = true; ··· 1437 1437 break; 1438 1438 } 1439 1439 1440 - if (xpad_device[i].xtype == XTYPE_XBOXONE && 1441 - intf->cur_altsetting->desc.bInterfaceNumber != 0) { 1442 - /* 1443 - * The Xbox One controller lists three interfaces all with the 1444 - * same interface class, subclass and protocol. Differentiate by 1445 - * interface number. 1446 - */ 1447 - return -ENODEV; 1448 - } 1449 - 1450 1440 xpad = kzalloc(sizeof(struct usb_xpad), GFP_KERNEL); 1451 1441 if (!xpad) 1452 1442 return -ENOMEM; ··· 1468 1478 if (intf->cur_altsetting->desc.bInterfaceClass == USB_CLASS_VENDOR_SPEC) { 1469 1479 if (intf->cur_altsetting->desc.bInterfaceProtocol == 129) 1470 1480 xpad->xtype = XTYPE_XBOX360W; 1481 + else if (intf->cur_altsetting->desc.bInterfaceProtocol == 208) 1482 + xpad->xtype = XTYPE_XBOXONE; 1471 1483 else 1472 1484 xpad->xtype = XTYPE_XBOX360; 1473 1485 } else { ··· 1482 1490 xpad->mapping |= MAP_TRIGGERS_TO_BUTTONS; 1483 1491 if (sticks_to_null) 1484 1492 xpad->mapping |= MAP_STICKS_TO_NULL; 1493 + } 1494 + 1495 + if (xpad->xtype == XTYPE_XBOXONE && 1496 + intf->cur_altsetting->desc.bInterfaceNumber != 0) { 1497 + /* 1498 + * The Xbox One controller lists three interfaces all with the 1499 + * same interface class, subclass and protocol. Differentiate by 1500 + * interface number. 1501 + */ 1502 + error = -ENODEV; 1503 + goto err_free_in_urb; 1485 1504 } 1486 1505 1487 1506 error = xpad_init_output(intf, xpad);
+1 -7
drivers/input/mouse/elantech.c
··· 1568 1568 case 5: 1569 1569 etd->hw_version = 3; 1570 1570 break; 1571 - case 6: 1572 - case 7: 1573 - case 8: 1574 - case 9: 1575 - case 10: 1576 - case 13: 1577 - case 14: 1571 + case 6 ... 14: 1578 1572 etd->hw_version = 4; 1579 1573 break; 1580 1574 default:
+2 -20
drivers/input/mouse/vmmouse.c
··· 355 355 return -ENXIO; 356 356 } 357 357 358 - if (!request_region(VMMOUSE_PROTO_PORT, 4, "vmmouse")) { 359 - psmouse_dbg(psmouse, "VMMouse port in use.\n"); 360 - return -EBUSY; 361 - } 362 - 363 358 /* Check if the device is present */ 364 359 response = ~VMMOUSE_PROTO_MAGIC; 365 360 VMMOUSE_CMD(GETVERSION, 0, version, response, dummy1, dummy2); 366 - if (response != VMMOUSE_PROTO_MAGIC || version == 0xffffffffU) { 367 - release_region(VMMOUSE_PROTO_PORT, 4); 361 + if (response != VMMOUSE_PROTO_MAGIC || version == 0xffffffffU) 368 362 return -ENXIO; 369 - } 370 363 371 364 if (set_properties) { 372 365 psmouse->vendor = VMMOUSE_VENDOR; 373 366 psmouse->name = VMMOUSE_NAME; 374 367 psmouse->model = version; 375 368 } 376 - 377 - release_region(VMMOUSE_PROTO_PORT, 4); 378 369 379 370 return 0; 380 371 } ··· 385 394 psmouse_reset(psmouse); 386 395 input_unregister_device(priv->abs_dev); 387 396 kfree(priv); 388 - release_region(VMMOUSE_PROTO_PORT, 4); 389 397 } 390 398 391 399 /** ··· 428 438 struct input_dev *rel_dev = psmouse->dev, *abs_dev; 429 439 int error; 430 440 431 - if (!request_region(VMMOUSE_PROTO_PORT, 4, "vmmouse")) { 432 - psmouse_dbg(psmouse, "VMMouse port in use.\n"); 433 - return -EBUSY; 434 - } 435 - 436 441 psmouse_reset(psmouse); 437 442 error = vmmouse_enable(psmouse); 438 443 if (error) 439 - goto release_region; 444 + return error; 440 445 441 446 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 442 447 abs_dev = input_allocate_device(); ··· 486 501 input_free_device(abs_dev); 487 502 kfree(priv); 488 503 psmouse->private = NULL; 489 - 490 - release_region: 491 - release_region(VMMOUSE_PROTO_PORT, 4); 492 504 493 505 return error; 494 506 }
+10 -1
drivers/input/touchscreen/wacom_w8001.c
··· 27 27 MODULE_DESCRIPTION(DRIVER_DESC); 28 28 MODULE_LICENSE("GPL"); 29 29 30 - #define W8001_MAX_LENGTH 11 30 + #define W8001_MAX_LENGTH 13 31 31 #define W8001_LEAD_MASK 0x80 32 32 #define W8001_LEAD_BYTE 0x80 33 33 #define W8001_TAB_MASK 0x40 ··· 339 339 w8001->idx = 0; 340 340 parse_multi_touch(w8001); 341 341 break; 342 + 343 + default: 344 + /* 345 + * ThinkPad X60 Tablet PC (pen only device) sometimes 346 + * sends invalid data packets that are larger than 347 + * W8001_PKTLEN_TPCPEN. Let's start over again. 348 + */ 349 + if (!w8001->touch_dev && w8001->idx > W8001_PKTLEN_TPCPEN - 1) 350 + w8001->idx = 0; 342 351 } 343 352 344 353 return IRQ_HANDLED;
+1 -1
drivers/iommu/amd_iommu_init.c
··· 1107 1107 break; 1108 1108 } 1109 1109 1110 + devid = e->devid; 1110 1111 DUMP_printk(" DEV_ACPI_HID(%s[%s])\t\tdevid: %02x:%02x.%x\n", 1111 1112 hid, uid, 1112 1113 PCI_BUS_NUM(devid), 1113 1114 PCI_SLOT(devid), 1114 1115 PCI_FUNC(devid)); 1115 1116 1116 - devid = e->devid; 1117 1117 flags = e->flags; 1118 1118 1119 1119 ret = add_acpi_hid_device(hid, uid, &devid, false);
+1 -1
drivers/iommu/intel-iommu.c
··· 4607 4607 if (!iommu) 4608 4608 continue; 4609 4609 4610 - for (did = 0; did < 0xffff; did++) { 4610 + for (did = 0; did < cap_ndoms(iommu->cap); did++) { 4611 4611 domain = get_iommu_domain(iommu, did); 4612 4612 4613 4613 if (!domain)
+6 -2
drivers/iommu/iova.c
··· 420 420 421 421 /* Try replenishing IOVAs by flushing rcache. */ 422 422 flushed_rcache = true; 423 + preempt_disable(); 423 424 for_each_online_cpu(cpu) 424 425 free_cpu_cached_iovas(cpu, iovad); 426 + preempt_enable(); 425 427 goto retry; 426 428 } 427 429 ··· 751 749 bool can_insert = false; 752 750 unsigned long flags; 753 751 754 - cpu_rcache = this_cpu_ptr(rcache->cpu_rcaches); 752 + cpu_rcache = get_cpu_ptr(rcache->cpu_rcaches); 755 753 spin_lock_irqsave(&cpu_rcache->lock, flags); 756 754 757 755 if (!iova_magazine_full(cpu_rcache->loaded)) { ··· 781 779 iova_magazine_push(cpu_rcache->loaded, iova_pfn); 782 780 783 781 spin_unlock_irqrestore(&cpu_rcache->lock, flags); 782 + put_cpu_ptr(rcache->cpu_rcaches); 784 783 785 784 if (mag_to_free) { 786 785 iova_magazine_free_pfns(mag_to_free, iovad); ··· 815 812 bool has_pfn = false; 816 813 unsigned long flags; 817 814 818 - cpu_rcache = this_cpu_ptr(rcache->cpu_rcaches); 815 + cpu_rcache = get_cpu_ptr(rcache->cpu_rcaches); 819 816 spin_lock_irqsave(&cpu_rcache->lock, flags); 820 817 821 818 if (!iova_magazine_empty(cpu_rcache->loaded)) { ··· 837 834 iova_pfn = iova_magazine_pop(cpu_rcache->loaded, limit_pfn); 838 835 839 836 spin_unlock_irqrestore(&cpu_rcache->lock, flags); 837 + put_cpu_ptr(rcache->cpu_rcaches); 840 838 841 839 return iova_pfn; 842 840 }
+2
drivers/mfd/max77620.c
··· 203 203 break; 204 204 case MAX77620: 205 205 fps_min_period = MAX77620_FPS_PERIOD_MIN_US; 206 + break; 206 207 default: 207 208 return -EINVAL; 208 209 } ··· 237 236 break; 238 237 case MAX77620: 239 238 fps_max_period = MAX77620_FPS_PERIOD_MAX_US; 239 + break; 240 240 default: 241 241 return -EINVAL; 242 242 }
+45 -19
drivers/net/bonding/bond_3ad.c
··· 657 657 } 658 658 } 659 659 660 + static int __agg_active_ports(struct aggregator *agg) 661 + { 662 + struct port *port; 663 + int active = 0; 664 + 665 + for (port = agg->lag_ports; port; 666 + port = port->next_port_in_aggregator) { 667 + if (port->is_enabled) 668 + active++; 669 + } 670 + 671 + return active; 672 + } 673 + 660 674 /** 661 675 * __get_agg_bandwidth - get the total bandwidth of an aggregator 662 676 * @aggregator: the aggregator we're looking at ··· 678 664 */ 679 665 static u32 __get_agg_bandwidth(struct aggregator *aggregator) 680 666 { 667 + int nports = __agg_active_ports(aggregator); 681 668 u32 bandwidth = 0; 682 669 683 - if (aggregator->num_of_ports) { 670 + if (nports) { 684 671 switch (__get_link_speed(aggregator->lag_ports)) { 685 672 case AD_LINK_SPEED_1MBPS: 686 - bandwidth = aggregator->num_of_ports; 673 + bandwidth = nports; 687 674 break; 688 675 case AD_LINK_SPEED_10MBPS: 689 - bandwidth = aggregator->num_of_ports * 10; 676 + bandwidth = nports * 10; 690 677 break; 691 678 case AD_LINK_SPEED_100MBPS: 692 - bandwidth = aggregator->num_of_ports * 100; 679 + bandwidth = nports * 100; 693 680 break; 694 681 case AD_LINK_SPEED_1000MBPS: 695 - bandwidth = aggregator->num_of_ports * 1000; 682 + bandwidth = nports * 1000; 696 683 break; 697 684 case AD_LINK_SPEED_2500MBPS: 698 - bandwidth = aggregator->num_of_ports * 2500; 685 + bandwidth = nports * 2500; 699 686 break; 700 687 case AD_LINK_SPEED_10000MBPS: 701 - bandwidth = aggregator->num_of_ports * 10000; 688 + bandwidth = nports * 10000; 702 689 break; 703 690 case AD_LINK_SPEED_20000MBPS: 704 - bandwidth = aggregator->num_of_ports * 20000; 691 + bandwidth = nports * 20000; 705 692 break; 706 693 case AD_LINK_SPEED_40000MBPS: 707 - bandwidth = aggregator->num_of_ports * 40000; 694 + bandwidth = nports * 40000; 708 695 break; 709 696 case AD_LINK_SPEED_56000MBPS: 710 - bandwidth = aggregator->num_of_ports * 56000; 697 + bandwidth = nports * 56000; 711 698 break; 712 699 case AD_LINK_SPEED_100000MBPS: 713 - bandwidth = aggregator->num_of_ports * 100000; 700 + bandwidth = nports * 100000; 714 701 break; 715 702 default: 716 703 bandwidth = 0; /* to silence the compiler */ ··· 1545 1530 1546 1531 switch (__get_agg_selection_mode(curr->lag_ports)) { 1547 1532 case BOND_AD_COUNT: 1548 - if (curr->num_of_ports > best->num_of_ports) 1533 + if (__agg_active_ports(curr) > __agg_active_ports(best)) 1549 1534 return curr; 1550 1535 1551 - if (curr->num_of_ports < best->num_of_ports) 1536 + if (__agg_active_ports(curr) < __agg_active_ports(best)) 1552 1537 return best; 1553 1538 1554 1539 /*FALLTHROUGH*/ ··· 1576 1561 if (!port) 1577 1562 return 0; 1578 1563 1579 - return netif_running(port->slave->dev) && 1580 - netif_carrier_ok(port->slave->dev); 1564 + for (port = agg->lag_ports; port; 1565 + port = port->next_port_in_aggregator) { 1566 + if (netif_running(port->slave->dev) && 1567 + netif_carrier_ok(port->slave->dev)) 1568 + return 1; 1569 + } 1570 + 1571 + return 0; 1581 1572 } 1582 1573 1583 1574 /** ··· 1631 1610 1632 1611 agg->is_active = 0; 1633 1612 1634 - if (agg->num_of_ports && agg_device_up(agg)) 1613 + if (__agg_active_ports(agg) && agg_device_up(agg)) 1635 1614 best = ad_agg_selection_test(best, agg); 1636 1615 } 1637 1616 ··· 1643 1622 * answering partner. 1644 1623 */ 1645 1624 if (active && active->lag_ports && 1646 - active->lag_ports->is_enabled && 1625 + __agg_active_ports(active) && 1647 1626 (__agg_has_partner(active) || 1648 1627 (!__agg_has_partner(active) && 1649 1628 !__agg_has_partner(best)))) { ··· 2154 2133 else 2155 2134 temp_aggregator->lag_ports = temp_port->next_port_in_aggregator; 2156 2135 temp_aggregator->num_of_ports--; 2157 - if (temp_aggregator->num_of_ports == 0) { 2136 + if (__agg_active_ports(temp_aggregator) == 0) { 2158 2137 select_new_active_agg = temp_aggregator->is_active; 2159 2138 ad_clear_agg(temp_aggregator); 2160 2139 if (select_new_active_agg) { ··· 2453 2432 */ 2454 2433 void bond_3ad_handle_link_change(struct slave *slave, char link) 2455 2434 { 2435 + struct aggregator *agg; 2456 2436 struct port *port; 2437 + bool dummy; 2457 2438 2458 2439 port = &(SLAVE_AD_INFO(slave)->port); 2459 2440 ··· 2482 2459 port->is_enabled = false; 2483 2460 ad_update_actor_keys(port, true); 2484 2461 } 2462 + agg = __get_first_agg(port); 2463 + ad_agg_selection_logic(agg, &dummy); 2464 + 2485 2465 netdev_dbg(slave->bond->dev, "Port %d changed link status to %s\n", 2486 2466 port->actor_port_number, 2487 2467 link == BOND_LINK_UP ? "UP" : "DOWN"); ··· 2525 2499 active = __get_active_agg(&(SLAVE_AD_INFO(first_slave)->aggregator)); 2526 2500 if (active) { 2527 2501 /* are enough slaves available to consider link up? */ 2528 - if (active->num_of_ports < bond->params.min_links) { 2502 + if (__agg_active_ports(active) < bond->params.min_links) { 2529 2503 if (netif_carrier_ok(bond->dev)) { 2530 2504 netif_carrier_off(bond->dev); 2531 2505 goto out;
+3 -2
drivers/net/can/at91_can.c
··· 712 712 713 713 /* upper group completed, look again in lower */ 714 714 if (priv->rx_next > get_mb_rx_low_last(priv) && 715 - quota > 0 && mb > get_mb_rx_last(priv)) { 715 + mb > get_mb_rx_last(priv)) { 716 716 priv->rx_next = get_mb_rx_first(priv); 717 - goto again; 717 + if (quota > 0) 718 + goto again; 718 719 } 719 720 720 721 return received;
+31 -7
drivers/net/can/c_can/c_can.c
··· 332 332 333 333 priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), ctrl); 334 334 335 - for (i = 0; i < frame->can_dlc; i += 2) { 336 - priv->write_reg(priv, C_CAN_IFACE(DATA1_REG, iface) + i / 2, 337 - frame->data[i] | (frame->data[i + 1] << 8)); 335 + if (priv->type == BOSCH_D_CAN) { 336 + u32 data = 0, dreg = C_CAN_IFACE(DATA1_REG, iface); 337 + 338 + for (i = 0; i < frame->can_dlc; i += 4, dreg += 2) { 339 + data = (u32)frame->data[i]; 340 + data |= (u32)frame->data[i + 1] << 8; 341 + data |= (u32)frame->data[i + 2] << 16; 342 + data |= (u32)frame->data[i + 3] << 24; 343 + priv->write_reg32(priv, dreg, data); 344 + } 345 + } else { 346 + for (i = 0; i < frame->can_dlc; i += 2) { 347 + priv->write_reg(priv, 348 + C_CAN_IFACE(DATA1_REG, iface) + i / 2, 349 + frame->data[i] | 350 + (frame->data[i + 1] << 8)); 351 + } 338 352 } 339 353 } 340 354 ··· 416 402 } else { 417 403 int i, dreg = C_CAN_IFACE(DATA1_REG, iface); 418 404 419 - for (i = 0; i < frame->can_dlc; i += 2, dreg ++) { 420 - data = priv->read_reg(priv, dreg); 421 - frame->data[i] = data; 422 - frame->data[i + 1] = data >> 8; 405 + if (priv->type == BOSCH_D_CAN) { 406 + for (i = 0; i < frame->can_dlc; i += 4, dreg += 2) { 407 + data = priv->read_reg32(priv, dreg); 408 + frame->data[i] = data; 409 + frame->data[i + 1] = data >> 8; 410 + frame->data[i + 2] = data >> 16; 411 + frame->data[i + 3] = data >> 24; 412 + } 413 + } else { 414 + for (i = 0; i < frame->can_dlc; i += 2, dreg++) { 415 + data = priv->read_reg(priv, dreg); 416 + frame->data[i] = data; 417 + frame->data[i + 1] = data >> 8; 418 + } 423 419 } 424 420 } 425 421
+9
drivers/net/can/dev.c
··· 798 798 * - control mode with CAN_CTRLMODE_FD set 799 799 */ 800 800 801 + if (!data) 802 + return 0; 803 + 801 804 if (data[IFLA_CAN_CTRLMODE]) { 802 805 struct can_ctrlmode *cm = nla_data(data[IFLA_CAN_CTRLMODE]); 803 806 ··· 1011 1008 return -EOPNOTSUPP; 1012 1009 } 1013 1010 1011 + static void can_dellink(struct net_device *dev, struct list_head *head) 1012 + { 1013 + return; 1014 + } 1015 + 1014 1016 static struct rtnl_link_ops can_link_ops __read_mostly = { 1015 1017 .kind = "can", 1016 1018 .maxtype = IFLA_CAN_MAX, ··· 1024 1016 .validate = can_validate, 1025 1017 .newlink = can_newlink, 1026 1018 .changelink = can_changelink, 1019 + .dellink = can_dellink, 1027 1020 .get_size = can_get_size, 1028 1021 .fill_info = can_fill_info, 1029 1022 .get_xstats_size = can_get_xstats_size,
+4 -1
drivers/net/can/usb/Kconfig
··· 16 16 config CAN_GS_USB 17 17 tristate "Geschwister Schneider UG interfaces" 18 18 ---help--- 19 - This driver supports the Geschwister Schneider USB/CAN devices. 19 + This driver supports the Geschwister Schneider and bytewerk.org 20 + candleLight USB CAN interfaces USB/CAN devices 20 21 If unsure choose N, 21 22 choose Y for built in support, 22 23 M to compile as module (module will be named: gs_usb). ··· 47 46 - Kvaser USBcan R 48 47 - Kvaser Leaf Light v2 49 48 - Kvaser Mini PCI Express HS 49 + - Kvaser Mini PCI Express 2xHS 50 + - Kvaser USBcan Light 2xHS 50 51 - Kvaser USBcan II HS/HS 51 52 - Kvaser USBcan II HS/LS 52 53 - Kvaser USBcan Rugged ("USBcan Rev B")
+11 -3
drivers/net/can/usb/gs_usb.c
··· 1 - /* CAN driver for Geschwister Schneider USB/CAN devices. 1 + /* CAN driver for Geschwister Schneider USB/CAN devices 2 + * and bytewerk.org candleLight USB CAN interfaces. 2 3 * 3 - * Copyright (C) 2013 Geschwister Schneider Technologie-, 4 + * Copyright (C) 2013-2016 Geschwister Schneider Technologie-, 4 5 * Entwicklungs- und Vertriebs UG (Haftungsbeschränkt). 6 + * Copyright (C) 2016 Hubert Denkmair 5 7 * 6 8 * Many thanks to all socketcan devs! 7 9 * ··· 30 28 /* Device specific constants */ 31 29 #define USB_GSUSB_1_VENDOR_ID 0x1d50 32 30 #define USB_GSUSB_1_PRODUCT_ID 0x606f 31 + 32 + #define USB_CANDLELIGHT_VENDOR_ID 0x1209 33 + #define USB_CANDLELIGHT_PRODUCT_ID 0x2323 33 34 34 35 #define GSUSB_ENDPOINT_IN 1 35 36 #define GSUSB_ENDPOINT_OUT 2 ··· 957 952 static const struct usb_device_id gs_usb_table[] = { 958 953 { USB_DEVICE_INTERFACE_NUMBER(USB_GSUSB_1_VENDOR_ID, 959 954 USB_GSUSB_1_PRODUCT_ID, 0) }, 955 + { USB_DEVICE_INTERFACE_NUMBER(USB_CANDLELIGHT_VENDOR_ID, 956 + USB_CANDLELIGHT_PRODUCT_ID, 0) }, 960 957 {} /* Terminating entry */ 961 958 }; 962 959 ··· 976 969 MODULE_AUTHOR("Maximilian Schneider <mws@schneidersoft.net>"); 977 970 MODULE_DESCRIPTION( 978 971 "Socket CAN device driver for Geschwister Schneider Technologie-, " 979 - "Entwicklungs- und Vertriebs UG. USB2.0 to CAN interfaces."); 972 + "Entwicklungs- und Vertriebs UG. USB2.0 to CAN interfaces\n" 973 + "and bytewerk.org candleLight USB CAN interfaces."); 980 974 MODULE_LICENSE("GPL v2");
+7 -1
drivers/net/can/usb/kvaser_usb.c
··· 59 59 #define USB_CAN_R_PRODUCT_ID 39 60 60 #define USB_LEAF_LITE_V2_PRODUCT_ID 288 61 61 #define USB_MINI_PCIE_HS_PRODUCT_ID 289 62 + #define USB_LEAF_LIGHT_HS_V2_OEM_PRODUCT_ID 290 63 + #define USB_USBCAN_LIGHT_2HS_PRODUCT_ID 291 64 + #define USB_MINI_PCIE_2HS_PRODUCT_ID 292 62 65 63 66 static inline bool kvaser_is_leaf(const struct usb_device_id *id) 64 67 { 65 68 return id->idProduct >= USB_LEAF_DEVEL_PRODUCT_ID && 66 - id->idProduct <= USB_MINI_PCIE_HS_PRODUCT_ID; 69 + id->idProduct <= USB_MINI_PCIE_2HS_PRODUCT_ID; 67 70 } 68 71 69 72 /* Kvaser USBCan-II devices */ ··· 540 537 .driver_info = KVASER_HAS_TXRX_ERRORS }, 541 538 { USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_LITE_V2_PRODUCT_ID) }, 542 539 { USB_DEVICE(KVASER_VENDOR_ID, USB_MINI_PCIE_HS_PRODUCT_ID) }, 540 + { USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_LIGHT_HS_V2_OEM_PRODUCT_ID) }, 541 + { USB_DEVICE(KVASER_VENDOR_ID, USB_USBCAN_LIGHT_2HS_PRODUCT_ID) }, 542 + { USB_DEVICE(KVASER_VENDOR_ID, USB_MINI_PCIE_2HS_PRODUCT_ID) }, 543 543 544 544 /* USBCANII family IDs */ 545 545 { USB_DEVICE(KVASER_VENDOR_ID, USB_USBCAN2_PRODUCT_ID),
+2 -2
drivers/net/ethernet/amd/au1000_eth.c
··· 509 509 * on the current MAC's MII bus 510 510 */ 511 511 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) 512 - if (mdiobus_get_phy(aup->mii_bus, aup->phy_addr)) { 513 - phydev = mdiobus_get_phy(aup->mii_bus, aup->phy_addr); 512 + if (mdiobus_get_phy(aup->mii_bus, phy_addr)) { 513 + phydev = mdiobus_get_phy(aup->mii_bus, phy_addr); 514 514 if (!aup->phy_search_highest_addr) 515 515 /* break out with first one found */ 516 516 break;
-4
drivers/net/ethernet/atheros/alx/alx.h
··· 96 96 unsigned int rx_ringsz; 97 97 unsigned int rxbuf_size; 98 98 99 - struct page *rx_page; 100 - unsigned int rx_page_offset; 101 - unsigned int rx_frag_size; 102 - 103 99 struct napi_struct napi; 104 100 struct alx_tx_queue txq; 105 101 struct alx_rx_queue rxq;
+14 -47
drivers/net/ethernet/atheros/alx/main.c
··· 70 70 } 71 71 } 72 72 73 - static struct sk_buff *alx_alloc_skb(struct alx_priv *alx, gfp_t gfp) 74 - { 75 - struct sk_buff *skb; 76 - struct page *page; 77 - 78 - if (alx->rx_frag_size > PAGE_SIZE) 79 - return __netdev_alloc_skb(alx->dev, alx->rxbuf_size, gfp); 80 - 81 - page = alx->rx_page; 82 - if (!page) { 83 - alx->rx_page = page = alloc_page(gfp); 84 - if (unlikely(!page)) 85 - return NULL; 86 - alx->rx_page_offset = 0; 87 - } 88 - 89 - skb = build_skb(page_address(page) + alx->rx_page_offset, 90 - alx->rx_frag_size); 91 - if (likely(skb)) { 92 - alx->rx_page_offset += alx->rx_frag_size; 93 - if (alx->rx_page_offset >= PAGE_SIZE) 94 - alx->rx_page = NULL; 95 - else 96 - get_page(page); 97 - } 98 - return skb; 99 - } 100 - 101 - 102 73 static int alx_refill_rx_ring(struct alx_priv *alx, gfp_t gfp) 103 74 { 104 75 struct alx_rx_queue *rxq = &alx->rxq; ··· 86 115 while (!cur_buf->skb && next != rxq->read_idx) { 87 116 struct alx_rfd *rfd = &rxq->rfd[cur]; 88 117 89 - skb = alx_alloc_skb(alx, gfp); 118 + /* 119 + * When DMA RX address is set to something like 120 + * 0x....fc0, it will be very likely to cause DMA 121 + * RFD overflow issue. 122 + * 123 + * To work around it, we apply rx skb with 64 bytes 124 + * longer space, and offset the address whenever 125 + * 0x....fc0 is detected. 126 + */ 127 + skb = __netdev_alloc_skb(alx->dev, alx->rxbuf_size + 64, gfp); 90 128 if (!skb) 91 129 break; 130 + 131 + if (((unsigned long)skb->data & 0xfff) == 0xfc0) 132 + skb_reserve(skb, 64); 133 + 92 134 dma = dma_map_single(&alx->hw.pdev->dev, 93 135 skb->data, alx->rxbuf_size, 94 136 DMA_FROM_DEVICE); ··· 136 152 rxq->write_idx = cur; 137 153 alx_write_mem16(&alx->hw, ALX_RFD_PIDX, cur); 138 154 } 139 - 140 155 141 156 return count; 142 157 } ··· 605 622 kfree(alx->txq.bufs); 606 623 kfree(alx->rxq.bufs); 607 624 608 - if (alx->rx_page) { 609 - put_page(alx->rx_page); 610 - alx->rx_page = NULL; 611 - } 612 - 613 625 dma_free_coherent(&alx->hw.pdev->dev, 614 626 alx->descmem.size, 615 627 alx->descmem.virt, ··· 659 681 alx->dev->name, alx); 660 682 if (!err) 661 683 goto out; 662 - 663 684 /* fall back to legacy interrupt */ 664 685 pci_disable_msi(alx->hw.pdev); 665 686 } ··· 702 725 struct pci_dev *pdev = alx->hw.pdev; 703 726 struct alx_hw *hw = &alx->hw; 704 727 int err; 705 - unsigned int head_size; 706 728 707 729 err = alx_identify_hw(alx); 708 730 if (err) { ··· 717 741 718 742 hw->smb_timer = 400; 719 743 hw->mtu = alx->dev->mtu; 720 - 721 744 alx->rxbuf_size = ALX_MAX_FRAME_LEN(hw->mtu); 722 - head_size = SKB_DATA_ALIGN(alx->rxbuf_size + NET_SKB_PAD) + 723 - SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 724 - alx->rx_frag_size = roundup_pow_of_two(head_size); 725 - 726 745 alx->tx_ringsz = 256; 727 746 alx->rx_ringsz = 512; 728 747 hw->imt = 200; ··· 819 848 { 820 849 struct alx_priv *alx = netdev_priv(netdev); 821 850 int max_frame = ALX_MAX_FRAME_LEN(mtu); 822 - unsigned int head_size; 823 851 824 852 if ((max_frame < ALX_MIN_FRAME_SIZE) || 825 853 (max_frame > ALX_MAX_FRAME_SIZE)) ··· 830 860 netdev->mtu = mtu; 831 861 alx->hw.mtu = mtu; 832 862 alx->rxbuf_size = max(max_frame, ALX_DEF_RXBUF_SIZE); 833 - head_size = SKB_DATA_ALIGN(alx->rxbuf_size + NET_SKB_PAD) + 834 - SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 835 - alx->rx_frag_size = roundup_pow_of_two(head_size); 836 863 netdev_update_features(netdev); 837 864 if (netif_running(netdev)) 838 865 alx_reinit(alx);
+5 -3
drivers/net/ethernet/broadcom/bgmac.c
··· 267 267 while (ring->start != ring->end) { 268 268 int slot_idx = ring->start % BGMAC_TX_RING_SLOTS; 269 269 struct bgmac_slot_info *slot = &ring->slots[slot_idx]; 270 - u32 ctl1; 270 + u32 ctl0, ctl1; 271 271 int len; 272 272 273 273 if (slot_idx == empty_slot) 274 274 break; 275 275 276 + ctl0 = le32_to_cpu(ring->cpu_base[slot_idx].ctl0); 276 277 ctl1 = le32_to_cpu(ring->cpu_base[slot_idx].ctl1); 277 278 len = ctl1 & BGMAC_DESC_CTL1_LEN; 278 - if (ctl1 & BGMAC_DESC_CTL0_SOF) 279 + if (ctl0 & BGMAC_DESC_CTL0_SOF) 279 280 /* Unmap no longer used buffer */ 280 281 dma_unmap_single(dma_dev, slot->dma_addr, len, 281 282 DMA_TO_DEVICE); ··· 1313 1312 1314 1313 phy_start(bgmac->phy_dev); 1315 1314 1316 - netif_carrier_on(net_dev); 1315 + netif_start_queue(net_dev); 1316 + 1317 1317 return 0; 1318 1318 } 1319 1319
+13 -3
drivers/net/ethernet/cavium/thunder/nic_main.c
··· 499 499 u32 rr_quantum; 500 500 u8 sq_idx = sq->sq_num; 501 501 u8 pqs_vnic; 502 + int svf; 502 503 503 504 if (sq->sqs_mode) 504 505 pqs_vnic = nic->pqs_vf[vnic]; ··· 512 511 /* 24 bytes for FCS, IPG and preamble */ 513 512 rr_quantum = ((NIC_HW_MAX_FRS + 24) / 4); 514 513 515 - tl4 = (lmac * NIC_TL4_PER_LMAC) + (bgx * NIC_TL4_PER_BGX); 514 + if (!sq->sqs_mode) { 515 + tl4 = (lmac * NIC_TL4_PER_LMAC) + (bgx * NIC_TL4_PER_BGX); 516 + } else { 517 + for (svf = 0; svf < MAX_SQS_PER_VF; svf++) { 518 + if (nic->vf_sqs[pqs_vnic][svf] == vnic) 519 + break; 520 + } 521 + tl4 = (MAX_LMAC_PER_BGX * NIC_TL4_PER_LMAC); 522 + tl4 += (lmac * NIC_TL4_PER_LMAC * MAX_SQS_PER_VF); 523 + tl4 += (svf * NIC_TL4_PER_LMAC); 524 + tl4 += (bgx * NIC_TL4_PER_BGX); 525 + } 516 526 tl4 += sq_idx; 517 - if (sq->sqs_mode) 518 - tl4 += vnic * 8; 519 527 520 528 tl3 = tl4 / (NIC_MAX_TL4 / NIC_MAX_TL3); 521 529 nic_reg_write(nic, NIC_PF_QSET_0_127_SQ_0_7_CFG2 |
+60 -31
drivers/net/ethernet/cavium/thunder/thunder_bgx.c
··· 551 551 } 552 552 553 553 /* Clear rcvflt bit (latching high) and read it back */ 554 - bgx_reg_modify(bgx, lmacid, BGX_SPUX_STATUS2, SPU_STATUS2_RCVFLT); 554 + if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) 555 + bgx_reg_modify(bgx, lmacid, 556 + BGX_SPUX_STATUS2, SPU_STATUS2_RCVFLT); 555 557 if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) { 556 558 dev_err(&bgx->pdev->dev, "Receive fault, retry training\n"); 557 559 if (bgx->use_training) { ··· 572 570 return -1; 573 571 } 574 572 575 - /* Wait for MAC RX to be ready */ 576 - if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_RX_CTL, 577 - SMU_RX_CTL_STATUS, true)) { 578 - dev_err(&bgx->pdev->dev, "SMU RX link not okay\n"); 579 - return -1; 580 - } 581 - 582 573 /* Wait for BGX RX to be idle */ 583 574 if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_CTL, SMU_CTL_RX_IDLE, false)) { 584 575 dev_err(&bgx->pdev->dev, "SMU RX not idle\n"); ··· 584 589 return -1; 585 590 } 586 591 587 - if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) { 588 - dev_err(&bgx->pdev->dev, "Receive fault\n"); 589 - return -1; 590 - } 591 - 592 - /* Receive link is latching low. Force it high and verify it */ 593 - bgx_reg_modify(bgx, lmacid, BGX_SPUX_STATUS1, SPU_STATUS1_RCV_LNK); 594 - if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_STATUS1, 595 - SPU_STATUS1_RCV_LNK, false)) { 596 - dev_err(&bgx->pdev->dev, "SPU receive link down\n"); 597 - return -1; 598 - } 599 - 592 + /* Clear receive packet disable */ 600 593 cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_MISC_CONTROL); 601 594 cfg &= ~SPU_MISC_CTL_RX_DIS; 602 595 bgx_reg_write(bgx, lmacid, BGX_SPUX_MISC_CONTROL, cfg); 603 - return 0; 596 + 597 + /* Check for MAC RX faults */ 598 + cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_RX_CTL); 599 + /* 0 - Link is okay, 1 - Local fault, 2 - Remote fault */ 600 + cfg &= SMU_RX_CTL_STATUS; 601 + if (!cfg) 602 + return 0; 603 + 604 + /* Rx local/remote fault seen. 605 + * Do lmac reinit to see if condition recovers 606 + */ 607 + bgx_lmac_xaui_init(bgx, lmacid, bgx->lmac_type); 608 + 609 + return -1; 604 610 } 605 611 606 612 static void bgx_poll_for_link(struct work_struct *work) 607 613 { 608 614 struct lmac *lmac; 609 - u64 link; 615 + u64 spu_link, smu_link; 610 616 611 617 lmac = container_of(work, struct lmac, dwork.work); 612 618 ··· 617 621 bgx_poll_reg(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1, 618 622 SPU_STATUS1_RCV_LNK, false); 619 623 620 - link = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1); 621 - if (link & SPU_STATUS1_RCV_LNK) { 624 + spu_link = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1); 625 + smu_link = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SMUX_RX_CTL); 626 + 627 + if ((spu_link & SPU_STATUS1_RCV_LNK) && 628 + !(smu_link & SMU_RX_CTL_STATUS)) { 622 629 lmac->link_up = 1; 623 630 if (lmac->bgx->lmac_type == BGX_MODE_XLAUI) 624 631 lmac->last_speed = 40000; ··· 635 636 } 636 637 637 638 if (lmac->last_link != lmac->link_up) { 639 + if (lmac->link_up) { 640 + if (bgx_xaui_check_link(lmac)) { 641 + /* Errors, clear link_up state */ 642 + lmac->link_up = 0; 643 + lmac->last_speed = SPEED_UNKNOWN; 644 + lmac->last_duplex = DUPLEX_UNKNOWN; 645 + } 646 + } 638 647 lmac->last_link = lmac->link_up; 639 - if (lmac->link_up) 640 - bgx_xaui_check_link(lmac); 641 648 } 642 649 643 650 queue_delayed_work(lmac->check_link, &lmac->dwork, HZ * 2); ··· 715 710 static void bgx_lmac_disable(struct bgx *bgx, u8 lmacid) 716 711 { 717 712 struct lmac *lmac; 718 - u64 cmrx_cfg; 713 + u64 cfg; 719 714 720 715 lmac = &bgx->lmac[lmacid]; 721 716 if (lmac->check_link) { ··· 724 719 destroy_workqueue(lmac->check_link); 725 720 } 726 721 727 - cmrx_cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 728 - cmrx_cfg &= ~(1 << 15); 729 - bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cmrx_cfg); 722 + /* Disable packet reception */ 723 + cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 724 + cfg &= ~CMR_PKT_RX_EN; 725 + bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 726 + 727 + /* Give chance for Rx/Tx FIFO to get drained */ 728 + bgx_poll_reg(bgx, lmacid, BGX_CMRX_RX_FIFO_LEN, (u64)0x1FFF, true); 729 + bgx_poll_reg(bgx, lmacid, BGX_CMRX_TX_FIFO_LEN, (u64)0x3FFF, true); 730 + 731 + /* Disable packet transmission */ 732 + cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 733 + cfg &= ~CMR_PKT_TX_EN; 734 + bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 735 + 736 + /* Disable serdes lanes */ 737 + if (!lmac->is_sgmii) 738 + bgx_reg_modify(bgx, lmacid, 739 + BGX_SPUX_CONTROL1, SPU_CTL_LOW_POWER); 740 + else 741 + bgx_reg_modify(bgx, lmacid, 742 + BGX_GMP_PCS_MRX_CTL, PCS_MRX_CTL_PWR_DN); 743 + 744 + /* Disable LMAC */ 745 + cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 746 + cfg &= ~CMR_EN; 747 + bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 748 + 730 749 bgx_flush_dmac_addrs(bgx, lmacid); 731 750 732 751 if ((bgx->lmac_type != BGX_MODE_XFI) &&
+2
drivers/net/ethernet/cavium/thunder/thunder_bgx.h
··· 41 41 #define BGX_CMRX_RX_STAT10 0xC0 42 42 #define BGX_CMRX_RX_BP_DROP 0xC8 43 43 #define BGX_CMRX_RX_DMAC_CTL 0x0E8 44 + #define BGX_CMRX_RX_FIFO_LEN 0x108 44 45 #define BGX_CMR_RX_DMACX_CAM 0x200 45 46 #define RX_DMACX_CAM_EN BIT_ULL(48) 46 47 #define RX_DMACX_CAM_LMACID(x) (x << 49) ··· 51 50 #define BGX_CMR_CHAN_MSK_AND 0x450 52 51 #define BGX_CMR_BIST_STATUS 0x460 53 52 #define BGX_CMR_RX_LMACS 0x468 53 + #define BGX_CMRX_TX_FIFO_LEN 0x518 54 54 #define BGX_CMRX_TX_STAT0 0x600 55 55 #define BGX_CMRX_TX_STAT1 0x608 56 56 #define BGX_CMRX_TX_STAT2 0x610
+7 -7
drivers/net/ethernet/ibm/ibmvnic.c
··· 2121 2121 struct ibmvnic_adapter *adapter) 2122 2122 { 2123 2123 struct device *dev = &adapter->vdev->dev; 2124 - struct ibmvnic_error_buff *error_buff; 2124 + struct ibmvnic_error_buff *error_buff, *tmp; 2125 2125 unsigned long flags; 2126 2126 bool found = false; 2127 2127 int i; ··· 2133 2133 } 2134 2134 2135 2135 spin_lock_irqsave(&adapter->error_list_lock, flags); 2136 - list_for_each_entry(error_buff, &adapter->errors, list) 2136 + list_for_each_entry_safe(error_buff, tmp, &adapter->errors, list) 2137 2137 if (error_buff->error_id == crq->request_error_rsp.error_id) { 2138 2138 found = true; 2139 2139 list_del(&error_buff->list); ··· 3141 3141 3142 3142 static void ibmvnic_free_inflight(struct ibmvnic_adapter *adapter) 3143 3143 { 3144 - struct ibmvnic_inflight_cmd *inflight_cmd; 3144 + struct ibmvnic_inflight_cmd *inflight_cmd, *tmp1; 3145 3145 struct device *dev = &adapter->vdev->dev; 3146 - struct ibmvnic_error_buff *error_buff; 3146 + struct ibmvnic_error_buff *error_buff, *tmp2; 3147 3147 unsigned long flags; 3148 3148 unsigned long flags2; 3149 3149 3150 3150 spin_lock_irqsave(&adapter->inflight_lock, flags); 3151 - list_for_each_entry(inflight_cmd, &adapter->inflight, list) { 3151 + list_for_each_entry_safe(inflight_cmd, tmp1, &adapter->inflight, list) { 3152 3152 switch (inflight_cmd->crq.generic.cmd) { 3153 3153 case LOGIN: 3154 3154 dma_unmap_single(dev, adapter->login_buf_token, ··· 3165 3165 break; 3166 3166 case REQUEST_ERROR_INFO: 3167 3167 spin_lock_irqsave(&adapter->error_list_lock, flags2); 3168 - list_for_each_entry(error_buff, &adapter->errors, 3169 - list) { 3168 + list_for_each_entry_safe(error_buff, tmp2, 3169 + &adapter->errors, list) { 3170 3170 dma_unmap_single(dev, error_buff->dma, 3171 3171 error_buff->len, 3172 3172 DMA_FROM_DEVICE);
+13 -2
drivers/net/ethernet/intel/e1000e/netdev.c
··· 154 154 writel(val, hw->hw_addr + reg); 155 155 } 156 156 157 + static bool e1000e_vlan_used(struct e1000_adapter *adapter) 158 + { 159 + u16 vid; 160 + 161 + for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) 162 + return true; 163 + 164 + return false; 165 + } 166 + 157 167 /** 158 168 * e1000_regdump - register printout routine 159 169 * @hw: pointer to the HW structure ··· 2799 2789 } 2800 2790 2801 2791 /** 2802 - * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping 2792 + * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping 2803 2793 * @adapter: board private structure to initialize 2804 2794 **/ 2805 2795 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter) ··· 3453 3443 3454 3444 ew32(RCTL, rctl); 3455 3445 3456 - if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) 3446 + if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX || 3447 + e1000e_vlan_used(adapter)) 3457 3448 e1000e_vlan_strip_enable(adapter); 3458 3449 else 3459 3450 e1000e_vlan_strip_disable(adapter);
+42 -19
drivers/net/ethernet/mediatek/mtk_eth_soc.c
··· 481 481 /* the qdma core needs scratch memory to be setup */ 482 482 static int mtk_init_fq_dma(struct mtk_eth *eth) 483 483 { 484 - dma_addr_t phy_ring_head, phy_ring_tail; 484 + dma_addr_t phy_ring_tail; 485 485 int cnt = MTK_DMA_SIZE; 486 486 dma_addr_t dma_addr; 487 487 int i; 488 488 489 489 eth->scratch_ring = dma_alloc_coherent(eth->dev, 490 490 cnt * sizeof(struct mtk_tx_dma), 491 - &phy_ring_head, 491 + &eth->phy_scratch_ring, 492 492 GFP_ATOMIC | __GFP_ZERO); 493 493 if (unlikely(!eth->scratch_ring)) 494 494 return -ENOMEM; 495 495 496 496 eth->scratch_head = kcalloc(cnt, MTK_QDMA_PAGE_SIZE, 497 497 GFP_KERNEL); 498 + if (unlikely(!eth->scratch_head)) 499 + return -ENOMEM; 500 + 498 501 dma_addr = dma_map_single(eth->dev, 499 502 eth->scratch_head, cnt * MTK_QDMA_PAGE_SIZE, 500 503 DMA_FROM_DEVICE); ··· 505 502 return -ENOMEM; 506 503 507 504 memset(eth->scratch_ring, 0x0, sizeof(struct mtk_tx_dma) * cnt); 508 - phy_ring_tail = phy_ring_head + 505 + phy_ring_tail = eth->phy_scratch_ring + 509 506 (sizeof(struct mtk_tx_dma) * (cnt - 1)); 510 507 511 508 for (i = 0; i < cnt; i++) { 512 509 eth->scratch_ring[i].txd1 = 513 510 (dma_addr + (i * MTK_QDMA_PAGE_SIZE)); 514 511 if (i < cnt - 1) 515 - eth->scratch_ring[i].txd2 = (phy_ring_head + 512 + eth->scratch_ring[i].txd2 = (eth->phy_scratch_ring + 516 513 ((i + 1) * sizeof(struct mtk_tx_dma))); 517 514 eth->scratch_ring[i].txd3 = TX_DMA_SDL(MTK_QDMA_PAGE_SIZE); 518 515 } 519 516 520 - mtk_w32(eth, phy_ring_head, MTK_QDMA_FQ_HEAD); 517 + mtk_w32(eth, eth->phy_scratch_ring, MTK_QDMA_FQ_HEAD); 521 518 mtk_w32(eth, phy_ring_tail, MTK_QDMA_FQ_TAIL); 522 519 mtk_w32(eth, (cnt << 16) | cnt, MTK_QDMA_FQ_CNT); 523 520 mtk_w32(eth, MTK_QDMA_PAGE_SIZE << 16, MTK_QDMA_FQ_BLEN); ··· 674 671 675 672 err_dma: 676 673 do { 677 - tx_buf = mtk_desc_to_tx_buf(ring, txd); 674 + tx_buf = mtk_desc_to_tx_buf(ring, itxd); 678 675 679 676 /* unmap dma */ 680 677 mtk_tx_unmap(&dev->dev, tx_buf); ··· 702 699 } 703 700 704 701 return nfrags; 702 + } 703 + 704 + static int mtk_queue_stopped(struct mtk_eth *eth) 705 + { 706 + int i; 707 + 708 + for (i = 0; i < MTK_MAC_COUNT; i++) { 709 + if (!eth->netdev[i]) 710 + continue; 711 + if (netif_queue_stopped(eth->netdev[i])) 712 + return 1; 713 + } 714 + 715 + return 0; 705 716 } 706 717 707 718 static void mtk_wake_queue(struct mtk_eth *eth) ··· 783 766 if (mtk_tx_map(skb, dev, tx_num, ring, gso) < 0) 784 767 goto drop; 785 768 786 - if (unlikely(atomic_read(&ring->free_count) <= ring->thresh)) { 769 + if (unlikely(atomic_read(&ring->free_count) <= ring->thresh)) 787 770 mtk_stop_queue(eth); 788 - if (unlikely(atomic_read(&ring->free_count) > 789 - ring->thresh)) 790 - mtk_wake_queue(eth); 791 - } 771 + 792 772 spin_unlock_irqrestore(&eth->page_lock, flags); 793 773 794 774 return NETDEV_TX_OK; ··· 840 826 DMA_FROM_DEVICE); 841 827 if (unlikely(dma_mapping_error(&netdev->dev, dma_addr))) { 842 828 skb_free_frag(new_data); 829 + netdev->stats.rx_dropped++; 843 830 goto release_desc; 844 831 } 845 832 ··· 848 833 skb = build_skb(data, ring->frag_size); 849 834 if (unlikely(!skb)) { 850 835 put_page(virt_to_head_page(new_data)); 836 + netdev->stats.rx_dropped++; 851 837 goto release_desc; 852 838 } 853 839 skb_reserve(skb, NET_SKB_PAD + NET_IP_ALIGN); ··· 937 921 } 938 922 mtk_tx_unmap(eth->dev, tx_buf); 939 923 940 - ring->last_free->txd2 = next_cpu; 941 924 ring->last_free = desc; 942 925 atomic_inc(&ring->free_count); 943 926 ··· 961 946 if (!total) 962 947 return 0; 963 948 964 - if (atomic_read(&ring->free_count) > ring->thresh) 949 + if (mtk_queue_stopped(eth) && 950 + (atomic_read(&ring->free_count) > ring->thresh)) 965 951 mtk_wake_queue(eth); 966 952 967 953 return total; ··· 1043 1027 1044 1028 atomic_set(&ring->free_count, MTK_DMA_SIZE - 2); 1045 1029 ring->next_free = &ring->dma[0]; 1046 - ring->last_free = &ring->dma[MTK_DMA_SIZE - 2]; 1047 - ring->thresh = max((unsigned long)MTK_DMA_SIZE >> 2, 1048 - MAX_SKB_FRAGS); 1030 + ring->last_free = &ring->dma[MTK_DMA_SIZE - 1]; 1031 + ring->thresh = MAX_SKB_FRAGS; 1049 1032 1050 1033 /* make sure that all changes to the dma ring are flushed before we 1051 1034 * continue ··· 1222 1207 for (i = 0; i < MTK_MAC_COUNT; i++) 1223 1208 if (eth->netdev[i]) 1224 1209 netdev_reset_queue(eth->netdev[i]); 1210 + if (eth->scratch_ring) { 1211 + dma_free_coherent(eth->dev, 1212 + MTK_DMA_SIZE * sizeof(struct mtk_tx_dma), 1213 + eth->scratch_ring, 1214 + eth->phy_scratch_ring); 1215 + eth->scratch_ring = NULL; 1216 + eth->phy_scratch_ring = 0; 1217 + } 1225 1218 mtk_tx_clean(eth); 1226 1219 mtk_rx_clean(eth); 1227 1220 kfree(eth->scratch_head); ··· 1292 1269 mtk_w32(eth, 1293 1270 MTK_TX_WB_DDONE | MTK_RX_DMA_EN | MTK_TX_DMA_EN | 1294 1271 MTK_RX_2B_OFFSET | MTK_DMA_SIZE_16DWORDS | 1295 - MTK_RX_BT_32DWORDS, 1272 + MTK_RX_BT_32DWORDS | MTK_NDP_CO_PRO, 1296 1273 MTK_QDMA_GLO_CFG); 1297 1274 1298 1275 return 0; ··· 1406 1383 1407 1384 /* disable delay and normal interrupt */ 1408 1385 mtk_w32(eth, 0, MTK_QDMA_DELAY_INT); 1409 - mtk_irq_disable(eth, MTK_TX_DONE_INT | MTK_RX_DONE_INT); 1386 + mtk_irq_disable(eth, ~0); 1410 1387 mtk_w32(eth, RST_GL_PSE, MTK_RST_GL); 1411 1388 mtk_w32(eth, 0, MTK_RST_GL); 1412 1389 ··· 1720 1697 mac->hw_stats->reg_offset = id * MTK_STAT_OFFSET; 1721 1698 1722 1699 SET_NETDEV_DEV(eth->netdev[id], eth->dev); 1723 - eth->netdev[id]->watchdog_timeo = HZ; 1700 + eth->netdev[id]->watchdog_timeo = 5 * HZ; 1724 1701 eth->netdev[id]->netdev_ops = &mtk_netdev_ops; 1725 1702 eth->netdev[id]->base_addr = (unsigned long)eth->base; 1726 1703 eth->netdev[id]->vlan_features = MTK_HW_FEATURES &
+3
drivers/net/ethernet/mediatek/mtk_eth_soc.h
··· 91 91 #define MTK_QDMA_GLO_CFG 0x1A04 92 92 #define MTK_RX_2B_OFFSET BIT(31) 93 93 #define MTK_RX_BT_32DWORDS (3 << 11) 94 + #define MTK_NDP_CO_PRO BIT(10) 94 95 #define MTK_TX_WB_DDONE BIT(6) 95 96 #define MTK_DMA_SIZE_16DWORDS (2 << 4) 96 97 #define MTK_RX_DMA_BUSY BIT(3) ··· 358 357 * @rx_ring: Pointer to the memore holding info about the RX ring 359 358 * @rx_napi: The NAPI struct 360 359 * @scratch_ring: Newer SoCs need memory for a second HW managed TX ring 360 + * @phy_scratch_ring: physical address of scratch_ring 361 361 * @scratch_head: The scratch memory that scratch_ring points to. 362 362 * @clk_ethif: The ethif clock 363 363 * @clk_esw: The switch clock ··· 386 384 struct mtk_rx_ring rx_ring; 387 385 struct napi_struct rx_napi; 388 386 struct mtk_tx_dma *scratch_ring; 387 + dma_addr_t phy_scratch_ring; 389 388 void *scratch_head; 390 389 struct clk *clk_ethif; 391 390 struct clk *clk_esw;
-1
drivers/net/ethernet/mellanox/mlx4/cmd.c
··· 2597 2597 priv->cmd.free_head = 0; 2598 2598 2599 2599 sema_init(&priv->cmd.event_sem, priv->cmd.max_cmds); 2600 - spin_lock_init(&priv->cmd.context_lock); 2601 2600 2602 2601 for (priv->cmd.token_mask = 1; 2603 2602 priv->cmd.token_mask < priv->cmd.max_cmds;
+34 -12
drivers/net/ethernet/mellanox/mlx4/en_netdev.c
··· 406 406 mutex_lock(&mdev->state_lock); 407 407 if (mdev->device_up && priv->port_up) { 408 408 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); 409 - if (err) 409 + if (err) { 410 410 en_err(priv, "Failed configuring VLAN filter\n"); 411 + goto out; 412 + } 411 413 } 412 - if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx)) 413 - en_dbg(HW, priv, "failed adding vlan %d\n", vid); 414 - mutex_unlock(&mdev->state_lock); 414 + err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx); 415 + if (err) 416 + en_dbg(HW, priv, "Failed adding vlan %d\n", vid); 415 417 416 - return 0; 418 + out: 419 + mutex_unlock(&mdev->state_lock); 420 + return err; 417 421 } 418 422 419 423 static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, ··· 425 421 { 426 422 struct mlx4_en_priv *priv = netdev_priv(dev); 427 423 struct mlx4_en_dev *mdev = priv->mdev; 428 - int err; 424 + int err = 0; 429 425 430 426 en_dbg(HW, priv, "Killing VID:%d\n", vid); 431 427 ··· 442 438 } 443 439 mutex_unlock(&mdev->state_lock); 444 440 445 - return 0; 441 + return err; 446 442 } 447 443 448 444 static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac) ··· 2036 2032 return -ENOMEM; 2037 2033 } 2038 2034 2035 + static void mlx4_en_shutdown(struct net_device *dev) 2036 + { 2037 + rtnl_lock(); 2038 + netif_device_detach(dev); 2039 + mlx4_en_close(dev); 2040 + rtnl_unlock(); 2041 + } 2039 2042 2040 2043 void mlx4_en_destroy_netdev(struct net_device *dev) 2041 2044 { 2042 2045 struct mlx4_en_priv *priv = netdev_priv(dev); 2043 2046 struct mlx4_en_dev *mdev = priv->mdev; 2047 + bool shutdown = mdev->dev->persist->interface_state & 2048 + MLX4_INTERFACE_STATE_SHUTDOWN; 2044 2049 2045 2050 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port); 2046 2051 ··· 2057 2044 if (priv->registered) { 2058 2045 devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev, 2059 2046 priv->port)); 2060 - unregister_netdev(dev); 2047 + if (shutdown) 2048 + mlx4_en_shutdown(dev); 2049 + else 2050 + unregister_netdev(dev); 2061 2051 } 2062 2052 2063 2053 if (priv->allocated) ··· 2085 2069 kfree(priv->tx_ring); 2086 2070 kfree(priv->tx_cq); 2087 2071 2088 - free_netdev(dev); 2072 + if (!shutdown) 2073 + free_netdev(dev); 2089 2074 } 2090 2075 2091 2076 static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu) ··· 2464 2447 * strip that feature if this is an IPv6 encapsulated frame. 2465 2448 */ 2466 2449 if (skb->encapsulation && 2467 - (skb->ip_summed == CHECKSUM_PARTIAL) && 2468 - (ip_hdr(skb)->version != 4)) 2469 - features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); 2450 + (skb->ip_summed == CHECKSUM_PARTIAL)) { 2451 + struct mlx4_en_priv *priv = netdev_priv(dev); 2452 + 2453 + if (!priv->vxlan_port || 2454 + (ip_hdr(skb)->version != 4) || 2455 + (udp_hdr(skb)->dest != priv->vxlan_port)) 2456 + features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); 2457 + } 2470 2458 2471 2459 return features; 2472 2460 }
+5 -1
drivers/net/ethernet/mellanox/mlx4/main.c
··· 3222 3222 3223 3223 INIT_LIST_HEAD(&priv->pgdir_list); 3224 3224 mutex_init(&priv->pgdir_mutex); 3225 + spin_lock_init(&priv->cmd.context_lock); 3225 3226 3226 3227 INIT_LIST_HEAD(&priv->bf_list); 3227 3228 mutex_init(&priv->bf_mutex); ··· 4135 4134 4136 4135 mlx4_info(persist->dev, "mlx4_shutdown was called\n"); 4137 4136 mutex_lock(&persist->interface_state_mutex); 4138 - if (persist->interface_state & MLX4_INTERFACE_STATE_UP) 4137 + if (persist->interface_state & MLX4_INTERFACE_STATE_UP) { 4138 + /* Notify mlx4 clients that the kernel is being shut down */ 4139 + persist->interface_state |= MLX4_INTERFACE_STATE_SHUTDOWN; 4139 4140 mlx4_unload_one(pdev); 4141 + } 4140 4142 mutex_unlock(&persist->interface_state_mutex); 4141 4143 } 4142 4144
+1
drivers/net/ethernet/mellanox/mlx5/core/cmd.c
··· 545 545 MLX5_COMMAND_STR_CASE(ALLOC_FLOW_COUNTER); 546 546 MLX5_COMMAND_STR_CASE(DEALLOC_FLOW_COUNTER); 547 547 MLX5_COMMAND_STR_CASE(QUERY_FLOW_COUNTER); 548 + MLX5_COMMAND_STR_CASE(MODIFY_FLOW_TABLE); 548 549 default: return "unknown command opcode"; 549 550 } 550 551 }
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/en.h
··· 401 401 }; 402 402 403 403 enum { 404 - MLX5E_STATE_ASYNC_EVENTS_ENABLE, 404 + MLX5E_STATE_ASYNC_EVENTS_ENABLED, 405 405 MLX5E_STATE_OPENED, 406 406 MLX5E_STATE_DESTROYING, 407 407 };
+17 -17
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
··· 184 184 #define MLX5E_NUM_SQ_STATS(priv) \ 185 185 (NUM_SQ_STATS * priv->params.num_channels * priv->params.num_tc * \ 186 186 test_bit(MLX5E_STATE_OPENED, &priv->state)) 187 - #define MLX5E_NUM_PFC_COUNTERS(priv) hweight8(mlx5e_query_pfc_combined(priv)) 187 + #define MLX5E_NUM_PFC_COUNTERS(priv) \ 188 + (hweight8(mlx5e_query_pfc_combined(priv)) * \ 189 + NUM_PPORT_PER_PRIO_PFC_COUNTERS) 188 190 189 191 static int mlx5e_get_sset_count(struct net_device *dev, int sset) 190 192 { ··· 213 211 214 212 /* SW counters */ 215 213 for (i = 0; i < NUM_SW_COUNTERS; i++) 216 - strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].name); 214 + strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].format); 217 215 218 216 /* Q counters */ 219 217 for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++) 220 - strcpy(data + (idx++) * ETH_GSTRING_LEN, q_stats_desc[i].name); 218 + strcpy(data + (idx++) * ETH_GSTRING_LEN, q_stats_desc[i].format); 221 219 222 220 /* VPORT counters */ 223 221 for (i = 0; i < NUM_VPORT_COUNTERS; i++) 224 222 strcpy(data + (idx++) * ETH_GSTRING_LEN, 225 - vport_stats_desc[i].name); 223 + vport_stats_desc[i].format); 226 224 227 225 /* PPORT counters */ 228 226 for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++) 229 227 strcpy(data + (idx++) * ETH_GSTRING_LEN, 230 - pport_802_3_stats_desc[i].name); 228 + pport_802_3_stats_desc[i].format); 231 229 232 230 for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++) 233 231 strcpy(data + (idx++) * ETH_GSTRING_LEN, 234 - pport_2863_stats_desc[i].name); 232 + pport_2863_stats_desc[i].format); 235 233 236 234 for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++) 237 235 strcpy(data + (idx++) * ETH_GSTRING_LEN, 238 - pport_2819_stats_desc[i].name); 236 + pport_2819_stats_desc[i].format); 239 237 240 238 for (prio = 0; prio < NUM_PPORT_PRIO; prio++) { 241 239 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++) 242 - sprintf(data + (idx++) * ETH_GSTRING_LEN, "prio%d_%s", 243 - prio, 244 - pport_per_prio_traffic_stats_desc[i].name); 240 + sprintf(data + (idx++) * ETH_GSTRING_LEN, 241 + pport_per_prio_traffic_stats_desc[i].format, prio); 245 242 } 246 243 247 244 pfc_combined = mlx5e_query_pfc_combined(priv); 248 245 for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) { 249 246 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) { 250 - sprintf(data + (idx++) * ETH_GSTRING_LEN, "prio%d_%s", 251 - prio, pport_per_prio_pfc_stats_desc[i].name); 247 + sprintf(data + (idx++) * ETH_GSTRING_LEN, 248 + pport_per_prio_pfc_stats_desc[i].format, prio); 252 249 } 253 250 } 254 251 ··· 257 256 /* per channel counters */ 258 257 for (i = 0; i < priv->params.num_channels; i++) 259 258 for (j = 0; j < NUM_RQ_STATS; j++) 260 - sprintf(data + (idx++) * ETH_GSTRING_LEN, "rx%d_%s", i, 261 - rq_stats_desc[j].name); 259 + sprintf(data + (idx++) * ETH_GSTRING_LEN, 260 + rq_stats_desc[j].format, i); 262 261 263 262 for (tc = 0; tc < priv->params.num_tc; tc++) 264 263 for (i = 0; i < priv->params.num_channels; i++) 265 264 for (j = 0; j < NUM_SQ_STATS; j++) 266 265 sprintf(data + (idx++) * ETH_GSTRING_LEN, 267 - "tx%d_%s", 268 - priv->channeltc_to_txq_map[i][tc], 269 - sq_stats_desc[j].name); 266 + sq_stats_desc[j].format, 267 + priv->channeltc_to_txq_map[i][tc]); 270 268 } 271 269 272 270 static void mlx5e_get_strings(struct net_device *dev,
+17 -18
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
··· 105 105 106 106 s->rx_packets += rq_stats->packets; 107 107 s->rx_bytes += rq_stats->bytes; 108 - s->lro_packets += rq_stats->lro_packets; 109 - s->lro_bytes += rq_stats->lro_bytes; 108 + s->rx_lro_packets += rq_stats->lro_packets; 109 + s->rx_lro_bytes += rq_stats->lro_bytes; 110 110 s->rx_csum_none += rq_stats->csum_none; 111 - s->rx_csum_sw += rq_stats->csum_sw; 112 - s->rx_csum_inner += rq_stats->csum_inner; 111 + s->rx_csum_complete += rq_stats->csum_complete; 112 + s->rx_csum_unnecessary_inner += rq_stats->csum_unnecessary_inner; 113 113 s->rx_wqe_err += rq_stats->wqe_err; 114 114 s->rx_mpwqe_filler += rq_stats->mpwqe_filler; 115 115 s->rx_mpwqe_frag += rq_stats->mpwqe_frag; ··· 122 122 123 123 s->tx_packets += sq_stats->packets; 124 124 s->tx_bytes += sq_stats->bytes; 125 - s->tso_packets += sq_stats->tso_packets; 126 - s->tso_bytes += sq_stats->tso_bytes; 127 - s->tso_inner_packets += sq_stats->tso_inner_packets; 128 - s->tso_inner_bytes += sq_stats->tso_inner_bytes; 125 + s->tx_tso_packets += sq_stats->tso_packets; 126 + s->tx_tso_bytes += sq_stats->tso_bytes; 127 + s->tx_tso_inner_packets += sq_stats->tso_inner_packets; 128 + s->tx_tso_inner_bytes += sq_stats->tso_inner_bytes; 129 129 s->tx_queue_stopped += sq_stats->stopped; 130 130 s->tx_queue_wake += sq_stats->wake; 131 131 s->tx_queue_dropped += sq_stats->dropped; 132 - s->tx_csum_inner += sq_stats->csum_offload_inner; 133 - tx_offload_none += sq_stats->csum_offload_none; 132 + s->tx_csum_partial_inner += sq_stats->csum_partial_inner; 133 + tx_offload_none += sq_stats->csum_none; 134 134 } 135 135 } 136 136 137 137 /* Update calculated offload counters */ 138 - s->tx_csum_offload = s->tx_packets - tx_offload_none - s->tx_csum_inner; 139 - s->rx_csum_good = s->rx_packets - s->rx_csum_none - 140 - s->rx_csum_sw; 138 + s->tx_csum_partial = s->tx_packets - tx_offload_none - s->tx_csum_partial_inner; 139 + s->rx_csum_unnecessary = s->rx_packets - s->rx_csum_none - s->rx_csum_complete; 141 140 142 - s->link_down_events = MLX5_GET(ppcnt_reg, 141 + s->link_down_events_phy = MLX5_GET(ppcnt_reg, 143 142 priv->stats.pport.phy_counters, 144 143 counter_set.phys_layer_cntrs.link_down_events); 145 144 } ··· 243 244 { 244 245 struct mlx5e_priv *priv = vpriv; 245 246 246 - if (!test_bit(MLX5E_STATE_ASYNC_EVENTS_ENABLE, &priv->state)) 247 + if (!test_bit(MLX5E_STATE_ASYNC_EVENTS_ENABLED, &priv->state)) 247 248 return; 248 249 249 250 switch (event) { ··· 259 260 260 261 static void mlx5e_enable_async_events(struct mlx5e_priv *priv) 261 262 { 262 - set_bit(MLX5E_STATE_ASYNC_EVENTS_ENABLE, &priv->state); 263 + set_bit(MLX5E_STATE_ASYNC_EVENTS_ENABLED, &priv->state); 263 264 } 264 265 265 266 static void mlx5e_disable_async_events(struct mlx5e_priv *priv) 266 267 { 267 - clear_bit(MLX5E_STATE_ASYNC_EVENTS_ENABLE, &priv->state); 268 + clear_bit(MLX5E_STATE_ASYNC_EVENTS_ENABLED, &priv->state); 268 269 synchronize_irq(mlx5_get_msix_vec(priv->mdev, MLX5_EQ_VEC_ASYNC)); 269 270 } 270 271 ··· 579 580 void *sqc_wq = MLX5_ADDR_OF(sqc, sqc, wq); 580 581 int err; 581 582 582 - err = mlx5_alloc_map_uar(mdev, &sq->uar, true); 583 + err = mlx5_alloc_map_uar(mdev, &sq->uar, !!MLX5_CAP_GEN(mdev, bf)); 583 584 if (err) 584 585 return err; 585 586
+2 -2
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
··· 689 689 if (is_first_ethertype_ip(skb)) { 690 690 skb->ip_summed = CHECKSUM_COMPLETE; 691 691 skb->csum = csum_unfold((__force __sum16)cqe->check_sum); 692 - rq->stats.csum_sw++; 692 + rq->stats.csum_complete++; 693 693 return; 694 694 } 695 695 ··· 699 699 if (cqe_is_tunneled(cqe)) { 700 700 skb->csum_level = 1; 701 701 skb->encapsulation = 1; 702 - rq->stats.csum_inner++; 702 + rq->stats.csum_unnecessary_inner++; 703 703 } 704 704 return; 705 705 }
+99 -129
drivers/net/ethernet/mellanox/mlx5/core/en_stats.h
··· 42 42 be64_to_cpu(*(__be32 *)((char *)ptr + dsc[i].offset)) 43 43 44 44 #define MLX5E_DECLARE_STAT(type, fld) #fld, offsetof(type, fld) 45 + #define MLX5E_DECLARE_RX_STAT(type, fld) "rx%d_"#fld, offsetof(type, fld) 46 + #define MLX5E_DECLARE_TX_STAT(type, fld) "tx%d_"#fld, offsetof(type, fld) 45 47 46 48 struct counter_desc { 47 - char name[ETH_GSTRING_LEN]; 49 + char format[ETH_GSTRING_LEN]; 48 50 int offset; /* Byte offset */ 49 51 }; 50 52 ··· 55 53 u64 rx_bytes; 56 54 u64 tx_packets; 57 55 u64 tx_bytes; 58 - u64 tso_packets; 59 - u64 tso_bytes; 60 - u64 tso_inner_packets; 61 - u64 tso_inner_bytes; 62 - u64 lro_packets; 63 - u64 lro_bytes; 64 - u64 rx_csum_good; 56 + u64 tx_tso_packets; 57 + u64 tx_tso_bytes; 58 + u64 tx_tso_inner_packets; 59 + u64 tx_tso_inner_bytes; 60 + u64 rx_lro_packets; 61 + u64 rx_lro_bytes; 62 + u64 rx_csum_unnecessary; 65 63 u64 rx_csum_none; 66 - u64 rx_csum_sw; 67 - u64 rx_csum_inner; 68 - u64 tx_csum_offload; 69 - u64 tx_csum_inner; 64 + u64 rx_csum_complete; 65 + u64 rx_csum_unnecessary_inner; 66 + u64 tx_csum_partial; 67 + u64 tx_csum_partial_inner; 70 68 u64 tx_queue_stopped; 71 69 u64 tx_queue_wake; 72 70 u64 tx_queue_dropped; ··· 78 76 u64 rx_cqe_compress_pkts; 79 77 80 78 /* Special handling counters */ 81 - u64 link_down_events; 79 + u64 link_down_events_phy; 82 80 }; 83 81 84 82 static const struct counter_desc sw_stats_desc[] = { ··· 86 84 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_bytes) }, 87 85 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_packets) }, 88 86 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_bytes) }, 89 - { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tso_packets) }, 90 - { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tso_bytes) }, 91 - { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tso_inner_packets) }, 92 - { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tso_inner_bytes) }, 93 - { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, lro_packets) }, 94 - { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, lro_bytes) }, 95 - { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_good) }, 87 + { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_packets) }, 88 + { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_bytes) }, 89 + { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_inner_packets) }, 90 + { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_tso_inner_bytes) }, 91 + { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_lro_packets) }, 92 + { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_lro_bytes) }, 93 + { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary) }, 96 94 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_none) }, 97 - { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_sw) }, 98 - { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_inner) }, 99 - { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_offload) }, 100 - { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_inner) }, 95 + { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_complete) }, 96 + { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary_inner) }, 97 + { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_partial) }, 98 + { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_csum_partial_inner) }, 101 99 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_stopped) }, 102 100 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_wake) }, 103 101 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_queue_dropped) }, ··· 107 105 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_buff_alloc_err) }, 108 106 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_blks) }, 109 107 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cqe_compress_pkts) }, 110 - { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, link_down_events) }, 108 + { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, link_down_events_phy) }, 111 109 }; 112 110 113 111 struct mlx5e_qcounter_stats { ··· 127 125 }; 128 126 129 127 static const struct counter_desc vport_stats_desc[] = { 130 - { "rx_vport_error_packets", 131 - VPORT_COUNTER_OFF(received_errors.packets) }, 132 - { "rx_vport_error_bytes", VPORT_COUNTER_OFF(received_errors.octets) }, 133 - { "tx_vport_error_packets", 134 - VPORT_COUNTER_OFF(transmit_errors.packets) }, 135 - { "tx_vport_error_bytes", VPORT_COUNTER_OFF(transmit_errors.octets) }, 136 128 { "rx_vport_unicast_packets", 137 129 VPORT_COUNTER_OFF(received_eth_unicast.packets) }, 138 130 { "rx_vport_unicast_bytes", ··· 188 192 }; 189 193 190 194 static const struct counter_desc pport_802_3_stats_desc[] = { 191 - { "frames_tx", PPORT_802_3_OFF(a_frames_transmitted_ok) }, 192 - { "frames_rx", PPORT_802_3_OFF(a_frames_received_ok) }, 193 - { "check_seq_err", PPORT_802_3_OFF(a_frame_check_sequence_errors) }, 194 - { "alignment_err", PPORT_802_3_OFF(a_alignment_errors) }, 195 - { "octets_tx", PPORT_802_3_OFF(a_octets_transmitted_ok) }, 196 - { "octets_received", PPORT_802_3_OFF(a_octets_received_ok) }, 197 - { "multicast_xmitted", PPORT_802_3_OFF(a_multicast_frames_xmitted_ok) }, 198 - { "broadcast_xmitted", PPORT_802_3_OFF(a_broadcast_frames_xmitted_ok) }, 199 - { "multicast_rx", PPORT_802_3_OFF(a_multicast_frames_received_ok) }, 200 - { "broadcast_rx", PPORT_802_3_OFF(a_broadcast_frames_received_ok) }, 201 - { "in_range_len_errors", PPORT_802_3_OFF(a_in_range_length_errors) }, 202 - { "out_of_range_len", PPORT_802_3_OFF(a_out_of_range_length_field) }, 203 - { "too_long_errors", PPORT_802_3_OFF(a_frame_too_long_errors) }, 204 - { "symbol_err", PPORT_802_3_OFF(a_symbol_error_during_carrier) }, 205 - { "mac_control_tx", PPORT_802_3_OFF(a_mac_control_frames_transmitted) }, 206 - { "mac_control_rx", PPORT_802_3_OFF(a_mac_control_frames_received) }, 207 - { "unsupported_op_rx", 208 - PPORT_802_3_OFF(a_unsupported_opcodes_received) }, 209 - { "pause_ctrl_rx", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_received) }, 210 - { "pause_ctrl_tx", 211 - PPORT_802_3_OFF(a_pause_mac_ctrl_frames_transmitted) }, 195 + { "tx_packets_phy", PPORT_802_3_OFF(a_frames_transmitted_ok) }, 196 + { "rx_packets_phy", PPORT_802_3_OFF(a_frames_received_ok) }, 197 + { "rx_crc_errors_phy", PPORT_802_3_OFF(a_frame_check_sequence_errors) }, 198 + { "tx_bytes_phy", PPORT_802_3_OFF(a_octets_transmitted_ok) }, 199 + { "rx_bytes_phy", PPORT_802_3_OFF(a_octets_received_ok) }, 200 + { "tx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_xmitted_ok) }, 201 + { "tx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_xmitted_ok) }, 202 + { "rx_multicast_phy", PPORT_802_3_OFF(a_multicast_frames_received_ok) }, 203 + { "rx_broadcast_phy", PPORT_802_3_OFF(a_broadcast_frames_received_ok) }, 204 + { "rx_in_range_len_errors_phy", PPORT_802_3_OFF(a_in_range_length_errors) }, 205 + { "rx_out_of_range_len_phy", PPORT_802_3_OFF(a_out_of_range_length_field) }, 206 + { "rx_oversize_pkts_phy", PPORT_802_3_OFF(a_frame_too_long_errors) }, 207 + { "rx_symbol_err_phy", PPORT_802_3_OFF(a_symbol_error_during_carrier) }, 208 + { "tx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_transmitted) }, 209 + { "rx_mac_control_phy", PPORT_802_3_OFF(a_mac_control_frames_received) }, 210 + { "rx_unsupported_op_phy", PPORT_802_3_OFF(a_unsupported_opcodes_received) }, 211 + { "rx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_received) }, 212 + { "tx_pause_ctrl_phy", PPORT_802_3_OFF(a_pause_mac_ctrl_frames_transmitted) }, 212 213 }; 213 214 214 215 static const struct counter_desc pport_2863_stats_desc[] = { 215 - { "in_octets", PPORT_2863_OFF(if_in_octets) }, 216 - { "in_ucast_pkts", PPORT_2863_OFF(if_in_ucast_pkts) }, 217 - { "in_discards", PPORT_2863_OFF(if_in_discards) }, 218 - { "in_errors", PPORT_2863_OFF(if_in_errors) }, 219 - { "in_unknown_protos", PPORT_2863_OFF(if_in_unknown_protos) }, 220 - { "out_octets", PPORT_2863_OFF(if_out_octets) }, 221 - { "out_ucast_pkts", PPORT_2863_OFF(if_out_ucast_pkts) }, 222 - { "out_discards", PPORT_2863_OFF(if_out_discards) }, 223 - { "out_errors", PPORT_2863_OFF(if_out_errors) }, 224 - { "in_multicast_pkts", PPORT_2863_OFF(if_in_multicast_pkts) }, 225 - { "in_broadcast_pkts", PPORT_2863_OFF(if_in_broadcast_pkts) }, 226 - { "out_multicast_pkts", PPORT_2863_OFF(if_out_multicast_pkts) }, 227 - { "out_broadcast_pkts", PPORT_2863_OFF(if_out_broadcast_pkts) }, 216 + { "rx_discards_phy", PPORT_2863_OFF(if_in_discards) }, 217 + { "tx_discards_phy", PPORT_2863_OFF(if_out_discards) }, 218 + { "tx_errors_phy", PPORT_2863_OFF(if_out_errors) }, 228 219 }; 229 220 230 221 static const struct counter_desc pport_2819_stats_desc[] = { 231 - { "drop_events", PPORT_2819_OFF(ether_stats_drop_events) }, 232 - { "octets", PPORT_2819_OFF(ether_stats_octets) }, 233 - { "pkts", PPORT_2819_OFF(ether_stats_pkts) }, 234 - { "broadcast_pkts", PPORT_2819_OFF(ether_stats_broadcast_pkts) }, 235 - { "multicast_pkts", PPORT_2819_OFF(ether_stats_multicast_pkts) }, 236 - { "crc_align_errors", PPORT_2819_OFF(ether_stats_crc_align_errors) }, 237 - { "undersize_pkts", PPORT_2819_OFF(ether_stats_undersize_pkts) }, 238 - { "oversize_pkts", PPORT_2819_OFF(ether_stats_oversize_pkts) }, 239 - { "fragments", PPORT_2819_OFF(ether_stats_fragments) }, 240 - { "jabbers", PPORT_2819_OFF(ether_stats_jabbers) }, 241 - { "collisions", PPORT_2819_OFF(ether_stats_collisions) }, 242 - { "p64octets", PPORT_2819_OFF(ether_stats_pkts64octets) }, 243 - { "p65to127octets", PPORT_2819_OFF(ether_stats_pkts65to127octets) }, 244 - { "p128to255octets", PPORT_2819_OFF(ether_stats_pkts128to255octets) }, 245 - { "p256to511octets", PPORT_2819_OFF(ether_stats_pkts256to511octets) }, 246 - { "p512to1023octets", PPORT_2819_OFF(ether_stats_pkts512to1023octets) }, 247 - { "p1024to1518octets", 248 - PPORT_2819_OFF(ether_stats_pkts1024to1518octets) }, 249 - { "p1519to2047octets", 250 - PPORT_2819_OFF(ether_stats_pkts1519to2047octets) }, 251 - { "p2048to4095octets", 252 - PPORT_2819_OFF(ether_stats_pkts2048to4095octets) }, 253 - { "p4096to8191octets", 254 - PPORT_2819_OFF(ether_stats_pkts4096to8191octets) }, 255 - { "p8192to10239octets", 256 - PPORT_2819_OFF(ether_stats_pkts8192to10239octets) }, 222 + { "rx_undersize_pkts_phy", PPORT_2819_OFF(ether_stats_undersize_pkts) }, 223 + { "rx_fragments_phy", PPORT_2819_OFF(ether_stats_fragments) }, 224 + { "rx_jabbers_phy", PPORT_2819_OFF(ether_stats_jabbers) }, 225 + { "rx_64_bytes_phy", PPORT_2819_OFF(ether_stats_pkts64octets) }, 226 + { "rx_65_to_127_bytes_phy", PPORT_2819_OFF(ether_stats_pkts65to127octets) }, 227 + { "rx_128_to_255_bytes_phy", PPORT_2819_OFF(ether_stats_pkts128to255octets) }, 228 + { "rx_256_to_511_bytes_phy", PPORT_2819_OFF(ether_stats_pkts256to511octets) }, 229 + { "rx_512_to_1023_bytes_phy", PPORT_2819_OFF(ether_stats_pkts512to1023octets) }, 230 + { "rx_1024_to_1518_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1024to1518octets) }, 231 + { "rx_1519_to_2047_bytes_phy", PPORT_2819_OFF(ether_stats_pkts1519to2047octets) }, 232 + { "rx_2048_to_4095_bytes_phy", PPORT_2819_OFF(ether_stats_pkts2048to4095octets) }, 233 + { "rx_4096_to_8191_bytes_phy", PPORT_2819_OFF(ether_stats_pkts4096to8191octets) }, 234 + { "rx_8192_to_10239_bytes_phy", PPORT_2819_OFF(ether_stats_pkts8192to10239octets) }, 257 235 }; 258 236 259 237 static const struct counter_desc pport_per_prio_traffic_stats_desc[] = { 260 - { "rx_octets", PPORT_PER_PRIO_OFF(rx_octets) }, 261 - { "rx_frames", PPORT_PER_PRIO_OFF(rx_frames) }, 262 - { "tx_octets", PPORT_PER_PRIO_OFF(tx_octets) }, 263 - { "tx_frames", PPORT_PER_PRIO_OFF(tx_frames) }, 238 + { "rx_prio%d_bytes", PPORT_PER_PRIO_OFF(rx_octets) }, 239 + { "rx_prio%d_packets", PPORT_PER_PRIO_OFF(rx_frames) }, 240 + { "tx_prio%d_bytes", PPORT_PER_PRIO_OFF(tx_octets) }, 241 + { "tx_prio%d_packets", PPORT_PER_PRIO_OFF(tx_frames) }, 264 242 }; 265 243 266 244 static const struct counter_desc pport_per_prio_pfc_stats_desc[] = { 267 - { "rx_pause", PPORT_PER_PRIO_OFF(rx_pause) }, 268 - { "rx_pause_duration", PPORT_PER_PRIO_OFF(rx_pause_duration) }, 269 - { "tx_pause", PPORT_PER_PRIO_OFF(tx_pause) }, 270 - { "tx_pause_duration", PPORT_PER_PRIO_OFF(tx_pause_duration) }, 271 - { "rx_pause_transition", PPORT_PER_PRIO_OFF(rx_pause_transition) }, 245 + { "rx_prio%d_pause", PPORT_PER_PRIO_OFF(rx_pause) }, 246 + { "rx_prio%d_pause_duration", PPORT_PER_PRIO_OFF(rx_pause_duration) }, 247 + { "tx_prio%d_pause", PPORT_PER_PRIO_OFF(tx_pause) }, 248 + { "tx_prio%d_pause_duration", PPORT_PER_PRIO_OFF(tx_pause_duration) }, 249 + { "rx_prio%d_pause_transition", PPORT_PER_PRIO_OFF(rx_pause_transition) }, 272 250 }; 273 251 274 252 struct mlx5e_rq_stats { 275 253 u64 packets; 276 254 u64 bytes; 277 - u64 csum_sw; 278 - u64 csum_inner; 255 + u64 csum_complete; 256 + u64 csum_unnecessary_inner; 279 257 u64 csum_none; 280 258 u64 lro_packets; 281 259 u64 lro_bytes; ··· 262 292 }; 263 293 264 294 static const struct counter_desc rq_stats_desc[] = { 265 - { MLX5E_DECLARE_STAT(struct mlx5e_rq_stats, packets) }, 266 - { MLX5E_DECLARE_STAT(struct mlx5e_rq_stats, bytes) }, 267 - { MLX5E_DECLARE_STAT(struct mlx5e_rq_stats, csum_sw) }, 268 - { MLX5E_DECLARE_STAT(struct mlx5e_rq_stats, csum_inner) }, 269 - { MLX5E_DECLARE_STAT(struct mlx5e_rq_stats, csum_none) }, 270 - { MLX5E_DECLARE_STAT(struct mlx5e_rq_stats, lro_packets) }, 271 - { MLX5E_DECLARE_STAT(struct mlx5e_rq_stats, lro_bytes) }, 272 - { MLX5E_DECLARE_STAT(struct mlx5e_rq_stats, wqe_err) }, 273 - { MLX5E_DECLARE_STAT(struct mlx5e_rq_stats, mpwqe_filler) }, 274 - { MLX5E_DECLARE_STAT(struct mlx5e_rq_stats, mpwqe_frag) }, 275 - { MLX5E_DECLARE_STAT(struct mlx5e_rq_stats, buff_alloc_err) }, 276 - { MLX5E_DECLARE_STAT(struct mlx5e_rq_stats, cqe_compress_blks) }, 277 - { MLX5E_DECLARE_STAT(struct mlx5e_rq_stats, cqe_compress_pkts) }, 295 + { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, packets) }, 296 + { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, bytes) }, 297 + { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_complete) }, 298 + { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_unnecessary_inner) }, 299 + { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_none) }, 300 + { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, lro_packets) }, 301 + { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, lro_bytes) }, 302 + { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, wqe_err) }, 303 + { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, mpwqe_filler) }, 304 + { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, mpwqe_frag) }, 305 + { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, buff_alloc_err) }, 306 + { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cqe_compress_blks) }, 307 + { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cqe_compress_pkts) }, 278 308 }; 279 309 280 310 struct mlx5e_sq_stats { ··· 285 315 u64 tso_bytes; 286 316 u64 tso_inner_packets; 287 317 u64 tso_inner_bytes; 288 - u64 csum_offload_inner; 318 + u64 csum_partial_inner; 289 319 u64 nop; 290 320 /* less likely accessed in data path */ 291 - u64 csum_offload_none; 321 + u64 csum_none; 292 322 u64 stopped; 293 323 u64 wake; 294 324 u64 dropped; 295 325 }; 296 326 297 327 static const struct counter_desc sq_stats_desc[] = { 298 - { MLX5E_DECLARE_STAT(struct mlx5e_sq_stats, packets) }, 299 - { MLX5E_DECLARE_STAT(struct mlx5e_sq_stats, bytes) }, 300 - { MLX5E_DECLARE_STAT(struct mlx5e_sq_stats, tso_packets) }, 301 - { MLX5E_DECLARE_STAT(struct mlx5e_sq_stats, tso_bytes) }, 302 - { MLX5E_DECLARE_STAT(struct mlx5e_sq_stats, tso_inner_packets) }, 303 - { MLX5E_DECLARE_STAT(struct mlx5e_sq_stats, tso_inner_bytes) }, 304 - { MLX5E_DECLARE_STAT(struct mlx5e_sq_stats, csum_offload_inner) }, 305 - { MLX5E_DECLARE_STAT(struct mlx5e_sq_stats, nop) }, 306 - { MLX5E_DECLARE_STAT(struct mlx5e_sq_stats, csum_offload_none) }, 307 - { MLX5E_DECLARE_STAT(struct mlx5e_sq_stats, stopped) }, 308 - { MLX5E_DECLARE_STAT(struct mlx5e_sq_stats, wake) }, 309 - { MLX5E_DECLARE_STAT(struct mlx5e_sq_stats, dropped) }, 328 + { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, packets) }, 329 + { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, bytes) }, 330 + { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_packets) }, 331 + { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_bytes) }, 332 + { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_inner_packets) }, 333 + { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, tso_inner_bytes) }, 334 + { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_partial_inner) }, 335 + { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, nop) }, 336 + { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, csum_none) }, 337 + { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, stopped) }, 338 + { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, wake) }, 339 + { MLX5E_DECLARE_TX_STAT(struct mlx5e_sq_stats, dropped) }, 310 340 }; 311 341 312 342 #define NUM_SW_COUNTERS ARRAY_SIZE(sw_stats_desc)
+2 -2
drivers/net/ethernet/mellanox/mlx5/core/en_tx.c
··· 192 192 if (skb->encapsulation) { 193 193 eseg->cs_flags |= MLX5_ETH_WQE_L3_INNER_CSUM | 194 194 MLX5_ETH_WQE_L4_INNER_CSUM; 195 - sq->stats.csum_offload_inner++; 195 + sq->stats.csum_partial_inner++; 196 196 } else { 197 197 eseg->cs_flags |= MLX5_ETH_WQE_L4_CSUM; 198 198 } 199 199 } else 200 - sq->stats.csum_offload_none++; 200 + sq->stats.csum_none++; 201 201 202 202 if (sq->cc != sq->prev_cc) { 203 203 sq->prev_cc = sq->cc;
+2 -1
drivers/net/ethernet/mellanox/mlx5/core/main.c
··· 1508 1508 { PCI_VDEVICE(MELLANOX, 0x1014), MLX5_PCI_DEV_IS_VF}, /* ConnectX-4 VF */ 1509 1509 { PCI_VDEVICE(MELLANOX, 0x1015) }, /* ConnectX-4LX */ 1510 1510 { PCI_VDEVICE(MELLANOX, 0x1016), MLX5_PCI_DEV_IS_VF}, /* ConnectX-4LX VF */ 1511 - { PCI_VDEVICE(MELLANOX, 0x1017) }, /* ConnectX-5 */ 1511 + { PCI_VDEVICE(MELLANOX, 0x1017) }, /* ConnectX-5, PCIe 3.0 */ 1512 1512 { PCI_VDEVICE(MELLANOX, 0x1018), MLX5_PCI_DEV_IS_VF}, /* ConnectX-5 VF */ 1513 + { PCI_VDEVICE(MELLANOX, 0x1019) }, /* ConnectX-5, PCIe 4.0 */ 1513 1514 { 0, } 1514 1515 }; 1515 1516
+3
drivers/net/ethernet/mellanox/mlx5/core/vxlan.c
··· 105 105 struct mlx5e_vxlan *vxlan; 106 106 int err; 107 107 108 + if (mlx5e_vxlan_lookup_port(priv, port)) 109 + goto free_work; 110 + 108 111 if (mlx5e_vxlan_core_add_port_cmd(priv->mdev, port)) 109 112 goto free_work; 110 113
+8 -7
drivers/net/ethernet/mellanox/mlx5/core/wq.c
··· 75 75 76 76 err = mlx5_db_alloc_node(mdev, &wq_ctrl->db, param->db_numa_node); 77 77 if (err) { 78 - mlx5_core_warn(mdev, "mlx5_db_alloc() failed, %d\n", err); 78 + mlx5_core_warn(mdev, "mlx5_db_alloc_node() failed, %d\n", err); 79 79 return err; 80 80 } 81 81 82 82 err = mlx5_buf_alloc_node(mdev, mlx5_wq_cyc_get_byte_size(wq), 83 83 &wq_ctrl->buf, param->buf_numa_node); 84 84 if (err) { 85 - mlx5_core_warn(mdev, "mlx5_buf_alloc() failed, %d\n", err); 85 + mlx5_core_warn(mdev, "mlx5_buf_alloc_node() failed, %d\n", err); 86 86 goto err_db_free; 87 87 } 88 88 ··· 111 111 112 112 err = mlx5_db_alloc_node(mdev, &wq_ctrl->db, param->db_numa_node); 113 113 if (err) { 114 - mlx5_core_warn(mdev, "mlx5_db_alloc() failed, %d\n", err); 114 + mlx5_core_warn(mdev, "mlx5_db_alloc_node() failed, %d\n", err); 115 115 return err; 116 116 } 117 117 118 118 err = mlx5_buf_alloc_node(mdev, mlx5_cqwq_get_byte_size(wq), 119 119 &wq_ctrl->buf, param->buf_numa_node); 120 120 if (err) { 121 - mlx5_core_warn(mdev, "mlx5_buf_alloc() failed, %d\n", err); 121 + mlx5_core_warn(mdev, "mlx5_buf_alloc_node() failed, %d\n", err); 122 122 goto err_db_free; 123 123 } 124 124 ··· 148 148 149 149 err = mlx5_db_alloc_node(mdev, &wq_ctrl->db, param->db_numa_node); 150 150 if (err) { 151 - mlx5_core_warn(mdev, "mlx5_db_alloc() failed, %d\n", err); 151 + mlx5_core_warn(mdev, "mlx5_db_alloc_node() failed, %d\n", err); 152 152 return err; 153 153 } 154 154 155 - err = mlx5_buf_alloc(mdev, mlx5_wq_ll_get_byte_size(wq), &wq_ctrl->buf); 155 + err = mlx5_buf_alloc_node(mdev, mlx5_wq_ll_get_byte_size(wq), 156 + &wq_ctrl->buf, param->buf_numa_node); 156 157 if (err) { 157 - mlx5_core_warn(mdev, "mlx5_buf_alloc() failed, %d\n", err); 158 + mlx5_core_warn(mdev, "mlx5_buf_alloc_node() failed, %d\n", err); 158 159 goto err_db_free; 159 160 } 160 161
+5 -1
drivers/net/ethernet/mellanox/mlxsw/spectrum.c
··· 408 408 } 409 409 410 410 mlxsw_sp_txhdr_construct(skb, &tx_info); 411 - len = skb->len; 411 + /* TX header is consumed by HW on the way so we shouldn't count its 412 + * bytes as being sent. 413 + */ 414 + len = skb->len - MLXSW_TXHDR_LEN; 415 + 412 416 /* Due to a race we might fail here because of a full queue. In that 413 417 * unlikely case we simply drop the packet. 414 418 */
+4 -1
drivers/net/ethernet/mellanox/mlxsw/switchx2.c
··· 316 316 } 317 317 } 318 318 mlxsw_sx_txhdr_construct(skb, &tx_info); 319 - len = skb->len; 319 + /* TX header is consumed by HW on the way so we shouldn't count its 320 + * bytes as being sent. 321 + */ 322 + len = skb->len - MLXSW_TXHDR_LEN; 320 323 /* Due to a race we might fail here because of a full queue. In that 321 324 * unlikely case we simply drop the packet. 322 325 */
+3 -3
drivers/net/ethernet/netronome/nfp/nfp_net_common.c
··· 2015 2015 2016 2016 netif_tx_wake_all_queues(nn->netdev); 2017 2017 2018 - enable_irq(nn->irq_entries[NFP_NET_CFG_LSC].vector); 2018 + enable_irq(nn->irq_entries[NFP_NET_IRQ_LSC_IDX].vector); 2019 2019 nfp_net_read_link_status(nn); 2020 2020 } 2021 2021 ··· 2044 2044 NFP_NET_IRQ_LSC_IDX, nn->lsc_handler); 2045 2045 if (err) 2046 2046 goto err_free_exn; 2047 - disable_irq(nn->irq_entries[NFP_NET_CFG_LSC].vector); 2047 + disable_irq(nn->irq_entries[NFP_NET_IRQ_LSC_IDX].vector); 2048 2048 2049 2049 nn->rx_rings = kcalloc(nn->num_rx_rings, sizeof(*nn->rx_rings), 2050 2050 GFP_KERNEL); ··· 2133 2133 { 2134 2134 unsigned int r; 2135 2135 2136 - disable_irq(nn->irq_entries[NFP_NET_CFG_LSC].vector); 2136 + disable_irq(nn->irq_entries[NFP_NET_IRQ_LSC_IDX].vector); 2137 2137 netif_carrier_off(nn->netdev); 2138 2138 nn->link_up = false; 2139 2139
+1
drivers/net/ethernet/qlogic/qed/qed_hsi.h
··· 3700 3700 #define MEDIA_DA_TWINAX 0x3 3701 3701 #define MEDIA_BASE_T 0x4 3702 3702 #define MEDIA_SFP_1G_FIBER 0x5 3703 + #define MEDIA_MODULE_FIBER 0x6 3703 3704 #define MEDIA_KR 0xf0 3704 3705 #define MEDIA_NOT_PRESENT 0xff 3705 3706
+3 -5
drivers/net/ethernet/qlogic/qed/qed_l2.c
··· 72 72 p_ramrod->mtu = cpu_to_le16(p_params->mtu); 73 73 p_ramrod->inner_vlan_removal_en = p_params->remove_inner_vlan; 74 74 p_ramrod->drop_ttl0_en = p_params->drop_ttl0; 75 + p_ramrod->untagged = p_params->only_untagged; 75 76 76 77 SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_UCAST_DROP_ALL, 1); 77 78 SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_MCAST_DROP_ALL, 1); ··· 247 246 248 247 SET_FIELD(state, ETH_VPORT_TX_MODE_UCAST_DROP_ALL, 249 248 !!(accept_filter & QED_ACCEPT_NONE)); 250 - 251 - SET_FIELD(state, ETH_VPORT_TX_MODE_UCAST_ACCEPT_ALL, 252 - (!!(accept_filter & QED_ACCEPT_UCAST_MATCHED) && 253 - !!(accept_filter & QED_ACCEPT_UCAST_UNMATCHED))); 254 249 255 250 SET_FIELD(state, ETH_VPORT_TX_MODE_MCAST_DROP_ALL, 256 251 !!(accept_filter & QED_ACCEPT_NONE)); ··· 1745 1748 start.vport_id, start.mtu); 1746 1749 } 1747 1750 1748 - qed_reset_vport_stats(cdev); 1751 + if (params->clear_stats) 1752 + qed_reset_vport_stats(cdev); 1749 1753 1750 1754 return 0; 1751 1755 }
+1
drivers/net/ethernet/qlogic/qed/qed_main.c
··· 1085 1085 case MEDIA_SFPP_10G_FIBER: 1086 1086 case MEDIA_SFP_1G_FIBER: 1087 1087 case MEDIA_XFP_FIBER: 1088 + case MEDIA_MODULE_FIBER: 1088 1089 case MEDIA_KR: 1089 1090 port_type = PORT_FIBRE; 1090 1091 break;
+21 -10
drivers/net/ethernet/qlogic/qed/qed_spq.c
··· 213 213 SET_FIELD(db.params, CORE_DB_DATA_AGG_VAL_SEL, 214 214 DQ_XCM_CORE_SPQ_PROD_CMD); 215 215 db.agg_flags = DQ_XCM_CORE_DQ_CF_CMD; 216 - 217 - /* validate producer is up to-date */ 218 - rmb(); 219 - 220 216 db.spq_prod = cpu_to_le16(qed_chain_get_prod_idx(p_chain)); 221 217 222 - /* do not reorder */ 223 - barrier(); 218 + /* make sure the SPQE is updated before the doorbell */ 219 + wmb(); 224 220 225 221 DOORBELL(p_hwfn, qed_db_addr(p_spq->cid, DQ_DEMS_LEGACY), *(u32 *)&db); 226 222 227 223 /* make sure doorbell is rang */ 228 - mmiowb(); 224 + wmb(); 229 225 230 226 DP_VERBOSE(p_hwfn, QED_MSG_SPQ, 231 227 "Doorbelled [0x%08x, CID 0x%08x] with Flags: %02x agg_params: %02x, prod: %04x\n", ··· 610 614 611 615 *p_en2 = *p_ent; 612 616 613 - kfree(p_ent); 617 + /* EBLOCK responsible to free the allocated p_ent */ 618 + if (p_ent->comp_mode != QED_SPQ_MODE_EBLOCK) 619 + kfree(p_ent); 614 620 615 621 p_ent = p_en2; 616 622 } ··· 747 749 * Thus, after gaining the answer perform the cleanup here. 748 750 */ 749 751 rc = qed_spq_block(p_hwfn, p_ent, fw_return_code); 752 + 753 + if (p_ent->queue == &p_spq->unlimited_pending) { 754 + /* This is an allocated p_ent which does not need to 755 + * return to pool. 756 + */ 757 + kfree(p_ent); 758 + return rc; 759 + } 760 + 750 761 if (rc) 751 762 goto spq_post_fail2; 752 763 ··· 851 844 found->comp_cb.function(p_hwfn, found->comp_cb.cookie, p_data, 852 845 fw_return_code); 853 846 854 - if (found->comp_mode != QED_SPQ_MODE_EBLOCK) 855 - /* EBLOCK is responsible for freeing its own entry */ 847 + if ((found->comp_mode != QED_SPQ_MODE_EBLOCK) || 848 + (found->queue == &p_spq->unlimited_pending)) 849 + /* EBLOCK is responsible for returning its own entry into the 850 + * free list, unless it originally added the entry into the 851 + * unlimited pending list. 852 + */ 856 853 qed_spq_return_entry(p_hwfn, found); 857 854 858 855 /* Attempt to post pending requests */
+4 -3
drivers/net/ethernet/qlogic/qede/qede_main.c
··· 3231 3231 return rc; 3232 3232 } 3233 3233 3234 - static int qede_start_queues(struct qede_dev *edev) 3234 + static int qede_start_queues(struct qede_dev *edev, bool clear_stats) 3235 3235 { 3236 3236 int rc, tc, i; 3237 3237 int vlan_removal_en = 1; ··· 3462 3462 3463 3463 enum qede_load_mode { 3464 3464 QEDE_LOAD_NORMAL, 3465 + QEDE_LOAD_RELOAD, 3465 3466 }; 3466 3467 3467 3468 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode) ··· 3501 3500 goto err3; 3502 3501 DP_INFO(edev, "Setup IRQs succeeded\n"); 3503 3502 3504 - rc = qede_start_queues(edev); 3503 + rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD); 3505 3504 if (rc) 3506 3505 goto err4; 3507 3506 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n"); ··· 3556 3555 if (func) 3557 3556 func(edev, args); 3558 3557 3559 - qede_load(edev, QEDE_LOAD_NORMAL); 3558 + qede_load(edev, QEDE_LOAD_RELOAD); 3560 3559 3561 3560 mutex_lock(&edev->qede_lock); 3562 3561 qede_config_rx_mode(edev->ndev);
+1 -1
drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c
··· 2220 2220 if (!opcode) 2221 2221 return; 2222 2222 2223 - ring = QLCNIC_FETCH_RING_ID(qlcnic_83xx_hndl(sts_data[0])); 2223 + ring = QLCNIC_FETCH_RING_ID(sts_data[0]); 2224 2224 qlcnic_83xx_process_rcv_diag(adapter, ring, sts_data); 2225 2225 desc = &sds_ring->desc_head[consumer]; 2226 2226 desc->status_desc_data[0] = cpu_to_le64(STATUS_OWNER_PHANTOM);
+2 -1
drivers/net/ethernet/sfc/farch.c
··· 104 104 const struct efx_farch_register_test *regs, 105 105 size_t n_regs) 106 106 { 107 - unsigned address = 0, i, j; 107 + unsigned address = 0; 108 + int i, j; 108 109 efx_oword_t mask, imask, original, reg, buf; 109 110 110 111 for (i = 0; i < n_regs; ++i) {
-2
drivers/net/ethernet/smsc/smsc911x.c
··· 116 116 117 117 struct phy_device *phy_dev; 118 118 struct mii_bus *mii_bus; 119 - int phy_irq[PHY_MAX_ADDR]; 120 119 unsigned int using_extphy; 121 120 int last_duplex; 122 121 int last_carrier; ··· 1072 1073 pdata->mii_bus->priv = pdata; 1073 1074 pdata->mii_bus->read = smsc911x_mii_read; 1074 1075 pdata->mii_bus->write = smsc911x_mii_write; 1075 - memcpy(pdata->mii_bus->irq, pdata->phy_irq, sizeof(pdata->mii_bus)); 1076 1076 1077 1077 pdata->mii_bus->parent = &pdev->dev; 1078 1078
-4
drivers/net/ethernet/ti/cpsw.c
··· 2505 2505 clean_ale_ret: 2506 2506 cpsw_ale_destroy(priv->ale); 2507 2507 clean_dma_ret: 2508 - cpdma_chan_destroy(priv->txch); 2509 - cpdma_chan_destroy(priv->rxch); 2510 2508 cpdma_ctlr_destroy(priv->dma); 2511 2509 clean_runtime_disable_ret: 2512 2510 pm_runtime_disable(&pdev->dev); ··· 2532 2534 unregister_netdev(ndev); 2533 2535 2534 2536 cpsw_ale_destroy(priv->ale); 2535 - cpdma_chan_destroy(priv->txch); 2536 - cpdma_chan_destroy(priv->rxch); 2537 2537 cpdma_ctlr_destroy(priv->dma); 2538 2538 pm_runtime_disable(&pdev->dev); 2539 2539 device_for_each_child(&pdev->dev, NULL, cpsw_remove_child_device);
+3 -3
drivers/net/ethernet/tile/tilegx.c
··· 462 462 if (unlikely((shtx->tx_flags & SKBTX_HW_TSTAMP) != 0)) { 463 463 struct mpipe_data *md = &mpipe_data[instance]; 464 464 struct skb_shared_hwtstamps shhwtstamps; 465 - struct timespec ts; 465 + struct timespec64 ts; 466 466 467 467 shtx->tx_flags |= SKBTX_IN_PROGRESS; 468 468 gxio_mpipe_get_timestamp(&md->context, &ts); ··· 886 886 /* Sync mPIPE's timestamp up with Linux system time and register PTP clock. */ 887 887 static void register_ptp_clock(struct net_device *dev, struct mpipe_data *md) 888 888 { 889 - struct timespec ts; 889 + struct timespec64 ts; 890 890 891 - getnstimeofday(&ts); 891 + ktime_get_ts64(&ts); 892 892 gxio_mpipe_set_timestamp(&md->context, &ts); 893 893 894 894 mutex_init(&md->ptp_lock);
+1 -1
drivers/net/fddi/skfp/Makefile
··· 17 17 # projects. To keep the source common for all those drivers (and 18 18 # thus simplify fixes to it), please do not clean it up! 19 19 20 - ccflags-y := -Idrivers/net/skfp -DPCI -DMEM_MAPPED_IO -Wno-strict-prototypes 20 + ccflags-y := -DPCI -DMEM_MAPPED_IO -Wno-strict-prototypes
+15 -7
drivers/net/geneve.c
··· 958 958 dev->stats.collisions++; 959 959 else if (err == -ENETUNREACH) 960 960 dev->stats.tx_carrier_errors++; 961 - else 962 - dev->stats.tx_errors++; 961 + 962 + dev->stats.tx_errors++; 963 963 return NETDEV_TX_OK; 964 964 } 965 965 ··· 1048 1048 dev->stats.collisions++; 1049 1049 else if (err == -ENETUNREACH) 1050 1050 dev->stats.tx_carrier_errors++; 1051 - else 1052 - dev->stats.tx_errors++; 1051 + 1052 + dev->stats.tx_errors++; 1053 1053 return NETDEV_TX_OK; 1054 1054 } 1055 1055 #endif ··· 1508 1508 { 1509 1509 struct nlattr *tb[IFLA_MAX + 1]; 1510 1510 struct net_device *dev; 1511 + LIST_HEAD(list_kill); 1511 1512 int err; 1512 1513 1513 1514 memset(tb, 0, sizeof(tb)); ··· 1520 1519 err = geneve_configure(net, dev, &geneve_remote_unspec, 1521 1520 0, 0, 0, 0, htons(dst_port), true, 1522 1521 GENEVE_F_UDP_ZERO_CSUM6_RX); 1523 - if (err) 1524 - goto err; 1522 + if (err) { 1523 + free_netdev(dev); 1524 + return ERR_PTR(err); 1525 + } 1525 1526 1526 1527 /* openvswitch users expect packet sizes to be unrestricted, 1527 1528 * so set the largest MTU we can. ··· 1532 1529 if (err) 1533 1530 goto err; 1534 1531 1532 + err = rtnl_configure_link(dev, NULL); 1533 + if (err < 0) 1534 + goto err; 1535 + 1535 1536 return dev; 1536 1537 1537 1538 err: 1538 - free_netdev(dev); 1539 + geneve_dellink(dev, &list_kill); 1540 + unregister_netdevice_many(&list_kill); 1539 1541 return ERR_PTR(err); 1540 1542 } 1541 1543 EXPORT_SYMBOL_GPL(geneve_dev_create_fb);
+39 -10
drivers/net/macsec.c
··· 605 605 dev_put(dev); 606 606 } 607 607 608 + static struct aead_request *macsec_alloc_req(struct crypto_aead *tfm, 609 + unsigned char **iv, 610 + struct scatterlist **sg) 611 + { 612 + size_t size, iv_offset, sg_offset; 613 + struct aead_request *req; 614 + void *tmp; 615 + 616 + size = sizeof(struct aead_request) + crypto_aead_reqsize(tfm); 617 + iv_offset = size; 618 + size += GCM_AES_IV_LEN; 619 + 620 + size = ALIGN(size, __alignof__(struct scatterlist)); 621 + sg_offset = size; 622 + size += sizeof(struct scatterlist) * (MAX_SKB_FRAGS + 1); 623 + 624 + tmp = kmalloc(size, GFP_ATOMIC); 625 + if (!tmp) 626 + return NULL; 627 + 628 + *iv = (unsigned char *)(tmp + iv_offset); 629 + *sg = (struct scatterlist *)(tmp + sg_offset); 630 + req = tmp; 631 + 632 + aead_request_set_tfm(req, tfm); 633 + 634 + return req; 635 + } 636 + 608 637 static struct sk_buff *macsec_encrypt(struct sk_buff *skb, 609 638 struct net_device *dev) 610 639 { 611 640 int ret; 612 - struct scatterlist sg[MAX_SKB_FRAGS + 1]; 613 - unsigned char iv[GCM_AES_IV_LEN]; 641 + struct scatterlist *sg; 642 + unsigned char *iv; 614 643 struct ethhdr *eth; 615 644 struct macsec_eth_header *hh; 616 645 size_t unprotected_len; ··· 697 668 macsec_fill_sectag(hh, secy, pn); 698 669 macsec_set_shortlen(hh, unprotected_len - 2 * ETH_ALEN); 699 670 700 - macsec_fill_iv(iv, secy->sci, pn); 701 - 702 671 skb_put(skb, secy->icv_len); 703 672 704 673 if (skb->len - ETH_HLEN > macsec_priv(dev)->real_dev->mtu) { ··· 711 684 return ERR_PTR(-EINVAL); 712 685 } 713 686 714 - req = aead_request_alloc(tx_sa->key.tfm, GFP_ATOMIC); 687 + req = macsec_alloc_req(tx_sa->key.tfm, &iv, &sg); 715 688 if (!req) { 716 689 macsec_txsa_put(tx_sa); 717 690 kfree_skb(skb); 718 691 return ERR_PTR(-ENOMEM); 719 692 } 693 + 694 + macsec_fill_iv(iv, secy->sci, pn); 720 695 721 696 sg_init_table(sg, MAX_SKB_FRAGS + 1); 722 697 skb_to_sgvec(skb, sg, 0, skb->len); ··· 890 861 out: 891 862 macsec_rxsa_put(rx_sa); 892 863 dev_put(dev); 893 - return; 894 864 } 895 865 896 866 static struct sk_buff *macsec_decrypt(struct sk_buff *skb, ··· 899 871 struct macsec_secy *secy) 900 872 { 901 873 int ret; 902 - struct scatterlist sg[MAX_SKB_FRAGS + 1]; 903 - unsigned char iv[GCM_AES_IV_LEN]; 874 + struct scatterlist *sg; 875 + unsigned char *iv; 904 876 struct aead_request *req; 905 877 struct macsec_eth_header *hdr; 906 878 u16 icv_len = secy->icv_len; ··· 910 882 if (!skb) 911 883 return ERR_PTR(-ENOMEM); 912 884 913 - req = aead_request_alloc(rx_sa->key.tfm, GFP_ATOMIC); 885 + req = macsec_alloc_req(rx_sa->key.tfm, &iv, &sg); 914 886 if (!req) { 915 887 kfree_skb(skb); 916 888 return ERR_PTR(-ENOMEM); ··· 1262 1234 struct crypto_aead *tfm; 1263 1235 int ret; 1264 1236 1265 - tfm = crypto_alloc_aead("gcm(aes)", 0, CRYPTO_ALG_ASYNC); 1237 + tfm = crypto_alloc_aead("gcm(aes)", 0, 0); 1266 1238 if (!tfm || IS_ERR(tfm)) 1267 1239 return NULL; 1268 1240 ··· 3389 3361 genl_unregister_family(&macsec_fam); 3390 3362 rtnl_link_unregister(&macsec_link_ops); 3391 3363 unregister_netdevice_notifier(&macsec_notifier); 3364 + rcu_barrier(); 3392 3365 } 3393 3366 3394 3367 module_init(macsec_init);
+11 -11
drivers/net/phy/fixed_phy.c
··· 23 23 #include <linux/slab.h> 24 24 #include <linux/of.h> 25 25 #include <linux/gpio.h> 26 + #include <linux/idr.h> 26 27 27 28 #define MII_REGS_NUM 29 28 29 ··· 287 286 } 288 287 EXPORT_SYMBOL_GPL(fixed_phy_add); 289 288 289 + static DEFINE_IDA(phy_fixed_ida); 290 + 290 291 static void fixed_phy_del(int phy_addr) 291 292 { 292 293 struct fixed_mdio_bus *fmb = &platform_fmb; ··· 300 297 if (gpio_is_valid(fp->link_gpio)) 301 298 gpio_free(fp->link_gpio); 302 299 kfree(fp); 300 + ida_simple_remove(&phy_fixed_ida, phy_addr); 303 301 return; 304 302 } 305 303 } 306 304 } 307 - 308 - static int phy_fixed_addr; 309 - static DEFINE_SPINLOCK(phy_fixed_addr_lock); 310 305 311 306 struct phy_device *fixed_phy_register(unsigned int irq, 312 307 struct fixed_phy_status *status, ··· 320 319 return ERR_PTR(-EPROBE_DEFER); 321 320 322 321 /* Get the next available PHY address, up to PHY_MAX_ADDR */ 323 - spin_lock(&phy_fixed_addr_lock); 324 - if (phy_fixed_addr == PHY_MAX_ADDR) { 325 - spin_unlock(&phy_fixed_addr_lock); 326 - return ERR_PTR(-ENOSPC); 327 - } 328 - phy_addr = phy_fixed_addr++; 329 - spin_unlock(&phy_fixed_addr_lock); 322 + phy_addr = ida_simple_get(&phy_fixed_ida, 0, PHY_MAX_ADDR, GFP_KERNEL); 323 + if (phy_addr < 0) 324 + return ERR_PTR(phy_addr); 330 325 331 326 ret = fixed_phy_add(irq, phy_addr, status, link_gpio); 332 - if (ret < 0) 327 + if (ret < 0) { 328 + ida_simple_remove(&phy_fixed_ida, phy_addr); 333 329 return ERR_PTR(ret); 330 + } 334 331 335 332 phy = get_phy_device(fmb->mii_bus, phy_addr, false); 336 333 if (IS_ERR(phy)) { ··· 433 434 list_del(&fp->node); 434 435 kfree(fp); 435 436 } 437 + ida_destroy(&phy_fixed_ida); 436 438 } 437 439 module_exit(fixed_mdio_bus_exit); 438 440
+69 -13
drivers/net/phy/marvell.c
··· 285 285 return 0; 286 286 } 287 287 288 + static int m88e1111_config_aneg(struct phy_device *phydev) 289 + { 290 + int err; 291 + 292 + /* The Marvell PHY has an errata which requires 293 + * that certain registers get written in order 294 + * to restart autonegotiation 295 + */ 296 + err = phy_write(phydev, MII_BMCR, BMCR_RESET); 297 + 298 + err = marvell_set_polarity(phydev, phydev->mdix); 299 + if (err < 0) 300 + return err; 301 + 302 + err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, 303 + MII_M1111_PHY_LED_DIRECT); 304 + if (err < 0) 305 + return err; 306 + 307 + err = genphy_config_aneg(phydev); 308 + if (err < 0) 309 + return err; 310 + 311 + if (phydev->autoneg != AUTONEG_ENABLE) { 312 + int bmcr; 313 + 314 + /* A write to speed/duplex bits (that is performed by 315 + * genphy_config_aneg() call above) must be followed by 316 + * a software reset. Otherwise, the write has no effect. 317 + */ 318 + bmcr = phy_read(phydev, MII_BMCR); 319 + if (bmcr < 0) 320 + return bmcr; 321 + 322 + err = phy_write(phydev, MII_BMCR, bmcr | BMCR_RESET); 323 + if (err < 0) 324 + return err; 325 + } 326 + 327 + return 0; 328 + } 329 + 288 330 #ifdef CONFIG_OF_MDIO 289 331 /* 290 332 * Set and/or override some configuration registers based on the ··· 449 407 if (err < 0) 450 408 return err; 451 409 452 - oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE); 453 - 454 - phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_88E1121_PHY_LED_PAGE); 455 - phy_write(phydev, MII_88E1121_PHY_LED_CTRL, MII_88E1121_PHY_LED_DEF); 456 - phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage); 457 - 458 - err = genphy_config_aneg(phydev); 459 - 460 - return err; 410 + return genphy_config_aneg(phydev); 461 411 } 462 412 463 413 static int m88e1318_config_aneg(struct phy_device *phydev) ··· 670 636 return phy_write(phydev, MII_BMCR, BMCR_RESET); 671 637 } 672 638 639 + static int m88e1121_config_init(struct phy_device *phydev) 640 + { 641 + int err, oldpage; 642 + 643 + oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE); 644 + 645 + err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_88E1121_PHY_LED_PAGE); 646 + if (err < 0) 647 + return err; 648 + 649 + /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */ 650 + err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL, 651 + MII_88E1121_PHY_LED_DEF); 652 + if (err < 0) 653 + return err; 654 + 655 + phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage); 656 + 657 + /* Set marvell,reg-init configuration from device tree */ 658 + return marvell_config_init(phydev); 659 + } 660 + 673 661 static int m88e1510_config_init(struct phy_device *phydev) 674 662 { 675 663 int err; ··· 724 668 return err; 725 669 } 726 670 727 - return marvell_config_init(phydev); 671 + return m88e1121_config_init(phydev); 728 672 } 729 673 730 674 static int m88e1118_config_aneg(struct phy_device *phydev) ··· 1217 1161 .flags = PHY_HAS_INTERRUPT, 1218 1162 .probe = marvell_probe, 1219 1163 .config_init = &m88e1111_config_init, 1220 - .config_aneg = &marvell_config_aneg, 1164 + .config_aneg = &m88e1111_config_aneg, 1221 1165 .read_status = &marvell_read_status, 1222 1166 .ack_interrupt = &marvell_ack_interrupt, 1223 1167 .config_intr = &marvell_config_intr, ··· 1252 1196 .features = PHY_GBIT_FEATURES, 1253 1197 .flags = PHY_HAS_INTERRUPT, 1254 1198 .probe = marvell_probe, 1255 - .config_init = &marvell_config_init, 1199 + .config_init = &m88e1121_config_init, 1256 1200 .config_aneg = &m88e1121_config_aneg, 1257 1201 .read_status = &marvell_read_status, 1258 1202 .ack_interrupt = &marvell_ack_interrupt, ··· 1271 1215 .features = PHY_GBIT_FEATURES, 1272 1216 .flags = PHY_HAS_INTERRUPT, 1273 1217 .probe = marvell_probe, 1274 - .config_init = &marvell_config_init, 1218 + .config_init = &m88e1121_config_init, 1275 1219 .config_aneg = &m88e1318_config_aneg, 1276 1220 .read_status = &marvell_read_status, 1277 1221 .ack_interrupt = &marvell_ack_interrupt,
+4 -13
drivers/net/phy/smsc.c
··· 75 75 * in all capable mode before using it. 76 76 */ 77 77 if ((rc & MII_LAN83C185_MODE_MASK) == MII_LAN83C185_MODE_POWERDOWN) { 78 - int timeout = 50000; 79 - 80 - /* set "all capable" mode and reset the phy */ 78 + /* set "all capable" mode */ 81 79 rc |= MII_LAN83C185_MODE_ALL; 82 80 phy_write(phydev, MII_LAN83C185_SPECIAL_MODES, rc); 83 - phy_write(phydev, MII_BMCR, BMCR_RESET); 84 - 85 - /* wait end of reset (max 500 ms) */ 86 - do { 87 - udelay(10); 88 - if (timeout-- == 0) 89 - return -1; 90 - rc = phy_read(phydev, MII_BMCR); 91 - } while (rc & BMCR_RESET); 92 81 } 93 - return 0; 82 + 83 + /* reset the phy */ 84 + return genphy_soft_reset(phydev); 94 85 } 95 86 96 87 static int lan911x_config_init(struct phy_device *phydev)
+2
drivers/net/team/team.c
··· 1203 1203 goto err_dev_open; 1204 1204 } 1205 1205 1206 + netif_addr_lock_bh(dev); 1206 1207 dev_uc_sync_multiple(port_dev, dev); 1207 1208 dev_mc_sync_multiple(port_dev, dev); 1209 + netif_addr_unlock_bh(dev); 1208 1210 1209 1211 err = vlan_vids_add_by_dev(port_dev, dev); 1210 1212 if (err) {
+26 -11
drivers/net/usb/r8152.c
··· 31 31 #define NETNEXT_VERSION "08" 32 32 33 33 /* Information for net */ 34 - #define NET_VERSION "3" 34 + #define NET_VERSION "4" 35 35 36 36 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION 37 37 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>" ··· 116 116 #define USB_TX_DMA 0xd434 117 117 #define USB_TOLERANCE 0xd490 118 118 #define USB_LPM_CTRL 0xd41a 119 + #define USB_BMU_RESET 0xd4b0 119 120 #define USB_UPS_CTRL 0xd800 120 121 #define USB_MISC_0 0xd81a 121 122 #define USB_POWER_CUT 0xd80a ··· 338 337 /* USB_TX_DMA */ 339 338 #define TEST_MODE_DISABLE 0x00000001 340 339 #define TX_SIZE_ADJUST1 0x00000100 340 + 341 + /* USB_BMU_RESET */ 342 + #define BMU_RESET_EP_IN 0x01 343 + #define BMU_RESET_EP_OUT 0x02 341 344 342 345 /* USB_UPS_CTRL */ 343 346 #define POWER_CUT 0x0100 ··· 2174 2169 static void r8153_set_rx_early_size(struct r8152 *tp) 2175 2170 { 2176 2171 u32 mtu = tp->netdev->mtu; 2177 - u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4; 2172 + u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 8; 2178 2173 2179 2174 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data); 2180 2175 } ··· 2461 2456 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0); 2462 2457 } 2463 2458 2459 + static void rtl_reset_bmu(struct r8152 *tp) 2460 + { 2461 + u32 ocp_data; 2462 + 2463 + ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET); 2464 + ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT); 2465 + ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data); 2466 + ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT; 2467 + ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data); 2468 + } 2469 + 2464 2470 static void r8152_aldps_en(struct r8152 *tp, bool enable) 2465 2471 { 2466 2472 if (enable) { ··· 2697 2681 r8153_hw_phy_cfg(tp); 2698 2682 2699 2683 rtl8152_nic_reset(tp); 2684 + rtl_reset_bmu(tp); 2700 2685 2701 2686 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); 2702 2687 ocp_data &= ~NOW_IS_OOB; ··· 2759 2742 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data); 2760 2743 2761 2744 rtl_disable(tp); 2745 + rtl_reset_bmu(tp); 2762 2746 2763 2747 for (i = 0; i < 1000; i++) { 2764 2748 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL); ··· 2821 2803 { 2822 2804 r8153_aldps_en(tp, false); 2823 2805 rtl_disable(tp); 2806 + rtl_reset_bmu(tp); 2824 2807 r8153_aldps_en(tp, true); 2825 2808 usb_enable_lpm(tp->udev); 2826 2809 } ··· 3401 3382 r8153_power_cut_en(tp, false); 3402 3383 r8153_u1u2en(tp, true); 3403 3384 3404 - ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO); 3405 - ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO); 3406 - ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 3407 - PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN | 3408 - U1U2_SPDWN_EN | L1_SPDWN_EN); 3409 - ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 3410 - PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN | 3411 - TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN | 3412 - EEE_SPDWN_EN); 3385 + /* MAC clock speed down */ 3386 + ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0); 3387 + ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0); 3388 + ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0); 3389 + ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0); 3413 3390 3414 3391 r8153_enable_eee(tp); 3415 3392 r8153_aldps_en(tp, true);
+2 -2
drivers/net/vrf.c
··· 304 304 dst_hold(&rt6->dst); 305 305 306 306 rt6->rt6i_table = rt6i_table; 307 - rt6->dst.output = vrf_output6; 307 + rt6->dst.output = vrf_output6; 308 308 rcu_assign_pointer(vrf->rt6, rt6); 309 309 310 310 rc = 0; ··· 403 403 if (!rth) 404 404 return -ENOMEM; 405 405 406 - rth->dst.output = vrf_output; 406 + rth->dst.output = vrf_output; 407 407 rth->rt_table_id = vrf->tb_id; 408 408 409 409 rcu_assign_pointer(vrf->rth, rth);
+34 -24
drivers/net/vxlan.c
··· 2952 2952 return 0; 2953 2953 } 2954 2954 2955 - struct net_device *vxlan_dev_create(struct net *net, const char *name, 2956 - u8 name_assign_type, struct vxlan_config *conf) 2957 - { 2958 - struct nlattr *tb[IFLA_MAX+1]; 2959 - struct net_device *dev; 2960 - int err; 2961 - 2962 - memset(&tb, 0, sizeof(tb)); 2963 - 2964 - dev = rtnl_create_link(net, name, name_assign_type, 2965 - &vxlan_link_ops, tb); 2966 - if (IS_ERR(dev)) 2967 - return dev; 2968 - 2969 - err = vxlan_dev_configure(net, dev, conf); 2970 - if (err < 0) { 2971 - free_netdev(dev); 2972 - return ERR_PTR(err); 2973 - } 2974 - 2975 - return dev; 2976 - } 2977 - EXPORT_SYMBOL_GPL(vxlan_dev_create); 2978 - 2979 2955 static int vxlan_newlink(struct net *src_net, struct net_device *dev, 2980 2956 struct nlattr *tb[], struct nlattr *data[]) 2981 2957 { ··· 3243 3267 .fill_info = vxlan_fill_info, 3244 3268 .get_link_net = vxlan_get_link_net, 3245 3269 }; 3270 + 3271 + struct net_device *vxlan_dev_create(struct net *net, const char *name, 3272 + u8 name_assign_type, 3273 + struct vxlan_config *conf) 3274 + { 3275 + struct nlattr *tb[IFLA_MAX + 1]; 3276 + struct net_device *dev; 3277 + int err; 3278 + 3279 + memset(&tb, 0, sizeof(tb)); 3280 + 3281 + dev = rtnl_create_link(net, name, name_assign_type, 3282 + &vxlan_link_ops, tb); 3283 + if (IS_ERR(dev)) 3284 + return dev; 3285 + 3286 + err = vxlan_dev_configure(net, dev, conf); 3287 + if (err < 0) { 3288 + free_netdev(dev); 3289 + return ERR_PTR(err); 3290 + } 3291 + 3292 + err = rtnl_configure_link(dev, NULL); 3293 + if (err < 0) { 3294 + LIST_HEAD(list_kill); 3295 + 3296 + vxlan_dellink(dev, &list_kill); 3297 + unregister_netdevice_many(&list_kill); 3298 + return ERR_PTR(err); 3299 + } 3300 + 3301 + return dev; 3302 + } 3303 + EXPORT_SYMBOL_GPL(vxlan_dev_create); 3246 3304 3247 3305 static void vxlan_handle_lowerdev_unregister(struct vxlan_net *vn, 3248 3306 struct net_device *dev)
+1 -1
drivers/net/wireless/ath/ath10k/core.c
··· 1083 1083 } 1084 1084 1085 1085 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1086 - ar->running_fw->fw_file.fw_features, 1086 + fw_file->fw_features, 1087 1087 sizeof(fw_file->fw_features)); 1088 1088 break; 1089 1089 case ATH10K_FW_IE_FW_IMAGE:
-1
drivers/net/wireless/ath/ath10k/htt_rx.c
··· 1904 1904 return; 1905 1905 } 1906 1906 } 1907 - ath10k_htt_rx_msdu_buff_replenish(htt); 1908 1907 } 1909 1908 1910 1909 static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar,
+1 -1
drivers/net/wireless/ath/ath10k/mac.c
··· 679 679 680 680 peer = ath10k_peer_find(ar, vdev_id, addr); 681 681 if (!peer) { 682 + spin_unlock_bh(&ar->data_lock); 682 683 ath10k_warn(ar, "failed to find peer %pM on vdev %i after creation\n", 683 684 addr, vdev_id); 684 685 ath10k_wmi_peer_delete(ar, vdev_id, addr); 685 - spin_unlock_bh(&ar->data_lock); 686 686 return -ENOENT; 687 687 } 688 688
+4 -4
drivers/net/wireless/ath/ath9k/reg.h
··· 1122 1122 #define AR9300_NUM_GPIO 16 1123 1123 #define AR9330_NUM_GPIO 16 1124 1124 #define AR9340_NUM_GPIO 23 1125 - #define AR9462_NUM_GPIO 10 1125 + #define AR9462_NUM_GPIO 14 1126 1126 #define AR9485_NUM_GPIO 12 1127 1127 #define AR9531_NUM_GPIO 18 1128 1128 #define AR9550_NUM_GPIO 24 1129 1129 #define AR9561_NUM_GPIO 23 1130 - #define AR9565_NUM_GPIO 12 1130 + #define AR9565_NUM_GPIO 14 1131 1131 #define AR9580_NUM_GPIO 16 1132 1132 #define AR7010_NUM_GPIO 16 1133 1133 ··· 1139 1139 #define AR9300_GPIO_MASK 0x0000F4FF 1140 1140 #define AR9330_GPIO_MASK 0x0000F4FF 1141 1141 #define AR9340_GPIO_MASK 0x0000000F 1142 - #define AR9462_GPIO_MASK 0x000003FF 1142 + #define AR9462_GPIO_MASK 0x00003FFF 1143 1143 #define AR9485_GPIO_MASK 0x00000FFF 1144 1144 #define AR9531_GPIO_MASK 0x0000000F 1145 1145 #define AR9550_GPIO_MASK 0x0000000F 1146 1146 #define AR9561_GPIO_MASK 0x0000000F 1147 - #define AR9565_GPIO_MASK 0x00000FFF 1147 + #define AR9565_GPIO_MASK 0x00003FFF 1148 1148 #define AR9580_GPIO_MASK 0x0000F4FF 1149 1149 #define AR7010_GPIO_MASK 0x0000FFFF 1150 1150
+4 -4
drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c
··· 3851 3851 if (idx != 0) 3852 3852 return -ENOENT; 3853 3853 3854 - if (fw_has_capa(&mvm->fw->ucode_capa, 3855 - IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS)) 3854 + if (!fw_has_capa(&mvm->fw->ucode_capa, 3855 + IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS)) 3856 3856 return -ENOENT; 3857 3857 3858 3858 mutex_lock(&mvm->mutex); ··· 3898 3898 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); 3899 3899 struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); 3900 3900 3901 - if (fw_has_capa(&mvm->fw->ucode_capa, 3902 - IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS)) 3901 + if (!fw_has_capa(&mvm->fw->ucode_capa, 3902 + IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS)) 3903 3903 return; 3904 3904 3905 3905 /* if beacon filtering isn't on mac80211 does it anyway */
+3 -1
drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c
··· 581 581 struct iwl_rx_mpdu_desc *desc) 582 582 { 583 583 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 584 - struct iwl_mvm_sta *mvm_sta = iwl_mvm_sta_from_mac80211(sta); 584 + struct iwl_mvm_sta *mvm_sta; 585 585 struct iwl_mvm_baid_data *baid_data; 586 586 struct iwl_mvm_reorder_buffer *buffer; 587 587 struct sk_buff *tail; ··· 603 603 /* no sta yet */ 604 604 if (WARN_ON(IS_ERR_OR_NULL(sta))) 605 605 return false; 606 + 607 + mvm_sta = iwl_mvm_sta_from_mac80211(sta); 606 608 607 609 /* not a data packet */ 608 610 if (!ieee80211_is_data_qos(hdr->frame_control) ||
+1 -1
drivers/net/wireless/intel/iwlwifi/mvm/scan.c
··· 1222 1222 return -EIO; 1223 1223 } 1224 1224 1225 - #define SCAN_TIMEOUT (16 * HZ) 1225 + #define SCAN_TIMEOUT (20 * HZ) 1226 1226 1227 1227 void iwl_mvm_scan_timeout(unsigned long data) 1228 1228 {
+15 -1
drivers/net/wireless/intel/iwlwifi/mvm/sta.c
··· 1852 1852 mvmvif->ap_sta_id != IWL_MVM_STATION_COUNT) { 1853 1853 u8 sta_id = mvmvif->ap_sta_id; 1854 1854 1855 + sta = rcu_dereference_check(mvm->fw_id_to_mac_id[sta_id], 1856 + lockdep_is_held(&mvm->mutex)); 1857 + 1855 1858 /* 1856 1859 * It is possible that the 'sta' parameter is NULL, 1857 1860 * for example when a GTK is removed - the sta_id will then 1858 1861 * be the AP ID, and no station was passed by mac80211. 1859 1862 */ 1860 - return iwl_mvm_sta_from_staid_protected(mvm, sta_id); 1863 + if (IS_ERR_OR_NULL(sta)) 1864 + return NULL; 1865 + 1866 + return iwl_mvm_sta_from_mac80211(sta); 1861 1867 } 1862 1868 1863 1869 return NULL; ··· 1960 1954 } else { 1961 1955 struct ieee80211_key_seq seq; 1962 1956 const u8 *pn; 1957 + 1958 + switch (keyconf->cipher) { 1959 + case WLAN_CIPHER_SUITE_AES_CMAC: 1960 + igtk_cmd.ctrl_flags |= cpu_to_le32(STA_KEY_FLG_CCM); 1961 + break; 1962 + default: 1963 + return -EINVAL; 1964 + } 1963 1965 1964 1966 memcpy(igtk_cmd.IGTK, keyconf->key, keyconf->keylen); 1965 1967 ieee80211_get_key_rx_seq(keyconf, 0, &seq);
+1 -1
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192e.c
··· 1149 1149 1150 1150 for (i = 0; i < retry; i++) { 1151 1151 path_b_ok = rtl8192eu_rx_iqk_path_b(priv); 1152 - if (path_a_ok == 0x03) { 1152 + if (path_b_ok == 0x03) { 1153 1153 val32 = rtl8xxxu_read32(priv, 1154 1154 REG_RX_POWER_BEFORE_IQK_B_2); 1155 1155 result[t][6] = (val32 >> 16) & 0x3ff;
+40 -11
drivers/nvdimm/pfn_devs.c
··· 344 344 int nd_pfn_validate(struct nd_pfn *nd_pfn, const char *sig) 345 345 { 346 346 u64 checksum, offset; 347 + unsigned long align; 348 + enum nd_pfn_mode mode; 347 349 struct nd_namespace_io *nsio; 348 350 struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb; 349 351 struct nd_namespace_common *ndns = nd_pfn->ndns; ··· 388 386 return -ENXIO; 389 387 } 390 388 389 + align = le32_to_cpu(pfn_sb->align); 390 + offset = le64_to_cpu(pfn_sb->dataoff); 391 + if (align == 0) 392 + align = 1UL << ilog2(offset); 393 + mode = le32_to_cpu(pfn_sb->mode); 394 + 391 395 if (!nd_pfn->uuid) { 392 - /* from probe we allocate */ 396 + /* 397 + * When probing a namepace via nd_pfn_probe() the uuid 398 + * is NULL (see: nd_pfn_devinit()) we init settings from 399 + * pfn_sb 400 + */ 393 401 nd_pfn->uuid = kmemdup(pfn_sb->uuid, 16, GFP_KERNEL); 394 402 if (!nd_pfn->uuid) 395 403 return -ENOMEM; 404 + nd_pfn->align = align; 405 + nd_pfn->mode = mode; 396 406 } else { 397 - /* from init we validate */ 407 + /* 408 + * When probing a pfn / dax instance we validate the 409 + * live settings against the pfn_sb 410 + */ 398 411 if (memcmp(nd_pfn->uuid, pfn_sb->uuid, 16) != 0) 399 412 return -ENODEV; 413 + 414 + /* 415 + * If the uuid validates, but other settings mismatch 416 + * return EINVAL because userspace has managed to change 417 + * the configuration without specifying new 418 + * identification. 419 + */ 420 + if (nd_pfn->align != align || nd_pfn->mode != mode) { 421 + dev_err(&nd_pfn->dev, 422 + "init failed, settings mismatch\n"); 423 + dev_dbg(&nd_pfn->dev, "align: %lx:%lx mode: %d:%d\n", 424 + nd_pfn->align, align, nd_pfn->mode, 425 + mode); 426 + return -EINVAL; 427 + } 400 428 } 401 429 402 - if (nd_pfn->align == 0) 403 - nd_pfn->align = le32_to_cpu(pfn_sb->align); 404 - if (nd_pfn->align > nvdimm_namespace_capacity(ndns)) { 430 + if (align > nvdimm_namespace_capacity(ndns)) { 405 431 dev_err(&nd_pfn->dev, "alignment: %lx exceeds capacity %llx\n", 406 - nd_pfn->align, nvdimm_namespace_capacity(ndns)); 432 + align, nvdimm_namespace_capacity(ndns)); 407 433 return -EINVAL; 408 434 } 409 435 ··· 441 411 * namespace has changed since the pfn superblock was 442 412 * established. 443 413 */ 444 - offset = le64_to_cpu(pfn_sb->dataoff); 445 414 nsio = to_nd_namespace_io(&ndns->dev); 446 415 if (offset >= resource_size(&nsio->res)) { 447 416 dev_err(&nd_pfn->dev, "pfn array size exceeds capacity of %s\n", ··· 448 419 return -EBUSY; 449 420 } 450 421 451 - if ((nd_pfn->align && !IS_ALIGNED(offset, nd_pfn->align)) 422 + if ((align && !IS_ALIGNED(offset, align)) 452 423 || !IS_ALIGNED(offset, PAGE_SIZE)) { 453 - dev_err(&nd_pfn->dev, "bad offset: %#llx dax disabled\n", 454 - offset); 424 + dev_err(&nd_pfn->dev, 425 + "bad offset: %#llx dax disabled align: %#lx\n", 426 + offset, align); 455 427 return -ENXIO; 456 428 } 457 429 ··· 532 502 res->start += start_pad; 533 503 res->end -= end_trunc; 534 504 535 - nd_pfn->mode = le32_to_cpu(nd_pfn->pfn_sb->mode); 536 505 if (nd_pfn->mode == PFN_MODE_RAM) { 537 506 if (offset < SZ_8K) 538 507 return ERR_PTR(-EINVAL);
+2 -2
drivers/phy/phy-bcm-ns-usb2.c
··· 109 109 } 110 110 111 111 usb2->phy = devm_phy_create(dev, NULL, &ops); 112 - if (IS_ERR(dev)) 113 - return PTR_ERR(dev); 112 + if (IS_ERR(usb2->phy)) 113 + return PTR_ERR(usb2->phy); 114 114 115 115 phy_set_drvdata(usb2->phy, usb2); 116 116 platform_set_drvdata(pdev, usb2);
+2 -1
drivers/phy/phy-miphy28lp.c
··· 1143 1143 struct miphy28lp_dev *miphy_dev = miphy_phy->phydev; 1144 1144 int err; 1145 1145 1146 - miphy_phy->miphy_rst = of_reset_control_get(node, "miphy-sw-rst"); 1146 + miphy_phy->miphy_rst = 1147 + of_reset_control_get_shared(node, "miphy-sw-rst"); 1147 1148 1148 1149 if (IS_ERR(miphy_phy->miphy_rst)) { 1149 1150 dev_err(miphy_dev->dev,
+1 -13
drivers/phy/phy-rcar-gen3-usb2.c
··· 144 144 extcon_set_cable_state_(ch->extcon, EXTCON_USB, true); 145 145 } 146 146 147 - static bool rcar_gen3_check_vbus(struct rcar_gen3_chan *ch) 148 - { 149 - return !!(readl(ch->base + USB2_ADPCTRL) & 150 - USB2_ADPCTRL_OTGSESSVLD); 151 - } 152 - 153 147 static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch) 154 148 { 155 149 return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG); ··· 151 157 152 158 static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch) 153 159 { 154 - bool is_host = true; 155 - 156 - /* B-device? */ 157 - if (rcar_gen3_check_id(ch) && rcar_gen3_check_vbus(ch)) 158 - is_host = false; 159 - 160 - if (is_host) 160 + if (!rcar_gen3_check_id(ch)) 161 161 rcar_gen3_init_for_host(ch); 162 162 else 163 163 rcar_gen3_init_for_peri(ch);
+1 -1
drivers/phy/phy-rockchip-dp.c
··· 90 90 return -ENODEV; 91 91 92 92 dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL); 93 - if (IS_ERR(dp)) 93 + if (!dp) 94 94 return -ENOMEM; 95 95 96 96 dp->dev = dev;
+2 -2
drivers/phy/phy-stih407-usb.c
··· 105 105 phy_dev->dev = dev; 106 106 dev_set_drvdata(dev, phy_dev); 107 107 108 - phy_dev->rstc = devm_reset_control_get(dev, "global"); 108 + phy_dev->rstc = devm_reset_control_get_shared(dev, "global"); 109 109 if (IS_ERR(phy_dev->rstc)) { 110 110 dev_err(dev, "failed to ctrl picoPHY reset\n"); 111 111 return PTR_ERR(phy_dev->rstc); 112 112 } 113 113 114 - phy_dev->rstport = devm_reset_control_get(dev, "port"); 114 + phy_dev->rstport = devm_reset_control_get_exclusive(dev, "port"); 115 115 if (IS_ERR(phy_dev->rstport)) { 116 116 dev_err(dev, "failed to ctrl picoPHY reset\n"); 117 117 return PTR_ERR(phy_dev->rstport);
+7 -7
drivers/phy/phy-sun4i-usb.c
··· 175 175 { 176 176 struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy); 177 177 u32 temp, usbc_bit = BIT(phy->index * 2); 178 - void *phyctl = phy_data->base + phy_data->cfg->phyctl_offset; 178 + void __iomem *phyctl = phy_data->base + phy_data->cfg->phyctl_offset; 179 179 int i; 180 180 181 181 mutex_lock(&phy_data->mutex); ··· 514 514 515 515 if (data->vbus_power_nb_registered) 516 516 power_supply_unreg_notifier(&data->vbus_power_nb); 517 - if (data->id_det_irq >= 0) 517 + if (data->id_det_irq > 0) 518 518 devm_free_irq(dev, data->id_det_irq, data); 519 - if (data->vbus_det_irq >= 0) 519 + if (data->vbus_det_irq > 0) 520 520 devm_free_irq(dev, data->vbus_det_irq, data); 521 521 522 522 cancel_delayed_work_sync(&data->detect); ··· 645 645 646 646 data->id_det_irq = gpiod_to_irq(data->id_det_gpio); 647 647 data->vbus_det_irq = gpiod_to_irq(data->vbus_det_gpio); 648 - if ((data->id_det_gpio && data->id_det_irq < 0) || 649 - (data->vbus_det_gpio && data->vbus_det_irq < 0)) 648 + if ((data->id_det_gpio && data->id_det_irq <= 0) || 649 + (data->vbus_det_gpio && data->vbus_det_irq <= 0)) 650 650 data->phy0_poll = true; 651 651 652 - if (data->id_det_irq >= 0) { 652 + if (data->id_det_irq > 0) { 653 653 ret = devm_request_irq(dev, data->id_det_irq, 654 654 sun4i_usb_phy0_id_vbus_det_irq, 655 655 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, ··· 660 660 } 661 661 } 662 662 663 - if (data->vbus_det_irq >= 0) { 663 + if (data->vbus_det_irq > 0) { 664 664 ret = devm_request_irq(dev, data->vbus_det_irq, 665 665 sun4i_usb_phy0_id_vbus_det_irq, 666 666 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+1 -1
drivers/pinctrl/Makefile
··· 23 23 obj-$(CONFIG_PINCTRL_ROCKCHIP) += pinctrl-rockchip.o 24 24 obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o 25 25 obj-$(CONFIG_PINCTRL_SIRF) += sirf/ 26 - obj-$(CONFIG_PINCTRL_TEGRA) += tegra/ 26 + obj-$(CONFIG_ARCH_TEGRA) += tegra/ 27 27 obj-$(CONFIG_PINCTRL_TZ1090) += pinctrl-tz1090.o 28 28 obj-$(CONFIG_PINCTRL_TZ1090_PDC) += pinctrl-tz1090-pdc.o 29 29 obj-$(CONFIG_PINCTRL_U300) += pinctrl-u300.o
+2 -2
drivers/pinctrl/freescale/pinctrl-imx.c
··· 209 209 pin_reg = &info->pin_regs[pin_id]; 210 210 211 211 if (pin_reg->mux_reg == -1) { 212 - dev_err(ipctl->dev, "Pin(%s) does not support mux function\n", 212 + dev_dbg(ipctl->dev, "Pin(%s) does not support mux function\n", 213 213 info->pins[pin_id].name); 214 - return -EINVAL; 214 + continue; 215 215 } 216 216 217 217 if (info->flags & SHARE_MUX_CONF_REG) {
+3 -3
drivers/pinctrl/intel/pinctrl-baytrail.c
··· 401 401 static const unsigned int byt_score_plt_clk0_pins[] = { 96 }; 402 402 static const unsigned int byt_score_plt_clk1_pins[] = { 97 }; 403 403 static const unsigned int byt_score_plt_clk2_pins[] = { 98 }; 404 - static const unsigned int byt_score_plt_clk4_pins[] = { 99 }; 405 - static const unsigned int byt_score_plt_clk5_pins[] = { 100 }; 406 - static const unsigned int byt_score_plt_clk3_pins[] = { 101 }; 404 + static const unsigned int byt_score_plt_clk3_pins[] = { 99 }; 405 + static const unsigned int byt_score_plt_clk4_pins[] = { 100 }; 406 + static const unsigned int byt_score_plt_clk5_pins[] = { 101 }; 407 407 static const struct byt_simple_func_mux byt_score_plt_clk_mux[] = { 408 408 SIMPLE_FUNC("plt_clk", 1), 409 409 };
+3
drivers/pinctrl/pinctrl-single.c
··· 1580 1580 else 1581 1581 mask &= ~soc_mask; 1582 1582 pcs->write(mask, pcswi->reg); 1583 + 1584 + /* flush posted write */ 1585 + mask = pcs->read(pcswi->reg); 1583 1586 raw_spin_unlock(&pcs->lock); 1584 1587 } 1585 1588
+1 -1
drivers/pinctrl/tegra/Makefile
··· 1 - obj-y += pinctrl-tegra.o 1 + obj-$(CONFIG_PINCTRL_TEGRA) += pinctrl-tegra.o 2 2 obj-$(CONFIG_PINCTRL_TEGRA20) += pinctrl-tegra20.o 3 3 obj-$(CONFIG_PINCTRL_TEGRA30) += pinctrl-tegra30.o 4 4 obj-$(CONFIG_PINCTRL_TEGRA114) += pinctrl-tegra114.o
+16 -11
drivers/power/power_supply_core.c
··· 565 565 566 566 WARN_ON(tzd == NULL); 567 567 psy = tzd->devdata; 568 - ret = psy->desc->get_property(psy, POWER_SUPPLY_PROP_TEMP, &val); 568 + ret = power_supply_get_property(psy, POWER_SUPPLY_PROP_TEMP, &val); 569 + if (ret) 570 + return ret; 569 571 570 572 /* Convert tenths of degree Celsius to milli degree Celsius. */ 571 - if (!ret) 572 - *temp = val.intval * 100; 573 + *temp = val.intval * 100; 573 574 574 575 return ret; 575 576 } ··· 613 612 int ret; 614 613 615 614 psy = tcd->devdata; 616 - ret = psy->desc->get_property(psy, 617 - POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX, &val); 618 - if (!ret) 619 - *state = val.intval; 615 + ret = power_supply_get_property(psy, 616 + POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX, &val); 617 + if (ret) 618 + return ret; 619 + 620 + *state = val.intval; 620 621 621 622 return ret; 622 623 } ··· 631 628 int ret; 632 629 633 630 psy = tcd->devdata; 634 - ret = psy->desc->get_property(psy, 635 - POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT, &val); 636 - if (!ret) 637 - *state = val.intval; 631 + ret = power_supply_get_property(psy, 632 + POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT, &val); 633 + if (ret) 634 + return ret; 635 + 636 + *state = val.intval; 638 637 639 638 return ret; 640 639 }
+5 -1
drivers/power/tps65217_charger.c
··· 197 197 { 198 198 struct tps65217 *tps = dev_get_drvdata(pdev->dev.parent); 199 199 struct tps65217_charger *charger; 200 + struct power_supply_config cfg = {}; 200 201 int ret; 201 202 202 203 dev_dbg(&pdev->dev, "%s\n", __func__); ··· 209 208 charger->tps = tps; 210 209 charger->dev = &pdev->dev; 211 210 211 + cfg.of_node = pdev->dev.of_node; 212 + cfg.drv_data = charger; 213 + 212 214 charger->ac = devm_power_supply_register(&pdev->dev, 213 215 &tps65217_charger_desc, 214 - NULL); 216 + &cfg); 215 217 if (IS_ERR(charger->ac)) { 216 218 dev_err(&pdev->dev, "failed: power supply register\n"); 217 219 return PTR_ERR(charger->ac);
+1 -1
drivers/regulator/anatop-regulator.c
··· 296 296 if (!sreg->sel && !strcmp(sreg->name, "vddpu")) 297 297 sreg->sel = 22; 298 298 299 - if (!sreg->sel) { 299 + if (!sreg->bypass && !sreg->sel) { 300 300 dev_err(&pdev->dev, "Failed to read a valid default voltage selector.\n"); 301 301 return -EINVAL; 302 302 }
+6 -1
drivers/regulator/max77620-regulator.c
··· 123 123 unsigned int val; 124 124 int ret; 125 125 126 + if (!rinfo) 127 + return 0; 128 + 126 129 switch (fps_src) { 127 130 case MAX77620_FPS_SRC_0: 128 131 case MAX77620_FPS_SRC_1: ··· 173 170 int pu = rpdata->active_fps_pu_slot; 174 171 int pd = rpdata->active_fps_pd_slot; 175 172 int ret = 0; 173 + 174 + if (!rinfo) 175 + return 0; 176 176 177 177 if (is_suspend) { 178 178 pu = rpdata->suspend_fps_pu_slot; ··· 686 680 RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 1550000, 12500, 0x22, SD1), 687 681 RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE), 688 682 RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE), 689 - RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE), 690 683 691 684 RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000), 692 685 RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
+3 -1
drivers/spi/spi-rockchip.c
··· 578 578 struct spi_device *spi, 579 579 struct spi_transfer *xfer) 580 580 { 581 - int ret = 1; 581 + int ret = 0; 582 582 struct rockchip_spi *rs = spi_master_get_devdata(master); 583 583 584 584 WARN_ON(readl_relaxed(rs->regs + ROCKCHIP_SPI_SSIENR) && ··· 627 627 spi_enable_chip(rs, 1); 628 628 ret = rockchip_spi_prepare_dma(rs); 629 629 } 630 + /* successful DMA prepare means the transfer is in progress */ 631 + ret = ret ? ret : 1; 630 632 } else { 631 633 spi_enable_chip(rs, 1); 632 634 ret = rockchip_spi_pio_transfer(rs);
+19 -4
drivers/spi/spi-sun4i.c
··· 173 173 { 174 174 struct sun4i_spi *sspi = spi_master_get_devdata(master); 175 175 unsigned int mclk_rate, div, timeout; 176 + unsigned int start, end, tx_time; 176 177 unsigned int tx_len = 0; 177 178 int ret = 0; 178 179 u32 reg; 179 180 180 181 /* We don't support transfer larger than the FIFO */ 181 182 if (tfr->len > SUN4I_FIFO_DEPTH) 182 - return -EINVAL; 183 + return -EMSGSIZE; 184 + 185 + if (tfr->tx_buf && tfr->len >= SUN4I_FIFO_DEPTH) 186 + return -EMSGSIZE; 183 187 184 188 reinit_completion(&sspi->done); 185 189 sspi->tx_buf = tfr->tx_buf; ··· 273 269 sun4i_spi_write(sspi, SUN4I_BURST_CNT_REG, SUN4I_BURST_CNT(tfr->len)); 274 270 sun4i_spi_write(sspi, SUN4I_XMIT_CNT_REG, SUN4I_XMIT_CNT(tx_len)); 275 271 276 - /* Fill the TX FIFO */ 277 - sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH); 272 + /* 273 + * Fill the TX FIFO 274 + * Filling the FIFO fully causes timeout for some reason 275 + * at least on spi2 on A10s 276 + */ 277 + sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH - 1); 278 278 279 279 /* Enable the interrupts */ 280 280 sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, SUN4I_INT_CTL_TC); ··· 287 279 reg = sun4i_spi_read(sspi, SUN4I_CTL_REG); 288 280 sun4i_spi_write(sspi, SUN4I_CTL_REG, reg | SUN4I_CTL_XCH); 289 281 282 + tx_time = max(tfr->len * 8 * 2 / (tfr->speed_hz / 1000), 100U); 283 + start = jiffies; 290 284 timeout = wait_for_completion_timeout(&sspi->done, 291 - msecs_to_jiffies(1000)); 285 + msecs_to_jiffies(tx_time)); 286 + end = jiffies; 292 287 if (!timeout) { 288 + dev_warn(&master->dev, 289 + "%s: timeout transferring %u bytes@%iHz for %i(%i)ms", 290 + dev_name(&spi->dev), tfr->len, tfr->speed_hz, 291 + jiffies_to_msecs(end - start), tx_time); 293 292 ret = -ETIMEDOUT; 294 293 goto out; 295 294 }
+9 -1
drivers/spi/spi-sun6i.c
··· 160 160 { 161 161 struct sun6i_spi *sspi = spi_master_get_devdata(master); 162 162 unsigned int mclk_rate, div, timeout; 163 + unsigned int start, end, tx_time; 163 164 unsigned int tx_len = 0; 164 165 int ret = 0; 165 166 u32 reg; ··· 270 269 reg = sun6i_spi_read(sspi, SUN6I_TFR_CTL_REG); 271 270 sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG, reg | SUN6I_TFR_CTL_XCH); 272 271 272 + tx_time = max(tfr->len * 8 * 2 / (tfr->speed_hz / 1000), 100U); 273 + start = jiffies; 273 274 timeout = wait_for_completion_timeout(&sspi->done, 274 - msecs_to_jiffies(1000)); 275 + msecs_to_jiffies(tx_time)); 276 + end = jiffies; 275 277 if (!timeout) { 278 + dev_warn(&master->dev, 279 + "%s: timeout transferring %u bytes@%iHz for %i(%i)ms", 280 + dev_name(&spi->dev), tfr->len, tfr->speed_hz, 281 + jiffies_to_msecs(end - start), tx_time); 276 282 ret = -ETIMEDOUT; 277 283 goto out; 278 284 }
+7
drivers/spi/spi-ti-qspi.c
··· 646 646 647 647 static int ti_qspi_remove(struct platform_device *pdev) 648 648 { 649 + struct ti_qspi *qspi = platform_get_drvdata(pdev); 650 + int rc; 651 + 652 + rc = spi_master_suspend(qspi->master); 653 + if (rc) 654 + return rc; 655 + 649 656 pm_runtime_put_sync(&pdev->dev); 650 657 pm_runtime_disable(&pdev->dev); 651 658
+1 -1
drivers/staging/iio/accel/sca3000_core.c
··· 594 594 goto error_ret_mut; 595 595 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL); 596 596 mutex_unlock(&st->lock); 597 - if (ret) 597 + if (ret < 0) 598 598 goto error_ret; 599 599 val = ret; 600 600 if (base_freq > 0)
+1 -1
drivers/staging/iio/adc/ad7606_spi.c
··· 21 21 { 22 22 struct spi_device *spi = to_spi_device(dev); 23 23 int i, ret; 24 - unsigned short *data; 24 + unsigned short *data = buf; 25 25 __be16 *bdata = buf; 26 26 27 27 ret = spi_read(spi, buf, count * 2);
+3 -3
drivers/staging/iio/impedance-analyzer/ad5933.c
··· 444 444 st->settling_cycles = val; 445 445 446 446 /* 2x, 4x handling, see datasheet */ 447 - if (val > 511) 448 - val = (val >> 1) | (1 << 9); 449 - else if (val > 1022) 447 + if (val > 1022) 450 448 val = (val >> 2) | (3 << 9); 449 + else if (val > 511) 450 + val = (val >> 1) | (1 << 9); 451 451 452 452 dat = cpu_to_be16(val); 453 453 ret = ad5933_i2c_write(st->client,
+5 -2
drivers/tty/pty.c
··· 667 667 fsi = tty->driver_data; 668 668 else 669 669 fsi = tty->link->driver_data; 670 - devpts_kill_index(fsi, tty->index); 671 - devpts_release(fsi); 670 + 671 + if (fsi) { 672 + devpts_kill_index(fsi, tty->index); 673 + devpts_release(fsi); 674 + } 672 675 } 673 676 674 677 static const struct tty_operations ptm_unix98_ops = {
+1
drivers/tty/vt/vt.c
··· 750 750 vc->vc_complement_mask = 0; 751 751 vc->vc_can_do_color = 0; 752 752 vc->vc_panic_force_write = false; 753 + vc->vc_cur_blink_ms = DEFAULT_CURSOR_BLINK_MS; 753 754 vc->vc_sw->con_init(vc, init); 754 755 if (!vc->vc_complement_mask) 755 756 vc->vc_complement_mask = vc->vc_can_do_color ? 0x7700 : 0x0800;
+2
drivers/usb/common/usb-otg-fsm.c
··· 21 21 * 675 Mass Ave, Cambridge, MA 02139, USA. 22 22 */ 23 23 24 + #include <linux/module.h> 24 25 #include <linux/kernel.h> 25 26 #include <linux/types.h> 26 27 #include <linux/mutex.h> ··· 451 450 return fsm->state_changed; 452 451 } 453 452 EXPORT_SYMBOL_GPL(otg_statemachine); 453 + MODULE_LICENSE("GPL");
+7 -10
drivers/usb/core/hcd.c
··· 2598 2598 * Don't deallocate the bandwidth_mutex until the last shared usb_hcd is 2599 2599 * deallocated. 2600 2600 * 2601 - * Make sure to only deallocate the bandwidth_mutex when the primary HCD is 2602 - * freed. When hcd_release() is called for either hcd in a peer set 2603 - * invalidate the peer's ->shared_hcd and ->primary_hcd pointers to 2604 - * block new peering attempts 2601 + * Make sure to deallocate the bandwidth_mutex only when the last HCD is 2602 + * freed. When hcd_release() is called for either hcd in a peer set, 2603 + * invalidate the peer's ->shared_hcd and ->primary_hcd pointers. 2605 2604 */ 2606 2605 static void hcd_release(struct kref *kref) 2607 2606 { 2608 2607 struct usb_hcd *hcd = container_of (kref, struct usb_hcd, kref); 2609 2608 2610 2609 mutex_lock(&usb_port_peer_mutex); 2611 - if (usb_hcd_is_primary_hcd(hcd)) { 2612 - kfree(hcd->address0_mutex); 2613 - kfree(hcd->bandwidth_mutex); 2614 - } 2615 2610 if (hcd->shared_hcd) { 2616 2611 struct usb_hcd *peer = hcd->shared_hcd; 2617 2612 2618 2613 peer->shared_hcd = NULL; 2619 - if (peer->primary_hcd == hcd) 2620 - peer->primary_hcd = NULL; 2614 + peer->primary_hcd = NULL; 2615 + } else { 2616 + kfree(hcd->address0_mutex); 2617 + kfree(hcd->bandwidth_mutex); 2621 2618 } 2622 2619 mutex_unlock(&usb_port_peer_mutex); 2623 2620 kfree(hcd);
+4 -2
drivers/usb/dwc3/dwc3-st.c
··· 233 233 dev_vdbg(&pdev->dev, "glue-logic addr 0x%p, syscfg-reg offset 0x%x\n", 234 234 dwc3_data->glue_base, dwc3_data->syscfg_reg_off); 235 235 236 - dwc3_data->rstc_pwrdn = devm_reset_control_get(dev, "powerdown"); 236 + dwc3_data->rstc_pwrdn = 237 + devm_reset_control_get_exclusive(dev, "powerdown"); 237 238 if (IS_ERR(dwc3_data->rstc_pwrdn)) { 238 239 dev_err(&pdev->dev, "could not get power controller\n"); 239 240 ret = PTR_ERR(dwc3_data->rstc_pwrdn); ··· 244 243 /* Manage PowerDown */ 245 244 reset_control_deassert(dwc3_data->rstc_pwrdn); 246 245 247 - dwc3_data->rstc_rst = devm_reset_control_get(dev, "softreset"); 246 + dwc3_data->rstc_rst = 247 + devm_reset_control_get_shared(dev, "softreset"); 248 248 if (IS_ERR(dwc3_data->rstc_rst)) { 249 249 dev_err(&pdev->dev, "could not get reset controller\n"); 250 250 ret = PTR_ERR(dwc3_data->rstc_rst);
+4 -2
drivers/usb/host/ehci-st.c
··· 206 206 priv->clk48 = NULL; 207 207 } 208 208 209 - priv->pwr = devm_reset_control_get_optional(&dev->dev, "power"); 209 + priv->pwr = 210 + devm_reset_control_get_optional_shared(&dev->dev, "power"); 210 211 if (IS_ERR(priv->pwr)) { 211 212 err = PTR_ERR(priv->pwr); 212 213 if (err == -EPROBE_DEFER) ··· 215 214 priv->pwr = NULL; 216 215 } 217 216 218 - priv->rst = devm_reset_control_get_optional(&dev->dev, "softreset"); 217 + priv->rst = 218 + devm_reset_control_get_optional_shared(&dev->dev, "softreset"); 219 219 if (IS_ERR(priv->rst)) { 220 220 err = PTR_ERR(priv->rst); 221 221 if (err == -EPROBE_DEFER)
+4 -2
drivers/usb/host/ohci-st.c
··· 188 188 priv->clk48 = NULL; 189 189 } 190 190 191 - priv->pwr = devm_reset_control_get_optional(&dev->dev, "power"); 191 + priv->pwr = 192 + devm_reset_control_get_optional_shared(&dev->dev, "power"); 192 193 if (IS_ERR(priv->pwr)) { 193 194 err = PTR_ERR(priv->pwr); 194 195 goto err_put_clks; 195 196 } 196 197 197 - priv->rst = devm_reset_control_get_optional(&dev->dev, "softreset"); 198 + priv->rst = 199 + devm_reset_control_get_optional_shared(&dev->dev, "softreset"); 198 200 if (IS_ERR(priv->rst)) { 199 201 err = PTR_ERR(priv->rst); 200 202 goto err_put_clks;
+3 -3
fs/9p/vfs_file.c
··· 74 74 v9fs_proto_dotu(v9ses)); 75 75 fid = file->private_data; 76 76 if (!fid) { 77 - fid = v9fs_fid_clone(file->f_path.dentry); 77 + fid = v9fs_fid_clone(file_dentry(file)); 78 78 if (IS_ERR(fid)) 79 79 return PTR_ERR(fid); 80 80 ··· 100 100 * because we want write after unlink usecase 101 101 * to work. 102 102 */ 103 - fid = v9fs_writeback_fid(file->f_path.dentry); 103 + fid = v9fs_writeback_fid(file_dentry(file)); 104 104 if (IS_ERR(fid)) { 105 105 err = PTR_ERR(fid); 106 106 mutex_unlock(&v9inode->v_mutex); ··· 516 516 * because we want write after unlink usecase 517 517 * to work. 518 518 */ 519 - fid = v9fs_writeback_fid(filp->f_path.dentry); 519 + fid = v9fs_writeback_fid(file_dentry(filp)); 520 520 if (IS_ERR(fid)) { 521 521 retval = PTR_ERR(fid); 522 522 mutex_unlock(&v9inode->v_mutex);
+3 -7
fs/ceph/export.c
··· 95 95 } 96 96 97 97 dentry = d_obtain_alias(inode); 98 - if (IS_ERR(dentry)) { 99 - iput(inode); 98 + if (IS_ERR(dentry)) 100 99 return dentry; 101 - } 102 100 err = ceph_init_dentry(dentry); 103 101 if (err < 0) { 104 102 dput(dentry); ··· 165 167 return ERR_PTR(-ENOENT); 166 168 167 169 dentry = d_obtain_alias(inode); 168 - if (IS_ERR(dentry)) { 169 - iput(inode); 170 + if (IS_ERR(dentry)) 170 171 return dentry; 171 - } 172 172 err = ceph_init_dentry(dentry); 173 173 if (err < 0) { 174 174 dput(dentry); ··· 206 210 207 211 dout("fh_to_parent %llx\n", cfh->parent_ino); 208 212 dentry = __get_parent(sb, NULL, cfh->ino); 209 - if (IS_ERR(dentry) && PTR_ERR(dentry) == -ENOENT) 213 + if (unlikely(dentry == ERR_PTR(-ENOENT))) 210 214 dentry = __fh_to_dentry(sb, cfh->parent_ino); 211 215 return dentry; 212 216 }
+29 -4
fs/cifs/cifs_unicode.c
··· 101 101 case SFM_SLASH: 102 102 *target = '\\'; 103 103 break; 104 + case SFM_SPACE: 105 + *target = ' '; 106 + break; 107 + case SFM_PERIOD: 108 + *target = '.'; 109 + break; 104 110 default: 105 111 return false; 106 112 } ··· 410 404 return dest_char; 411 405 } 412 406 413 - static __le16 convert_to_sfm_char(char src_char) 407 + static __le16 convert_to_sfm_char(char src_char, bool end_of_string) 414 408 { 415 409 __le16 dest_char; 416 410 ··· 432 426 break; 433 427 case '|': 434 428 dest_char = cpu_to_le16(SFM_PIPE); 429 + break; 430 + case '.': 431 + if (end_of_string) 432 + dest_char = cpu_to_le16(SFM_PERIOD); 433 + else 434 + dest_char = 0; 435 + break; 436 + case ' ': 437 + if (end_of_string) 438 + dest_char = cpu_to_le16(SFM_SPACE); 439 + else 440 + dest_char = 0; 435 441 break; 436 442 default: 437 443 dest_char = 0; ··· 487 469 /* see if we must remap this char */ 488 470 if (map_chars == SFU_MAP_UNI_RSVD) 489 471 dst_char = convert_to_sfu_char(src_char); 490 - else if (map_chars == SFM_MAP_UNI_RSVD) 491 - dst_char = convert_to_sfm_char(src_char); 492 - else 472 + else if (map_chars == SFM_MAP_UNI_RSVD) { 473 + bool end_of_string; 474 + 475 + if (i == srclen - 1) 476 + end_of_string = true; 477 + else 478 + end_of_string = false; 479 + 480 + dst_char = convert_to_sfm_char(src_char, end_of_string); 481 + } else 493 482 dst_char = 0; 494 483 /* 495 484 * FIXME: We can not handle remapping backslash (UNI_SLASH)
+2
fs/cifs/cifs_unicode.h
··· 64 64 #define SFM_LESSTHAN ((__u16) 0xF023) 65 65 #define SFM_PIPE ((__u16) 0xF027) 66 66 #define SFM_SLASH ((__u16) 0xF026) 67 + #define SFM_PERIOD ((__u16) 0xF028) 68 + #define SFM_SPACE ((__u16) 0xF029) 67 69 68 70 /* 69 71 * Mapping mechanism to use when one of the seven reserved characters is
+3
fs/cifs/cifsfs.c
··· 87 87 extern mempool_t *cifs_mid_poolp; 88 88 89 89 struct workqueue_struct *cifsiod_wq; 90 + __u32 cifs_lock_secret; 90 91 91 92 /* 92 93 * Bumps refcount for cifs super block. ··· 1266 1265 spin_lock_init(&cifs_tcp_ses_lock); 1267 1266 spin_lock_init(&cifs_file_list_lock); 1268 1267 spin_lock_init(&GlobalMid_Lock); 1268 + 1269 + get_random_bytes(&cifs_lock_secret, sizeof(cifs_lock_secret)); 1269 1270 1270 1271 if (cifs_max_pending < 2) { 1271 1272 cifs_max_pending = 2;
+1
fs/cifs/cifsglob.h
··· 1619 1619 1620 1620 extern const struct slow_work_ops cifs_oplock_break_ops; 1621 1621 extern struct workqueue_struct *cifsiod_wq; 1622 + extern __u32 cifs_lock_secret; 1622 1623 1623 1624 extern mempool_t *cifs_mid_poolp; 1624 1625
+3 -1
fs/cifs/connect.c
··· 428 428 * server->ops->need_neg() == true. Also, no need to ping if 429 429 * we got a response recently. 430 430 */ 431 - if (!server->ops->need_neg || server->ops->need_neg(server) || 431 + 432 + if (server->tcpStatus == CifsNeedReconnect || 433 + server->tcpStatus == CifsExiting || server->tcpStatus == CifsNew || 432 434 (server->ops->can_echo && !server->ops->can_echo(server)) || 433 435 time_before(jiffies, server->lstrp + echo_interval - HZ)) 434 436 goto requeue_echo;
+11 -3
fs/cifs/file.c
··· 1112 1112 return rc; 1113 1113 } 1114 1114 1115 + static __u32 1116 + hash_lockowner(fl_owner_t owner) 1117 + { 1118 + return cifs_lock_secret ^ hash32_ptr((const void *)owner); 1119 + } 1120 + 1115 1121 struct lock_to_push { 1116 1122 struct list_head llist; 1117 1123 __u64 offset; ··· 1184 1178 else 1185 1179 type = CIFS_WRLCK; 1186 1180 lck = list_entry(el, struct lock_to_push, llist); 1187 - lck->pid = flock->fl_pid; 1181 + lck->pid = hash_lockowner(flock->fl_owner); 1188 1182 lck->netfid = cfile->fid.netfid; 1189 1183 lck->length = length; 1190 1184 lck->type = type; ··· 1311 1305 posix_lock_type = CIFS_RDLCK; 1312 1306 else 1313 1307 posix_lock_type = CIFS_WRLCK; 1314 - rc = CIFSSMBPosixLock(xid, tcon, netfid, current->tgid, 1308 + rc = CIFSSMBPosixLock(xid, tcon, netfid, 1309 + hash_lockowner(flock->fl_owner), 1315 1310 flock->fl_start, length, flock, 1316 1311 posix_lock_type, wait_flag); 1317 1312 return rc; ··· 1512 1505 posix_lock_type = CIFS_UNLCK; 1513 1506 1514 1507 rc = CIFSSMBPosixLock(xid, tcon, cfile->fid.netfid, 1515 - current->tgid, flock->fl_start, length, 1508 + hash_lockowner(flock->fl_owner), 1509 + flock->fl_start, length, 1516 1510 NULL, posix_lock_type, wait_flag); 1517 1511 goto out; 1518 1512 }
+1 -1
fs/cifs/ntlmssp.h
··· 133 133 134 134 int decode_ntlmssp_challenge(char *bcc_ptr, int blob_len, struct cifs_ses *ses); 135 135 void build_ntlmssp_negotiate_blob(unsigned char *pbuffer, struct cifs_ses *ses); 136 - int build_ntlmssp_auth_blob(unsigned char *pbuffer, u16 *buflen, 136 + int build_ntlmssp_auth_blob(unsigned char **pbuffer, u16 *buflen, 137 137 struct cifs_ses *ses, 138 138 const struct nls_table *nls_cp);
+45 -35
fs/cifs/sess.c
··· 364 364 sec_blob->DomainName.MaximumLength = 0; 365 365 } 366 366 367 - /* We do not malloc the blob, it is passed in pbuffer, because its 368 - maximum possible size is fixed and small, making this approach cleaner. 369 - This function returns the length of the data in the blob */ 370 - int build_ntlmssp_auth_blob(unsigned char *pbuffer, 367 + static int size_of_ntlmssp_blob(struct cifs_ses *ses) 368 + { 369 + int sz = sizeof(AUTHENTICATE_MESSAGE) + ses->auth_key.len 370 + - CIFS_SESS_KEY_SIZE + CIFS_CPHTXT_SIZE + 2; 371 + 372 + if (ses->domainName) 373 + sz += 2 * strnlen(ses->domainName, CIFS_MAX_DOMAINNAME_LEN); 374 + else 375 + sz += 2; 376 + 377 + if (ses->user_name) 378 + sz += 2 * strnlen(ses->user_name, CIFS_MAX_USERNAME_LEN); 379 + else 380 + sz += 2; 381 + 382 + return sz; 383 + } 384 + 385 + int build_ntlmssp_auth_blob(unsigned char **pbuffer, 371 386 u16 *buflen, 372 387 struct cifs_ses *ses, 373 388 const struct nls_table *nls_cp) 374 389 { 375 390 int rc; 376 - AUTHENTICATE_MESSAGE *sec_blob = (AUTHENTICATE_MESSAGE *)pbuffer; 391 + AUTHENTICATE_MESSAGE *sec_blob; 377 392 __u32 flags; 378 393 unsigned char *tmp; 394 + 395 + rc = setup_ntlmv2_rsp(ses, nls_cp); 396 + if (rc) { 397 + cifs_dbg(VFS, "Error %d during NTLMSSP authentication\n", rc); 398 + *buflen = 0; 399 + goto setup_ntlmv2_ret; 400 + } 401 + *pbuffer = kmalloc(size_of_ntlmssp_blob(ses), GFP_KERNEL); 402 + sec_blob = (AUTHENTICATE_MESSAGE *)*pbuffer; 379 403 380 404 memcpy(sec_blob->Signature, NTLMSSP_SIGNATURE, 8); 381 405 sec_blob->MessageType = NtLmAuthenticate; ··· 415 391 flags |= NTLMSSP_NEGOTIATE_KEY_XCH; 416 392 } 417 393 418 - tmp = pbuffer + sizeof(AUTHENTICATE_MESSAGE); 394 + tmp = *pbuffer + sizeof(AUTHENTICATE_MESSAGE); 419 395 sec_blob->NegotiateFlags = cpu_to_le32(flags); 420 396 421 397 sec_blob->LmChallengeResponse.BufferOffset = ··· 423 399 sec_blob->LmChallengeResponse.Length = 0; 424 400 sec_blob->LmChallengeResponse.MaximumLength = 0; 425 401 426 - sec_blob->NtChallengeResponse.BufferOffset = cpu_to_le32(tmp - pbuffer); 402 + sec_blob->NtChallengeResponse.BufferOffset = 403 + cpu_to_le32(tmp - *pbuffer); 427 404 if (ses->user_name != NULL) { 428 - rc = setup_ntlmv2_rsp(ses, nls_cp); 429 - if (rc) { 430 - cifs_dbg(VFS, "Error %d during NTLMSSP authentication\n", rc); 431 - goto setup_ntlmv2_ret; 432 - } 433 405 memcpy(tmp, ses->auth_key.response + CIFS_SESS_KEY_SIZE, 434 406 ses->auth_key.len - CIFS_SESS_KEY_SIZE); 435 407 tmp += ses->auth_key.len - CIFS_SESS_KEY_SIZE; ··· 443 423 } 444 424 445 425 if (ses->domainName == NULL) { 446 - sec_blob->DomainName.BufferOffset = cpu_to_le32(tmp - pbuffer); 426 + sec_blob->DomainName.BufferOffset = cpu_to_le32(tmp - *pbuffer); 447 427 sec_blob->DomainName.Length = 0; 448 428 sec_blob->DomainName.MaximumLength = 0; 449 429 tmp += 2; 450 430 } else { 451 431 int len; 452 432 len = cifs_strtoUTF16((__le16 *)tmp, ses->domainName, 453 - CIFS_MAX_USERNAME_LEN, nls_cp); 433 + CIFS_MAX_DOMAINNAME_LEN, nls_cp); 454 434 len *= 2; /* unicode is 2 bytes each */ 455 - sec_blob->DomainName.BufferOffset = cpu_to_le32(tmp - pbuffer); 435 + sec_blob->DomainName.BufferOffset = cpu_to_le32(tmp - *pbuffer); 456 436 sec_blob->DomainName.Length = cpu_to_le16(len); 457 437 sec_blob->DomainName.MaximumLength = cpu_to_le16(len); 458 438 tmp += len; 459 439 } 460 440 461 441 if (ses->user_name == NULL) { 462 - sec_blob->UserName.BufferOffset = cpu_to_le32(tmp - pbuffer); 442 + sec_blob->UserName.BufferOffset = cpu_to_le32(tmp - *pbuffer); 463 443 sec_blob->UserName.Length = 0; 464 444 sec_blob->UserName.MaximumLength = 0; 465 445 tmp += 2; ··· 468 448 len = cifs_strtoUTF16((__le16 *)tmp, ses->user_name, 469 449 CIFS_MAX_USERNAME_LEN, nls_cp); 470 450 len *= 2; /* unicode is 2 bytes each */ 471 - sec_blob->UserName.BufferOffset = cpu_to_le32(tmp - pbuffer); 451 + sec_blob->UserName.BufferOffset = cpu_to_le32(tmp - *pbuffer); 472 452 sec_blob->UserName.Length = cpu_to_le16(len); 473 453 sec_blob->UserName.MaximumLength = cpu_to_le16(len); 474 454 tmp += len; 475 455 } 476 456 477 - sec_blob->WorkstationName.BufferOffset = cpu_to_le32(tmp - pbuffer); 457 + sec_blob->WorkstationName.BufferOffset = cpu_to_le32(tmp - *pbuffer); 478 458 sec_blob->WorkstationName.Length = 0; 479 459 sec_blob->WorkstationName.MaximumLength = 0; 480 460 tmp += 2; ··· 483 463 (ses->ntlmssp->server_flags & NTLMSSP_NEGOTIATE_EXTENDED_SEC)) 484 464 && !calc_seckey(ses)) { 485 465 memcpy(tmp, ses->ntlmssp->ciphertext, CIFS_CPHTXT_SIZE); 486 - sec_blob->SessionKey.BufferOffset = cpu_to_le32(tmp - pbuffer); 466 + sec_blob->SessionKey.BufferOffset = cpu_to_le32(tmp - *pbuffer); 487 467 sec_blob->SessionKey.Length = cpu_to_le16(CIFS_CPHTXT_SIZE); 488 468 sec_blob->SessionKey.MaximumLength = 489 469 cpu_to_le16(CIFS_CPHTXT_SIZE); 490 470 tmp += CIFS_CPHTXT_SIZE; 491 471 } else { 492 - sec_blob->SessionKey.BufferOffset = cpu_to_le32(tmp - pbuffer); 472 + sec_blob->SessionKey.BufferOffset = cpu_to_le32(tmp - *pbuffer); 493 473 sec_blob->SessionKey.Length = 0; 494 474 sec_blob->SessionKey.MaximumLength = 0; 495 475 } 496 476 477 + *buflen = tmp - *pbuffer; 497 478 setup_ntlmv2_ret: 498 - *buflen = tmp - pbuffer; 499 479 return rc; 500 480 } 501 481 ··· 710 690 rc = calc_lanman_hash(ses->password, ses->server->cryptkey, 711 691 ses->server->sec_mode & SECMODE_PW_ENCRYPT ? 712 692 true : false, lnm_session_key); 693 + if (rc) 694 + goto out; 713 695 714 696 memcpy(bcc_ptr, (char *)lnm_session_key, CIFS_AUTH_RESP_SIZE); 715 697 bcc_ptr += CIFS_AUTH_RESP_SIZE; ··· 1288 1266 struct cifs_ses *ses = sess_data->ses; 1289 1267 __u16 bytes_remaining; 1290 1268 char *bcc_ptr; 1291 - char *ntlmsspblob = NULL; 1269 + unsigned char *ntlmsspblob = NULL; 1292 1270 u16 blob_len; 1293 1271 1294 1272 cifs_dbg(FYI, "rawntlmssp session setup authenticate phase\n"); ··· 1301 1279 /* Build security blob before we assemble the request */ 1302 1280 pSMB = (SESSION_SETUP_ANDX *)sess_data->iov[0].iov_base; 1303 1281 smb_buf = (struct smb_hdr *)pSMB; 1304 - /* 1305 - * 5 is an empirical value, large enough to hold 1306 - * authenticate message plus max 10 of av paris, 1307 - * domain, user, workstation names, flags, etc. 1308 - */ 1309 - ntlmsspblob = kzalloc(5*sizeof(struct _AUTHENTICATE_MESSAGE), 1310 - GFP_KERNEL); 1311 - if (!ntlmsspblob) { 1312 - rc = -ENOMEM; 1313 - goto out; 1314 - } 1315 - 1316 - rc = build_ntlmssp_auth_blob(ntlmsspblob, 1282 + rc = build_ntlmssp_auth_blob(&ntlmsspblob, 1317 1283 &blob_len, ses, sess_data->nls_cp); 1318 1284 if (rc) 1319 1285 goto out_free_ntlmsspblob;
+29 -8
fs/cifs/smb2pdu.c
··· 588 588 u16 blob_length = 0; 589 589 struct key *spnego_key = NULL; 590 590 char *security_blob = NULL; 591 - char *ntlmssp_blob = NULL; 591 + unsigned char *ntlmssp_blob = NULL; 592 592 bool use_spnego = false; /* else use raw ntlmssp */ 593 593 594 594 cifs_dbg(FYI, "Session Setup\n"); ··· 713 713 iov[1].iov_len = blob_length; 714 714 } else if (phase == NtLmAuthenticate) { 715 715 req->hdr.SessionId = ses->Suid; 716 - ntlmssp_blob = kzalloc(sizeof(struct _NEGOTIATE_MESSAGE) + 500, 717 - GFP_KERNEL); 718 - if (ntlmssp_blob == NULL) { 719 - rc = -ENOMEM; 720 - goto ssetup_exit; 721 - } 722 - rc = build_ntlmssp_auth_blob(ntlmssp_blob, &blob_length, ses, 716 + rc = build_ntlmssp_auth_blob(&ntlmssp_blob, &blob_length, ses, 723 717 nls_cp); 724 718 if (rc) { 725 719 cifs_dbg(FYI, "build_ntlmssp_auth_blob failed %d\n", ··· 1811 1817 .rq_nvec = 1 }; 1812 1818 1813 1819 cifs_dbg(FYI, "In echo request\n"); 1820 + 1821 + if (server->tcpStatus == CifsNeedNegotiate) { 1822 + struct list_head *tmp, *tmp2; 1823 + struct cifs_ses *ses; 1824 + struct cifs_tcon *tcon; 1825 + 1826 + cifs_dbg(FYI, "Need negotiate, reconnecting tcons\n"); 1827 + spin_lock(&cifs_tcp_ses_lock); 1828 + list_for_each(tmp, &server->smb_ses_list) { 1829 + ses = list_entry(tmp, struct cifs_ses, smb_ses_list); 1830 + list_for_each(tmp2, &ses->tcon_list) { 1831 + tcon = list_entry(tmp2, struct cifs_tcon, 1832 + tcon_list); 1833 + /* add check for persistent handle reconnect */ 1834 + if (tcon && tcon->need_reconnect) { 1835 + spin_unlock(&cifs_tcp_ses_lock); 1836 + rc = smb2_reconnect(SMB2_ECHO, tcon); 1837 + spin_lock(&cifs_tcp_ses_lock); 1838 + } 1839 + } 1840 + } 1841 + spin_unlock(&cifs_tcp_ses_lock); 1842 + } 1843 + 1844 + /* if no session, renegotiate failed above */ 1845 + if (server->tcpStatus == CifsNeedNegotiate) 1846 + return -EIO; 1814 1847 1815 1848 rc = small_smb2_init(SMB2_ECHO, NULL, (void **)&req); 1816 1849 if (rc)
+6 -1
fs/dax.c
··· 208 208 dax.addr += first; 209 209 size = map_len - first; 210 210 } 211 - max = min(pos + size, end); 211 + /* 212 + * pos + size is one past the last offset for IO, 213 + * so pos + size can overflow loff_t at extreme offsets. 214 + * Cast to u64 to catch this and get the true minimum. 215 + */ 216 + max = min_t(u64, pos + size, end); 212 217 } 213 218 214 219 if (iov_iter_rw(iter) == WRITE) {
+71 -38
fs/libfs.c
··· 84 84 } 85 85 EXPORT_SYMBOL(dcache_dir_close); 86 86 87 + /* parent is locked at least shared */ 88 + static struct dentry *next_positive(struct dentry *parent, 89 + struct list_head *from, 90 + int count) 91 + { 92 + unsigned *seq = &parent->d_inode->i_dir_seq, n; 93 + struct dentry *res; 94 + struct list_head *p; 95 + bool skipped; 96 + int i; 97 + 98 + retry: 99 + i = count; 100 + skipped = false; 101 + n = smp_load_acquire(seq) & ~1; 102 + res = NULL; 103 + rcu_read_lock(); 104 + for (p = from->next; p != &parent->d_subdirs; p = p->next) { 105 + struct dentry *d = list_entry(p, struct dentry, d_child); 106 + if (!simple_positive(d)) { 107 + skipped = true; 108 + } else if (!--i) { 109 + res = d; 110 + break; 111 + } 112 + } 113 + rcu_read_unlock(); 114 + if (skipped) { 115 + smp_rmb(); 116 + if (unlikely(*seq != n)) 117 + goto retry; 118 + } 119 + return res; 120 + } 121 + 122 + static void move_cursor(struct dentry *cursor, struct list_head *after) 123 + { 124 + struct dentry *parent = cursor->d_parent; 125 + unsigned n, *seq = &parent->d_inode->i_dir_seq; 126 + spin_lock(&parent->d_lock); 127 + for (;;) { 128 + n = *seq; 129 + if (!(n & 1) && cmpxchg(seq, n, n + 1) == n) 130 + break; 131 + cpu_relax(); 132 + } 133 + __list_del(cursor->d_child.prev, cursor->d_child.next); 134 + if (after) 135 + list_add(&cursor->d_child, after); 136 + else 137 + list_add_tail(&cursor->d_child, &parent->d_subdirs); 138 + smp_store_release(seq, n + 2); 139 + spin_unlock(&parent->d_lock); 140 + } 141 + 87 142 loff_t dcache_dir_lseek(struct file *file, loff_t offset, int whence) 88 143 { 89 144 struct dentry *dentry = file->f_path.dentry; ··· 154 99 if (offset != file->f_pos) { 155 100 file->f_pos = offset; 156 101 if (file->f_pos >= 2) { 157 - struct list_head *p; 158 102 struct dentry *cursor = file->private_data; 103 + struct dentry *to; 159 104 loff_t n = file->f_pos - 2; 160 105 161 - spin_lock(&dentry->d_lock); 162 - /* d_lock not required for cursor */ 163 - list_del(&cursor->d_child); 164 - p = dentry->d_subdirs.next; 165 - while (n && p != &dentry->d_subdirs) { 166 - struct dentry *next; 167 - next = list_entry(p, struct dentry, d_child); 168 - spin_lock_nested(&next->d_lock, DENTRY_D_LOCK_NESTED); 169 - if (simple_positive(next)) 170 - n--; 171 - spin_unlock(&next->d_lock); 172 - p = p->next; 173 - } 174 - list_add_tail(&cursor->d_child, p); 175 - spin_unlock(&dentry->d_lock); 106 + inode_lock_shared(dentry->d_inode); 107 + to = next_positive(dentry, &dentry->d_subdirs, n); 108 + move_cursor(cursor, to ? &to->d_child : NULL); 109 + inode_unlock_shared(dentry->d_inode); 176 110 } 177 111 } 178 112 return offset; ··· 184 140 { 185 141 struct dentry *dentry = file->f_path.dentry; 186 142 struct dentry *cursor = file->private_data; 187 - struct list_head *p, *q = &cursor->d_child; 143 + struct list_head *p = &cursor->d_child; 144 + struct dentry *next; 145 + bool moved = false; 188 146 189 147 if (!dir_emit_dots(file, ctx)) 190 148 return 0; 191 - spin_lock(&dentry->d_lock); 149 + 192 150 if (ctx->pos == 2) 193 - list_move(q, &dentry->d_subdirs); 194 - 195 - for (p = q->next; p != &dentry->d_subdirs; p = p->next) { 196 - struct dentry *next = list_entry(p, struct dentry, d_child); 197 - spin_lock_nested(&next->d_lock, DENTRY_D_LOCK_NESTED); 198 - if (!simple_positive(next)) { 199 - spin_unlock(&next->d_lock); 200 - continue; 201 - } 202 - 203 - spin_unlock(&next->d_lock); 204 - spin_unlock(&dentry->d_lock); 151 + p = &dentry->d_subdirs; 152 + while ((next = next_positive(dentry, p, 1)) != NULL) { 205 153 if (!dir_emit(ctx, next->d_name.name, next->d_name.len, 206 154 d_inode(next)->i_ino, dt_type(d_inode(next)))) 207 - return 0; 208 - spin_lock(&dentry->d_lock); 209 - spin_lock_nested(&next->d_lock, DENTRY_D_LOCK_NESTED); 210 - /* next is still alive */ 211 - list_move(q, p); 212 - spin_unlock(&next->d_lock); 213 - p = q; 155 + break; 156 + moved = true; 157 + p = &next->d_child; 214 158 ctx->pos++; 215 159 } 216 - spin_unlock(&dentry->d_lock); 160 + if (moved) 161 + move_cursor(cursor, p); 217 162 return 0; 218 163 } 219 164 EXPORT_SYMBOL(dcache_readdir);
+10 -3
fs/lockd/svc.c
··· 335 335 }; 336 336 #endif 337 337 338 - static void lockd_svc_exit_thread(void) 338 + static void lockd_unregister_notifiers(void) 339 339 { 340 340 unregister_inetaddr_notifier(&lockd_inetaddr_notifier); 341 341 #if IS_ENABLED(CONFIG_IPV6) 342 342 unregister_inet6addr_notifier(&lockd_inet6addr_notifier); 343 343 #endif 344 + } 345 + 346 + static void lockd_svc_exit_thread(void) 347 + { 348 + lockd_unregister_notifiers(); 344 349 svc_exit_thread(nlmsvc_rqst); 345 350 } 346 351 ··· 467 462 * Note: svc_serv structures have an initial use count of 1, 468 463 * so we exit through here on both success and failure. 469 464 */ 470 - err_net: 465 + err_put: 471 466 svc_destroy(serv); 472 467 err_create: 473 468 mutex_unlock(&nlmsvc_mutex); ··· 475 470 476 471 err_start: 477 472 lockd_down_net(serv, net); 478 - goto err_net; 473 + err_net: 474 + lockd_unregister_notifiers(); 475 + goto err_put; 479 476 } 480 477 EXPORT_SYMBOL_GPL(lockd_up); 481 478
+1 -1
fs/locks.c
··· 1628 1628 { 1629 1629 struct file_lock *fl, *my_fl = NULL, *lease; 1630 1630 struct dentry *dentry = filp->f_path.dentry; 1631 - struct inode *inode = dentry->d_inode; 1631 + struct inode *inode = file_inode(filp); 1632 1632 struct file_lock_context *ctx; 1633 1633 bool is_deleg = (*flp)->fl_flags & FL_DELEG; 1634 1634 int error;
+1
fs/namespace.c
··· 1562 1562 goto out_unlock; 1563 1563 1564 1564 lock_mount_hash(); 1565 + event++; 1565 1566 while (!hlist_empty(&mp->m_list)) { 1566 1567 mnt = hlist_entry(mp->m_list.first, struct mount, mnt_mp_list); 1567 1568 if (mnt->mnt.mnt_flags & MNT_UMOUNT) {
+7 -4
fs/nfs/dir.c
··· 424 424 static 425 425 int nfs_same_file(struct dentry *dentry, struct nfs_entry *entry) 426 426 { 427 + struct inode *inode; 427 428 struct nfs_inode *nfsi; 428 429 429 430 if (d_really_is_negative(dentry)) 430 431 return 0; 431 432 432 - nfsi = NFS_I(d_inode(dentry)); 433 + inode = d_inode(dentry); 434 + if (is_bad_inode(inode) || NFS_STALE(inode)) 435 + return 0; 436 + 437 + nfsi = NFS_I(inode); 433 438 if (entry->fattr->fileid == nfsi->fileid) 434 439 return 1; 435 440 if (nfs_compare_fh(entry->fh, &nfsi->fh) == 0) ··· 1368 1363 struct dentry *nfs_lookup(struct inode *dir, struct dentry * dentry, unsigned int flags) 1369 1364 { 1370 1365 struct dentry *res; 1371 - struct dentry *parent; 1372 1366 struct inode *inode = NULL; 1373 1367 struct nfs_fh *fhandle = NULL; 1374 1368 struct nfs_fattr *fattr = NULL; ··· 1397 1393 if (IS_ERR(label)) 1398 1394 goto out; 1399 1395 1400 - parent = dentry->d_parent; 1401 1396 /* Protect against concurrent sillydeletes */ 1402 1397 trace_nfs_lookup_enter(dir, dentry, flags); 1403 1398 error = NFS_PROTO(dir)->lookup(dir, &dentry->d_name, fhandle, fattr, label); ··· 1539 1536 err = PTR_ERR(inode); 1540 1537 trace_nfs_atomic_open_exit(dir, ctx, open_flags, err); 1541 1538 put_nfs_open_context(ctx); 1539 + d_drop(dentry); 1542 1540 switch (err) { 1543 1541 case -ENOENT: 1544 - d_drop(dentry); 1545 1542 d_add(dentry, NULL); 1546 1543 nfs_set_verifier(dentry, nfs_save_change_attribute(dir)); 1547 1544 break;
+7 -3
fs/nfs/direct.c
··· 353 353 354 354 result = wait_for_completion_killable(&dreq->completion); 355 355 356 + if (!result) { 357 + result = dreq->count; 358 + WARN_ON_ONCE(dreq->count < 0); 359 + } 356 360 if (!result) 357 361 result = dreq->error; 358 - if (!result) 359 - result = dreq->count; 360 362 361 363 out: 362 364 return (ssize_t) result; ··· 388 386 389 387 if (dreq->iocb) { 390 388 long res = (long) dreq->error; 391 - if (!res) 389 + if (dreq->count != 0) { 392 390 res = (long) dreq->count; 391 + WARN_ON_ONCE(dreq->count < 0); 392 + } 393 393 dreq->iocb->ki_complete(dreq->iocb, res, 0); 394 394 } 395 395
+1
fs/nfs/inode.c
··· 282 282 struct nfs_fattr *fattr = desc->fattr; 283 283 284 284 set_nfs_fileid(inode, fattr->fileid); 285 + inode->i_mode = fattr->mode; 285 286 nfs_copy_fh(NFS_FH(inode), desc->fh); 286 287 return 0; 287 288 }
+10 -8
fs/nfs/nfs4proc.c
··· 2882 2882 call_close |= is_wronly; 2883 2883 else if (is_wronly) 2884 2884 calldata->arg.fmode |= FMODE_WRITE; 2885 + if (calldata->arg.fmode != (FMODE_READ|FMODE_WRITE)) 2886 + call_close |= is_rdwr; 2885 2887 } else if (is_rdwr) 2886 2888 calldata->arg.fmode |= FMODE_READ|FMODE_WRITE; 2887 - 2888 - if (calldata->arg.fmode == 0) 2889 - call_close |= is_rdwr; 2890 2889 2891 2890 if (!nfs4_valid_open_stateid(state)) 2892 2891 call_close = 0; ··· 7923 7924 break; 7924 7925 } 7925 7926 lo = NFS_I(inode)->layout; 7926 - if (lo && nfs4_stateid_match(&lgp->args.stateid, 7927 - &lo->plh_stateid)) { 7927 + if (lo && !test_bit(NFS_LAYOUT_INVALID_STID, &lo->plh_flags) && 7928 + nfs4_stateid_match_other(&lgp->args.stateid, &lo->plh_stateid)) { 7928 7929 LIST_HEAD(head); 7929 7930 7930 7931 /* ··· 7935 7936 pnfs_mark_matching_lsegs_invalid(lo, &head, NULL, 0); 7936 7937 spin_unlock(&inode->i_lock); 7937 7938 pnfs_free_lseg_list(&head); 7939 + status = -EAGAIN; 7940 + goto out; 7938 7941 } else 7939 7942 spin_unlock(&inode->i_lock); 7940 - status = -EAGAIN; 7941 - goto out; 7942 7943 } 7943 7944 7944 7945 status = nfs4_handle_exception(server, status, exception); ··· 8035 8036 .flags = RPC_TASK_ASYNC, 8036 8037 }; 8037 8038 struct pnfs_layout_segment *lseg = NULL; 8038 - struct nfs4_exception exception = { .timeout = *timeout }; 8039 + struct nfs4_exception exception = { 8040 + .inode = inode, 8041 + .timeout = *timeout, 8042 + }; 8039 8043 int status = 0; 8040 8044 8041 8045 dprintk("--> %s\n", __func__);
+1 -1
fs/nfs/nfs4state.c
··· 1488 1488 } 1489 1489 spin_unlock(&state->state_lock); 1490 1490 } 1491 - nfs4_put_open_state(state); 1492 1491 clear_bit(NFS_STATE_RECLAIM_NOGRACE, 1493 1492 &state->flags); 1493 + nfs4_put_open_state(state); 1494 1494 spin_lock(&sp->so_lock); 1495 1495 goto restart; 1496 1496 }
+7 -3
fs/nfs/pnfs.c
··· 361 361 list_del_init(&lseg->pls_list); 362 362 /* Matched by pnfs_get_layout_hdr in pnfs_layout_insert_lseg */ 363 363 atomic_dec(&lo->plh_refcount); 364 - if (list_empty(&lo->plh_segs)) 364 + if (list_empty(&lo->plh_segs)) { 365 + set_bit(NFS_LAYOUT_INVALID_STID, &lo->plh_flags); 365 366 clear_bit(NFS_LAYOUT_BULK_RECALL, &lo->plh_flags); 367 + } 366 368 rpc_wake_up(&NFS_SERVER(inode)->roc_rpcwaitq); 367 369 } 368 370 ··· 1292 1290 INIT_LIST_HEAD(&lo->plh_bulk_destroy); 1293 1291 lo->plh_inode = ino; 1294 1292 lo->plh_lc_cred = get_rpccred(ctx->cred); 1293 + lo->plh_flags |= 1 << NFS_LAYOUT_INVALID_STID; 1295 1294 return lo; 1296 1295 } 1297 1296 ··· 1300 1297 pnfs_find_alloc_layout(struct inode *ino, 1301 1298 struct nfs_open_context *ctx, 1302 1299 gfp_t gfp_flags) 1300 + __releases(&ino->i_lock) 1301 + __acquires(&ino->i_lock) 1303 1302 { 1304 1303 struct nfs_inode *nfsi = NFS_I(ino); 1305 1304 struct pnfs_layout_hdr *new = NULL; ··· 1570 1565 * stateid, or it has been invalidated, then we must use the open 1571 1566 * stateid. 1572 1567 */ 1573 - if (lo->plh_stateid.seqid == 0 || 1574 - test_bit(NFS_LAYOUT_INVALID_STID, &lo->plh_flags)) { 1568 + if (test_bit(NFS_LAYOUT_INVALID_STID, &lo->plh_flags)) { 1575 1569 1576 1570 /* 1577 1571 * The first layoutget for the file. Need to serialize per
+10 -2
fs/nfs/pnfs_nfs.c
··· 247 247 } 248 248 249 249 /* Helper function for pnfs_generic_commit_pagelist to catch an empty 250 - * page list. This can happen when two commits race. */ 250 + * page list. This can happen when two commits race. 251 + * 252 + * This must be called instead of nfs_init_commit - call one or the other, but 253 + * not both! 254 + */ 251 255 static bool 252 256 pnfs_generic_commit_cancel_empty_pagelist(struct list_head *pages, 253 257 struct nfs_commit_data *data, ··· 260 256 if (list_empty(pages)) { 261 257 if (atomic_dec_and_test(&cinfo->mds->rpcs_out)) 262 258 wake_up_atomic_t(&cinfo->mds->rpcs_out); 263 - nfs_commitdata_release(data); 259 + /* don't call nfs_commitdata_release - it tries to put 260 + * the open_context which is not acquired until nfs_init_commit 261 + * which has not been called on @data */ 262 + WARN_ON_ONCE(data->context); 263 + nfs_commit_free(data); 264 264 return true; 265 265 } 266 266
+2 -2
fs/nfs/read.c
··· 367 367 nfs_list_remove_request(new); 368 368 nfs_readpage_release(new); 369 369 error = desc->pgio->pg_error; 370 - goto out_unlock; 370 + goto out; 371 371 } 372 372 return 0; 373 373 out_error: 374 374 error = PTR_ERR(new); 375 - out_unlock: 376 375 unlock_page(page); 376 + out: 377 377 return error; 378 378 } 379 379
+4 -6
include/drm/i915_pciids.h
··· 309 309 INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \ 310 310 INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \ 311 311 INTEL_VGA_DEVICE(0x5902, info), /* DT GT1 */ \ 312 + INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \ 312 313 INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \ 313 314 INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */ 314 315 ··· 323 322 INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */ 324 323 325 324 #define INTEL_KBL_GT3_IDS(info) \ 325 + INTEL_VGA_DEVICE(0x5923, info), /* ULT GT3 */ \ 326 326 INTEL_VGA_DEVICE(0x5926, info), /* ULT GT3 */ \ 327 - INTEL_VGA_DEVICE(0x592B, info), /* Halo GT3 */ \ 328 - INTEL_VGA_DEVICE(0x592A, info) /* SRV GT3 */ 327 + INTEL_VGA_DEVICE(0x5927, info) /* ULT GT3 */ 329 328 330 329 #define INTEL_KBL_GT4_IDS(info) \ 331 - INTEL_VGA_DEVICE(0x5932, info), /* DT GT4 */ \ 332 - INTEL_VGA_DEVICE(0x593B, info), /* Halo GT4 */ \ 333 - INTEL_VGA_DEVICE(0x593A, info), /* SRV GT4 */ \ 334 - INTEL_VGA_DEVICE(0x593D, info) /* WKS GT4 */ 330 + INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */ 335 331 336 332 #define INTEL_KBL_IDS(info) \ 337 333 INTEL_KBL_GT1_IDS(info), \
+2 -2
include/kvm/arm_pmu.h
··· 18 18 #ifndef __ASM_ARM_KVM_PMU_H 19 19 #define __ASM_ARM_KVM_PMU_H 20 20 21 - #ifdef CONFIG_KVM_ARM_PMU 22 - 23 21 #include <linux/perf_event.h> 24 22 #include <asm/perf_event.h> 25 23 26 24 #define ARMV8_PMU_CYCLE_IDX (ARMV8_PMU_MAX_COUNTERS - 1) 25 + 26 + #ifdef CONFIG_KVM_ARM_PMU 27 27 28 28 struct kvm_pmc { 29 29 u8 idx; /* index into the pmu->pmc array */
-24
include/linux/audit.h
··· 26 26 #include <linux/sched.h> 27 27 #include <linux/ptrace.h> 28 28 #include <uapi/linux/audit.h> 29 - #include <linux/tty.h> 30 29 31 30 #define AUDIT_INO_UNSET ((unsigned long)-1) 32 31 #define AUDIT_DEV_UNSET ((dev_t)-1) ··· 347 348 return tsk->sessionid; 348 349 } 349 350 350 - static inline struct tty_struct *audit_get_tty(struct task_struct *tsk) 351 - { 352 - struct tty_struct *tty = NULL; 353 - unsigned long flags; 354 - 355 - spin_lock_irqsave(&tsk->sighand->siglock, flags); 356 - if (tsk->signal) 357 - tty = tty_kref_get(tsk->signal->tty); 358 - spin_unlock_irqrestore(&tsk->sighand->siglock, flags); 359 - return tty; 360 - } 361 - 362 - static inline void audit_put_tty(struct tty_struct *tty) 363 - { 364 - tty_kref_put(tty); 365 - } 366 - 367 351 extern void __audit_ipc_obj(struct kern_ipc_perm *ipcp); 368 352 extern void __audit_ipc_set_perm(unsigned long qbytes, uid_t uid, gid_t gid, umode_t mode); 369 353 extern void __audit_bprm(struct linux_binprm *bprm); ··· 504 522 { 505 523 return -1; 506 524 } 507 - static inline struct tty_struct *audit_get_tty(struct task_struct *tsk) 508 - { 509 - return NULL; 510 - } 511 - static inline void audit_put_tty(struct tty_struct *tty) 512 - { } 513 525 static inline void audit_ipc_obj(struct kern_ipc_perm *ipcp) 514 526 { } 515 527 static inline void audit_ipc_set_perm(unsigned long qbytes, uid_t uid,
+31 -1
include/linux/bpf.h
··· 111 111 BPF_WRITE = 2 112 112 }; 113 113 114 + /* types of values stored in eBPF registers */ 115 + enum bpf_reg_type { 116 + NOT_INIT = 0, /* nothing was written into register */ 117 + UNKNOWN_VALUE, /* reg doesn't contain a valid pointer */ 118 + PTR_TO_CTX, /* reg points to bpf_context */ 119 + CONST_PTR_TO_MAP, /* reg points to struct bpf_map */ 120 + PTR_TO_MAP_VALUE, /* reg points to map element value */ 121 + PTR_TO_MAP_VALUE_OR_NULL,/* points to map elem value or NULL */ 122 + FRAME_PTR, /* reg == frame_pointer */ 123 + PTR_TO_STACK, /* reg == frame_pointer + imm */ 124 + CONST_IMM, /* constant integer value */ 125 + 126 + /* PTR_TO_PACKET represents: 127 + * skb->data 128 + * skb->data + imm 129 + * skb->data + (u16) var 130 + * skb->data + (u16) var + imm 131 + * if (range > 0) then [ptr, ptr + range - off) is safe to access 132 + * if (id > 0) means that some 'var' was added 133 + * if (off > 0) menas that 'imm' was added 134 + */ 135 + PTR_TO_PACKET, 136 + PTR_TO_PACKET_END, /* skb->data + headlen */ 137 + }; 138 + 114 139 struct bpf_prog; 115 140 116 141 struct bpf_verifier_ops { ··· 145 120 /* return true if 'size' wide access at offset 'off' within bpf_context 146 121 * with 'type' (read or write) is allowed 147 122 */ 148 - bool (*is_valid_access)(int off, int size, enum bpf_access_type type); 123 + bool (*is_valid_access)(int off, int size, enum bpf_access_type type, 124 + enum bpf_reg_type *reg_type); 149 125 150 126 u32 (*convert_ctx_access)(enum bpf_access_type type, int dst_reg, 151 127 int src_reg, int ctx_off, ··· 262 236 } 263 237 264 238 static inline void bpf_prog_put(struct bpf_prog *prog) 239 + { 240 + } 241 + 242 + static inline void bpf_prog_put_rcu(struct bpf_prog *prog) 265 243 { 266 244 } 267 245 #endif /* CONFIG_BPF_SYSCALL */
+6
include/linux/inet_diag.h
··· 52 52 53 53 int inet_diag_bc_sk(const struct nlattr *_bc, struct sock *sk); 54 54 55 + void inet_diag_msg_common_fill(struct inet_diag_msg *r, struct sock *sk); 56 + 57 + int inet_diag_msg_attrs_fill(struct sock *sk, struct sk_buff *skb, 58 + struct inet_diag_msg *r, int ext, 59 + struct user_namespace *user_ns); 60 + 55 61 extern int inet_diag_register(const struct inet_diag_handler *handler); 56 62 extern void inet_diag_unregister(const struct inet_diag_handler *handler); 57 63 #endif /* _INET_DIAG_H_ */
+1 -1
include/linux/mfd/da9052/da9052.h
··· 171 171 static inline int da9052_group_write(struct da9052 *da9052, unsigned char reg, 172 172 unsigned reg_cnt, unsigned char *val) 173 173 { 174 - int ret; 174 + int ret = 0; 175 175 int i; 176 176 177 177 for (i = 0; i < reg_cnt; i++) {
+1
include/linux/mlx4/device.h
··· 466 466 enum { 467 467 MLX4_INTERFACE_STATE_UP = 1 << 0, 468 468 MLX4_INTERFACE_STATE_DELETION = 1 << 1, 469 + MLX4_INTERFACE_STATE_SHUTDOWN = 1 << 2, 469 470 }; 470 471 471 472 #define MSTR_SM_CHANGE_MASK (MLX4_EQ_PORT_INFO_MSTR_SM_SL_CHANGE_MASK | \
+2 -1
include/linux/net.h
··· 251 251 DEFINE_DYNAMIC_DEBUG_METADATA(descriptor, fmt); \ 252 252 if (unlikely(descriptor.flags & _DPRINTK_FLAGS_PRINT) && \ 253 253 net_ratelimit()) \ 254 - __dynamic_pr_debug(&descriptor, fmt, ##__VA_ARGS__); \ 254 + __dynamic_pr_debug(&descriptor, pr_fmt(fmt), \ 255 + ##__VA_ARGS__); \ 255 256 } while (0) 256 257 #elif defined(DEBUG) 257 258 #define net_dbg_ratelimited(fmt, ...) \
+10 -6
include/linux/pwm.h
··· 464 464 465 465 static inline void pwm_apply_args(struct pwm_device *pwm) 466 466 { 467 + struct pwm_state state = { }; 468 + 467 469 /* 468 470 * PWM users calling pwm_apply_args() expect to have a fresh config 469 471 * where the polarity and period are set according to pwm_args info. ··· 478 476 * at startup (even if they are actually enabled), thus authorizing 479 477 * polarity setting. 480 478 * 481 - * Instead of setting ->enabled to false, we call pwm_disable() 482 - * before pwm_set_polarity() to ensure that everything is configured 483 - * as expected, and the PWM is really disabled when the user request 484 - * it. 479 + * To fulfill this requirement, we apply a new state which disables 480 + * the PWM device and set the reference period and polarity config. 485 481 * 486 482 * Note that PWM users requiring a smooth handover between the 487 483 * bootloader and the kernel (like critical regulators controlled by 488 484 * PWM devices) will have to switch to the atomic API and avoid calling 489 485 * pwm_apply_args(). 490 486 */ 491 - pwm_disable(pwm); 492 - pwm_set_polarity(pwm, pwm->args.polarity); 487 + 488 + state.enabled = false; 489 + state.polarity = pwm->args.polarity; 490 + state.period = pwm->args.period; 491 + 492 + pwm_apply_state(pwm, &state); 493 493 } 494 494 495 495 struct pwm_lookup {
+1
include/linux/qed/qed_eth_if.h
··· 49 49 bool drop_ttl0; 50 50 u8 vport_id; 51 51 u16 mtu; 52 + bool clear_stats; 52 53 }; 53 54 54 55 struct qed_stop_rxq_params {
+168 -45
include/linux/reset.h
··· 84 84 #endif /* CONFIG_RESET_CONTROLLER */ 85 85 86 86 /** 87 - * reset_control_get - Lookup and obtain an exclusive reference to a 88 - * reset controller. 87 + * reset_control_get_exclusive - Lookup and obtain an exclusive reference 88 + * to a reset controller. 89 89 * @dev: device to be reset by the controller 90 90 * @id: reset line name 91 91 * ··· 98 98 * 99 99 * Use of id names is optional. 100 100 */ 101 - static inline struct reset_control *__must_check reset_control_get( 102 - struct device *dev, const char *id) 101 + static inline struct reset_control * 102 + __must_check reset_control_get_exclusive(struct device *dev, const char *id) 103 103 { 104 104 #ifndef CONFIG_RESET_CONTROLLER 105 105 WARN_ON(1); 106 106 #endif 107 - return __of_reset_control_get(dev ? dev->of_node : NULL, id, 0, 0); 108 - } 109 - 110 - static inline struct reset_control *reset_control_get_optional( 111 - struct device *dev, const char *id) 112 - { 113 107 return __of_reset_control_get(dev ? dev->of_node : NULL, id, 0, 0); 114 108 } 115 109 ··· 135 141 return __of_reset_control_get(dev ? dev->of_node : NULL, id, 0, 1); 136 142 } 137 143 144 + static inline struct reset_control *reset_control_get_optional_exclusive( 145 + struct device *dev, const char *id) 146 + { 147 + return __of_reset_control_get(dev ? dev->of_node : NULL, id, 0, 0); 148 + } 149 + 150 + static inline struct reset_control *reset_control_get_optional_shared( 151 + struct device *dev, const char *id) 152 + { 153 + return __of_reset_control_get(dev ? dev->of_node : NULL, id, 0, 1); 154 + } 155 + 138 156 /** 139 - * of_reset_control_get - Lookup and obtain an exclusive reference to a 140 - * reset controller. 157 + * of_reset_control_get_exclusive - Lookup and obtain an exclusive reference 158 + * to a reset controller. 141 159 * @node: device to be reset by the controller 142 160 * @id: reset line name 143 161 * ··· 157 151 * 158 152 * Use of id names is optional. 159 153 */ 160 - static inline struct reset_control *of_reset_control_get( 154 + static inline struct reset_control *of_reset_control_get_exclusive( 161 155 struct device_node *node, const char *id) 162 156 { 163 157 return __of_reset_control_get(node, id, 0, 0); 164 158 } 165 159 166 160 /** 167 - * of_reset_control_get_by_index - Lookup and obtain an exclusive reference to 168 - * a reset controller by index. 161 + * of_reset_control_get_shared - Lookup and obtain an shared reference 162 + * to a reset controller. 163 + * @node: device to be reset by the controller 164 + * @id: reset line name 165 + * 166 + * When a reset-control is shared, the behavior of reset_control_assert / 167 + * deassert is changed, the reset-core will keep track of a deassert_count 168 + * and only (re-)assert the reset after reset_control_assert has been called 169 + * as many times as reset_control_deassert was called. Also see the remark 170 + * about shared reset-controls in the reset_control_assert docs. 171 + * 172 + * Calling reset_control_assert without first calling reset_control_deassert 173 + * is not allowed on a shared reset control. Calling reset_control_reset is 174 + * also not allowed on a shared reset control. 175 + * Returns a struct reset_control or IS_ERR() condition containing errno. 176 + * 177 + * Use of id names is optional. 178 + */ 179 + static inline struct reset_control *of_reset_control_get_shared( 180 + struct device_node *node, const char *id) 181 + { 182 + return __of_reset_control_get(node, id, 0, 1); 183 + } 184 + 185 + /** 186 + * of_reset_control_get_exclusive_by_index - Lookup and obtain an exclusive 187 + * reference to a reset controller 188 + * by index. 169 189 * @node: device to be reset by the controller 170 190 * @index: index of the reset controller 171 191 * ··· 199 167 * in whatever order. Returns a struct reset_control or IS_ERR() condition 200 168 * containing errno. 201 169 */ 202 - static inline struct reset_control *of_reset_control_get_by_index( 170 + static inline struct reset_control *of_reset_control_get_exclusive_by_index( 203 171 struct device_node *node, int index) 204 172 { 205 173 return __of_reset_control_get(node, NULL, index, 0); 206 174 } 207 175 208 176 /** 209 - * devm_reset_control_get - resource managed reset_control_get() 177 + * of_reset_control_get_shared_by_index - Lookup and obtain an shared 178 + * reference to a reset controller 179 + * by index. 180 + * @node: device to be reset by the controller 181 + * @index: index of the reset controller 182 + * 183 + * When a reset-control is shared, the behavior of reset_control_assert / 184 + * deassert is changed, the reset-core will keep track of a deassert_count 185 + * and only (re-)assert the reset after reset_control_assert has been called 186 + * as many times as reset_control_deassert was called. Also see the remark 187 + * about shared reset-controls in the reset_control_assert docs. 188 + * 189 + * Calling reset_control_assert without first calling reset_control_deassert 190 + * is not allowed on a shared reset control. Calling reset_control_reset is 191 + * also not allowed on a shared reset control. 192 + * Returns a struct reset_control or IS_ERR() condition containing errno. 193 + * 194 + * This is to be used to perform a list of resets for a device or power domain 195 + * in whatever order. Returns a struct reset_control or IS_ERR() condition 196 + * containing errno. 197 + */ 198 + static inline struct reset_control *of_reset_control_get_shared_by_index( 199 + struct device_node *node, int index) 200 + { 201 + return __of_reset_control_get(node, NULL, index, 1); 202 + } 203 + 204 + /** 205 + * devm_reset_control_get_exclusive - resource managed 206 + * reset_control_get_exclusive() 210 207 * @dev: device to be reset by the controller 211 208 * @id: reset line name 212 209 * 213 - * Managed reset_control_get(). For reset controllers returned from this 214 - * function, reset_control_put() is called automatically on driver detach. 215 - * See reset_control_get() for more information. 210 + * Managed reset_control_get_exclusive(). For reset controllers returned 211 + * from this function, reset_control_put() is called automatically on driver 212 + * detach. 213 + * 214 + * See reset_control_get_exclusive() for more information. 216 215 */ 217 - static inline struct reset_control *__must_check devm_reset_control_get( 218 - struct device *dev, const char *id) 216 + static inline struct reset_control * 217 + __must_check devm_reset_control_get_exclusive(struct device *dev, 218 + const char *id) 219 219 { 220 220 #ifndef CONFIG_RESET_CONTROLLER 221 221 WARN_ON(1); 222 222 #endif 223 223 return __devm_reset_control_get(dev, id, 0, 0); 224 - } 225 - 226 - static inline struct reset_control *devm_reset_control_get_optional( 227 - struct device *dev, const char *id) 228 - { 229 - return __devm_reset_control_get(dev, id, 0, 0); 230 - } 231 - 232 - /** 233 - * devm_reset_control_get_by_index - resource managed reset_control_get 234 - * @dev: device to be reset by the controller 235 - * @index: index of the reset controller 236 - * 237 - * Managed reset_control_get(). For reset controllers returned from this 238 - * function, reset_control_put() is called automatically on driver detach. 239 - * See reset_control_get() for more information. 240 - */ 241 - static inline struct reset_control *devm_reset_control_get_by_index( 242 - struct device *dev, int index) 243 - { 244 - return __devm_reset_control_get(dev, NULL, index, 0); 245 224 } 246 225 247 226 /** ··· 270 227 return __devm_reset_control_get(dev, id, 0, 1); 271 228 } 272 229 230 + static inline struct reset_control *devm_reset_control_get_optional_exclusive( 231 + struct device *dev, const char *id) 232 + { 233 + return __devm_reset_control_get(dev, id, 0, 0); 234 + } 235 + 236 + static inline struct reset_control *devm_reset_control_get_optional_shared( 237 + struct device *dev, const char *id) 238 + { 239 + return __devm_reset_control_get(dev, id, 0, 1); 240 + } 241 + 242 + /** 243 + * devm_reset_control_get_exclusive_by_index - resource managed 244 + * reset_control_get_exclusive() 245 + * @dev: device to be reset by the controller 246 + * @index: index of the reset controller 247 + * 248 + * Managed reset_control_get_exclusive(). For reset controllers returned from 249 + * this function, reset_control_put() is called automatically on driver 250 + * detach. 251 + * 252 + * See reset_control_get_exclusive() for more information. 253 + */ 254 + static inline struct reset_control * 255 + devm_reset_control_get_exclusive_by_index(struct device *dev, int index) 256 + { 257 + return __devm_reset_control_get(dev, NULL, index, 0); 258 + } 259 + 273 260 /** 274 261 * devm_reset_control_get_shared_by_index - resource managed 275 262 * reset_control_get_shared ··· 310 237 * this function, reset_control_put() is called automatically on driver detach. 311 238 * See reset_control_get_shared() for more information. 312 239 */ 313 - static inline struct reset_control *devm_reset_control_get_shared_by_index( 314 - struct device *dev, int index) 240 + static inline struct reset_control * 241 + devm_reset_control_get_shared_by_index(struct device *dev, int index) 315 242 { 316 243 return __devm_reset_control_get(dev, NULL, index, 1); 317 244 } 318 245 246 + /* 247 + * TEMPORARY calls to use during transition: 248 + * 249 + * of_reset_control_get() => of_reset_control_get_exclusive() 250 + * 251 + * These inline function calls will be removed once all consumers 252 + * have been moved over to the new explicit API. 253 + */ 254 + static inline struct reset_control *reset_control_get( 255 + struct device *dev, const char *id) 256 + { 257 + return reset_control_get_exclusive(dev, id); 258 + } 259 + 260 + static inline struct reset_control *reset_control_get_optional( 261 + struct device *dev, const char *id) 262 + { 263 + return reset_control_get_optional_exclusive(dev, id); 264 + } 265 + 266 + static inline struct reset_control *of_reset_control_get( 267 + struct device_node *node, const char *id) 268 + { 269 + return of_reset_control_get_exclusive(node, id); 270 + } 271 + 272 + static inline struct reset_control *of_reset_control_get_by_index( 273 + struct device_node *node, int index) 274 + { 275 + return of_reset_control_get_exclusive_by_index(node, index); 276 + } 277 + 278 + static inline struct reset_control *devm_reset_control_get( 279 + struct device *dev, const char *id) 280 + { 281 + return devm_reset_control_get_exclusive(dev, id); 282 + } 283 + 284 + static inline struct reset_control *devm_reset_control_get_optional( 285 + struct device *dev, const char *id) 286 + { 287 + return devm_reset_control_get_optional_exclusive(dev, id); 288 + 289 + } 290 + 291 + static inline struct reset_control *devm_reset_control_get_by_index( 292 + struct device *dev, int index) 293 + { 294 + return devm_reset_control_get_exclusive_by_index(dev, index); 295 + } 319 296 #endif
+6
include/linux/sock_diag.h
··· 36 36 { 37 37 switch (sk->sk_family) { 38 38 case AF_INET: 39 + if (sk->sk_type == SOCK_RAW) 40 + return SKNLGRP_NONE; 41 + 39 42 switch (sk->sk_protocol) { 40 43 case IPPROTO_TCP: 41 44 return SKNLGRP_INET_TCP_DESTROY; ··· 48 45 return SKNLGRP_NONE; 49 46 } 50 47 case AF_INET6: 48 + if (sk->sk_type == SOCK_RAW) 49 + return SKNLGRP_NONE; 50 + 51 51 switch (sk->sk_protocol) { 52 52 case IPPROTO_TCP: 53 53 return SKNLGRP_INET6_TCP_DESTROY;
+2 -2
include/linux/usb/ehci_def.h
··· 180 180 * PORTSCx 181 181 */ 182 182 /* HOSTPC: offset 0x84 */ 183 - u32 hostpc[1]; /* HOSTPC extension */ 183 + u32 hostpc[0]; /* HOSTPC extension */ 184 184 #define HOSTPC_PHCD (1<<22) /* Phy clock disable */ 185 185 #define HOSTPC_PSPD (3<<25) /* Port speed detection */ 186 186 187 - u32 reserved5[16]; 187 + u32 reserved5[17]; 188 188 189 189 /* USBMODE_EX: offset 0xc8 */ 190 190 u32 usbmode_ex; /* USB Device mode extension */
+1 -1
include/net/gre.h
··· 26 26 struct net_device *gretap_fb_dev_create(struct net *net, const char *name, 27 27 u8 name_assign_type); 28 28 int gre_parse_header(struct sk_buff *skb, struct tnl_ptk_info *tpi, 29 - bool *csum_err, __be16 proto); 29 + bool *csum_err, __be16 proto, int nhs); 30 30 31 31 static inline int gre_calc_hlen(__be16 o_flags) 32 32 {
+1
include/net/netfilter/nf_tables.h
··· 167 167 168 168 struct nft_set; 169 169 struct nft_set_iter { 170 + u8 genmask; 170 171 unsigned int count; 171 172 unsigned int skip; 172 173 int err;
+3 -3
include/net/tc_act/tc_ife.h
··· 36 36 int (*encode)(struct sk_buff *, void *, struct tcf_meta_info *); 37 37 int (*decode)(struct sk_buff *, void *, u16 len); 38 38 int (*get)(struct sk_buff *skb, struct tcf_meta_info *mi); 39 - int (*alloc)(struct tcf_meta_info *, void *); 39 + int (*alloc)(struct tcf_meta_info *, void *, gfp_t); 40 40 void (*release)(struct tcf_meta_info *); 41 41 int (*validate)(void *val, int len); 42 42 struct module *owner; ··· 48 48 int ife_get_meta_u16(struct sk_buff *skb, struct tcf_meta_info *mi); 49 49 int ife_tlv_meta_encode(void *skbdata, u16 attrtype, u16 dlen, 50 50 const void *dval); 51 - int ife_alloc_meta_u32(struct tcf_meta_info *mi, void *metaval); 52 - int ife_alloc_meta_u16(struct tcf_meta_info *mi, void *metaval); 51 + int ife_alloc_meta_u32(struct tcf_meta_info *mi, void *metaval, gfp_t gfp); 52 + int ife_alloc_meta_u16(struct tcf_meta_info *mi, void *metaval, gfp_t gfp); 53 53 int ife_check_meta_u32(u32 metaval, struct tcf_meta_info *mi); 54 54 int ife_encode_meta_u32(u32 metaval, void *skbdata, struct tcf_meta_info *mi); 55 55 int ife_validate_meta_u32(void *val, int len);
+31
include/uapi/linux/input-event-codes.h
··· 611 611 #define KEY_KBDINPUTASSIST_ACCEPT 0x264 612 612 #define KEY_KBDINPUTASSIST_CANCEL 0x265 613 613 614 + /* Diagonal movement keys */ 615 + #define KEY_RIGHT_UP 0x266 616 + #define KEY_RIGHT_DOWN 0x267 617 + #define KEY_LEFT_UP 0x268 618 + #define KEY_LEFT_DOWN 0x269 619 + 620 + #define KEY_ROOT_MENU 0x26a /* Show Device's Root Menu */ 621 + /* Show Top Menu of the Media (e.g. DVD) */ 622 + #define KEY_MEDIA_TOP_MENU 0x26b 623 + #define KEY_NUMERIC_11 0x26c 624 + #define KEY_NUMERIC_12 0x26d 625 + /* 626 + * Toggle Audio Description: refers to an audio service that helps blind and 627 + * visually impaired consumers understand the action in a program. Note: in 628 + * some countries this is referred to as "Video Description". 629 + */ 630 + #define KEY_AUDIO_DESC 0x26e 631 + #define KEY_3D_MODE 0x26f 632 + #define KEY_NEXT_FAVORITE 0x270 633 + #define KEY_STOP_RECORD 0x271 634 + #define KEY_PAUSE_RECORD 0x272 635 + #define KEY_VOD 0x273 /* Video on Demand */ 636 + #define KEY_UNMUTE 0x274 637 + #define KEY_FASTREVERSE 0x275 638 + #define KEY_SLOWREVERSE 0x276 639 + /* 640 + * Control a data application associated with the currently viewed channel, 641 + * e.g. teletext or data broadcast application (MHEG, MHP, HbbTV, etc.) 642 + */ 643 + #define KEY_DATA 0x275 644 + 614 645 #define BTN_TRIGGER_HAPPY 0x2c0 615 646 #define BTN_TRIGGER_HAPPY1 0x2c0 616 647 #define BTN_TRIGGER_HAPPY2 0x2c1
+1
include/uapi/linux/input.h
··· 247 247 #define BUS_ATARI 0x1B 248 248 #define BUS_SPI 0x1C 249 249 #define BUS_RMI 0x1D 250 + #define BUS_CEC 0x1E 250 251 251 252 /* 252 253 * MT_TOOL types
+1
include/uapi/linux/netfilter/Kbuild
··· 33 33 header-y += xt_NFQUEUE.h 34 34 header-y += xt_RATEEST.h 35 35 header-y += xt_SECMARK.h 36 + header-y += xt_SYNPROXY.h 36 37 header-y += xt_TCPMSS.h 37 38 header-y += xt_TCPOPTSTRIP.h 38 39 header-y += xt_TEE.h
+2
include/uapi/linux/netfilter/xt_SYNPROXY.h
··· 1 1 #ifndef _XT_SYNPROXY_H 2 2 #define _XT_SYNPROXY_H 3 3 4 + #include <linux/types.h> 5 + 4 6 #define XT_SYNPROXY_OPT_MSS 0x01 5 7 #define XT_SYNPROXY_OPT_WSCALE 0x02 6 8 #define XT_SYNPROXY_OPT_SACK_PERM 0x04
+17
kernel/audit.c
··· 1883 1883 audit_log_format(ab, " exe=(null)"); 1884 1884 } 1885 1885 1886 + struct tty_struct *audit_get_tty(struct task_struct *tsk) 1887 + { 1888 + struct tty_struct *tty = NULL; 1889 + unsigned long flags; 1890 + 1891 + spin_lock_irqsave(&tsk->sighand->siglock, flags); 1892 + if (tsk->signal) 1893 + tty = tty_kref_get(tsk->signal->tty); 1894 + spin_unlock_irqrestore(&tsk->sighand->siglock, flags); 1895 + return tty; 1896 + } 1897 + 1898 + void audit_put_tty(struct tty_struct *tty) 1899 + { 1900 + tty_kref_put(tty); 1901 + } 1902 + 1886 1903 void audit_log_task_info(struct audit_buffer *ab, struct task_struct *tsk) 1887 1904 { 1888 1905 const struct cred *cred;
+4
kernel/audit.h
··· 23 23 #include <linux/audit.h> 24 24 #include <linux/skbuff.h> 25 25 #include <uapi/linux/mqueue.h> 26 + #include <linux/tty.h> 26 27 27 28 /* AUDIT_NAMES is the number of slots we reserve in the audit_context 28 29 * for saving names from getname(). If we get more names we will allocate ··· 262 261 263 262 extern void audit_log_d_path_exe(struct audit_buffer *ab, 264 263 struct mm_struct *mm); 264 + 265 + extern struct tty_struct *audit_get_tty(struct task_struct *tsk); 266 + extern void audit_put_tty(struct tty_struct *tty); 265 267 266 268 /* audit watch functions */ 267 269 #ifdef CONFIG_AUDIT_WATCH
+4 -4
kernel/auditsc.c
··· 63 63 #include <asm/unistd.h> 64 64 #include <linux/security.h> 65 65 #include <linux/list.h> 66 - #include <linux/tty.h> 67 66 #include <linux/binfmts.h> 68 67 #include <linux/highmem.h> 69 68 #include <linux/syscalls.h> ··· 1984 1985 if (!audit_enabled) 1985 1986 return; 1986 1987 1988 + ab = audit_log_start(NULL, GFP_KERNEL, AUDIT_LOGIN); 1989 + if (!ab) 1990 + return; 1991 + 1987 1992 uid = from_kuid(&init_user_ns, task_uid(current)); 1988 1993 oldloginuid = from_kuid(&init_user_ns, koldloginuid); 1989 1994 loginuid = from_kuid(&init_user_ns, kloginuid), 1990 1995 tty = audit_get_tty(current); 1991 1996 1992 - ab = audit_log_start(NULL, GFP_KERNEL, AUDIT_LOGIN); 1993 - if (!ab) 1994 - return; 1995 1997 audit_log_format(ab, "pid=%d uid=%u", task_pid_nr(current), uid); 1996 1998 audit_log_task_context(ab); 1997 1999 audit_log_format(ab, " old-auid=%u auid=%u tty=%s old-ses=%u ses=%u res=%d",
+7 -34
kernel/bpf/verifier.c
··· 126 126 * are set to NOT_INIT to indicate that they are no longer readable. 127 127 */ 128 128 129 - /* types of values stored in eBPF registers */ 130 - enum bpf_reg_type { 131 - NOT_INIT = 0, /* nothing was written into register */ 132 - UNKNOWN_VALUE, /* reg doesn't contain a valid pointer */ 133 - PTR_TO_CTX, /* reg points to bpf_context */ 134 - CONST_PTR_TO_MAP, /* reg points to struct bpf_map */ 135 - PTR_TO_MAP_VALUE, /* reg points to map element value */ 136 - PTR_TO_MAP_VALUE_OR_NULL,/* points to map elem value or NULL */ 137 - FRAME_PTR, /* reg == frame_pointer */ 138 - PTR_TO_STACK, /* reg == frame_pointer + imm */ 139 - CONST_IMM, /* constant integer value */ 140 - 141 - /* PTR_TO_PACKET represents: 142 - * skb->data 143 - * skb->data + imm 144 - * skb->data + (u16) var 145 - * skb->data + (u16) var + imm 146 - * if (range > 0) then [ptr, ptr + range - off) is safe to access 147 - * if (id > 0) means that some 'var' was added 148 - * if (off > 0) menas that 'imm' was added 149 - */ 150 - PTR_TO_PACKET, 151 - PTR_TO_PACKET_END, /* skb->data + headlen */ 152 - }; 153 - 154 129 struct reg_state { 155 130 enum bpf_reg_type type; 156 131 union { ··· 670 695 671 696 /* check access to 'struct bpf_context' fields */ 672 697 static int check_ctx_access(struct verifier_env *env, int off, int size, 673 - enum bpf_access_type t) 698 + enum bpf_access_type t, enum bpf_reg_type *reg_type) 674 699 { 675 700 if (env->prog->aux->ops->is_valid_access && 676 - env->prog->aux->ops->is_valid_access(off, size, t)) { 701 + env->prog->aux->ops->is_valid_access(off, size, t, reg_type)) { 677 702 /* remember the offset of last byte accessed in ctx */ 678 703 if (env->prog->aux->max_ctx_offset < off + size) 679 704 env->prog->aux->max_ctx_offset = off + size; ··· 773 798 mark_reg_unknown_value(state->regs, value_regno); 774 799 775 800 } else if (reg->type == PTR_TO_CTX) { 801 + enum bpf_reg_type reg_type = UNKNOWN_VALUE; 802 + 776 803 if (t == BPF_WRITE && value_regno >= 0 && 777 804 is_pointer_value(env, value_regno)) { 778 805 verbose("R%d leaks addr into ctx\n", value_regno); 779 806 return -EACCES; 780 807 } 781 - err = check_ctx_access(env, off, size, t); 808 + err = check_ctx_access(env, off, size, t, &reg_type); 782 809 if (!err && t == BPF_READ && value_regno >= 0) { 783 810 mark_reg_unknown_value(state->regs, value_regno); 784 - if (off == offsetof(struct __sk_buff, data) && 785 - env->allow_ptr_leaks) 811 + if (env->allow_ptr_leaks) 786 812 /* note that reg.[id|off|range] == 0 */ 787 - state->regs[value_regno].type = PTR_TO_PACKET; 788 - else if (off == offsetof(struct __sk_buff, data_end) && 789 - env->allow_ptr_leaks) 790 - state->regs[value_regno].type = PTR_TO_PACKET_END; 813 + state->regs[value_regno].type = reg_type; 791 814 } 792 815 793 816 } else if (reg->type == FRAME_PTR || reg->type == PTR_TO_STACK) {
+76 -72
kernel/cgroup.c
··· 837 837 838 838 static void put_css_set(struct css_set *cset) 839 839 { 840 + unsigned long flags; 841 + 840 842 /* 841 843 * Ensure that the refcount doesn't hit zero while any readers 842 844 * can see it. Similar to atomic_dec_and_lock(), but for an ··· 847 845 if (atomic_add_unless(&cset->refcount, -1, 1)) 848 846 return; 849 847 850 - spin_lock_bh(&css_set_lock); 848 + spin_lock_irqsave(&css_set_lock, flags); 851 849 put_css_set_locked(cset); 852 - spin_unlock_bh(&css_set_lock); 850 + spin_unlock_irqrestore(&css_set_lock, flags); 853 851 } 854 852 855 853 /* ··· 1072 1070 1073 1071 /* First see if we already have a cgroup group that matches 1074 1072 * the desired set */ 1075 - spin_lock_bh(&css_set_lock); 1073 + spin_lock_irq(&css_set_lock); 1076 1074 cset = find_existing_css_set(old_cset, cgrp, template); 1077 1075 if (cset) 1078 1076 get_css_set(cset); 1079 - spin_unlock_bh(&css_set_lock); 1077 + spin_unlock_irq(&css_set_lock); 1080 1078 1081 1079 if (cset) 1082 1080 return cset; ··· 1104 1102 * find_existing_css_set() */ 1105 1103 memcpy(cset->subsys, template, sizeof(cset->subsys)); 1106 1104 1107 - spin_lock_bh(&css_set_lock); 1105 + spin_lock_irq(&css_set_lock); 1108 1106 /* Add reference counts and links from the new css_set. */ 1109 1107 list_for_each_entry(link, &old_cset->cgrp_links, cgrp_link) { 1110 1108 struct cgroup *c = link->cgrp; ··· 1130 1128 css_get(css); 1131 1129 } 1132 1130 1133 - spin_unlock_bh(&css_set_lock); 1131 + spin_unlock_irq(&css_set_lock); 1134 1132 1135 1133 return cset; 1136 1134 } ··· 1194 1192 * Release all the links from cset_links to this hierarchy's 1195 1193 * root cgroup 1196 1194 */ 1197 - spin_lock_bh(&css_set_lock); 1195 + spin_lock_irq(&css_set_lock); 1198 1196 1199 1197 list_for_each_entry_safe(link, tmp_link, &cgrp->cset_links, cset_link) { 1200 1198 list_del(&link->cset_link); ··· 1202 1200 kfree(link); 1203 1201 } 1204 1202 1205 - spin_unlock_bh(&css_set_lock); 1203 + spin_unlock_irq(&css_set_lock); 1206 1204 1207 1205 if (!list_empty(&root->root_list)) { 1208 1206 list_del(&root->root_list); ··· 1602 1600 ss->root = dst_root; 1603 1601 css->cgroup = dcgrp; 1604 1602 1605 - spin_lock_bh(&css_set_lock); 1603 + spin_lock_irq(&css_set_lock); 1606 1604 hash_for_each(css_set_table, i, cset, hlist) 1607 1605 list_move_tail(&cset->e_cset_node[ss->id], 1608 1606 &dcgrp->e_csets[ss->id]); 1609 - spin_unlock_bh(&css_set_lock); 1607 + spin_unlock_irq(&css_set_lock); 1610 1608 1611 1609 /* default hierarchy doesn't enable controllers by default */ 1612 1610 dst_root->subsys_mask |= 1 << ssid; ··· 1642 1640 if (!buf) 1643 1641 return -ENOMEM; 1644 1642 1645 - spin_lock_bh(&css_set_lock); 1643 + spin_lock_irq(&css_set_lock); 1646 1644 ns_cgroup = current_cgns_cgroup_from_root(kf_cgroot); 1647 1645 len = kernfs_path_from_node(kf_node, ns_cgroup->kn, buf, PATH_MAX); 1648 - spin_unlock_bh(&css_set_lock); 1646 + spin_unlock_irq(&css_set_lock); 1649 1647 1650 1648 if (len >= PATH_MAX) 1651 1649 len = -ERANGE; ··· 1899 1897 { 1900 1898 struct task_struct *p, *g; 1901 1899 1902 - spin_lock_bh(&css_set_lock); 1900 + spin_lock_irq(&css_set_lock); 1903 1901 1904 1902 if (use_task_css_set_links) 1905 1903 goto out_unlock; ··· 1924 1922 * entry won't be deleted though the process has exited. 1925 1923 * Do it while holding siglock so that we don't end up 1926 1924 * racing against cgroup_exit(). 1925 + * 1926 + * Interrupts were already disabled while acquiring 1927 + * the css_set_lock, so we do not need to disable it 1928 + * again when acquiring the sighand->siglock here. 1927 1929 */ 1928 - spin_lock_irq(&p->sighand->siglock); 1930 + spin_lock(&p->sighand->siglock); 1929 1931 if (!(p->flags & PF_EXITING)) { 1930 1932 struct css_set *cset = task_css_set(p); 1931 1933 ··· 1938 1932 list_add_tail(&p->cg_list, &cset->tasks); 1939 1933 get_css_set(cset); 1940 1934 } 1941 - spin_unlock_irq(&p->sighand->siglock); 1935 + spin_unlock(&p->sighand->siglock); 1942 1936 } while_each_thread(g, p); 1943 1937 read_unlock(&tasklist_lock); 1944 1938 out_unlock: 1945 - spin_unlock_bh(&css_set_lock); 1939 + spin_unlock_irq(&css_set_lock); 1946 1940 } 1947 1941 1948 1942 static void init_cgroup_housekeeping(struct cgroup *cgrp) ··· 2049 2043 * Link the root cgroup in this hierarchy into all the css_set 2050 2044 * objects. 2051 2045 */ 2052 - spin_lock_bh(&css_set_lock); 2046 + spin_lock_irq(&css_set_lock); 2053 2047 hash_for_each(css_set_table, i, cset, hlist) { 2054 2048 link_css_set(&tmp_links, cset, root_cgrp); 2055 2049 if (css_set_populated(cset)) 2056 2050 cgroup_update_populated(root_cgrp, true); 2057 2051 } 2058 - spin_unlock_bh(&css_set_lock); 2052 + spin_unlock_irq(&css_set_lock); 2059 2053 2060 2054 BUG_ON(!list_empty(&root_cgrp->self.children)); 2061 2055 BUG_ON(atomic_read(&root->nr_cgrps) != 1); ··· 2262 2256 struct cgroup *cgrp; 2263 2257 2264 2258 mutex_lock(&cgroup_mutex); 2265 - spin_lock_bh(&css_set_lock); 2259 + spin_lock_irq(&css_set_lock); 2266 2260 2267 2261 cgrp = cset_cgroup_from_root(ns->root_cset, root); 2268 2262 2269 - spin_unlock_bh(&css_set_lock); 2263 + spin_unlock_irq(&css_set_lock); 2270 2264 mutex_unlock(&cgroup_mutex); 2271 2265 2272 2266 nsdentry = kernfs_node_dentry(cgrp->kn, dentry->d_sb); ··· 2343 2337 char *ret; 2344 2338 2345 2339 mutex_lock(&cgroup_mutex); 2346 - spin_lock_bh(&css_set_lock); 2340 + spin_lock_irq(&css_set_lock); 2347 2341 2348 2342 ret = cgroup_path_ns_locked(cgrp, buf, buflen, ns); 2349 2343 2350 - spin_unlock_bh(&css_set_lock); 2344 + spin_unlock_irq(&css_set_lock); 2351 2345 mutex_unlock(&cgroup_mutex); 2352 2346 2353 2347 return ret; ··· 2375 2369 char *path = NULL; 2376 2370 2377 2371 mutex_lock(&cgroup_mutex); 2378 - spin_lock_bh(&css_set_lock); 2372 + spin_lock_irq(&css_set_lock); 2379 2373 2380 2374 root = idr_get_next(&cgroup_hierarchy_idr, &hierarchy_id); 2381 2375 ··· 2388 2382 path = buf; 2389 2383 } 2390 2384 2391 - spin_unlock_bh(&css_set_lock); 2385 + spin_unlock_irq(&css_set_lock); 2392 2386 mutex_unlock(&cgroup_mutex); 2393 2387 return path; 2394 2388 } ··· 2563 2557 * the new cgroup. There are no failure cases after here, so this 2564 2558 * is the commit point. 2565 2559 */ 2566 - spin_lock_bh(&css_set_lock); 2560 + spin_lock_irq(&css_set_lock); 2567 2561 list_for_each_entry(cset, &tset->src_csets, mg_node) { 2568 2562 list_for_each_entry_safe(task, tmp_task, &cset->mg_tasks, cg_list) { 2569 2563 struct css_set *from_cset = task_css_set(task); ··· 2574 2568 put_css_set_locked(from_cset); 2575 2569 } 2576 2570 } 2577 - spin_unlock_bh(&css_set_lock); 2571 + spin_unlock_irq(&css_set_lock); 2578 2572 2579 2573 /* 2580 2574 * Migration is committed, all target tasks are now on dst_csets. ··· 2603 2597 } 2604 2598 } while_each_subsys_mask(); 2605 2599 out_release_tset: 2606 - spin_lock_bh(&css_set_lock); 2600 + spin_lock_irq(&css_set_lock); 2607 2601 list_splice_init(&tset->dst_csets, &tset->src_csets); 2608 2602 list_for_each_entry_safe(cset, tmp_cset, &tset->src_csets, mg_node) { 2609 2603 list_splice_tail_init(&cset->mg_tasks, &cset->tasks); 2610 2604 list_del_init(&cset->mg_node); 2611 2605 } 2612 - spin_unlock_bh(&css_set_lock); 2606 + spin_unlock_irq(&css_set_lock); 2613 2607 return ret; 2614 2608 } 2615 2609 ··· 2640 2634 2641 2635 lockdep_assert_held(&cgroup_mutex); 2642 2636 2643 - spin_lock_bh(&css_set_lock); 2637 + spin_lock_irq(&css_set_lock); 2644 2638 list_for_each_entry_safe(cset, tmp_cset, preloaded_csets, mg_preload_node) { 2645 2639 cset->mg_src_cgrp = NULL; 2646 2640 cset->mg_dst_cgrp = NULL; ··· 2648 2642 list_del_init(&cset->mg_preload_node); 2649 2643 put_css_set_locked(cset); 2650 2644 } 2651 - spin_unlock_bh(&css_set_lock); 2645 + spin_unlock_irq(&css_set_lock); 2652 2646 } 2653 2647 2654 2648 /** ··· 2789 2783 * already PF_EXITING could be freed from underneath us unless we 2790 2784 * take an rcu_read_lock. 2791 2785 */ 2792 - spin_lock_bh(&css_set_lock); 2786 + spin_lock_irq(&css_set_lock); 2793 2787 rcu_read_lock(); 2794 2788 task = leader; 2795 2789 do { ··· 2798 2792 break; 2799 2793 } while_each_thread(leader, task); 2800 2794 rcu_read_unlock(); 2801 - spin_unlock_bh(&css_set_lock); 2795 + spin_unlock_irq(&css_set_lock); 2802 2796 2803 2797 return cgroup_taskset_migrate(&tset, root); 2804 2798 } ··· 2822 2816 return -EBUSY; 2823 2817 2824 2818 /* look up all src csets */ 2825 - spin_lock_bh(&css_set_lock); 2819 + spin_lock_irq(&css_set_lock); 2826 2820 rcu_read_lock(); 2827 2821 task = leader; 2828 2822 do { ··· 2832 2826 break; 2833 2827 } while_each_thread(leader, task); 2834 2828 rcu_read_unlock(); 2835 - spin_unlock_bh(&css_set_lock); 2829 + spin_unlock_irq(&css_set_lock); 2836 2830 2837 2831 /* prepare dst csets and commit */ 2838 2832 ret = cgroup_migrate_prepare_dst(&preloaded_csets); ··· 2865 2859 struct cgroup *cgrp; 2866 2860 struct inode *inode; 2867 2861 2868 - spin_lock_bh(&css_set_lock); 2862 + spin_lock_irq(&css_set_lock); 2869 2863 cgrp = task_cgroup_from_root(task, &cgrp_dfl_root); 2870 - spin_unlock_bh(&css_set_lock); 2864 + spin_unlock_irq(&css_set_lock); 2871 2865 2872 2866 while (!cgroup_is_descendant(dst_cgrp, cgrp)) 2873 2867 cgrp = cgroup_parent(cgrp); ··· 2968 2962 if (root == &cgrp_dfl_root) 2969 2963 continue; 2970 2964 2971 - spin_lock_bh(&css_set_lock); 2965 + spin_lock_irq(&css_set_lock); 2972 2966 from_cgrp = task_cgroup_from_root(from, root); 2973 - spin_unlock_bh(&css_set_lock); 2967 + spin_unlock_irq(&css_set_lock); 2974 2968 2975 2969 retval = cgroup_attach_task(from_cgrp, tsk, false); 2976 2970 if (retval) ··· 3086 3080 percpu_down_write(&cgroup_threadgroup_rwsem); 3087 3081 3088 3082 /* look up all csses currently attached to @cgrp's subtree */ 3089 - spin_lock_bh(&css_set_lock); 3083 + spin_lock_irq(&css_set_lock); 3090 3084 cgroup_for_each_live_descendant_pre(dsct, d_css, cgrp) { 3091 3085 struct cgrp_cset_link *link; 3092 3086 ··· 3094 3088 cgroup_migrate_add_src(link->cset, dsct, 3095 3089 &preloaded_csets); 3096 3090 } 3097 - spin_unlock_bh(&css_set_lock); 3091 + spin_unlock_irq(&css_set_lock); 3098 3092 3099 3093 /* NULL dst indicates self on default hierarchy */ 3100 3094 ret = cgroup_migrate_prepare_dst(&preloaded_csets); 3101 3095 if (ret) 3102 3096 goto out_finish; 3103 3097 3104 - spin_lock_bh(&css_set_lock); 3098 + spin_lock_irq(&css_set_lock); 3105 3099 list_for_each_entry(src_cset, &preloaded_csets, mg_preload_node) { 3106 3100 struct task_struct *task, *ntask; 3107 3101 ··· 3113 3107 list_for_each_entry_safe(task, ntask, &src_cset->tasks, cg_list) 3114 3108 cgroup_taskset_add(task, &tset); 3115 3109 } 3116 - spin_unlock_bh(&css_set_lock); 3110 + spin_unlock_irq(&css_set_lock); 3117 3111 3118 3112 ret = cgroup_taskset_migrate(&tset, cgrp->root); 3119 3113 out_finish: ··· 3914 3908 int count = 0; 3915 3909 struct cgrp_cset_link *link; 3916 3910 3917 - spin_lock_bh(&css_set_lock); 3911 + spin_lock_irq(&css_set_lock); 3918 3912 list_for_each_entry(link, &cgrp->cset_links, cset_link) 3919 3913 count += atomic_read(&link->cset->refcount); 3920 - spin_unlock_bh(&css_set_lock); 3914 + spin_unlock_irq(&css_set_lock); 3921 3915 return count; 3922 3916 } 3923 3917 ··· 4255 4249 4256 4250 memset(it, 0, sizeof(*it)); 4257 4251 4258 - spin_lock_bh(&css_set_lock); 4252 + spin_lock_irq(&css_set_lock); 4259 4253 4260 4254 it->ss = css->ss; 4261 4255 ··· 4268 4262 4269 4263 css_task_iter_advance_css_set(it); 4270 4264 4271 - spin_unlock_bh(&css_set_lock); 4265 + spin_unlock_irq(&css_set_lock); 4272 4266 } 4273 4267 4274 4268 /** ··· 4286 4280 it->cur_task = NULL; 4287 4281 } 4288 4282 4289 - spin_lock_bh(&css_set_lock); 4283 + spin_lock_irq(&css_set_lock); 4290 4284 4291 4285 if (it->task_pos) { 4292 4286 it->cur_task = list_entry(it->task_pos, struct task_struct, ··· 4295 4289 css_task_iter_advance(it); 4296 4290 } 4297 4291 4298 - spin_unlock_bh(&css_set_lock); 4292 + spin_unlock_irq(&css_set_lock); 4299 4293 4300 4294 return it->cur_task; 4301 4295 } ··· 4309 4303 void css_task_iter_end(struct css_task_iter *it) 4310 4304 { 4311 4305 if (it->cur_cset) { 4312 - spin_lock_bh(&css_set_lock); 4306 + spin_lock_irq(&css_set_lock); 4313 4307 list_del(&it->iters_node); 4314 4308 put_css_set_locked(it->cur_cset); 4315 - spin_unlock_bh(&css_set_lock); 4309 + spin_unlock_irq(&css_set_lock); 4316 4310 } 4317 4311 4318 4312 if (it->cur_task) ··· 4344 4338 mutex_lock(&cgroup_mutex); 4345 4339 4346 4340 /* all tasks in @from are being moved, all csets are source */ 4347 - spin_lock_bh(&css_set_lock); 4341 + spin_lock_irq(&css_set_lock); 4348 4342 list_for_each_entry(link, &from->cset_links, cset_link) 4349 4343 cgroup_migrate_add_src(link->cset, to, &preloaded_csets); 4350 - spin_unlock_bh(&css_set_lock); 4344 + spin_unlock_irq(&css_set_lock); 4351 4345 4352 4346 ret = cgroup_migrate_prepare_dst(&preloaded_csets); 4353 4347 if (ret) ··· 5069 5063 memset(css, 0, sizeof(*css)); 5070 5064 css->cgroup = cgrp; 5071 5065 css->ss = ss; 5066 + css->id = -1; 5072 5067 INIT_LIST_HEAD(&css->sibling); 5073 5068 INIT_LIST_HEAD(&css->children); 5074 5069 css->serial_nr = css_serial_nr_next++; ··· 5157 5150 5158 5151 err = cgroup_idr_alloc(&ss->css_idr, NULL, 2, 0, GFP_KERNEL); 5159 5152 if (err < 0) 5160 - goto err_free_percpu_ref; 5153 + goto err_free_css; 5161 5154 css->id = err; 5162 5155 5163 5156 /* @css is ready to be brought online now, make it visible */ ··· 5181 5174 5182 5175 err_list_del: 5183 5176 list_del_rcu(&css->sibling); 5184 - cgroup_idr_remove(&ss->css_idr, css->id); 5185 - err_free_percpu_ref: 5186 - percpu_ref_exit(&css->refcnt); 5187 5177 err_free_css: 5188 5178 call_rcu(&css->rcu_head, css_free_rcu_fn); 5189 5179 return ERR_PTR(err); ··· 5455 5451 */ 5456 5452 cgrp->self.flags &= ~CSS_ONLINE; 5457 5453 5458 - spin_lock_bh(&css_set_lock); 5454 + spin_lock_irq(&css_set_lock); 5459 5455 list_for_each_entry(link, &cgrp->cset_links, cset_link) 5460 5456 link->cset->dead = true; 5461 - spin_unlock_bh(&css_set_lock); 5457 + spin_unlock_irq(&css_set_lock); 5462 5458 5463 5459 /* initiate massacre of all css's */ 5464 5460 for_each_css(css, ssid, cgrp) ··· 5729 5725 goto out; 5730 5726 5731 5727 mutex_lock(&cgroup_mutex); 5732 - spin_lock_bh(&css_set_lock); 5728 + spin_lock_irq(&css_set_lock); 5733 5729 5734 5730 for_each_root(root) { 5735 5731 struct cgroup_subsys *ss; ··· 5782 5778 5783 5779 retval = 0; 5784 5780 out_unlock: 5785 - spin_unlock_bh(&css_set_lock); 5781 + spin_unlock_irq(&css_set_lock); 5786 5782 mutex_unlock(&cgroup_mutex); 5787 5783 kfree(buf); 5788 5784 out: ··· 5927 5923 if (use_task_css_set_links) { 5928 5924 struct css_set *cset; 5929 5925 5930 - spin_lock_bh(&css_set_lock); 5926 + spin_lock_irq(&css_set_lock); 5931 5927 cset = task_css_set(current); 5932 5928 if (list_empty(&child->cg_list)) { 5933 5929 get_css_set(cset); 5934 5930 css_set_move_task(child, NULL, cset, false); 5935 5931 } 5936 - spin_unlock_bh(&css_set_lock); 5932 + spin_unlock_irq(&css_set_lock); 5937 5933 } 5938 5934 5939 5935 /* ··· 5978 5974 cset = task_css_set(tsk); 5979 5975 5980 5976 if (!list_empty(&tsk->cg_list)) { 5981 - spin_lock_bh(&css_set_lock); 5977 + spin_lock_irq(&css_set_lock); 5982 5978 css_set_move_task(tsk, cset, NULL, false); 5983 - spin_unlock_bh(&css_set_lock); 5979 + spin_unlock_irq(&css_set_lock); 5984 5980 } else { 5985 5981 get_css_set(cset); 5986 5982 } ··· 6048 6044 if (!pathbuf || !agentbuf) 6049 6045 goto out; 6050 6046 6051 - spin_lock_bh(&css_set_lock); 6047 + spin_lock_irq(&css_set_lock); 6052 6048 path = cgroup_path_ns_locked(cgrp, pathbuf, PATH_MAX, &init_cgroup_ns); 6053 - spin_unlock_bh(&css_set_lock); 6049 + spin_unlock_irq(&css_set_lock); 6054 6050 if (!path) 6055 6051 goto out; 6056 6052 ··· 6310 6306 return ERR_PTR(-EPERM); 6311 6307 6312 6308 mutex_lock(&cgroup_mutex); 6313 - spin_lock_bh(&css_set_lock); 6309 + spin_lock_irq(&css_set_lock); 6314 6310 6315 6311 cset = task_css_set(current); 6316 6312 get_css_set(cset); 6317 6313 6318 - spin_unlock_bh(&css_set_lock); 6314 + spin_unlock_irq(&css_set_lock); 6319 6315 mutex_unlock(&cgroup_mutex); 6320 6316 6321 6317 new_ns = alloc_cgroup_ns(); ··· 6439 6435 if (!name_buf) 6440 6436 return -ENOMEM; 6441 6437 6442 - spin_lock_bh(&css_set_lock); 6438 + spin_lock_irq(&css_set_lock); 6443 6439 rcu_read_lock(); 6444 6440 cset = rcu_dereference(current->cgroups); 6445 6441 list_for_each_entry(link, &cset->cgrp_links, cgrp_link) { ··· 6450 6446 c->root->hierarchy_id, name_buf); 6451 6447 } 6452 6448 rcu_read_unlock(); 6453 - spin_unlock_bh(&css_set_lock); 6449 + spin_unlock_irq(&css_set_lock); 6454 6450 kfree(name_buf); 6455 6451 return 0; 6456 6452 } ··· 6461 6457 struct cgroup_subsys_state *css = seq_css(seq); 6462 6458 struct cgrp_cset_link *link; 6463 6459 6464 - spin_lock_bh(&css_set_lock); 6460 + spin_lock_irq(&css_set_lock); 6465 6461 list_for_each_entry(link, &css->cgroup->cset_links, cset_link) { 6466 6462 struct css_set *cset = link->cset; 6467 6463 struct task_struct *task; ··· 6484 6480 overflow: 6485 6481 seq_puts(seq, " ...\n"); 6486 6482 } 6487 - spin_unlock_bh(&css_set_lock); 6483 + spin_unlock_irq(&css_set_lock); 6488 6484 return 0; 6489 6485 } 6490 6486
+23 -2
kernel/events/core.c
··· 1686 1686 return event->state == PERF_EVENT_STATE_DEAD; 1687 1687 } 1688 1688 1689 - static inline int pmu_filter_match(struct perf_event *event) 1689 + static inline int __pmu_filter_match(struct perf_event *event) 1690 1690 { 1691 1691 struct pmu *pmu = event->pmu; 1692 1692 return pmu->filter_match ? pmu->filter_match(event) : 1; 1693 + } 1694 + 1695 + /* 1696 + * Check whether we should attempt to schedule an event group based on 1697 + * PMU-specific filtering. An event group can consist of HW and SW events, 1698 + * potentially with a SW leader, so we must check all the filters, to 1699 + * determine whether a group is schedulable: 1700 + */ 1701 + static inline int pmu_filter_match(struct perf_event *event) 1702 + { 1703 + struct perf_event *child; 1704 + 1705 + if (!__pmu_filter_match(event)) 1706 + return 0; 1707 + 1708 + list_for_each_entry(child, &event->sibling_list, group_entry) { 1709 + if (!__pmu_filter_match(child)) 1710 + return 0; 1711 + } 1712 + 1713 + return 1; 1693 1714 } 1694 1715 1695 1716 static inline int ··· 7596 7575 prog = event->tp_event->prog; 7597 7576 if (prog) { 7598 7577 event->tp_event->prog = NULL; 7599 - bpf_prog_put(prog); 7578 + bpf_prog_put_rcu(prog); 7600 7579 } 7601 7580 } 7602 7581
+8 -2
kernel/trace/bpf_trace.c
··· 209 209 event->pmu->count) 210 210 return -EINVAL; 211 211 212 + if (unlikely(event->attr.type != PERF_TYPE_HARDWARE && 213 + event->attr.type != PERF_TYPE_RAW)) 214 + return -EINVAL; 215 + 212 216 /* 213 217 * we don't know if the function is run successfully by the 214 218 * return value. It can be judged in other places, such as ··· 353 349 } 354 350 355 351 /* bpf+kprobe programs can access fields of 'struct pt_regs' */ 356 - static bool kprobe_prog_is_valid_access(int off, int size, enum bpf_access_type type) 352 + static bool kprobe_prog_is_valid_access(int off, int size, enum bpf_access_type type, 353 + enum bpf_reg_type *reg_type) 357 354 { 358 355 /* check bounds */ 359 356 if (off < 0 || off >= sizeof(struct pt_regs)) ··· 432 427 } 433 428 } 434 429 435 - static bool tp_prog_is_valid_access(int off, int size, enum bpf_access_type type) 430 + static bool tp_prog_is_valid_access(int off, int size, enum bpf_access_type type, 431 + enum bpf_reg_type *reg_type) 436 432 { 437 433 if (off < sizeof(void *) || off >= PERF_MAX_TRACE_SIZE) 438 434 return false;
+2 -1
net/ax25/af_ax25.c
··· 976 976 release_sock(sk); 977 977 ax25_disconnect(ax25, 0); 978 978 lock_sock(sk); 979 - ax25_destroy_socket(ax25); 979 + if (!sock_flag(ax25->sk, SOCK_DESTROY)) 980 + ax25_destroy_socket(ax25); 980 981 break; 981 982 982 983 case AX25_STATE_3:
+4 -1
net/ax25/ax25_ds_timer.c
··· 102 102 switch (ax25->state) { 103 103 104 104 case AX25_STATE_0: 105 + case AX25_STATE_2: 105 106 /* Magic here: If we listen() and a new link dies before it 106 107 is accepted() it isn't 'dead' so doesn't get removed. */ 107 108 if (!sk || sock_flag(sk, SOCK_DESTROY) || ··· 112 111 sock_hold(sk); 113 112 ax25_destroy_socket(ax25); 114 113 bh_unlock_sock(sk); 114 + /* Ungrab socket and destroy it */ 115 115 sock_put(sk); 116 116 } else 117 117 ax25_destroy_socket(ax25); ··· 215 213 case AX25_STATE_2: 216 214 if (ax25->n2count == ax25->n2) { 217 215 ax25_send_control(ax25, AX25_DISC, AX25_POLLON, AX25_COMMAND); 218 - ax25_disconnect(ax25, ETIMEDOUT); 216 + if (!sock_flag(ax25->sk, SOCK_DESTROY)) 217 + ax25_disconnect(ax25, ETIMEDOUT); 219 218 return; 220 219 } else { 221 220 ax25->n2count++;
+4 -1
net/ax25/ax25_std_timer.c
··· 38 38 39 39 switch (ax25->state) { 40 40 case AX25_STATE_0: 41 + case AX25_STATE_2: 41 42 /* Magic here: If we listen() and a new link dies before it 42 43 is accepted() it isn't 'dead' so doesn't get removed. */ 43 44 if (!sk || sock_flag(sk, SOCK_DESTROY) || ··· 48 47 sock_hold(sk); 49 48 ax25_destroy_socket(ax25); 50 49 bh_unlock_sock(sk); 50 + /* Ungrab socket and destroy it */ 51 51 sock_put(sk); 52 52 } else 53 53 ax25_destroy_socket(ax25); ··· 146 144 case AX25_STATE_2: 147 145 if (ax25->n2count == ax25->n2) { 148 146 ax25_send_control(ax25, AX25_DISC, AX25_POLLON, AX25_COMMAND); 149 - ax25_disconnect(ax25, ETIMEDOUT); 147 + if (!sock_flag(ax25->sk, SOCK_DESTROY)) 148 + ax25_disconnect(ax25, ETIMEDOUT); 150 149 return; 151 150 } else { 152 151 ax25->n2count++;
+2 -1
net/ax25/ax25_subr.c
··· 264 264 { 265 265 ax25_clear_queues(ax25); 266 266 267 - ax25_stop_heartbeat(ax25); 267 + if (!sock_flag(ax25->sk, SOCK_DESTROY)) 268 + ax25_stop_heartbeat(ax25); 268 269 ax25_stop_t1timer(ax25); 269 270 ax25_stop_t2timer(ax25); 270 271 ax25_stop_t3timer(ax25);
+1
net/batman-adv/routing.c
··· 374 374 if (skb_cow(skb, ETH_HLEN) < 0) 375 375 goto out; 376 376 377 + ethhdr = eth_hdr(skb); 377 378 icmph = (struct batadv_icmp_header *)skb->data; 378 379 icmp_packet_rr = (struct batadv_icmp_packet_rr *)icmph; 379 380 if (icmp_packet_rr->rr_cur >= BATADV_RR_LEN)
+9
net/batman-adv/soft-interface.c
··· 1033 1033 static void batadv_softif_destroy_netlink(struct net_device *soft_iface, 1034 1034 struct list_head *head) 1035 1035 { 1036 + struct batadv_priv *bat_priv = netdev_priv(soft_iface); 1036 1037 struct batadv_hard_iface *hard_iface; 1038 + struct batadv_softif_vlan *vlan; 1037 1039 1038 1040 list_for_each_entry(hard_iface, &batadv_hardif_list, list) { 1039 1041 if (hard_iface->soft_iface == soft_iface) 1040 1042 batadv_hardif_disable_interface(hard_iface, 1041 1043 BATADV_IF_CLEANUP_KEEP); 1044 + } 1045 + 1046 + /* destroy the "untagged" VLAN */ 1047 + vlan = batadv_softif_vlan_get(bat_priv, BATADV_NO_FLAGS); 1048 + if (vlan) { 1049 + batadv_softif_destroy_vlan(bat_priv, vlan); 1050 + batadv_softif_vlan_put(vlan); 1042 1051 } 1043 1052 1044 1053 batadv_sysfs_del_meshif(soft_iface);
+41 -9
net/batman-adv/translation-table.c
··· 650 650 651 651 /* increase the refcounter of the related vlan */ 652 652 vlan = batadv_softif_vlan_get(bat_priv, vid); 653 - if (WARN(!vlan, "adding TT local entry %pM to non-existent VLAN %d", 654 - addr, BATADV_PRINT_VID(vid))) { 653 + if (!vlan) { 654 + net_ratelimited_function(batadv_info, soft_iface, 655 + "adding TT local entry %pM to non-existent VLAN %d\n", 656 + addr, BATADV_PRINT_VID(vid)); 655 657 kfree(tt_local); 656 658 tt_local = NULL; 657 659 goto out; ··· 693 691 if (unlikely(hash_added != 0)) { 694 692 /* remove the reference for the hash */ 695 693 batadv_tt_local_entry_put(tt_local); 696 - batadv_softif_vlan_put(vlan); 697 694 goto out; 698 695 } 699 696 ··· 2270 2269 return crc; 2271 2270 } 2272 2271 2272 + /** 2273 + * batadv_tt_req_node_release - free tt_req node entry 2274 + * @ref: kref pointer of the tt req_node entry 2275 + */ 2276 + static void batadv_tt_req_node_release(struct kref *ref) 2277 + { 2278 + struct batadv_tt_req_node *tt_req_node; 2279 + 2280 + tt_req_node = container_of(ref, struct batadv_tt_req_node, refcount); 2281 + 2282 + kfree(tt_req_node); 2283 + } 2284 + 2285 + /** 2286 + * batadv_tt_req_node_put - decrement the tt_req_node refcounter and 2287 + * possibly release it 2288 + * @tt_req_node: tt_req_node to be free'd 2289 + */ 2290 + static void batadv_tt_req_node_put(struct batadv_tt_req_node *tt_req_node) 2291 + { 2292 + kref_put(&tt_req_node->refcount, batadv_tt_req_node_release); 2293 + } 2294 + 2273 2295 static void batadv_tt_req_list_free(struct batadv_priv *bat_priv) 2274 2296 { 2275 2297 struct batadv_tt_req_node *node; ··· 2302 2278 2303 2279 hlist_for_each_entry_safe(node, safe, &bat_priv->tt.req_list, list) { 2304 2280 hlist_del_init(&node->list); 2305 - kfree(node); 2281 + batadv_tt_req_node_put(node); 2306 2282 } 2307 2283 2308 2284 spin_unlock_bh(&bat_priv->tt.req_list_lock); ··· 2339 2315 if (batadv_has_timed_out(node->issued_at, 2340 2316 BATADV_TT_REQUEST_TIMEOUT)) { 2341 2317 hlist_del_init(&node->list); 2342 - kfree(node); 2318 + batadv_tt_req_node_put(node); 2343 2319 } 2344 2320 } 2345 2321 spin_unlock_bh(&bat_priv->tt.req_list_lock); ··· 2371 2347 if (!tt_req_node) 2372 2348 goto unlock; 2373 2349 2350 + kref_init(&tt_req_node->refcount); 2374 2351 ether_addr_copy(tt_req_node->addr, orig_node->orig); 2375 2352 tt_req_node->issued_at = jiffies; 2376 2353 2354 + kref_get(&tt_req_node->refcount); 2377 2355 hlist_add_head(&tt_req_node->list, &bat_priv->tt.req_list); 2378 2356 unlock: 2379 2357 spin_unlock_bh(&bat_priv->tt.req_list_lock); ··· 2639 2613 out: 2640 2614 if (primary_if) 2641 2615 batadv_hardif_put(primary_if); 2616 + 2642 2617 if (ret && tt_req_node) { 2643 2618 spin_lock_bh(&bat_priv->tt.req_list_lock); 2644 - /* hlist_del_init() verifies tt_req_node still is in the list */ 2645 - hlist_del_init(&tt_req_node->list); 2619 + if (!hlist_unhashed(&tt_req_node->list)) { 2620 + hlist_del_init(&tt_req_node->list); 2621 + batadv_tt_req_node_put(tt_req_node); 2622 + } 2646 2623 spin_unlock_bh(&bat_priv->tt.req_list_lock); 2647 - kfree(tt_req_node); 2648 2624 } 2625 + 2626 + if (tt_req_node) 2627 + batadv_tt_req_node_put(tt_req_node); 2628 + 2649 2629 kfree(tvlv_tt_data); 2650 2630 return ret; 2651 2631 } ··· 3087 3055 if (!batadv_compare_eth(node->addr, resp_src)) 3088 3056 continue; 3089 3057 hlist_del_init(&node->list); 3090 - kfree(node); 3058 + batadv_tt_req_node_put(node); 3091 3059 } 3092 3060 3093 3061 spin_unlock_bh(&bat_priv->tt.req_list_lock);
+2
net/batman-adv/types.h
··· 1137 1137 * struct batadv_tt_req_node - data to keep track of the tt requests in flight 1138 1138 * @addr: mac address address of the originator this request was sent to 1139 1139 * @issued_at: timestamp used for purging stale tt requests 1140 + * @refcount: number of contexts the object is used by 1140 1141 * @list: list node for batadv_priv_tt::req_list 1141 1142 */ 1142 1143 struct batadv_tt_req_node { 1143 1144 u8 addr[ETH_ALEN]; 1144 1145 unsigned long issued_at; 1146 + struct kref refcount; 1145 1147 struct hlist_node list; 1146 1148 }; 1147 1149
+12 -3
net/bridge/br_input.c
··· 213 213 } 214 214 EXPORT_SYMBOL_GPL(br_handle_frame_finish); 215 215 216 - /* note: already called with rcu_read_lock */ 217 - static int br_handle_local_finish(struct net *net, struct sock *sk, struct sk_buff *skb) 216 + static void __br_handle_local_finish(struct sk_buff *skb) 218 217 { 219 218 struct net_bridge_port *p = br_port_get_rcu(skb->dev); 220 219 u16 vid = 0; ··· 221 222 /* check if vlan is allowed, to avoid spoofing */ 222 223 if (p->flags & BR_LEARNING && br_should_learn(p, skb, &vid)) 223 224 br_fdb_update(p->br, p, eth_hdr(skb)->h_source, vid, false); 225 + } 226 + 227 + /* note: already called with rcu_read_lock */ 228 + static int br_handle_local_finish(struct net *net, struct sock *sk, struct sk_buff *skb) 229 + { 230 + struct net_bridge_port *p = br_port_get_rcu(skb->dev); 231 + 232 + __br_handle_local_finish(skb); 224 233 225 234 BR_INPUT_SKB_CB(skb)->brdev = p->br->dev; 226 235 br_pass_frame_up(skb); ··· 281 274 if (p->br->stp_enabled == BR_NO_STP || 282 275 fwd_mask & (1u << dest[5])) 283 276 goto forward; 284 - break; 277 + *pskb = skb; 278 + __br_handle_local_finish(skb); 279 + return RX_HANDLER_PASS; 285 280 286 281 case 0x01: /* IEEE MAC (Pause) */ 287 282 goto drop;
+4
net/bridge/br_multicast.c
··· 464 464 if (ipv6_dev_get_saddr(dev_net(br->dev), br->dev, &ip6h->daddr, 0, 465 465 &ip6h->saddr)) { 466 466 kfree_skb(skb); 467 + br->has_ipv6_addr = 0; 467 468 return NULL; 468 469 } 470 + 471 + br->has_ipv6_addr = 1; 469 472 ipv6_eth_mc_map(&ip6h->daddr, eth->h_dest); 470 473 471 474 hopopt = (u8 *)(ip6h + 1); ··· 1748 1745 br->ip6_other_query.delay_time = 0; 1749 1746 br->ip6_querier.port = NULL; 1750 1747 #endif 1748 + br->has_ipv6_addr = 1; 1751 1749 1752 1750 spin_lock_init(&br->multicast_lock); 1753 1751 setup_timer(&br->multicast_router_timer,
+1 -1
net/bridge/br_netlink.c
··· 1273 1273 struct bridge_vlan_xstats vxi; 1274 1274 struct br_vlan_stats stats; 1275 1275 1276 - if (vl_idx++ < *prividx) 1276 + if (++vl_idx < *prividx) 1277 1277 continue; 1278 1278 memset(&vxi, 0, sizeof(vxi)); 1279 1279 vxi.vid = v->vid;
+19 -4
net/bridge/br_private.h
··· 314 314 u8 multicast_disabled:1; 315 315 u8 multicast_querier:1; 316 316 u8 multicast_query_use_ifaddr:1; 317 + u8 has_ipv6_addr:1; 317 318 318 319 u32 hash_elasticity; 319 320 u32 hash_max; ··· 589 588 590 589 static inline bool 591 590 __br_multicast_querier_exists(struct net_bridge *br, 592 - struct bridge_mcast_other_query *querier) 591 + struct bridge_mcast_other_query *querier, 592 + const bool is_ipv6) 593 593 { 594 + bool own_querier_enabled; 595 + 596 + if (br->multicast_querier) { 597 + if (is_ipv6 && !br->has_ipv6_addr) 598 + own_querier_enabled = false; 599 + else 600 + own_querier_enabled = true; 601 + } else { 602 + own_querier_enabled = false; 603 + } 604 + 594 605 return time_is_before_jiffies(querier->delay_time) && 595 - (br->multicast_querier || timer_pending(&querier->timer)); 606 + (own_querier_enabled || timer_pending(&querier->timer)); 596 607 } 597 608 598 609 static inline bool br_multicast_querier_exists(struct net_bridge *br, ··· 612 599 { 613 600 switch (eth->h_proto) { 614 601 case (htons(ETH_P_IP)): 615 - return __br_multicast_querier_exists(br, &br->ip4_other_query); 602 + return __br_multicast_querier_exists(br, 603 + &br->ip4_other_query, false); 616 604 #if IS_ENABLED(CONFIG_IPV6) 617 605 case (htons(ETH_P_IPV6)): 618 - return __br_multicast_querier_exists(br, &br->ip6_other_query); 606 + return __br_multicast_querier_exists(br, 607 + &br->ip6_other_query, true); 619 608 #endif 620 609 default: 621 610 return false;
+14 -2
net/core/filter.c
··· 2085 2085 } 2086 2086 2087 2087 static bool sk_filter_is_valid_access(int off, int size, 2088 - enum bpf_access_type type) 2088 + enum bpf_access_type type, 2089 + enum bpf_reg_type *reg_type) 2089 2090 { 2090 2091 switch (off) { 2091 2092 case offsetof(struct __sk_buff, tc_classid): ··· 2109 2108 } 2110 2109 2111 2110 static bool tc_cls_act_is_valid_access(int off, int size, 2112 - enum bpf_access_type type) 2111 + enum bpf_access_type type, 2112 + enum bpf_reg_type *reg_type) 2113 2113 { 2114 2114 if (type == BPF_WRITE) { 2115 2115 switch (off) { ··· 2125 2123 return false; 2126 2124 } 2127 2125 } 2126 + 2127 + switch (off) { 2128 + case offsetof(struct __sk_buff, data): 2129 + *reg_type = PTR_TO_PACKET; 2130 + break; 2131 + case offsetof(struct __sk_buff, data_end): 2132 + *reg_type = PTR_TO_PACKET_END; 2133 + break; 2134 + } 2135 + 2128 2136 return __is_valid_access(off, size, type); 2129 2137 } 2130 2138
+5 -1
net/core/neighbour.c
··· 2469 2469 tbl = neigh_tables[index]; 2470 2470 if (!tbl) 2471 2471 goto out; 2472 + rcu_read_lock_bh(); 2472 2473 neigh = __neigh_lookup_noref(tbl, addr, dev); 2473 2474 if (!neigh) 2474 2475 neigh = __neigh_create(tbl, addr, dev, false); 2475 2476 err = PTR_ERR(neigh); 2476 - if (IS_ERR(neigh)) 2477 + if (IS_ERR(neigh)) { 2478 + rcu_read_unlock_bh(); 2477 2479 goto out_kfree_skb; 2480 + } 2478 2481 err = neigh->output(neigh, skb); 2482 + rcu_read_unlock_bh(); 2479 2483 } 2480 2484 else if (index == NEIGH_LINK_TABLE) { 2481 2485 err = dev_hard_header(skb, dev, ntohs(skb->protocol),
+32 -20
net/ipv4/esp4.c
··· 23 23 void *tmp; 24 24 }; 25 25 26 + struct esp_output_extra { 27 + __be32 seqhi; 28 + u32 esphoff; 29 + }; 30 + 26 31 #define ESP_SKB_CB(__skb) ((struct esp_skb_cb *)&((__skb)->cb[0])) 27 32 28 33 static u32 esp4_get_mtu(struct xfrm_state *x, int mtu); ··· 40 35 * 41 36 * TODO: Use spare space in skb for this where possible. 42 37 */ 43 - static void *esp_alloc_tmp(struct crypto_aead *aead, int nfrags, int seqhilen) 38 + static void *esp_alloc_tmp(struct crypto_aead *aead, int nfrags, int extralen) 44 39 { 45 40 unsigned int len; 46 41 47 - len = seqhilen; 42 + len = extralen; 48 43 49 44 len += crypto_aead_ivsize(aead); 50 45 ··· 62 57 return kmalloc(len, GFP_ATOMIC); 63 58 } 64 59 65 - static inline __be32 *esp_tmp_seqhi(void *tmp) 60 + static inline void *esp_tmp_extra(void *tmp) 66 61 { 67 - return PTR_ALIGN((__be32 *)tmp, __alignof__(__be32)); 62 + return PTR_ALIGN(tmp, __alignof__(struct esp_output_extra)); 68 63 } 69 - static inline u8 *esp_tmp_iv(struct crypto_aead *aead, void *tmp, int seqhilen) 64 + 65 + static inline u8 *esp_tmp_iv(struct crypto_aead *aead, void *tmp, int extralen) 70 66 { 71 67 return crypto_aead_ivsize(aead) ? 72 - PTR_ALIGN((u8 *)tmp + seqhilen, 73 - crypto_aead_alignmask(aead) + 1) : tmp + seqhilen; 68 + PTR_ALIGN((u8 *)tmp + extralen, 69 + crypto_aead_alignmask(aead) + 1) : tmp + extralen; 74 70 } 75 71 76 72 static inline struct aead_request *esp_tmp_req(struct crypto_aead *aead, u8 *iv) ··· 105 99 { 106 100 struct ip_esp_hdr *esph = (void *)(skb->data + offset); 107 101 void *tmp = ESP_SKB_CB(skb)->tmp; 108 - __be32 *seqhi = esp_tmp_seqhi(tmp); 102 + __be32 *seqhi = esp_tmp_extra(tmp); 109 103 110 104 esph->seq_no = esph->spi; 111 105 esph->spi = *seqhi; ··· 113 107 114 108 static void esp_output_restore_header(struct sk_buff *skb) 115 109 { 116 - esp_restore_header(skb, skb_transport_offset(skb) - sizeof(__be32)); 110 + void *tmp = ESP_SKB_CB(skb)->tmp; 111 + struct esp_output_extra *extra = esp_tmp_extra(tmp); 112 + 113 + esp_restore_header(skb, skb_transport_offset(skb) + extra->esphoff - 114 + sizeof(__be32)); 117 115 } 118 116 119 117 static void esp_output_done_esn(struct crypto_async_request *base, int err) ··· 131 121 static int esp_output(struct xfrm_state *x, struct sk_buff *skb) 132 122 { 133 123 int err; 124 + struct esp_output_extra *extra; 134 125 struct ip_esp_hdr *esph; 135 126 struct crypto_aead *aead; 136 127 struct aead_request *req; ··· 148 137 int tfclen; 149 138 int nfrags; 150 139 int assoclen; 151 - int seqhilen; 152 - __be32 *seqhi; 140 + int extralen; 153 141 __be64 seqno; 154 142 155 143 /* skb is pure payload to encrypt */ ··· 176 166 nfrags = err; 177 167 178 168 assoclen = sizeof(*esph); 179 - seqhilen = 0; 169 + extralen = 0; 180 170 181 171 if (x->props.flags & XFRM_STATE_ESN) { 182 - seqhilen += sizeof(__be32); 183 - assoclen += seqhilen; 172 + extralen += sizeof(*extra); 173 + assoclen += sizeof(__be32); 184 174 } 185 175 186 - tmp = esp_alloc_tmp(aead, nfrags, seqhilen); 176 + tmp = esp_alloc_tmp(aead, nfrags, extralen); 187 177 if (!tmp) { 188 178 err = -ENOMEM; 189 179 goto error; 190 180 } 191 181 192 - seqhi = esp_tmp_seqhi(tmp); 193 - iv = esp_tmp_iv(aead, tmp, seqhilen); 182 + extra = esp_tmp_extra(tmp); 183 + iv = esp_tmp_iv(aead, tmp, extralen); 194 184 req = esp_tmp_req(aead, iv); 195 185 sg = esp_req_sg(aead, req); 196 186 ··· 257 247 * encryption. 258 248 */ 259 249 if ((x->props.flags & XFRM_STATE_ESN)) { 260 - esph = (void *)(skb_transport_header(skb) - sizeof(__be32)); 261 - *seqhi = esph->spi; 250 + extra->esphoff = (unsigned char *)esph - 251 + skb_transport_header(skb); 252 + esph = (struct ip_esp_hdr *)((unsigned char *)esph - 4); 253 + extra->seqhi = esph->spi; 262 254 esph->seq_no = htonl(XFRM_SKB_CB(skb)->seq.output.hi); 263 255 aead_request_set_callback(req, 0, esp_output_done_esn, skb); 264 256 } ··· 457 445 goto out; 458 446 459 447 ESP_SKB_CB(skb)->tmp = tmp; 460 - seqhi = esp_tmp_seqhi(tmp); 448 + seqhi = esp_tmp_extra(tmp); 461 449 iv = esp_tmp_iv(aead, tmp, seqhilen); 462 450 req = esp_tmp_req(aead, iv); 463 451 sg = esp_req_sg(aead, req);
+5 -5
net/ipv4/gre_demux.c
··· 62 62 63 63 /* Fills in tpi and returns header length to be pulled. */ 64 64 int gre_parse_header(struct sk_buff *skb, struct tnl_ptk_info *tpi, 65 - bool *csum_err, __be16 proto) 65 + bool *csum_err, __be16 proto, int nhs) 66 66 { 67 67 const struct gre_base_hdr *greh; 68 68 __be32 *options; 69 69 int hdr_len; 70 70 71 - if (unlikely(!pskb_may_pull(skb, sizeof(struct gre_base_hdr)))) 71 + if (unlikely(!pskb_may_pull(skb, nhs + sizeof(struct gre_base_hdr)))) 72 72 return -EINVAL; 73 73 74 - greh = (struct gre_base_hdr *)skb_transport_header(skb); 74 + greh = (struct gre_base_hdr *)(skb->data + nhs); 75 75 if (unlikely(greh->flags & (GRE_VERSION | GRE_ROUTING))) 76 76 return -EINVAL; 77 77 78 78 tpi->flags = gre_flags_to_tnl_flags(greh->flags); 79 79 hdr_len = gre_calc_hlen(tpi->flags); 80 80 81 - if (!pskb_may_pull(skb, hdr_len)) 81 + if (!pskb_may_pull(skb, nhs + hdr_len)) 82 82 return -EINVAL; 83 83 84 - greh = (struct gre_base_hdr *)skb_transport_header(skb); 84 + greh = (struct gre_base_hdr *)(skb->data + nhs); 85 85 tpi->proto = greh->protocol; 86 86 87 87 options = (__be32 *)(greh + 1);
+15 -11
net/ipv4/ip_gre.c
··· 49 49 #include <net/gre.h> 50 50 #include <net/dst_metadata.h> 51 51 52 - #if IS_ENABLED(CONFIG_IPV6) 53 - #include <net/ipv6.h> 54 - #include <net/ip6_fib.h> 55 - #include <net/ip6_route.h> 56 - #endif 57 - 58 52 /* 59 53 Problems & solutions 60 54 -------------------- ··· 211 217 * by themselves??? 212 218 */ 213 219 220 + const struct iphdr *iph = (struct iphdr *)skb->data; 214 221 const int type = icmp_hdr(skb)->type; 215 222 const int code = icmp_hdr(skb)->code; 216 223 struct tnl_ptk_info tpi; 217 224 bool csum_err = false; 218 225 219 - if (gre_parse_header(skb, &tpi, &csum_err, htons(ETH_P_IP)) < 0) { 226 + if (gre_parse_header(skb, &tpi, &csum_err, htons(ETH_P_IP), 227 + iph->ihl * 4) < 0) { 220 228 if (!csum_err) /* ignore csum errors. */ 221 229 return; 222 230 } ··· 334 338 } 335 339 #endif 336 340 337 - hdr_len = gre_parse_header(skb, &tpi, &csum_err, htons(ETH_P_IP)); 341 + hdr_len = gre_parse_header(skb, &tpi, &csum_err, htons(ETH_P_IP), 0); 338 342 if (hdr_len < 0) 339 343 goto drop; 340 344 ··· 1117 1121 { 1118 1122 struct nlattr *tb[IFLA_MAX + 1]; 1119 1123 struct net_device *dev; 1124 + LIST_HEAD(list_kill); 1120 1125 struct ip_tunnel *t; 1121 1126 int err; 1122 1127 ··· 1133 1136 t->collect_md = true; 1134 1137 1135 1138 err = ipgre_newlink(net, dev, tb, NULL); 1136 - if (err < 0) 1137 - goto out; 1139 + if (err < 0) { 1140 + free_netdev(dev); 1141 + return ERR_PTR(err); 1142 + } 1138 1143 1139 1144 /* openvswitch users expect packet sizes to be unrestricted, 1140 1145 * so set the largest MTU we can. ··· 1145 1146 if (err) 1146 1147 goto out; 1147 1148 1149 + err = rtnl_configure_link(dev, NULL); 1150 + if (err < 0) 1151 + goto out; 1152 + 1148 1153 return dev; 1149 1154 out: 1150 - free_netdev(dev); 1155 + ip_tunnel_dellink(dev, &list_kill); 1156 + unregister_netdevice_many(&list_kill); 1151 1157 return ERR_PTR(err); 1152 1158 } 1153 1159 EXPORT_SYMBOL_GPL(gretap_fb_dev_create);
+3 -1
net/ipv4/ipconfig.c
··· 127 127 static __be32 ic_netmask = NONE; /* Netmask for local subnet */ 128 128 __be32 ic_gateway = NONE; /* Gateway IP address */ 129 129 130 - __be32 ic_addrservaddr = NONE; /* IP Address of the IP addresses'server */ 130 + #ifdef IPCONFIG_DYNAMIC 131 + static __be32 ic_addrservaddr = NONE; /* IP Address of the IP addresses'server */ 132 + #endif 131 133 132 134 __be32 ic_servaddr = NONE; /* Boot server IP address */ 133 135
+3 -1
net/ipv4/ipmr.c
··· 891 891 { 892 892 struct mfc_cache *c = kmem_cache_zalloc(mrt_cachep, GFP_KERNEL); 893 893 894 - if (c) 894 + if (c) { 895 + c->mfc_un.res.last_assert = jiffies - MFC_ASSERT_THRESH - 1; 895 896 c->mfc_un.res.minvif = MAXVIFS; 897 + } 896 898 return c; 897 899 } 898 900
+6 -1
net/ipv4/tcp_output.c
··· 2751 2751 struct tcp_sock *tp = tcp_sk(sk); 2752 2752 struct sk_buff *skb; 2753 2753 struct sk_buff *hole = NULL; 2754 - u32 last_lost; 2754 + u32 max_segs, last_lost; 2755 2755 int mib_idx; 2756 2756 int fwd_rexmitting = 0; 2757 2757 ··· 2771 2771 last_lost = tp->snd_una; 2772 2772 } 2773 2773 2774 + max_segs = tcp_tso_autosize(sk, tcp_current_mss(sk)); 2774 2775 tcp_for_write_queue_from(skb, sk) { 2775 2776 __u8 sacked = TCP_SKB_CB(skb)->sacked; 2776 2777 int segs; ··· 2785 2784 segs = tp->snd_cwnd - tcp_packets_in_flight(tp); 2786 2785 if (segs <= 0) 2787 2786 return; 2787 + /* In case tcp_shift_skb_data() have aggregated large skbs, 2788 + * we need to make sure not sending too bigs TSO packets 2789 + */ 2790 + segs = min_t(int, segs, max_segs); 2788 2791 2789 2792 if (fwd_rexmitting) { 2790 2793 begin_fwd:
+21 -59
net/ipv4/udp.c
··· 391 391 return udp_lib_get_port(sk, snum, ipv4_rcv_saddr_equal, hash2_nulladdr); 392 392 } 393 393 394 - static inline int compute_score(struct sock *sk, struct net *net, 395 - __be32 saddr, unsigned short hnum, __be16 sport, 396 - __be32 daddr, __be16 dport, int dif) 394 + static int compute_score(struct sock *sk, struct net *net, 395 + __be32 saddr, __be16 sport, 396 + __be32 daddr, unsigned short hnum, int dif) 397 397 { 398 398 int score; 399 399 struct inet_sock *inet; ··· 434 434 return score; 435 435 } 436 436 437 - /* 438 - * In this second variant, we check (daddr, dport) matches (inet_rcv_sadd, inet_num) 439 - */ 440 - static inline int compute_score2(struct sock *sk, struct net *net, 441 - __be32 saddr, __be16 sport, 442 - __be32 daddr, unsigned int hnum, int dif) 443 - { 444 - int score; 445 - struct inet_sock *inet; 446 - 447 - if (!net_eq(sock_net(sk), net) || 448 - ipv6_only_sock(sk)) 449 - return -1; 450 - 451 - inet = inet_sk(sk); 452 - 453 - if (inet->inet_rcv_saddr != daddr || 454 - inet->inet_num != hnum) 455 - return -1; 456 - 457 - score = (sk->sk_family == PF_INET) ? 2 : 1; 458 - 459 - if (inet->inet_daddr) { 460 - if (inet->inet_daddr != saddr) 461 - return -1; 462 - score += 4; 463 - } 464 - 465 - if (inet->inet_dport) { 466 - if (inet->inet_dport != sport) 467 - return -1; 468 - score += 4; 469 - } 470 - 471 - if (sk->sk_bound_dev_if) { 472 - if (sk->sk_bound_dev_if != dif) 473 - return -1; 474 - score += 4; 475 - } 476 - 477 - if (sk->sk_incoming_cpu == raw_smp_processor_id()) 478 - score++; 479 - 480 - return score; 481 - } 482 - 483 437 static u32 udp_ehashfn(const struct net *net, const __be32 laddr, 484 438 const __u16 lport, const __be32 faddr, 485 439 const __be16 fport) ··· 446 492 udp_ehash_secret + net_hash_mix(net)); 447 493 } 448 494 449 - /* called with read_rcu_lock() */ 495 + /* called with rcu_read_lock() */ 450 496 static struct sock *udp4_lib_lookup2(struct net *net, 451 497 __be32 saddr, __be16 sport, 452 498 __be32 daddr, unsigned int hnum, int dif, 453 - struct udp_hslot *hslot2, unsigned int slot2, 499 + struct udp_hslot *hslot2, 454 500 struct sk_buff *skb) 455 501 { 456 502 struct sock *sk, *result; ··· 460 506 result = NULL; 461 507 badness = 0; 462 508 udp_portaddr_for_each_entry_rcu(sk, &hslot2->head) { 463 - score = compute_score2(sk, net, saddr, sport, 509 + score = compute_score(sk, net, saddr, sport, 464 510 daddr, hnum, dif); 465 511 if (score > badness) { 466 512 reuseport = sk->sk_reuseport; ··· 508 554 509 555 result = udp4_lib_lookup2(net, saddr, sport, 510 556 daddr, hnum, dif, 511 - hslot2, slot2, skb); 557 + hslot2, skb); 512 558 if (!result) { 559 + unsigned int old_slot2 = slot2; 513 560 hash2 = udp4_portaddr_hash(net, htonl(INADDR_ANY), hnum); 514 561 slot2 = hash2 & udptable->mask; 562 + /* avoid searching the same slot again. */ 563 + if (unlikely(slot2 == old_slot2)) 564 + return result; 565 + 515 566 hslot2 = &udptable->hash2[slot2]; 516 567 if (hslot->count < hslot2->count) 517 568 goto begin; 518 569 519 570 result = udp4_lib_lookup2(net, saddr, sport, 520 - htonl(INADDR_ANY), hnum, dif, 521 - hslot2, slot2, skb); 571 + daddr, hnum, dif, 572 + hslot2, skb); 522 573 } 523 574 return result; 524 575 } ··· 531 572 result = NULL; 532 573 badness = 0; 533 574 sk_for_each_rcu(sk, &hslot->head) { 534 - score = compute_score(sk, net, saddr, hnum, sport, 535 - daddr, dport, dif); 575 + score = compute_score(sk, net, saddr, sport, 576 + daddr, hnum, dif); 536 577 if (score > badness) { 537 578 reuseport = sk->sk_reuseport; 538 579 if (reuseport) { ··· 1714 1755 return err; 1715 1756 } 1716 1757 1717 - return skb_checksum_init_zero_check(skb, proto, uh->check, 1718 - inet_compute_pseudo); 1758 + /* Note, we are only interested in != 0 or == 0, thus the 1759 + * force to int. 1760 + */ 1761 + return (__force int)skb_checksum_init_zero_check(skb, proto, uh->check, 1762 + inet_compute_pseudo); 1719 1763 } 1720 1764 1721 1765 /*
+1 -1
net/ipv6/icmp.c
··· 98 98 99 99 if (!(type & ICMPV6_INFOMSG_MASK)) 100 100 if (icmp6->icmp6_type == ICMPV6_ECHO_REQUEST) 101 - ping_err(skb, offset, info); 101 + ping_err(skb, offset, ntohl(info)); 102 102 } 103 103 104 104 static int icmpv6_rcv(struct sk_buff *skb);
+5 -2
net/ipv6/ip6_checksum.c
··· 78 78 * we accept a checksum of zero here. When we find the socket 79 79 * for the UDP packet we'll check if that socket allows zero checksum 80 80 * for IPv6 (set by socket option). 81 + * 82 + * Note, we are only interested in != 0 or == 0, thus the 83 + * force to int. 81 84 */ 82 - return skb_checksum_init_zero_check(skb, proto, uh->check, 83 - ip6_compute_pseudo); 85 + return (__force int)skb_checksum_init_zero_check(skb, proto, uh->check, 86 + ip6_compute_pseudo); 84 87 } 85 88 EXPORT_SYMBOL(udp6_csum_init); 86 89
+1 -1
net/ipv6/ip6_gre.c
··· 468 468 bool csum_err = false; 469 469 int hdr_len; 470 470 471 - hdr_len = gre_parse_header(skb, &tpi, &csum_err, htons(ETH_P_IPV6)); 471 + hdr_len = gre_parse_header(skb, &tpi, &csum_err, htons(ETH_P_IPV6), 0); 472 472 if (hdr_len < 0) 473 473 goto drop; 474 474
+1
net/ipv6/ip6mr.c
··· 1074 1074 struct mfc6_cache *c = kmem_cache_zalloc(mrt_cachep, GFP_KERNEL); 1075 1075 if (!c) 1076 1076 return NULL; 1077 + c->mfc_un.res.last_assert = jiffies - MFC_ASSERT_THRESH - 1; 1077 1078 c->mfc_un.res.minvif = MAXMIFS; 1078 1079 return c; 1079 1080 }
+1 -1
net/ipv6/route.c
··· 1782 1782 }; 1783 1783 struct fib6_table *table; 1784 1784 struct rt6_info *rt; 1785 - int flags = 0; 1785 + int flags = RT6_LOOKUP_F_IFACE; 1786 1786 1787 1787 table = fib6_get_table(net, cfg->fc_table); 1788 1788 if (!table)
+2 -2
net/ipv6/sit.c
··· 560 560 561 561 if (type == ICMP_DEST_UNREACH && code == ICMP_FRAG_NEEDED) { 562 562 ipv4_update_pmtu(skb, dev_net(skb->dev), info, 563 - t->parms.link, 0, IPPROTO_IPV6, 0); 563 + t->parms.link, 0, iph->protocol, 0); 564 564 err = 0; 565 565 goto out; 566 566 } 567 567 if (type == ICMP_REDIRECT) { 568 568 ipv4_redirect(skb, dev_net(skb->dev), t->parms.link, 0, 569 - IPPROTO_IPV6, 0); 569 + iph->protocol, 0); 570 570 err = 0; 571 571 goto out; 572 572 }
+2 -2
net/ipv6/tcp_ipv6.c
··· 738 738 static void tcp_v6_send_response(const struct sock *sk, struct sk_buff *skb, u32 seq, 739 739 u32 ack, u32 win, u32 tsval, u32 tsecr, 740 740 int oif, struct tcp_md5sig_key *key, int rst, 741 - u8 tclass, u32 label) 741 + u8 tclass, __be32 label) 742 742 { 743 743 const struct tcphdr *th = tcp_hdr(skb); 744 744 struct tcphdr *t1; ··· 911 911 static void tcp_v6_send_ack(const struct sock *sk, struct sk_buff *skb, u32 seq, 912 912 u32 ack, u32 win, u32 tsval, u32 tsecr, int oif, 913 913 struct tcp_md5sig_key *key, u8 tclass, 914 - u32 label) 914 + __be32 label) 915 915 { 916 916 tcp_v6_send_response(sk, skb, seq, ack, win, tsval, tsecr, oif, key, 0, 917 917 tclass, label);
+16 -55
net/ipv6/udp.c
··· 115 115 udp_lib_rehash(sk, new_hash); 116 116 } 117 117 118 - static inline int compute_score(struct sock *sk, struct net *net, 119 - unsigned short hnum, 120 - const struct in6_addr *saddr, __be16 sport, 121 - const struct in6_addr *daddr, __be16 dport, 122 - int dif) 118 + static int compute_score(struct sock *sk, struct net *net, 119 + const struct in6_addr *saddr, __be16 sport, 120 + const struct in6_addr *daddr, unsigned short hnum, 121 + int dif) 123 122 { 124 123 int score; 125 124 struct inet_sock *inet; ··· 161 162 return score; 162 163 } 163 164 164 - static inline int compute_score2(struct sock *sk, struct net *net, 165 - const struct in6_addr *saddr, __be16 sport, 166 - const struct in6_addr *daddr, 167 - unsigned short hnum, int dif) 168 - { 169 - int score; 170 - struct inet_sock *inet; 171 - 172 - if (!net_eq(sock_net(sk), net) || 173 - udp_sk(sk)->udp_port_hash != hnum || 174 - sk->sk_family != PF_INET6) 175 - return -1; 176 - 177 - if (!ipv6_addr_equal(&sk->sk_v6_rcv_saddr, daddr)) 178 - return -1; 179 - 180 - score = 0; 181 - inet = inet_sk(sk); 182 - 183 - if (inet->inet_dport) { 184 - if (inet->inet_dport != sport) 185 - return -1; 186 - score++; 187 - } 188 - 189 - if (!ipv6_addr_any(&sk->sk_v6_daddr)) { 190 - if (!ipv6_addr_equal(&sk->sk_v6_daddr, saddr)) 191 - return -1; 192 - score++; 193 - } 194 - 195 - if (sk->sk_bound_dev_if) { 196 - if (sk->sk_bound_dev_if != dif) 197 - return -1; 198 - score++; 199 - } 200 - 201 - if (sk->sk_incoming_cpu == raw_smp_processor_id()) 202 - score++; 203 - 204 - return score; 205 - } 206 - 207 - /* called with read_rcu_lock() */ 165 + /* called with rcu_read_lock() */ 208 166 static struct sock *udp6_lib_lookup2(struct net *net, 209 167 const struct in6_addr *saddr, __be16 sport, 210 168 const struct in6_addr *daddr, unsigned int hnum, int dif, 211 - struct udp_hslot *hslot2, unsigned int slot2, 169 + struct udp_hslot *hslot2, 212 170 struct sk_buff *skb) 213 171 { 214 172 struct sock *sk, *result; ··· 175 219 result = NULL; 176 220 badness = -1; 177 221 udp_portaddr_for_each_entry_rcu(sk, &hslot2->head) { 178 - score = compute_score2(sk, net, saddr, sport, 222 + score = compute_score(sk, net, saddr, sport, 179 223 daddr, hnum, dif); 180 224 if (score > badness) { 181 225 reuseport = sk->sk_reuseport; ··· 224 268 225 269 result = udp6_lib_lookup2(net, saddr, sport, 226 270 daddr, hnum, dif, 227 - hslot2, slot2, skb); 271 + hslot2, skb); 228 272 if (!result) { 273 + unsigned int old_slot2 = slot2; 229 274 hash2 = udp6_portaddr_hash(net, &in6addr_any, hnum); 230 275 slot2 = hash2 & udptable->mask; 276 + /* avoid searching the same slot again. */ 277 + if (unlikely(slot2 == old_slot2)) 278 + return result; 279 + 231 280 hslot2 = &udptable->hash2[slot2]; 232 281 if (hslot->count < hslot2->count) 233 282 goto begin; 234 283 235 284 result = udp6_lib_lookup2(net, saddr, sport, 236 - &in6addr_any, hnum, dif, 237 - hslot2, slot2, skb); 285 + daddr, hnum, dif, 286 + hslot2, skb); 238 287 } 239 288 return result; 240 289 } ··· 247 286 result = NULL; 248 287 badness = -1; 249 288 sk_for_each_rcu(sk, &hslot->head) { 250 - score = compute_score(sk, net, hnum, saddr, sport, daddr, dport, dif); 289 + score = compute_score(sk, net, saddr, sport, daddr, hnum, dif); 251 290 if (score > badness) { 252 291 reuseport = sk->sk_reuseport; 253 292 if (reuseport) {
+1
net/kcm/kcmproc.c
··· 241 241 .open = kcm_seq_open, 242 242 .read = seq_read, 243 243 .llseek = seq_lseek, 244 + .release = seq_release_net, 244 245 }; 245 246 246 247 static struct kcm_seq_muxinfo kcm_seq_muxinfo = {
+5 -2
net/mac80211/mesh.c
··· 148 148 void mesh_sta_cleanup(struct sta_info *sta) 149 149 { 150 150 struct ieee80211_sub_if_data *sdata = sta->sdata; 151 - u32 changed; 151 + u32 changed = 0; 152 152 153 153 /* 154 154 * maybe userspace handles peer allocation and peering, but in either 155 155 * case the beacon is still generated by the kernel and we might need 156 156 * an update. 157 157 */ 158 - changed = mesh_accept_plinks_update(sdata); 158 + if (sdata->u.mesh.user_mpm && 159 + sta->mesh->plink_state == NL80211_PLINK_ESTAB) 160 + changed |= mesh_plink_dec_estab_count(sdata); 161 + changed |= mesh_accept_plinks_update(sdata); 159 162 if (!sdata->u.mesh.user_mpm) { 160 163 changed |= mesh_plink_deactivate(sta); 161 164 del_timer_sync(&sta->mesh->plink_timer);
+2
net/netfilter/nf_conntrack_core.c
··· 1544 1544 nf_conntrack_tstamp_fini(); 1545 1545 nf_conntrack_acct_fini(); 1546 1546 nf_conntrack_expect_fini(); 1547 + 1548 + kmem_cache_destroy(nf_conntrack_cachep); 1547 1549 } 1548 1550 1549 1551 /*
+11 -13
net/netfilter/nf_tables_api.c
··· 2946 2946 * jumps are already validated for that chain. 2947 2947 */ 2948 2948 list_for_each_entry(i, &set->bindings, list) { 2949 - if (binding->flags & NFT_SET_MAP && 2949 + if (i->flags & NFT_SET_MAP && 2950 2950 i->chain == binding->chain) 2951 2951 goto bind; 2952 2952 } 2953 2953 2954 + iter.genmask = nft_genmask_next(ctx->net); 2954 2955 iter.skip = 0; 2955 2956 iter.count = 0; 2956 2957 iter.err = 0; 2957 2958 iter.fn = nf_tables_bind_check_setelem; 2958 2959 2959 2960 set->ops->walk(ctx, set, &iter); 2960 - if (iter.err < 0) { 2961 - /* Destroy anonymous sets if binding fails */ 2962 - if (set->flags & NFT_SET_ANONYMOUS) 2963 - nf_tables_set_destroy(ctx, set); 2964 - 2961 + if (iter.err < 0) 2965 2962 return iter.err; 2966 - } 2967 2963 } 2968 2964 bind: 2969 2965 binding->chain = ctx->chain; ··· 3188 3192 if (nest == NULL) 3189 3193 goto nla_put_failure; 3190 3194 3191 - args.cb = cb; 3192 - args.skb = skb; 3193 - args.iter.skip = cb->args[0]; 3194 - args.iter.count = 0; 3195 - args.iter.err = 0; 3196 - args.iter.fn = nf_tables_dump_setelem; 3195 + args.cb = cb; 3196 + args.skb = skb; 3197 + args.iter.genmask = nft_genmask_cur(ctx.net); 3198 + args.iter.skip = cb->args[0]; 3199 + args.iter.count = 0; 3200 + args.iter.err = 0; 3201 + args.iter.fn = nf_tables_dump_setelem; 3197 3202 set->ops->walk(&ctx, set, &args.iter); 3198 3203 3199 3204 nla_nest_end(skb, nest); ··· 4281 4284 binding->chain != chain) 4282 4285 continue; 4283 4286 4287 + iter.genmask = nft_genmask_next(ctx->net); 4284 4288 iter.skip = 0; 4285 4289 iter.count = 0; 4286 4290 iter.err = 0;
+1 -1
net/netfilter/nf_tables_core.c
··· 143 143 list_for_each_entry_continue_rcu(rule, &chain->rules, list) { 144 144 145 145 /* This rule is not active, skip. */ 146 - if (unlikely(rule->genmask & (1 << gencursor))) 146 + if (unlikely(rule->genmask & gencursor)) 147 147 continue; 148 148 149 149 rulenum++;
+1 -2
net/netfilter/nft_hash.c
··· 189 189 struct nft_hash_elem *he; 190 190 struct rhashtable_iter hti; 191 191 struct nft_set_elem elem; 192 - u8 genmask = nft_genmask_cur(read_pnet(&set->pnet)); 193 192 int err; 194 193 195 194 err = rhashtable_walk_init(&priv->ht, &hti, GFP_KERNEL); ··· 217 218 goto cont; 218 219 if (nft_set_elem_expired(&he->ext)) 219 220 goto cont; 220 - if (!nft_set_elem_active(&he->ext, genmask)) 221 + if (!nft_set_elem_active(&he->ext, iter->genmask)) 221 222 goto cont; 222 223 223 224 elem.priv = he;
+1 -2
net/netfilter/nft_rbtree.c
··· 211 211 struct nft_rbtree_elem *rbe; 212 212 struct nft_set_elem elem; 213 213 struct rb_node *node; 214 - u8 genmask = nft_genmask_cur(read_pnet(&set->pnet)); 215 214 216 215 spin_lock_bh(&nft_rbtree_lock); 217 216 for (node = rb_first(&priv->root); node != NULL; node = rb_next(node)) { ··· 218 219 219 220 if (iter->count < iter->skip) 220 221 goto cont; 221 - if (!nft_set_elem_active(&rbe->ext, genmask)) 222 + if (!nft_set_elem_active(&rbe->ext, iter->genmask)) 222 223 goto cont; 223 224 224 225 elem.priv = rbe;
+12 -2
net/openvswitch/conntrack.c
··· 818 818 */ 819 819 state = OVS_CS_F_TRACKED | OVS_CS_F_NEW | OVS_CS_F_RELATED; 820 820 __ovs_ct_update_key(key, state, &info->zone, exp->master); 821 - } else 822 - return __ovs_ct_lookup(net, key, info, skb); 821 + } else { 822 + struct nf_conn *ct; 823 + int err; 824 + 825 + err = __ovs_ct_lookup(net, key, info, skb); 826 + if (err) 827 + return err; 828 + 829 + ct = (struct nf_conn *)skb->nfct; 830 + if (ct) 831 + nf_ct_deliver_cached_events(ct); 832 + } 823 833 824 834 return 0; 825 835 }
+1 -1
net/rds/ib_cm.c
··· 111 111 } 112 112 } 113 113 114 - if (conn->c_version < RDS_PROTOCOL(3,1)) { 114 + if (conn->c_version < RDS_PROTOCOL(3, 1)) { 115 115 printk(KERN_NOTICE "RDS/IB: Connection to %pI4 version %u.%u failed," 116 116 " no longer supported\n", 117 117 &conn->c_faddr,
+3 -2
net/rds/loop.c
··· 95 95 */ 96 96 static void rds_loop_inc_free(struct rds_incoming *inc) 97 97 { 98 - struct rds_message *rm = container_of(inc, struct rds_message, m_inc); 99 - rds_message_put(rm); 98 + struct rds_message *rm = container_of(inc, struct rds_message, m_inc); 99 + 100 + rds_message_put(rm); 100 101 } 101 102 102 103 /* we need to at least give the thread something to succeed */
+2 -1
net/rds/sysctl.c
··· 102 102 rds_sysctl_reconnect_min = msecs_to_jiffies(1); 103 103 rds_sysctl_reconnect_min_jiffies = rds_sysctl_reconnect_min; 104 104 105 - rds_sysctl_reg_table = register_net_sysctl(&init_net,"net/rds", rds_sysctl_rds_table); 105 + rds_sysctl_reg_table = 106 + register_net_sysctl(&init_net, "net/rds", rds_sysctl_rds_table); 106 107 if (!rds_sysctl_reg_table) 107 108 return -ENOMEM; 108 109 return 0;
+1 -1
net/rds/tcp.h
··· 83 83 void rds_tcp_xmit_prepare(struct rds_connection *conn); 84 84 void rds_tcp_xmit_complete(struct rds_connection *conn); 85 85 int rds_tcp_xmit(struct rds_connection *conn, struct rds_message *rm, 86 - unsigned int hdr_off, unsigned int sg, unsigned int off); 86 + unsigned int hdr_off, unsigned int sg, unsigned int off); 87 87 void rds_tcp_write_space(struct sock *sk); 88 88 89 89 /* tcp_stats.c */
+13 -13
net/rds/tcp_connect.c
··· 54 54 55 55 rdsdebug("sock %p state_change to %d\n", tc->t_sock, sk->sk_state); 56 56 57 - switch(sk->sk_state) { 58 - /* ignore connecting sockets as they make progress */ 59 - case TCP_SYN_SENT: 60 - case TCP_SYN_RECV: 61 - break; 62 - case TCP_ESTABLISHED: 63 - rds_connect_path_complete(conn, RDS_CONN_CONNECTING); 64 - break; 65 - case TCP_CLOSE_WAIT: 66 - case TCP_CLOSE: 67 - rds_conn_drop(conn); 68 - default: 69 - break; 57 + switch (sk->sk_state) { 58 + /* ignore connecting sockets as they make progress */ 59 + case TCP_SYN_SENT: 60 + case TCP_SYN_RECV: 61 + break; 62 + case TCP_ESTABLISHED: 63 + rds_connect_path_complete(conn, RDS_CONN_CONNECTING); 64 + break; 65 + case TCP_CLOSE_WAIT: 66 + case TCP_CLOSE: 67 + rds_conn_drop(conn); 68 + default: 69 + break; 70 70 } 71 71 out: 72 72 read_unlock_bh(&sk->sk_callback_lock);
+1 -1
net/rds/tcp_listen.c
··· 138 138 rds_tcp_reset_callbacks(new_sock, conn); 139 139 conn->c_outgoing = 0; 140 140 /* rds_connect_path_complete() marks RDS_CONN_UP */ 141 - rds_connect_path_complete(conn, RDS_CONN_DISCONNECTING); 141 + rds_connect_path_complete(conn, RDS_CONN_RESETTING); 142 142 } 143 143 } else { 144 144 rds_tcp_set_callbacks(new_sock, conn);
+1 -1
net/rds/tcp_recv.c
··· 171 171 while (left) { 172 172 if (!tinc) { 173 173 tinc = kmem_cache_alloc(rds_tcp_incoming_slab, 174 - arg->gfp); 174 + arg->gfp); 175 175 if (!tinc) { 176 176 desc->error = -ENOMEM; 177 177 goto out;
+7 -7
net/rds/tcp_send.c
··· 66 66 static int rds_tcp_sendmsg(struct socket *sock, void *data, unsigned int len) 67 67 { 68 68 struct kvec vec = { 69 - .iov_base = data, 70 - .iov_len = len, 69 + .iov_base = data, 70 + .iov_len = len, 71 71 }; 72 - struct msghdr msg = { 73 - .msg_flags = MSG_DONTWAIT | MSG_NOSIGNAL, 74 - }; 72 + struct msghdr msg = { 73 + .msg_flags = MSG_DONTWAIT | MSG_NOSIGNAL, 74 + }; 75 75 76 76 return kernel_sendmsg(sock, &msg, &vec, 1, vec.iov_len); 77 77 } 78 78 79 79 /* the core send_sem serializes this with other xmit and shutdown */ 80 80 int rds_tcp_xmit(struct rds_connection *conn, struct rds_message *rm, 81 - unsigned int hdr_off, unsigned int sg, unsigned int off) 81 + unsigned int hdr_off, unsigned int sg, unsigned int off) 82 82 { 83 83 struct rds_tcp_connection *tc = conn->c_transport_data; 84 84 int done = 0; ··· 196 196 tc->t_last_seen_una = rds_tcp_snd_una(tc); 197 197 rds_send_drop_acked(conn, rds_tcp_snd_una(tc), rds_tcp_is_acked); 198 198 199 - if ((atomic_read(&sk->sk_wmem_alloc) << 1) <= sk->sk_sndbuf) 199 + if ((atomic_read(&sk->sk_wmem_alloc) << 1) <= sk->sk_sndbuf) 200 200 queue_delayed_work(rds_wq, &conn->c_send_w, 0); 201 201 202 202 out:
+1 -2
net/rds/transport.c
··· 140 140 rds_info_iter_unmap(iter); 141 141 down_read(&rds_trans_sem); 142 142 143 - for (i = 0; i < RDS_TRANS_COUNT; i++) 144 - { 143 + for (i = 0; i < RDS_TRANS_COUNT; i++) { 145 144 trans = transports[i]; 146 145 if (!trans || !trans->stats_info_copy) 147 146 continue;
+1 -1
net/sched/act_api.c
··· 1118 1118 nla_nest_end(skb, nest); 1119 1119 ret = skb->len; 1120 1120 } else 1121 - nla_nest_cancel(skb, nest); 1121 + nlmsg_trim(skb, b); 1122 1122 1123 1123 nlh->nlmsg_len = skb_tail_pointer(skb) - b; 1124 1124 if (NETLINK_CB(cb->skb).portid && ret)
+31 -22
net/sched/act_ife.c
··· 106 106 } 107 107 EXPORT_SYMBOL_GPL(ife_get_meta_u16); 108 108 109 - int ife_alloc_meta_u32(struct tcf_meta_info *mi, void *metaval) 109 + int ife_alloc_meta_u32(struct tcf_meta_info *mi, void *metaval, gfp_t gfp) 110 110 { 111 - mi->metaval = kmemdup(metaval, sizeof(u32), GFP_KERNEL); 111 + mi->metaval = kmemdup(metaval, sizeof(u32), gfp); 112 112 if (!mi->metaval) 113 113 return -ENOMEM; 114 114 ··· 116 116 } 117 117 EXPORT_SYMBOL_GPL(ife_alloc_meta_u32); 118 118 119 - int ife_alloc_meta_u16(struct tcf_meta_info *mi, void *metaval) 119 + int ife_alloc_meta_u16(struct tcf_meta_info *mi, void *metaval, gfp_t gfp) 120 120 { 121 - mi->metaval = kmemdup(metaval, sizeof(u16), GFP_KERNEL); 121 + mi->metaval = kmemdup(metaval, sizeof(u16), gfp); 122 122 if (!mi->metaval) 123 123 return -ENOMEM; 124 124 ··· 240 240 } 241 241 242 242 /* called when adding new meta information 243 - * under ife->tcf_lock 243 + * under ife->tcf_lock for existing action 244 244 */ 245 245 static int load_metaops_and_vet(struct tcf_ife_info *ife, u32 metaid, 246 - void *val, int len) 246 + void *val, int len, bool exists) 247 247 { 248 248 struct tcf_meta_ops *ops = find_ife_oplist(metaid); 249 249 int ret = 0; ··· 251 251 if (!ops) { 252 252 ret = -ENOENT; 253 253 #ifdef CONFIG_MODULES 254 - spin_unlock_bh(&ife->tcf_lock); 254 + if (exists) 255 + spin_unlock_bh(&ife->tcf_lock); 255 256 rtnl_unlock(); 256 257 request_module("ifemeta%u", metaid); 257 258 rtnl_lock(); 258 - spin_lock_bh(&ife->tcf_lock); 259 + if (exists) 260 + spin_lock_bh(&ife->tcf_lock); 259 261 ops = find_ife_oplist(metaid); 260 262 #endif 261 263 } ··· 274 272 } 275 273 276 274 /* called when adding new meta information 277 - * under ife->tcf_lock 275 + * under ife->tcf_lock for existing action 278 276 */ 279 277 static int add_metainfo(struct tcf_ife_info *ife, u32 metaid, void *metaval, 280 - int len) 278 + int len, bool atomic) 281 279 { 282 280 struct tcf_meta_info *mi = NULL; 283 281 struct tcf_meta_ops *ops = find_ife_oplist(metaid); ··· 286 284 if (!ops) 287 285 return -ENOENT; 288 286 289 - mi = kzalloc(sizeof(*mi), GFP_KERNEL); 287 + mi = kzalloc(sizeof(*mi), atomic ? GFP_ATOMIC : GFP_KERNEL); 290 288 if (!mi) { 291 289 /*put back what find_ife_oplist took */ 292 290 module_put(ops->owner); ··· 296 294 mi->metaid = metaid; 297 295 mi->ops = ops; 298 296 if (len > 0) { 299 - ret = ops->alloc(mi, metaval); 297 + ret = ops->alloc(mi, metaval, atomic ? GFP_ATOMIC : GFP_KERNEL); 300 298 if (ret != 0) { 301 299 kfree(mi); 302 300 module_put(ops->owner); ··· 315 313 int rc = 0; 316 314 int installed = 0; 317 315 316 + read_lock(&ife_mod_lock); 318 317 list_for_each_entry(o, &ifeoplist, list) { 319 - rc = add_metainfo(ife, o->metaid, NULL, 0); 318 + rc = add_metainfo(ife, o->metaid, NULL, 0, true); 320 319 if (rc == 0) 321 320 installed += 1; 322 321 } 322 + read_unlock(&ife_mod_lock); 323 323 324 324 if (installed) 325 325 return 0; ··· 389 385 spin_unlock_bh(&ife->tcf_lock); 390 386 } 391 387 392 - /* under ife->tcf_lock */ 393 - static int populate_metalist(struct tcf_ife_info *ife, struct nlattr **tb) 388 + /* under ife->tcf_lock for existing action */ 389 + static int populate_metalist(struct tcf_ife_info *ife, struct nlattr **tb, 390 + bool exists) 394 391 { 395 392 int len = 0; 396 393 int rc = 0; ··· 403 398 val = nla_data(tb[i]); 404 399 len = nla_len(tb[i]); 405 400 406 - rc = load_metaops_and_vet(ife, i, val, len); 401 + rc = load_metaops_and_vet(ife, i, val, len, exists); 407 402 if (rc != 0) 408 403 return rc; 409 404 410 - rc = add_metainfo(ife, i, val, len); 405 + rc = add_metainfo(ife, i, val, len, exists); 411 406 if (rc) 412 407 return rc; 413 408 } ··· 479 474 saddr = nla_data(tb[TCA_IFE_SMAC]); 480 475 } 481 476 482 - spin_lock_bh(&ife->tcf_lock); 477 + if (exists) 478 + spin_lock_bh(&ife->tcf_lock); 483 479 ife->tcf_action = parm->action; 484 480 485 481 if (parm->flags & IFE_ENCODE) { ··· 510 504 if (ret == ACT_P_CREATED) 511 505 _tcf_ife_cleanup(a, bind); 512 506 513 - spin_unlock_bh(&ife->tcf_lock); 507 + if (exists) 508 + spin_unlock_bh(&ife->tcf_lock); 514 509 return err; 515 510 } 516 511 517 - err = populate_metalist(ife, tb2); 512 + err = populate_metalist(ife, tb2, exists); 518 513 if (err) 519 514 goto metadata_parse_err; 520 515 ··· 530 523 if (ret == ACT_P_CREATED) 531 524 _tcf_ife_cleanup(a, bind); 532 525 533 - spin_unlock_bh(&ife->tcf_lock); 526 + if (exists) 527 + spin_unlock_bh(&ife->tcf_lock); 534 528 return err; 535 529 } 536 530 } 537 531 538 - spin_unlock_bh(&ife->tcf_lock); 532 + if (exists) 533 + spin_unlock_bh(&ife->tcf_lock); 539 534 540 535 if (ret == ACT_P_CREATED) 541 536 tcf_hash_insert(tn, a);
+5 -2
net/sched/act_ipt.c
··· 121 121 } 122 122 123 123 td = (struct xt_entry_target *)nla_data(tb[TCA_IPT_TARG]); 124 - if (nla_len(tb[TCA_IPT_TARG]) < td->u.target_size) 124 + if (nla_len(tb[TCA_IPT_TARG]) < td->u.target_size) { 125 + if (exists) 126 + tcf_hash_release(a, bind); 125 127 return -EINVAL; 128 + } 126 129 127 - if (!tcf_hash_check(tn, index, a, bind)) { 130 + if (!exists) { 128 131 ret = tcf_hash_create(tn, index, est, a, sizeof(*ipt), bind, 129 132 false); 130 133 if (ret)
+4
net/sched/sch_fifo.c
··· 37 37 38 38 static int pfifo_tail_enqueue(struct sk_buff *skb, struct Qdisc *sch) 39 39 { 40 + unsigned int prev_backlog; 41 + 40 42 if (likely(skb_queue_len(&sch->q) < sch->limit)) 41 43 return qdisc_enqueue_tail(skb, sch); 42 44 45 + prev_backlog = sch->qstats.backlog; 43 46 /* queue full, remove one skb to fulfill the limit */ 44 47 __qdisc_queue_drop_head(sch, &sch->q); 45 48 qdisc_qstats_drop(sch); 46 49 qdisc_enqueue_tail(skb, sch); 47 50 51 + qdisc_tree_reduce_backlog(sch, 0, prev_backlog - sch->qstats.backlog); 48 52 return NET_XMIT_CN; 49 53 } 50 54
+2
net/sched/sch_htb.c
··· 1007 1007 struct htb_sched *q = container_of(work, struct htb_sched, work); 1008 1008 struct Qdisc *sch = q->watchdog.qdisc; 1009 1009 1010 + rcu_read_lock(); 1010 1011 __netif_schedule(qdisc_root(sch)); 1012 + rcu_read_unlock(); 1011 1013 } 1012 1014 1013 1015 static int htb_init(struct Qdisc *sch, struct nlattr *opt)
+6 -6
net/sched/sch_netem.c
··· 650 650 #endif 651 651 652 652 if (q->qdisc) { 653 + unsigned int pkt_len = qdisc_pkt_len(skb); 653 654 int err = qdisc_enqueue(skb, q->qdisc); 654 655 655 - if (unlikely(err != NET_XMIT_SUCCESS)) { 656 - if (net_xmit_drop_count(err)) { 657 - qdisc_qstats_drop(sch); 658 - qdisc_tree_reduce_backlog(sch, 1, 659 - qdisc_pkt_len(skb)); 660 - } 656 + if (err != NET_XMIT_SUCCESS && 657 + net_xmit_drop_count(err)) { 658 + qdisc_qstats_drop(sch); 659 + qdisc_tree_reduce_backlog(sch, 1, 660 + pkt_len); 661 661 } 662 662 goto tfifo_dequeue; 663 663 }
+24 -43
net/sched/sch_prio.c
··· 172 172 static int prio_tune(struct Qdisc *sch, struct nlattr *opt) 173 173 { 174 174 struct prio_sched_data *q = qdisc_priv(sch); 175 + struct Qdisc *queues[TCQ_PRIO_BANDS]; 176 + int oldbands = q->bands, i; 175 177 struct tc_prio_qopt *qopt; 176 - int i; 177 178 178 179 if (nla_len(opt) < sizeof(*qopt)) 179 180 return -EINVAL; ··· 188 187 return -EINVAL; 189 188 } 190 189 190 + /* Before commit, make sure we can allocate all new qdiscs */ 191 + for (i = oldbands; i < qopt->bands; i++) { 192 + queues[i] = qdisc_create_dflt(sch->dev_queue, &pfifo_qdisc_ops, 193 + TC_H_MAKE(sch->handle, i + 1)); 194 + if (!queues[i]) { 195 + while (i > oldbands) 196 + qdisc_destroy(queues[--i]); 197 + return -ENOMEM; 198 + } 199 + } 200 + 191 201 sch_tree_lock(sch); 192 202 q->bands = qopt->bands; 193 203 memcpy(q->prio2band, qopt->priomap, TC_PRIO_MAX+1); 194 204 195 - for (i = q->bands; i < TCQ_PRIO_BANDS; i++) { 205 + for (i = q->bands; i < oldbands; i++) { 196 206 struct Qdisc *child = q->queues[i]; 197 - q->queues[i] = &noop_qdisc; 198 - if (child != &noop_qdisc) { 199 - qdisc_tree_reduce_backlog(child, child->q.qlen, child->qstats.backlog); 200 - qdisc_destroy(child); 201 - } 207 + 208 + qdisc_tree_reduce_backlog(child, child->q.qlen, 209 + child->qstats.backlog); 210 + qdisc_destroy(child); 202 211 } 212 + 213 + for (i = oldbands; i < q->bands; i++) 214 + q->queues[i] = queues[i]; 215 + 203 216 sch_tree_unlock(sch); 204 - 205 - for (i = 0; i < q->bands; i++) { 206 - if (q->queues[i] == &noop_qdisc) { 207 - struct Qdisc *child, *old; 208 - 209 - child = qdisc_create_dflt(sch->dev_queue, 210 - &pfifo_qdisc_ops, 211 - TC_H_MAKE(sch->handle, i + 1)); 212 - if (child) { 213 - sch_tree_lock(sch); 214 - old = q->queues[i]; 215 - q->queues[i] = child; 216 - 217 - if (old != &noop_qdisc) { 218 - qdisc_tree_reduce_backlog(old, 219 - old->q.qlen, 220 - old->qstats.backlog); 221 - qdisc_destroy(old); 222 - } 223 - sch_tree_unlock(sch); 224 - } 225 - } 226 - } 227 217 return 0; 228 218 } 229 219 230 220 static int prio_init(struct Qdisc *sch, struct nlattr *opt) 231 221 { 232 - struct prio_sched_data *q = qdisc_priv(sch); 233 - int i; 234 - 235 - for (i = 0; i < TCQ_PRIO_BANDS; i++) 236 - q->queues[i] = &noop_qdisc; 237 - 238 - if (opt == NULL) { 222 + if (!opt) 239 223 return -EINVAL; 240 - } else { 241 - int err; 242 224 243 - if ((err = prio_tune(sch, opt)) != 0) 244 - return err; 245 - } 246 - return 0; 225 + return prio_tune(sch, opt); 247 226 } 248 227 249 228 static int prio_dump(struct Qdisc *sch, struct sk_buff *skb)
-6
net/sctp/sctp_diag.c
··· 3 3 #include <linux/sock_diag.h> 4 4 #include <net/sctp/sctp.h> 5 5 6 - extern void inet_diag_msg_common_fill(struct inet_diag_msg *r, 7 - struct sock *sk); 8 - extern int inet_diag_msg_attrs_fill(struct sock *sk, struct sk_buff *skb, 9 - struct inet_diag_msg *r, int ext, 10 - struct user_namespace *user_ns); 11 - 12 6 static void sctp_diag_get_info(struct sock *sk, struct inet_diag_msg *r, 13 7 void *info); 14 8
+1 -1
net/tipc/bearer.c
··· 405 405 return 0; 406 406 407 407 /* Send RESET message even if bearer is detached from device */ 408 - tipc_ptr = rtnl_dereference(dev->tipc_ptr); 408 + tipc_ptr = rcu_dereference_rtnl(dev->tipc_ptr); 409 409 if (unlikely(!tipc_ptr && !msg_is_reset(buf_msg(skb)))) 410 410 goto drop; 411 411
+2 -1
net/tipc/link.c
··· 704 704 */ 705 705 int tipc_link_timeout(struct tipc_link *l, struct sk_buff_head *xmitq) 706 706 { 707 - int mtyp, rc = 0; 707 + int mtyp = 0; 708 + int rc = 0; 708 709 bool state = false; 709 710 bool probe = false; 710 711 bool setup = false;
+6
net/tipc/msg.c
··· 41 41 #include "name_table.h" 42 42 43 43 #define MAX_FORWARD_SIZE 1024 44 + #define BUF_HEADROOM (LL_MAX_HEADER + 48) 45 + #define BUF_TAILROOM 16 44 46 45 47 static unsigned int align(unsigned int i) 46 48 { ··· 506 504 memcpy(hdr, &ohdr, BASIC_H_SIZE); 507 505 msg_set_hdr_sz(hdr, BASIC_H_SIZE); 508 506 } 507 + 508 + if (skb_cloned(_skb) && 509 + pskb_expand_head(_skb, BUF_HEADROOM, BUF_TAILROOM, GFP_KERNEL)) 510 + goto exit; 509 511 510 512 /* Now reverse the concerned fields */ 511 513 msg_set_errcode(hdr, err);
-11
net/tipc/msg.h
··· 94 94 95 95 #define TIPC_MEDIA_INFO_OFFSET 5 96 96 97 - /** 98 - * TIPC message buffer code 99 - * 100 - * TIPC message buffer headroom reserves space for the worst-case 101 - * link-level device header (in case the message is sent off-node). 102 - * 103 - * Note: Headroom should be a multiple of 4 to ensure the TIPC header fields 104 - * are word aligned for quicker access 105 - */ 106 - #define BUF_HEADROOM (LL_MAX_HEADER + 48) 107 - 108 97 struct tipc_skb_cb { 109 98 void *handle; 110 99 struct sk_buff *tail;
+42 -12
net/tipc/socket.c
··· 796 796 * @tsk: receiving socket 797 797 * @skb: pointer to message buffer. 798 798 */ 799 - static void tipc_sk_proto_rcv(struct tipc_sock *tsk, struct sk_buff *skb) 799 + static void tipc_sk_proto_rcv(struct tipc_sock *tsk, struct sk_buff *skb, 800 + struct sk_buff_head *xmitq) 800 801 { 801 802 struct sock *sk = &tsk->sk; 803 + u32 onode = tsk_own_node(tsk); 802 804 struct tipc_msg *hdr = buf_msg(skb); 803 805 int mtyp = msg_type(hdr); 804 806 bool conn_cong; ··· 813 811 814 812 if (mtyp == CONN_PROBE) { 815 813 msg_set_type(hdr, CONN_PROBE_REPLY); 816 - tipc_sk_respond(sk, skb, TIPC_OK); 814 + if (tipc_msg_reverse(onode, &skb, TIPC_OK)) 815 + __skb_queue_tail(xmitq, skb); 817 816 return; 818 817 } else if (mtyp == CONN_ACK) { 819 818 conn_cong = tsk_conn_cong(tsk); ··· 1689 1686 * 1690 1687 * Returns true if message was added to socket receive queue, otherwise false 1691 1688 */ 1692 - static bool filter_rcv(struct sock *sk, struct sk_buff *skb) 1689 + static bool filter_rcv(struct sock *sk, struct sk_buff *skb, 1690 + struct sk_buff_head *xmitq) 1693 1691 { 1694 1692 struct socket *sock = sk->sk_socket; 1695 1693 struct tipc_sock *tsk = tipc_sk(sk); ··· 1700 1696 int usr = msg_user(hdr); 1701 1697 1702 1698 if (unlikely(msg_user(hdr) == CONN_MANAGER)) { 1703 - tipc_sk_proto_rcv(tsk, skb); 1699 + tipc_sk_proto_rcv(tsk, skb, xmitq); 1704 1700 return false; 1705 1701 } 1706 1702 ··· 1743 1739 return true; 1744 1740 1745 1741 reject: 1746 - tipc_sk_respond(sk, skb, err); 1742 + if (tipc_msg_reverse(tsk_own_node(tsk), &skb, err)) 1743 + __skb_queue_tail(xmitq, skb); 1747 1744 return false; 1748 1745 } 1749 1746 ··· 1760 1755 static int tipc_backlog_rcv(struct sock *sk, struct sk_buff *skb) 1761 1756 { 1762 1757 unsigned int truesize = skb->truesize; 1758 + struct sk_buff_head xmitq; 1759 + u32 dnode, selector; 1763 1760 1764 - if (likely(filter_rcv(sk, skb))) 1761 + __skb_queue_head_init(&xmitq); 1762 + 1763 + if (likely(filter_rcv(sk, skb, &xmitq))) { 1765 1764 atomic_add(truesize, &tipc_sk(sk)->dupl_rcvcnt); 1765 + return 0; 1766 + } 1767 + 1768 + if (skb_queue_empty(&xmitq)) 1769 + return 0; 1770 + 1771 + /* Send response/rejected message */ 1772 + skb = __skb_dequeue(&xmitq); 1773 + dnode = msg_destnode(buf_msg(skb)); 1774 + selector = msg_origport(buf_msg(skb)); 1775 + tipc_node_xmit_skb(sock_net(sk), skb, dnode, selector); 1766 1776 return 0; 1767 1777 } 1768 1778 ··· 1791 1771 * Caller must hold socket lock 1792 1772 */ 1793 1773 static void tipc_sk_enqueue(struct sk_buff_head *inputq, struct sock *sk, 1794 - u32 dport) 1774 + u32 dport, struct sk_buff_head *xmitq) 1795 1775 { 1776 + unsigned long time_limit = jiffies + 2; 1777 + struct sk_buff *skb; 1796 1778 unsigned int lim; 1797 1779 atomic_t *dcnt; 1798 - struct sk_buff *skb; 1799 - unsigned long time_limit = jiffies + 2; 1780 + u32 onode; 1800 1781 1801 1782 while (skb_queue_len(inputq)) { 1802 1783 if (unlikely(time_after_eq(jiffies, time_limit))) ··· 1809 1788 1810 1789 /* Add message directly to receive queue if possible */ 1811 1790 if (!sock_owned_by_user(sk)) { 1812 - filter_rcv(sk, skb); 1791 + filter_rcv(sk, skb, xmitq); 1813 1792 continue; 1814 1793 } 1815 1794 ··· 1822 1801 continue; 1823 1802 1824 1803 /* Overload => reject message back to sender */ 1825 - tipc_sk_respond(sk, skb, TIPC_ERR_OVERLOAD); 1804 + onode = tipc_own_addr(sock_net(sk)); 1805 + if (tipc_msg_reverse(onode, &skb, TIPC_ERR_OVERLOAD)) 1806 + __skb_queue_tail(xmitq, skb); 1826 1807 break; 1827 1808 } 1828 1809 } ··· 1837 1814 */ 1838 1815 void tipc_sk_rcv(struct net *net, struct sk_buff_head *inputq) 1839 1816 { 1817 + struct sk_buff_head xmitq; 1840 1818 u32 dnode, dport = 0; 1841 1819 int err; 1842 1820 struct tipc_sock *tsk; 1843 1821 struct sock *sk; 1844 1822 struct sk_buff *skb; 1845 1823 1824 + __skb_queue_head_init(&xmitq); 1846 1825 while (skb_queue_len(inputq)) { 1847 1826 dport = tipc_skb_peek_port(inputq, dport); 1848 1827 tsk = tipc_sk_lookup(net, dport); ··· 1852 1827 if (likely(tsk)) { 1853 1828 sk = &tsk->sk; 1854 1829 if (likely(spin_trylock_bh(&sk->sk_lock.slock))) { 1855 - tipc_sk_enqueue(inputq, sk, dport); 1830 + tipc_sk_enqueue(inputq, sk, dport, &xmitq); 1856 1831 spin_unlock_bh(&sk->sk_lock.slock); 1832 + } 1833 + /* Send pending response/rejected messages, if any */ 1834 + while ((skb = __skb_dequeue(&xmitq))) { 1835 + dnode = msg_destnode(buf_msg(skb)); 1836 + tipc_node_xmit_skb(net, skb, dnode, dport); 1857 1837 } 1858 1838 sock_put(sk); 1859 1839 continue;
+10 -2
net/vmw_vsock/af_vsock.c
··· 61 61 * function will also cleanup rejected sockets, those that reach the connected 62 62 * state but leave it before they have been accepted. 63 63 * 64 + * - Lock ordering for pending or accept queue sockets is: 65 + * 66 + * lock_sock(listener); 67 + * lock_sock_nested(pending, SINGLE_DEPTH_NESTING); 68 + * 69 + * Using explicit nested locking keeps lockdep happy since normally only one 70 + * lock of a given class may be taken at a time. 71 + * 64 72 * - Sockets created by user action will be cleaned up when the user process 65 73 * calls close(2), causing our release implementation to be called. Our release 66 74 * implementation will perform some cleanup then drop the last reference so our ··· 451 443 cleanup = true; 452 444 453 445 lock_sock(listener); 454 - lock_sock(sk); 446 + lock_sock_nested(sk, SINGLE_DEPTH_NESTING); 455 447 456 448 if (vsock_is_pending(sk)) { 457 449 vsock_remove_pending(listener, sk); ··· 1300 1292 if (connected) { 1301 1293 listener->sk_ack_backlog--; 1302 1294 1303 - lock_sock(connected); 1295 + lock_sock_nested(connected, SINGLE_DEPTH_NESTING); 1304 1296 vconnected = vsock_sk(connected); 1305 1297 1306 1298 /* If the listener socket has received an error, then we should
+1 -1
net/wireless/util.c
··· 509 509 * replace EtherType */ 510 510 hdrlen += ETH_ALEN + 2; 511 511 else 512 - tmp.h_proto = htons(skb->len); 512 + tmp.h_proto = htons(skb->len - hdrlen); 513 513 514 514 pskb_pull(skb, hdrlen); 515 515