Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband:
IB/qib: Remove DCA support until feature is finished
IB/qib: Use a single txselect module parameter for serdes tuning
IB/qib: Don't rely on (undefined) order of function parameter evaluation
IB/ucm: Use memdup_user()
IB/qib: Fix undefined symbol error when CONFIG_PCI_MSI=n

+203 -622
+3 -8
drivers/infiniband/core/ucm.c
··· 706 if (!len) 707 return 0; 708 709 - data = kmalloc(len, GFP_KERNEL); 710 - if (!data) 711 - return -ENOMEM; 712 - 713 - if (copy_from_user(data, (void __user *)(unsigned long)src, len)) { 714 - kfree(data); 715 - return -EFAULT; 716 - } 717 718 *dest = data; 719 return 0;
··· 706 if (!len) 707 return 0; 708 709 + data = memdup_user((void __user *)(unsigned long)src, len); 710 + if (IS_ERR(data)) 711 + return PTR_ERR(data); 712 713 *dest = data; 714 return 0;
+15 -10
drivers/infiniband/hw/qib/qib_fs.c
··· 144 size_t count, loff_t *ppos) 145 { 146 u64 *counters; 147 struct qib_devdata *dd = private2dd(file); 148 149 - return simple_read_from_buffer(buf, count, ppos, counters, 150 - dd->f_read_cntrs(dd, *ppos, NULL, &counters)); 151 } 152 153 /* read the per-device counters */ ··· 156 size_t count, loff_t *ppos) 157 { 158 char *names; 159 struct qib_devdata *dd = private2dd(file); 160 161 - return simple_read_from_buffer(buf, count, ppos, names, 162 - dd->f_read_cntrs(dd, *ppos, &names, NULL)); 163 } 164 165 static const struct file_operations cntr_ops[] = { ··· 178 size_t count, loff_t *ppos) 179 { 180 char *names; 181 struct qib_devdata *dd = private2dd(file); 182 183 - return simple_read_from_buffer(buf, count, ppos, names, 184 - dd->f_read_portcntrs(dd, *ppos, 0, &names, NULL)); 185 } 186 187 /* read the per-port counters for port 1 (pidx 0) */ ··· 190 size_t count, loff_t *ppos) 191 { 192 u64 *counters; 193 struct qib_devdata *dd = private2dd(file); 194 195 - return simple_read_from_buffer(buf, count, ppos, counters, 196 - dd->f_read_portcntrs(dd, *ppos, 0, NULL, &counters)); 197 } 198 199 /* read the per-port counters for port 2 (pidx 1) */ ··· 202 size_t count, loff_t *ppos) 203 { 204 u64 *counters; 205 struct qib_devdata *dd = private2dd(file); 206 207 - return simple_read_from_buffer(buf, count, ppos, counters, 208 - dd->f_read_portcntrs(dd, *ppos, 1, NULL, &counters)); 209 } 210 211 static const struct file_operations portcntr_ops[] = {
··· 144 size_t count, loff_t *ppos) 145 { 146 u64 *counters; 147 + size_t avail; 148 struct qib_devdata *dd = private2dd(file); 149 150 + avail = dd->f_read_cntrs(dd, *ppos, NULL, &counters); 151 + return simple_read_from_buffer(buf, count, ppos, counters, avail); 152 } 153 154 /* read the per-device counters */ ··· 155 size_t count, loff_t *ppos) 156 { 157 char *names; 158 + size_t avail; 159 struct qib_devdata *dd = private2dd(file); 160 161 + avail = dd->f_read_cntrs(dd, *ppos, &names, NULL); 162 + return simple_read_from_buffer(buf, count, ppos, names, avail); 163 } 164 165 static const struct file_operations cntr_ops[] = { ··· 176 size_t count, loff_t *ppos) 177 { 178 char *names; 179 + size_t avail; 180 struct qib_devdata *dd = private2dd(file); 181 182 + avail = dd->f_read_portcntrs(dd, *ppos, 0, &names, NULL); 183 + return simple_read_from_buffer(buf, count, ppos, names, avail); 184 } 185 186 /* read the per-port counters for port 1 (pidx 0) */ ··· 187 size_t count, loff_t *ppos) 188 { 189 u64 *counters; 190 + size_t avail; 191 struct qib_devdata *dd = private2dd(file); 192 193 + avail = dd->f_read_portcntrs(dd, *ppos, 0, NULL, &counters); 194 + return simple_read_from_buffer(buf, count, ppos, counters, avail); 195 } 196 197 /* read the per-port counters for port 2 (pidx 1) */ ··· 198 size_t count, loff_t *ppos) 199 { 200 u64 *counters; 201 + size_t avail; 202 struct qib_devdata *dd = private2dd(file); 203 204 + avail = dd->f_read_portcntrs(dd, *ppos, 1, NULL, &counters); 205 + return simple_read_from_buffer(buf, count, ppos, counters, avail); 206 } 207 208 static const struct file_operations portcntr_ops[] = {
-12
drivers/infiniband/hw/qib/qib_iba6120.c
··· 3475 struct qib_devdata *dd; 3476 int ret; 3477 3478 - #ifndef CONFIG_PCI_MSI 3479 - qib_early_err(&pdev->dev, "QLogic PCIE device 0x%x cannot " 3480 - "work if CONFIG_PCI_MSI is not enabled\n", 3481 - ent->device); 3482 - dd = ERR_PTR(-ENODEV); 3483 - goto bail; 3484 - #endif 3485 - 3486 dd = qib_alloc_devdata(pdev, sizeof(struct qib_pportdata) + 3487 sizeof(struct qib_chip_specific)); 3488 if (IS_ERR(dd)) ··· 3545 3546 if (qib_mini_init) 3547 goto bail; 3548 - 3549 - #ifndef CONFIG_PCI_MSI 3550 - qib_dev_err(dd, "PCI_MSI not configured, NO interrupts\n"); 3551 - #endif 3552 3553 if (qib_pcie_params(dd, 8, NULL, NULL)) 3554 qib_dev_err(dd, "Failed to setup PCIe or interrupts; "
··· 3475 struct qib_devdata *dd; 3476 int ret; 3477 3478 dd = qib_alloc_devdata(pdev, sizeof(struct qib_pportdata) + 3479 sizeof(struct qib_chip_specific)); 3480 if (IS_ERR(dd)) ··· 3553 3554 if (qib_mini_init) 3555 goto bail; 3556 3557 if (qib_pcie_params(dd, 8, NULL, NULL)) 3558 qib_dev_err(dd, "Failed to setup PCIe or interrupts; "
+179 -592
drivers/infiniband/hw/qib/qib_iba7322.c
··· 42 #include <linux/jiffies.h> 43 #include <rdma/ib_verbs.h> 44 #include <rdma/ib_smi.h> 45 - #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE) 46 - #include <linux/dca.h> 47 - #endif 48 49 #include "qib.h" 50 #include "qib_7322_regs.h" ··· 111 module_param_named(singleport, qib_singleport, ushort, S_IRUGO); 112 MODULE_PARM_DESC(singleport, "Use only IB port 1; more per-port buffer space"); 113 114 - 115 - /* 116 - * Setup QMH7342 receive and transmit parameters, necessary because 117 - * each bay, Mez connector, and IB port need different tuning, beyond 118 - * what the switch and HCA can do automatically. 119 - * It's expected to be done by cat'ing files to the modules file, 120 - * rather than setting up as a module parameter. 121 - * It's a "write-only" file, returns 0 when read back. 122 - * The unit, port, bay (if given), and values MUST be done as a single write. 123 - * The unit, port, and bay must precede the values to be effective. 124 - */ 125 - static int setup_qmh_params(const char *, struct kernel_param *); 126 - static unsigned dummy_qmh_params; 127 - module_param_call(qmh_serdes_setup, setup_qmh_params, param_get_uint, 128 - &dummy_qmh_params, S_IWUSR | S_IRUGO); 129 - 130 - /* similarly for QME7342, but it's simpler */ 131 - static int setup_qme_params(const char *, struct kernel_param *); 132 - static unsigned dummy_qme_params; 133 - module_param_call(qme_serdes_setup, setup_qme_params, param_get_uint, 134 - &dummy_qme_params, S_IWUSR | S_IRUGO); 135 - 136 #define MAX_ATTEN_LEN 64 /* plenty for any real system */ 137 /* for read back, default index is ~5m copper cable */ 138 - static char cable_atten_list[MAX_ATTEN_LEN] = "10"; 139 - static struct kparam_string kp_cable_atten = { 140 - .string = cable_atten_list, 141 .maxlen = MAX_ATTEN_LEN 142 }; 143 - static int setup_cable_atten(const char *, struct kernel_param *); 144 - module_param_call(cable_atten, setup_cable_atten, param_get_string, 145 - &kp_cable_atten, S_IWUSR | S_IRUGO); 146 - MODULE_PARM_DESC(cable_atten, \ 147 - "cable attenuation indices for cables with invalid EEPROM"); 148 149 #define BOARD_QME7342 5 150 #define BOARD_QMH7342 6 ··· 515 u32 lastbuf_for_pio; 516 u32 stay_in_freeze; 517 u32 recovery_ports_initted; 518 - #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE) 519 - u32 dca_ctrl; 520 - int rhdr_cpu[18]; 521 - int sdma_cpu[2]; 522 - u64 dca_rcvhdr_ctrl[5]; /* B, C, D, E, F */ 523 - #endif 524 struct msix_entry *msix_entries; 525 void **msix_arg; 526 unsigned long *sendchkenable; ··· 543 static void write_tx_serdes_param(struct qib_pportdata *, struct txdds_ent *); 544 545 #define TXDDS_TABLE_SZ 16 /* number of entries per speed in onchip table */ 546 #define SERDES_CHANS 4 /* yes, it's obvious, but one less magic number */ 547 548 #define H1_FORCE_VAL 8 549 - #define H1_FORCE_QME 1 /* may be overridden via setup_qme_params() */ 550 - #define H1_FORCE_QMH 7 /* may be overridden via setup_qmh_params() */ 551 552 /* The static and dynamic registers are paired, and the pairs indexed by spd */ 553 #define krp_static_adapt_dis(spd) (KREG_IBPORT_IDX(ADAPT_DISABLE_STATIC_SDR) \ ··· 559 #define QDR_STATIC_ADAPT_DOWN_R1 0ULL /* r1 link down, H1-H4 QDR adapts */ 560 #define QDR_STATIC_ADAPT_INIT 0xffffffffffULL /* up, disable H0,H1-8, LE */ 561 #define QDR_STATIC_ADAPT_INIT_R1 0xf0ffffffffULL /* r1 up, disable H0,H1-8 */ 562 - 563 - static const struct txdds_ent qmh_sdr_txdds = { 11, 0, 5, 6 }; 564 - static const struct txdds_ent qmh_ddr_txdds = { 7, 0, 2, 8 }; 565 - static const struct txdds_ent qmh_qdr_txdds = { 0, 1, 3, 10 }; 566 - 567 - /* this is used for unknown mez cards also */ 568 - static const struct txdds_ent qme_sdr_txdds = { 11, 0, 4, 4 }; 569 - static const struct txdds_ent qme_ddr_txdds = { 7, 0, 2, 7 }; 570 - static const struct txdds_ent qme_qdr_txdds = { 0, 1, 12, 11 }; 571 572 struct qib_chippport_specific { 573 u64 __iomem *kpregbase; ··· 598 * Per-bay per-channel rcv QMH H1 values and Tx values for QDR. 599 * entry zero is unused, to simplify indexing 600 */ 601 - u16 h1_val; 602 - u8 amp[SERDES_CHANS]; 603 - u8 pre[SERDES_CHANS]; 604 - u8 mainv[SERDES_CHANS]; 605 - u8 post[SERDES_CHANS]; 606 - u8 no_eep; /* attenuation index to use if no qsfp info */ 607 u8 ipg_tries; 608 u8 ibmalfusesnap; 609 struct qib_qsfp_data qsfp_data; ··· 632 { QIB_DRV_NAME " (sdmaC 1)", sdma_cleanup_intr, 633 SYM_LSB(IntStatus, SDmaCleanupDone_1), 2 }, 634 }; 635 - 636 - #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE) 637 - static const struct dca_reg_map { 638 - int shadow_inx; 639 - int lsb; 640 - u64 mask; 641 - u16 regno; 642 - } dca_rcvhdr_reg_map[] = { 643 - { 0, SYM_LSB(DCACtrlB, RcvHdrq0DCAOPH), 644 - ~SYM_MASK(DCACtrlB, RcvHdrq0DCAOPH) , KREG_IDX(DCACtrlB) }, 645 - { 0, SYM_LSB(DCACtrlB, RcvHdrq1DCAOPH), 646 - ~SYM_MASK(DCACtrlB, RcvHdrq1DCAOPH) , KREG_IDX(DCACtrlB) }, 647 - { 0, SYM_LSB(DCACtrlB, RcvHdrq2DCAOPH), 648 - ~SYM_MASK(DCACtrlB, RcvHdrq2DCAOPH) , KREG_IDX(DCACtrlB) }, 649 - { 0, SYM_LSB(DCACtrlB, RcvHdrq3DCAOPH), 650 - ~SYM_MASK(DCACtrlB, RcvHdrq3DCAOPH) , KREG_IDX(DCACtrlB) }, 651 - { 1, SYM_LSB(DCACtrlC, RcvHdrq4DCAOPH), 652 - ~SYM_MASK(DCACtrlC, RcvHdrq4DCAOPH) , KREG_IDX(DCACtrlC) }, 653 - { 1, SYM_LSB(DCACtrlC, RcvHdrq5DCAOPH), 654 - ~SYM_MASK(DCACtrlC, RcvHdrq5DCAOPH) , KREG_IDX(DCACtrlC) }, 655 - { 1, SYM_LSB(DCACtrlC, RcvHdrq6DCAOPH), 656 - ~SYM_MASK(DCACtrlC, RcvHdrq6DCAOPH) , KREG_IDX(DCACtrlC) }, 657 - { 1, SYM_LSB(DCACtrlC, RcvHdrq7DCAOPH), 658 - ~SYM_MASK(DCACtrlC, RcvHdrq7DCAOPH) , KREG_IDX(DCACtrlC) }, 659 - { 2, SYM_LSB(DCACtrlD, RcvHdrq8DCAOPH), 660 - ~SYM_MASK(DCACtrlD, RcvHdrq8DCAOPH) , KREG_IDX(DCACtrlD) }, 661 - { 2, SYM_LSB(DCACtrlD, RcvHdrq9DCAOPH), 662 - ~SYM_MASK(DCACtrlD, RcvHdrq9DCAOPH) , KREG_IDX(DCACtrlD) }, 663 - { 2, SYM_LSB(DCACtrlD, RcvHdrq10DCAOPH), 664 - ~SYM_MASK(DCACtrlD, RcvHdrq10DCAOPH) , KREG_IDX(DCACtrlD) }, 665 - { 2, SYM_LSB(DCACtrlD, RcvHdrq11DCAOPH), 666 - ~SYM_MASK(DCACtrlD, RcvHdrq11DCAOPH) , KREG_IDX(DCACtrlD) }, 667 - { 3, SYM_LSB(DCACtrlE, RcvHdrq12DCAOPH), 668 - ~SYM_MASK(DCACtrlE, RcvHdrq12DCAOPH) , KREG_IDX(DCACtrlE) }, 669 - { 3, SYM_LSB(DCACtrlE, RcvHdrq13DCAOPH), 670 - ~SYM_MASK(DCACtrlE, RcvHdrq13DCAOPH) , KREG_IDX(DCACtrlE) }, 671 - { 3, SYM_LSB(DCACtrlE, RcvHdrq14DCAOPH), 672 - ~SYM_MASK(DCACtrlE, RcvHdrq14DCAOPH) , KREG_IDX(DCACtrlE) }, 673 - { 3, SYM_LSB(DCACtrlE, RcvHdrq15DCAOPH), 674 - ~SYM_MASK(DCACtrlE, RcvHdrq15DCAOPH) , KREG_IDX(DCACtrlE) }, 675 - { 4, SYM_LSB(DCACtrlF, RcvHdrq16DCAOPH), 676 - ~SYM_MASK(DCACtrlF, RcvHdrq16DCAOPH) , KREG_IDX(DCACtrlF) }, 677 - { 4, SYM_LSB(DCACtrlF, RcvHdrq17DCAOPH), 678 - ~SYM_MASK(DCACtrlF, RcvHdrq17DCAOPH) , KREG_IDX(DCACtrlF) }, 679 - }; 680 - #endif 681 682 /* ibcctrl bits */ 683 #define QLOGIC_IB_IBCC_LINKINITCMD_DISABLE 1 ··· 2483 qib_write_kreg_port(ppd, krp_rcvpktledcnt, ledblink); 2484 } 2485 2486 - #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE) 2487 - static void qib_update_rhdrq_dca(struct qib_ctxtdata *rcd) 2488 - { 2489 - struct qib_devdata *dd = rcd->dd; 2490 - struct qib_chip_specific *cspec = dd->cspec; 2491 - int cpu = get_cpu(); 2492 - 2493 - if (cspec->rhdr_cpu[rcd->ctxt] != cpu) { 2494 - const struct dca_reg_map *rmp; 2495 - 2496 - cspec->rhdr_cpu[rcd->ctxt] = cpu; 2497 - rmp = &dca_rcvhdr_reg_map[rcd->ctxt]; 2498 - cspec->dca_rcvhdr_ctrl[rmp->shadow_inx] &= rmp->mask; 2499 - cspec->dca_rcvhdr_ctrl[rmp->shadow_inx] |= 2500 - (u64) dca3_get_tag(&dd->pcidev->dev, cpu) << rmp->lsb; 2501 - qib_write_kreg(dd, rmp->regno, 2502 - cspec->dca_rcvhdr_ctrl[rmp->shadow_inx]); 2503 - cspec->dca_ctrl |= SYM_MASK(DCACtrlA, RcvHdrqDCAEnable); 2504 - qib_write_kreg(dd, KREG_IDX(DCACtrlA), cspec->dca_ctrl); 2505 - } 2506 - put_cpu(); 2507 - } 2508 - 2509 - static void qib_update_sdma_dca(struct qib_pportdata *ppd) 2510 - { 2511 - struct qib_devdata *dd = ppd->dd; 2512 - struct qib_chip_specific *cspec = dd->cspec; 2513 - int cpu = get_cpu(); 2514 - unsigned pidx = ppd->port - 1; 2515 - 2516 - if (cspec->sdma_cpu[pidx] != cpu) { 2517 - cspec->sdma_cpu[pidx] = cpu; 2518 - cspec->dca_rcvhdr_ctrl[4] &= ~(ppd->hw_pidx ? 2519 - SYM_MASK(DCACtrlF, SendDma1DCAOPH) : 2520 - SYM_MASK(DCACtrlF, SendDma0DCAOPH)); 2521 - cspec->dca_rcvhdr_ctrl[4] |= 2522 - (u64) dca3_get_tag(&dd->pcidev->dev, cpu) << 2523 - (ppd->hw_pidx ? 2524 - SYM_LSB(DCACtrlF, SendDma1DCAOPH) : 2525 - SYM_LSB(DCACtrlF, SendDma0DCAOPH)); 2526 - qib_write_kreg(dd, KREG_IDX(DCACtrlF), 2527 - cspec->dca_rcvhdr_ctrl[4]); 2528 - cspec->dca_ctrl |= ppd->hw_pidx ? 2529 - SYM_MASK(DCACtrlA, SendDMAHead1DCAEnable) : 2530 - SYM_MASK(DCACtrlA, SendDMAHead0DCAEnable); 2531 - qib_write_kreg(dd, KREG_IDX(DCACtrlA), cspec->dca_ctrl); 2532 - } 2533 - put_cpu(); 2534 - } 2535 - 2536 - static void qib_setup_dca(struct qib_devdata *dd) 2537 - { 2538 - struct qib_chip_specific *cspec = dd->cspec; 2539 - int i; 2540 - 2541 - for (i = 0; i < ARRAY_SIZE(cspec->rhdr_cpu); i++) 2542 - cspec->rhdr_cpu[i] = -1; 2543 - for (i = 0; i < ARRAY_SIZE(cspec->sdma_cpu); i++) 2544 - cspec->sdma_cpu[i] = -1; 2545 - cspec->dca_rcvhdr_ctrl[0] = 2546 - (1ULL << SYM_LSB(DCACtrlB, RcvHdrq0DCAXfrCnt)) | 2547 - (1ULL << SYM_LSB(DCACtrlB, RcvHdrq1DCAXfrCnt)) | 2548 - (1ULL << SYM_LSB(DCACtrlB, RcvHdrq2DCAXfrCnt)) | 2549 - (1ULL << SYM_LSB(DCACtrlB, RcvHdrq3DCAXfrCnt)); 2550 - cspec->dca_rcvhdr_ctrl[1] = 2551 - (1ULL << SYM_LSB(DCACtrlC, RcvHdrq4DCAXfrCnt)) | 2552 - (1ULL << SYM_LSB(DCACtrlC, RcvHdrq5DCAXfrCnt)) | 2553 - (1ULL << SYM_LSB(DCACtrlC, RcvHdrq6DCAXfrCnt)) | 2554 - (1ULL << SYM_LSB(DCACtrlC, RcvHdrq7DCAXfrCnt)); 2555 - cspec->dca_rcvhdr_ctrl[2] = 2556 - (1ULL << SYM_LSB(DCACtrlD, RcvHdrq8DCAXfrCnt)) | 2557 - (1ULL << SYM_LSB(DCACtrlD, RcvHdrq9DCAXfrCnt)) | 2558 - (1ULL << SYM_LSB(DCACtrlD, RcvHdrq10DCAXfrCnt)) | 2559 - (1ULL << SYM_LSB(DCACtrlD, RcvHdrq11DCAXfrCnt)); 2560 - cspec->dca_rcvhdr_ctrl[3] = 2561 - (1ULL << SYM_LSB(DCACtrlE, RcvHdrq12DCAXfrCnt)) | 2562 - (1ULL << SYM_LSB(DCACtrlE, RcvHdrq13DCAXfrCnt)) | 2563 - (1ULL << SYM_LSB(DCACtrlE, RcvHdrq14DCAXfrCnt)) | 2564 - (1ULL << SYM_LSB(DCACtrlE, RcvHdrq15DCAXfrCnt)); 2565 - cspec->dca_rcvhdr_ctrl[4] = 2566 - (1ULL << SYM_LSB(DCACtrlF, RcvHdrq16DCAXfrCnt)) | 2567 - (1ULL << SYM_LSB(DCACtrlF, RcvHdrq17DCAXfrCnt)); 2568 - for (i = 0; i < ARRAY_SIZE(cspec->sdma_cpu); i++) 2569 - qib_write_kreg(dd, KREG_IDX(DCACtrlB) + i, 2570 - cspec->dca_rcvhdr_ctrl[i]); 2571 - } 2572 - 2573 - #endif 2574 - 2575 /* 2576 * Disable MSIx interrupt if enabled, call generic MSIx code 2577 * to cleanup, and clear pending MSIx interrupts. ··· 2522 static void qib_setup_7322_cleanup(struct qib_devdata *dd) 2523 { 2524 int i; 2525 - 2526 - #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE) 2527 - if (dd->flags & QIB_DCA_ENABLED) { 2528 - dca_remove_requester(&dd->pcidev->dev); 2529 - dd->flags &= ~QIB_DCA_ENABLED; 2530 - dd->cspec->dca_ctrl = 0; 2531 - qib_write_kreg(dd, KREG_IDX(DCACtrlA), dd->cspec->dca_ctrl); 2532 - } 2533 - #endif 2534 2535 qib_7322_free_irq(dd); 2536 kfree(dd->cspec->cntrs); ··· 2830 if (dd->int_counter != (u32) -1) 2831 dd->int_counter++; 2832 2833 - #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE) 2834 - if (dd->flags & QIB_DCA_ENABLED) 2835 - qib_update_rhdrq_dca(rcd); 2836 - #endif 2837 - 2838 /* Clear the interrupt bit we expect to be set. */ 2839 qib_write_kreg(dd, kr_intclear, ((1ULL << QIB_I_RCVAVAIL_LSB) | 2840 (1ULL << QIB_I_RCVURG_LSB)) << rcd->ctxt); ··· 2893 if (dd->int_counter != (u32) -1) 2894 dd->int_counter++; 2895 2896 - #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE) 2897 - if (dd->flags & QIB_DCA_ENABLED) 2898 - qib_update_sdma_dca(ppd); 2899 - #endif 2900 - 2901 /* Clear the interrupt bit we expect to be set. */ 2902 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? 2903 INT_MASK_P(SDma, 1) : INT_MASK_P(SDma, 0)); ··· 2921 qib_stats.sps_ints++; 2922 if (dd->int_counter != (u32) -1) 2923 dd->int_counter++; 2924 - 2925 - #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE) 2926 - if (dd->flags & QIB_DCA_ENABLED) 2927 - qib_update_sdma_dca(ppd); 2928 - #endif 2929 2930 /* Clear the interrupt bit we expect to be set. */ 2931 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? ··· 2951 if (dd->int_counter != (u32) -1) 2952 dd->int_counter++; 2953 2954 - #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE) 2955 - if (dd->flags & QIB_DCA_ENABLED) 2956 - qib_update_sdma_dca(ppd); 2957 - #endif 2958 - 2959 /* Clear the interrupt bit we expect to be set. */ 2960 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? 2961 INT_MASK_P(SDmaProgress, 1) : ··· 2980 qib_stats.sps_ints++; 2981 if (dd->int_counter != (u32) -1) 2982 dd->int_counter++; 2983 - 2984 - #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE) 2985 - if (dd->flags & QIB_DCA_ENABLED) 2986 - qib_update_sdma_dca(ppd); 2987 - #endif 2988 2989 /* Clear the interrupt bit we expect to be set. */ 2990 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? ··· 4087 qib_write_kreg_ctxt(dd, krc_rcvhdraddr, ctxt, 4088 rcd->rcvhdrq_phys); 4089 rcd->seq_cnt = 1; 4090 - #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE) 4091 - if (dd->flags & QIB_DCA_ENABLED) 4092 - qib_update_rhdrq_dca(rcd); 4093 - #endif 4094 } 4095 if (op & QIB_RCVCTRL_CTXT_DIS) 4096 ppd->p_rcvctrl &= ··· 5144 QIBL_IB_AUTONEG_INPROG))) 5145 set_7322_ibspeed_fast(ppd, ppd->link_speed_enabled); 5146 if (!(ppd->lflags & QIBL_IB_AUTONEG_INPROG)) { 5147 qib_cancel_sends(ppd); 5148 spin_lock_irqsave(&ppd->sdma_lock, flags); 5149 if (__qib_sdma_running(ppd)) 5150 __qib_sdma_process_event(ppd, ··· 5556 } 5557 5558 /* 5559 - * called at device initialization time, and also if the cable_atten 5560 * module parameter is changed. This is used for cables that don't 5561 * have valid QSFP EEPROMs (not present, or attenuation is zero). 5562 * We initialize to the default, then if there is a specific 5563 - * unit,port match, we use that. 5564 * String format is "default# unit#,port#=# ... u,p=#", separators must 5565 - * be a SPACE character. A newline terminates. 5566 * The last specific match is used (actually, all are used, but last 5567 * one is the one that winds up set); if none at all, fall back on default. 5568 */ 5569 static void set_no_qsfp_atten(struct qib_devdata *dd, int change) 5570 { 5571 char *nxt, *str; 5572 - int pidx, unit, port, deflt; 5573 unsigned long val; 5574 - int any = 0; 5575 5576 - str = cable_atten_list; 5577 5578 - /* default number is validated in setup_cable_atten() */ 5579 deflt = simple_strtoul(str, &nxt, 0); 5580 for (pidx = 0; pidx < dd->num_pports; ++pidx) 5581 dd->pport[pidx].cpspec->no_eep = deflt; ··· 5604 ; 5605 continue; 5606 } 5607 - if (val >= TXDDS_TABLE_SZ) 5608 continue; 5609 for (pidx = 0; dd->unit == unit && pidx < dd->num_pports; 5610 ++pidx) { 5611 - if (dd->pport[pidx].port != port || 5612 - !dd->pport[pidx].link_speed_supported) 5613 continue; 5614 - dd->pport[pidx].cpspec->no_eep = val; 5615 /* now change the IBC and serdes, overriding generic */ 5616 - init_txdds_table(&dd->pport[pidx], 1); 5617 any++; 5618 } 5619 if (*nxt == '\n') ··· 5636 * Change the IBC and serdes, but since it's 5637 * general, don't override specific settings. 5638 */ 5639 - for (pidx = 0; pidx < dd->num_pports; ++pidx) { 5640 - if (!dd->pport[pidx].link_speed_supported) 5641 - continue; 5642 - init_txdds_table(&dd->pport[pidx], 0); 5643 - } 5644 } 5645 } 5646 5647 - /* handle the cable_atten parameter changing */ 5648 - static int setup_cable_atten(const char *str, struct kernel_param *kp) 5649 { 5650 struct qib_devdata *dd; 5651 unsigned long val; 5652 char *n; 5653 if (strlen(str) >= MAX_ATTEN_LEN) { 5654 - printk(KERN_INFO QIB_DRV_NAME " cable_atten_values string " 5655 "too long\n"); 5656 return -ENOSPC; 5657 } 5658 val = simple_strtoul(str, &n, 0); 5659 - if (n == str || val >= TXDDS_TABLE_SZ) { 5660 printk(KERN_INFO QIB_DRV_NAME 5661 - "cable_atten_values must start with a number\n"); 5662 return -EINVAL; 5663 } 5664 - strcpy(cable_atten_list, str); 5665 5666 list_for_each_entry(dd, &qib_dev_list, list) 5667 - set_no_qsfp_atten(dd, 1); 5668 return 0; 5669 } 5670 ··· 6065 * in adapter-specific routines. 6066 */ 6067 if (!(ppd->dd->flags & QIB_HAS_QSFP)) { 6068 - int i; 6069 - const struct txdds_ent *txdds; 6070 - 6071 if (!IS_QMH(ppd->dd) && !IS_QME(ppd->dd)) 6072 qib_devinfo(ppd->dd->pcidev, "IB%u:%u: " 6073 "Unknown mezzanine card type\n", 6074 - ppd->dd->unit, ppd->port); 6075 - txdds = IS_QMH(ppd->dd) ? &qmh_qdr_txdds : 6076 - &qme_qdr_txdds; 6077 - 6078 /* 6079 - * set values in case link comes up 6080 - * before table is written to driver. 6081 */ 6082 - cp->h1_val = IS_QMH(ppd->dd) ? H1_FORCE_QMH : 6083 - H1_FORCE_QME; 6084 - for (i = 0; i < SERDES_CHANS; i++) { 6085 - cp->amp[i] = txdds->amp; 6086 - cp->pre[i] = txdds->pre; 6087 - cp->mainv[i] = txdds->main; 6088 - cp->post[i] = txdds->post; 6089 - } 6090 } else 6091 cp->h1_val = H1_FORCE_VAL; 6092 ··· 6092 6093 dd->rcvhdrentsize = QIB_RCVHDR_ENTSIZE; 6094 dd->rcvhdrsize = QIB_DFLT_RCVHDRSIZE; 6095 - dd->rhf_offset = 6096 - dd->rcvhdrentsize - sizeof(u64) / sizeof(u32); 6097 6098 /* we always allocate at least 2048 bytes for eager buffers */ 6099 dd->rcvegrbufsize = max(mtu, 2048); ··· 6711 /* clear diagctrl register, in case diags were running and crashed */ 6712 qib_write_kreg(dd, kr_hwdiagctrl, 0); 6713 6714 - #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE) 6715 - ret = dca_add_requester(&pdev->dev); 6716 - if (!ret) { 6717 - dd->flags |= QIB_DCA_ENABLED; 6718 - qib_setup_dca(dd); 6719 - } 6720 - #endif 6721 goto bail; 6722 6723 bail_cleanup: ··· 6896 static const struct txdds_ent txdds_qdr[TXDDS_TABLE_SZ] = { 6897 /* amp, pre, main, post */ 6898 { 2, 2, 15, 6 }, /* Loopback */ 6899 - { 0, 1, 0, 7 }, /* 2 dB */ 6900 - { 0, 1, 0, 9 }, /* 3 dB */ 6901 { 0, 1, 0, 11 }, /* 4 dB */ 6902 { 0, 1, 0, 13 }, /* 5 dB */ 6903 { 0, 1, 0, 15 }, /* 6 dB */ ··· 6911 { 0, 2, 7, 15 }, /* 14 dB */ 6912 { 0, 2, 8, 15 }, /* 15 dB */ 6913 { 0, 2, 9, 15 }, /* 16 dB */ 6914 }; 6915 6916 static const struct txdds_ent *get_atten_table(const struct txdds_ent *txdds, ··· 6981 } 6982 6983 /* 6984 - * if override is set, the module parameter cable_atten has a value 6985 * for this specific port, so use it, rather than our normal mechanism. 6986 */ 6987 static void find_best_ent(struct qib_pportdata *ppd, ··· 7020 *ddr_dds = get_atten_table(txdds_ddr, qd->atten[0]); 7021 *qdr_dds = get_atten_table(txdds_qdr, qd->atten[1]); 7022 return; 7023 - } else { 7024 /* 7025 * If we have no (or incomplete) data from the cable 7026 - * EEPROM, or no QSFP, use the module parameter value 7027 - * to index into the attentuation table. 7028 */ 7029 - *sdr_dds = &txdds_sdr[ppd->cpspec->no_eep]; 7030 - *ddr_dds = &txdds_ddr[ppd->cpspec->no_eep]; 7031 - *qdr_dds = &txdds_qdr[ppd->cpspec->no_eep]; 7032 } 7033 } 7034 ··· 7052 int idx; 7053 int single_ent = 0; 7054 7055 - if (IS_QMH(ppd->dd)) { 7056 - /* normally will be overridden, via setup_qmh() */ 7057 - sdr_dds = &qmh_sdr_txdds; 7058 - ddr_dds = &qmh_ddr_txdds; 7059 - qdr_dds = &qmh_qdr_txdds; 7060 single_ent = 1; 7061 - } else if (IS_QME(ppd->dd)) { 7062 - sdr_dds = &qme_sdr_txdds; 7063 - ddr_dds = &qme_ddr_txdds; 7064 - qdr_dds = &qme_qdr_txdds; 7065 - single_ent = 1; 7066 - } else 7067 - find_best_ent(ppd, &sdr_dds, &ddr_dds, &qdr_dds, override); 7068 7069 /* Fill in the first entry with the best entry found. */ 7070 set_txdds(ppd, 0, sdr_dds); 7071 set_txdds(ppd, TXDDS_TABLE_SZ, ddr_dds); 7072 set_txdds(ppd, 2 * TXDDS_TABLE_SZ, qdr_dds); 7073 - 7074 - /* 7075 - * for our current speed, also write that value into the 7076 - * tx serdes registers. 7077 - */ 7078 - dds = (struct txdds_ent *)(ppd->link_speed_active == QIB_IB_QDR ? 7079 - qdr_dds : (ppd->link_speed_active == 7080 - QIB_IB_DDR ? ddr_dds : sdr_dds)); 7081 - write_tx_serdes_param(ppd, dds); 7082 7083 /* Fill in the remaining entries with the default table values. */ 7084 for (idx = 1; idx < ARRAY_SIZE(txdds_sdr); ++idx) { ··· 7192 */ 7193 init_txdds_table(ppd, 0); 7194 7195 /* Patch some SerDes defaults to "Better for IB" */ 7196 /* Timing Loop Bandwidth: cdr_timing[11:9] = 0 */ 7197 ibsd_wr_allchans(ppd, 2, 0, BMASK(11, 9)); ··· 7266 QDR_STATIC_ADAPT_DOWN_R1 : QDR_STATIC_ADAPT_DOWN); 7267 ppd->cpspec->qdr_dfe_on = 1; 7268 7269 - /* (FLoop LOS gate: PPM filter enabled */ 7270 ibsd_wr_allchans(ppd, 38, 0 << 10, 1 << 10); 7271 7272 /* rx offset center enabled */ ··· 7331 SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, txc0_ena) | 7332 SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, txcp1_ena) | 7333 SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, txcn1_ena)); 7334 - deemph |= 1ULL << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7335 - tx_override_deemphasis_select); 7336 - deemph |= txdds->amp << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7337 - txampcntl_d2a); 7338 - deemph |= txdds->main << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7339 - txc0_ena); 7340 - deemph |= txdds->post << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7341 - txcp1_ena); 7342 - deemph |= txdds->pre << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7343 txcn1_ena); 7344 qib_write_kreg_port(ppd, krp_tx_deemph_override, deemph); 7345 } 7346 7347 /* 7348 - * set per-bay, per channel parameters. For now, we ignore 7349 - * do_tx, and always set tx parameters, and set them with the same value 7350 - * for all channels, using the channel 0 value. We may switch to 7351 - * per-channel settings in the future, and that method only needs 7352 - * to be done once. 7353 - * Because this also writes the IBC txdds table with a single set 7354 - * of values, it should be called only for cases where we want to completely 7355 - * force a specific setting, typically only for mez cards. 7356 */ 7357 static void adj_tx_serdes(struct qib_pportdata *ppd) 7358 { 7359 - struct txdds_ent txdds; 7360 - int i; 7361 - u8 *amp, *pre, *mainv, *post; 7362 7363 - /* 7364 - * Because we use TX_DEEMPHASIS_OVERRIDE, we need to 7365 - * always do tx side, just like H1, since it is cleared 7366 - * by link down 7367 - */ 7368 - amp = ppd->cpspec->amp; 7369 - pre = ppd->cpspec->pre; 7370 - mainv = ppd->cpspec->mainv; 7371 - post = ppd->cpspec->post; 7372 - 7373 - amp[0] &= SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7374 - txampcntl_d2a); 7375 - mainv[0] &= SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7376 - txc0_ena); 7377 - post[0] &= SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7378 - txcp1_ena); 7379 - pre[0] &= SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7380 - txcn1_ena); 7381 - 7382 - /* 7383 - * Use the channel zero values, only, for now, for 7384 - * all channels 7385 - */ 7386 - txdds.amp = amp[0]; 7387 - txdds.pre = pre[0]; 7388 - txdds.main = mainv[0]; 7389 - txdds.post = post[0]; 7390 - 7391 - /* write the QDR table for IBC use, as backup for link down */ 7392 - for (i = 0; i < ARRAY_SIZE(txdds_qdr); ++i) 7393 - set_txdds(ppd, i + 32, &txdds); 7394 - 7395 - write_tx_serdes_param(ppd, &txdds); 7396 } 7397 7398 /* set QDR forced value for H1, if needed */ ··· 7381 clock_man(ppd, chan); 7382 set_man_mode_h1(ppd, chan, 0, 0); 7383 } 7384 - } 7385 - 7386 - /* 7387 - * Parse the parameters for the QMH7342, to get rx and tx serdes 7388 - * settings for that Bay, for both possible mez connectors (PCIe bus) 7389 - * and IB link (one link on mez1, two possible on mez2). 7390 - * 7391 - * Data is comma or white space separated. 7392 - * 7393 - * A set of data has 7 groups, rx and tx groups have SERDES_CHANS values, 7394 - * one per IB lane (serdes channel). 7395 - * The groups are Bay, bus# H1 rcv, and amp, pre, post, main Tx values (QDR). 7396 - * The Bay # is used only for debugging currently. 7397 - * H1 values are set whenever the link goes down, or is at cfg_test or 7398 - * cfg_wait_enh. Tx values are programmed once, when this routine is called 7399 - * (and with default values at chip initialization). Values are any base, in 7400 - * strtoul style, and values are seperated by comma, or any white space 7401 - * (space, tab, newline). 7402 - * 7403 - * An example set might look like this (white space vs 7404 - * comma used for human ease of reading) 7405 - * The ordering is a set of Bay# Bus# H1, amp, pre, post, and main for mez1 IB1, 7406 - * repeat for mez2 IB1, then mez2 IB2. 7407 - * 7408 - * B B H1:0 amp:0 pre:0 post: 0 main:0 7409 - * a u H1: 1 amp: 1 pre: 1 post: 1 main: 1 7410 - * y s H1: 2 amp: 2 pre: 2 post: 2 main: 2 7411 - * H1: 4 amp: 3 pre: 3 post: 3 main: 3 7412 - * 1 3 8,6,5,6 0,0,0,0 1,1,1,1 10,10,10,10 3,3,3,3 7413 - * 1 6 7,6,6,7 0,0,0,0 1,1,1,1 10,10,10,10 3,3,3,3 7414 - * 1 6 9,7,7,8 0,0,0,0 1,1,1,1 10,10,10,10 3,3,3,3 7415 - */ 7416 - #define N_QMH_FIELDS 22 7417 - static int setup_qmh_params(const char *str, struct kernel_param *kp) 7418 - { 7419 - char *abuf, *v, *nv, *nvp; 7420 - struct qib_devdata *dd; 7421 - struct qib_pportdata *ppd; 7422 - u32 mez, vlen, nf, port, bay; 7423 - int ret = 0, found = 0; 7424 - 7425 - vlen = strlen(str) + 1; 7426 - abuf = kmalloc(vlen, GFP_KERNEL); 7427 - if (!abuf) { 7428 - printk(KERN_INFO QIB_DRV_NAME 7429 - " Unable to allocate QMH param buffer; ignoring\n"); 7430 - return 0; 7431 - } 7432 - memcpy(abuf, str, vlen); 7433 - v = abuf; 7434 - 7435 - /* these 3 are because gcc can't know they are set before used */ 7436 - port = 1; 7437 - mez = 1; /* used only for debugging */ 7438 - bay = 0; /* used only for debugging */ 7439 - ppd = NULL; 7440 - for (nf = 0; (nv = strsep(&v, ", \t\n\r")) && 7441 - nf < (N_QMH_FIELDS * 3);) { 7442 - u32 val; 7443 - 7444 - if (!*nv) 7445 - /* allow for multiple separators */ 7446 - continue; 7447 - 7448 - val = simple_strtoul(nv, &nvp, 0); 7449 - if (nv == nvp) { 7450 - printk(KERN_INFO QIB_DRV_NAME 7451 - " Bay%u, mez%u IB%u non-numeric value (%s) " 7452 - "field #%u, ignoring rest\n", bay, mez, 7453 - port, nv, nf % (N_QMH_FIELDS * 3)); 7454 - ret = -EINVAL; 7455 - goto bail; 7456 - } 7457 - if (!(nf % N_QMH_FIELDS)) { 7458 - ppd = NULL; 7459 - bay = val; 7460 - if (!bay || bay > 16) { 7461 - printk(KERN_INFO QIB_DRV_NAME 7462 - " Invalid bay # %u, field %u, " 7463 - "ignoring rest\n", bay, nf); 7464 - ret = -EINVAL; 7465 - goto bail; 7466 - } 7467 - } else if ((nf % N_QMH_FIELDS) == 1) { 7468 - u32 bus = val; 7469 - if (nf == 1) { 7470 - mez = 1; 7471 - port = 1; 7472 - } else if (nf == (N_QMH_FIELDS + 1)) { 7473 - mez = 2; 7474 - port = 1; 7475 - } else { 7476 - mez = 2; 7477 - port = 2; 7478 - } 7479 - list_for_each_entry(dd, &qib_dev_list, list) { 7480 - if (dd->deviceid != PCI_DEVICE_ID_QLOGIC_IB_7322 7481 - || !IS_QMH(dd)) 7482 - continue; /* only for QMH cards */ 7483 - if (dd->pcidev->bus->number == bus) { 7484 - found++; 7485 - ppd = &dd->pport[port - 1]; 7486 - } 7487 - } 7488 - } else if (ppd) { 7489 - u32 parm = (nf % N_QMH_FIELDS) - 2; 7490 - if (parm < SERDES_CHANS && !(parm % SERDES_CHANS)) 7491 - ppd->cpspec->h1_val = val; 7492 - else if (parm < (2 * SERDES_CHANS)) 7493 - ppd->cpspec->amp[parm % SERDES_CHANS] = val; 7494 - else if (parm < (3 * SERDES_CHANS)) 7495 - ppd->cpspec->pre[parm % SERDES_CHANS] = val; 7496 - else if (parm < (4 * SERDES_CHANS)) 7497 - ppd->cpspec->post[parm % SERDES_CHANS] = val; 7498 - else { 7499 - ppd->cpspec->mainv[parm % SERDES_CHANS] = val; 7500 - /* At the end of a port, set params */ 7501 - if (parm == ((5 * SERDES_CHANS) - 1)) 7502 - adj_tx_serdes(ppd); 7503 - } 7504 - } 7505 - nf++; 7506 - } 7507 - if (!found) { 7508 - printk(KERN_ERR QIB_DRV_NAME 7509 - ": No match found for qmh_serdes_setup parameter\n"); 7510 - ret = -EINVAL; 7511 - } 7512 - bail: 7513 - kfree(abuf); 7514 - return ret; 7515 - } 7516 - 7517 - /* 7518 - * Similarly for QME7342, but the format is simpler, values are the 7519 - * same for all mez card positions in a blade (2 or 4 per blade), but 7520 - * are different for some blades vs others, and we don't need to 7521 - * specify different parameters for different serdes channels or different 7522 - * IB ports. 7523 - * Format is: h1 amp,pre,post,main 7524 - * Alternate format (so ports can be different): Pport# h1 amp,pre,post,main 7525 - */ 7526 - #define N_QME_FIELDS 5 7527 - static int setup_qme_params(const char *str, struct kernel_param *kp) 7528 - { 7529 - char *abuf, *v, *nv, *nvp; 7530 - struct qib_devdata *dd; 7531 - u32 vlen, nf, port = 0; 7532 - u8 h1, tx[4]; /* amp, pre, post, main */ 7533 - int ret = -EINVAL; 7534 - char *seplist; 7535 - 7536 - vlen = strlen(str) + 1; 7537 - abuf = kmalloc(vlen, GFP_KERNEL); 7538 - if (!abuf) { 7539 - printk(KERN_INFO QIB_DRV_NAME 7540 - " Unable to allocate QME param buffer; ignoring\n"); 7541 - return 0; 7542 - } 7543 - strncpy(abuf, str, vlen); 7544 - 7545 - v = abuf; 7546 - seplist = " \t"; 7547 - h1 = H1_FORCE_QME; /* gcc can't figure out always set before used */ 7548 - 7549 - for (nf = 0; (nv = strsep(&v, seplist)); ) { 7550 - u32 val; 7551 - 7552 - if (!*nv) 7553 - /* allow for multiple separators */ 7554 - continue; 7555 - 7556 - if (!nf && *nv == 'P') { 7557 - /* alternate format with port */ 7558 - val = simple_strtoul(++nv, &nvp, 0); 7559 - if (nv == nvp || port >= NUM_IB_PORTS) { 7560 - printk(KERN_INFO QIB_DRV_NAME 7561 - " %s: non-numeric port value (%s) " 7562 - "ignoring rest\n", __func__, nv); 7563 - goto done; 7564 - } 7565 - port = val; 7566 - continue; /* without incrementing nf */ 7567 - } 7568 - val = simple_strtoul(nv, &nvp, 0); 7569 - if (nv == nvp) { 7570 - printk(KERN_INFO QIB_DRV_NAME 7571 - " %s: non-numeric value (%s) " 7572 - "field #%u, ignoring rest\n", __func__, 7573 - nv, nf); 7574 - goto done; 7575 - } 7576 - if (!nf) { 7577 - h1 = val; 7578 - seplist = ","; 7579 - } else 7580 - tx[nf - 1] = val; 7581 - if (++nf == N_QME_FIELDS) { 7582 - list_for_each_entry(dd, &qib_dev_list, list) { 7583 - int pidx, i; 7584 - if (dd->deviceid != PCI_DEVICE_ID_QLOGIC_IB_7322 7585 - || !IS_QME(dd)) 7586 - continue; /* only for QME cards */ 7587 - for (pidx = 0; pidx < dd->num_pports; ++pidx) { 7588 - struct qib_pportdata *ppd; 7589 - ppd = &dd->pport[pidx]; 7590 - if ((port && ppd->port != port) || 7591 - !ppd->link_speed_supported) 7592 - continue; 7593 - ppd->cpspec->h1_val = h1; 7594 - for (i = 0; i < SERDES_CHANS; i++) { 7595 - ppd->cpspec->amp[i] = tx[0]; 7596 - ppd->cpspec->pre[i] = tx[1]; 7597 - ppd->cpspec->post[i] = tx[2]; 7598 - ppd->cpspec->mainv[i] = tx[3]; 7599 - } 7600 - adj_tx_serdes(ppd); 7601 - } 7602 - } 7603 - ret = 0; 7604 - goto done; 7605 - } 7606 - } 7607 - printk(KERN_INFO QIB_DRV_NAME 7608 - " %s: Only %u of %u fields provided, skipping\n", 7609 - __func__, nf, N_QME_FIELDS); 7610 - done: 7611 - kfree(abuf); 7612 - return ret; 7613 } 7614 7615 #define SJA_EN SYM_MASK(SPC_JTAG_ACCESS_REG, SPC_JTAG_ACCESS_EN)
··· 42 #include <linux/jiffies.h> 43 #include <rdma/ib_verbs.h> 44 #include <rdma/ib_smi.h> 45 46 #include "qib.h" 47 #include "qib_7322_regs.h" ··· 114 module_param_named(singleport, qib_singleport, ushort, S_IRUGO); 115 MODULE_PARM_DESC(singleport, "Use only IB port 1; more per-port buffer space"); 116 117 #define MAX_ATTEN_LEN 64 /* plenty for any real system */ 118 /* for read back, default index is ~5m copper cable */ 119 + static char txselect_list[MAX_ATTEN_LEN] = "10"; 120 + static struct kparam_string kp_txselect = { 121 + .string = txselect_list, 122 .maxlen = MAX_ATTEN_LEN 123 }; 124 + static int setup_txselect(const char *, struct kernel_param *); 125 + module_param_call(txselect, setup_txselect, param_get_string, 126 + &kp_txselect, S_IWUSR | S_IRUGO); 127 + MODULE_PARM_DESC(txselect, \ 128 + "Tx serdes indices (for no QSFP or invalid QSFP data)"); 129 130 #define BOARD_QME7342 5 131 #define BOARD_QMH7342 6 ··· 540 u32 lastbuf_for_pio; 541 u32 stay_in_freeze; 542 u32 recovery_ports_initted; 543 struct msix_entry *msix_entries; 544 void **msix_arg; 545 unsigned long *sendchkenable; ··· 574 static void write_tx_serdes_param(struct qib_pportdata *, struct txdds_ent *); 575 576 #define TXDDS_TABLE_SZ 16 /* number of entries per speed in onchip table */ 577 + #define TXDDS_EXTRA_SZ 11 /* number of extra tx settings entries */ 578 #define SERDES_CHANS 4 /* yes, it's obvious, but one less magic number */ 579 580 #define H1_FORCE_VAL 8 581 + #define H1_FORCE_QME 1 /* may be overridden via setup_txselect() */ 582 + #define H1_FORCE_QMH 7 /* may be overridden via setup_txselect() */ 583 584 /* The static and dynamic registers are paired, and the pairs indexed by spd */ 585 #define krp_static_adapt_dis(spd) (KREG_IBPORT_IDX(ADAPT_DISABLE_STATIC_SDR) \ ··· 589 #define QDR_STATIC_ADAPT_DOWN_R1 0ULL /* r1 link down, H1-H4 QDR adapts */ 590 #define QDR_STATIC_ADAPT_INIT 0xffffffffffULL /* up, disable H0,H1-8, LE */ 591 #define QDR_STATIC_ADAPT_INIT_R1 0xf0ffffffffULL /* r1 up, disable H0,H1-8 */ 592 593 struct qib_chippport_specific { 594 u64 __iomem *kpregbase; ··· 637 * Per-bay per-channel rcv QMH H1 values and Tx values for QDR. 638 * entry zero is unused, to simplify indexing 639 */ 640 + u8 h1_val; 641 + u8 no_eep; /* txselect table index to use if no qsfp info */ 642 u8 ipg_tries; 643 u8 ibmalfusesnap; 644 struct qib_qsfp_data qsfp_data; ··· 675 { QIB_DRV_NAME " (sdmaC 1)", sdma_cleanup_intr, 676 SYM_LSB(IntStatus, SDmaCleanupDone_1), 2 }, 677 }; 678 679 /* ibcctrl bits */ 680 #define QLOGIC_IB_IBCC_LINKINITCMD_DISABLE 1 ··· 2572 qib_write_kreg_port(ppd, krp_rcvpktledcnt, ledblink); 2573 } 2574 2575 /* 2576 * Disable MSIx interrupt if enabled, call generic MSIx code 2577 * to cleanup, and clear pending MSIx interrupts. ··· 2700 static void qib_setup_7322_cleanup(struct qib_devdata *dd) 2701 { 2702 int i; 2703 2704 qib_7322_free_irq(dd); 2705 kfree(dd->cspec->cntrs); ··· 3017 if (dd->int_counter != (u32) -1) 3018 dd->int_counter++; 3019 3020 /* Clear the interrupt bit we expect to be set. */ 3021 qib_write_kreg(dd, kr_intclear, ((1ULL << QIB_I_RCVAVAIL_LSB) | 3022 (1ULL << QIB_I_RCVURG_LSB)) << rcd->ctxt); ··· 3085 if (dd->int_counter != (u32) -1) 3086 dd->int_counter++; 3087 3088 /* Clear the interrupt bit we expect to be set. */ 3089 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? 3090 INT_MASK_P(SDma, 1) : INT_MASK_P(SDma, 0)); ··· 3118 qib_stats.sps_ints++; 3119 if (dd->int_counter != (u32) -1) 3120 dd->int_counter++; 3121 3122 /* Clear the interrupt bit we expect to be set. */ 3123 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? ··· 3153 if (dd->int_counter != (u32) -1) 3154 dd->int_counter++; 3155 3156 /* Clear the interrupt bit we expect to be set. */ 3157 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? 3158 INT_MASK_P(SDmaProgress, 1) : ··· 3187 qib_stats.sps_ints++; 3188 if (dd->int_counter != (u32) -1) 3189 dd->int_counter++; 3190 3191 /* Clear the interrupt bit we expect to be set. */ 3192 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? ··· 4299 qib_write_kreg_ctxt(dd, krc_rcvhdraddr, ctxt, 4300 rcd->rcvhdrq_phys); 4301 rcd->seq_cnt = 1; 4302 } 4303 if (op & QIB_RCVCTRL_CTXT_DIS) 4304 ppd->p_rcvctrl &= ··· 5360 QIBL_IB_AUTONEG_INPROG))) 5361 set_7322_ibspeed_fast(ppd, ppd->link_speed_enabled); 5362 if (!(ppd->lflags & QIBL_IB_AUTONEG_INPROG)) { 5363 + /* unlock the Tx settings, speed may change */ 5364 + qib_write_kreg_port(ppd, krp_tx_deemph_override, 5365 + SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 5366 + reset_tx_deemphasis_override)); 5367 qib_cancel_sends(ppd); 5368 + /* on link down, ensure sane pcs state */ 5369 + qib_7322_mini_pcs_reset(ppd); 5370 spin_lock_irqsave(&ppd->sdma_lock, flags); 5371 if (__qib_sdma_running(ppd)) 5372 __qib_sdma_process_event(ppd, ··· 5766 } 5767 5768 /* 5769 + * called at device initialization time, and also if the txselect 5770 * module parameter is changed. This is used for cables that don't 5771 * have valid QSFP EEPROMs (not present, or attenuation is zero). 5772 * We initialize to the default, then if there is a specific 5773 + * unit,port match, we use that (and set it immediately, for the 5774 + * current speed, if the link is at INIT or better). 5775 * String format is "default# unit#,port#=# ... u,p=#", separators must 5776 + * be a SPACE character. A newline terminates. The u,p=# tuples may 5777 + * optionally have "u,p=#,#", where the final # is the H1 value 5778 * The last specific match is used (actually, all are used, but last 5779 * one is the one that winds up set); if none at all, fall back on default. 5780 */ 5781 static void set_no_qsfp_atten(struct qib_devdata *dd, int change) 5782 { 5783 char *nxt, *str; 5784 + u32 pidx, unit, port, deflt, h1; 5785 unsigned long val; 5786 + int any = 0, seth1; 5787 5788 + str = txselect_list; 5789 5790 + /* default number is validated in setup_txselect() */ 5791 deflt = simple_strtoul(str, &nxt, 0); 5792 for (pidx = 0; pidx < dd->num_pports; ++pidx) 5793 dd->pport[pidx].cpspec->no_eep = deflt; ··· 5812 ; 5813 continue; 5814 } 5815 + if (val >= TXDDS_TABLE_SZ + TXDDS_EXTRA_SZ) 5816 continue; 5817 + seth1 = 0; 5818 + h1 = 0; /* gcc thinks it might be used uninitted */ 5819 + if (*nxt == ',' && nxt[1]) { 5820 + str = ++nxt; 5821 + h1 = (u32)simple_strtoul(str, &nxt, 0); 5822 + if (nxt == str) 5823 + while (*nxt && *nxt++ != ' ') /* skip */ 5824 + ; 5825 + else 5826 + seth1 = 1; 5827 + } 5828 for (pidx = 0; dd->unit == unit && pidx < dd->num_pports; 5829 ++pidx) { 5830 + struct qib_pportdata *ppd = &dd->pport[pidx]; 5831 + 5832 + if (ppd->port != port || !ppd->link_speed_supported) 5833 continue; 5834 + ppd->cpspec->no_eep = val; 5835 /* now change the IBC and serdes, overriding generic */ 5836 + init_txdds_table(ppd, 1); 5837 any++; 5838 } 5839 if (*nxt == '\n') ··· 5832 * Change the IBC and serdes, but since it's 5833 * general, don't override specific settings. 5834 */ 5835 + for (pidx = 0; pidx < dd->num_pports; ++pidx) 5836 + if (dd->pport[pidx].link_speed_supported) 5837 + init_txdds_table(&dd->pport[pidx], 0); 5838 } 5839 } 5840 5841 + /* handle the txselect parameter changing */ 5842 + static int setup_txselect(const char *str, struct kernel_param *kp) 5843 { 5844 struct qib_devdata *dd; 5845 unsigned long val; 5846 char *n; 5847 if (strlen(str) >= MAX_ATTEN_LEN) { 5848 + printk(KERN_INFO QIB_DRV_NAME " txselect_values string " 5849 "too long\n"); 5850 return -ENOSPC; 5851 } 5852 val = simple_strtoul(str, &n, 0); 5853 + if (n == str || val >= (TXDDS_TABLE_SZ + TXDDS_EXTRA_SZ)) { 5854 printk(KERN_INFO QIB_DRV_NAME 5855 + "txselect_values must start with a number < %d\n", 5856 + TXDDS_TABLE_SZ + TXDDS_EXTRA_SZ); 5857 return -EINVAL; 5858 } 5859 + strcpy(txselect_list, str); 5860 5861 list_for_each_entry(dd, &qib_dev_list, list) 5862 + if (dd->deviceid == PCI_DEVICE_ID_QLOGIC_IB_7322) 5863 + set_no_qsfp_atten(dd, 1); 5864 return 0; 5865 } 5866 ··· 6261 * in adapter-specific routines. 6262 */ 6263 if (!(ppd->dd->flags & QIB_HAS_QSFP)) { 6264 if (!IS_QMH(ppd->dd) && !IS_QME(ppd->dd)) 6265 qib_devinfo(ppd->dd->pcidev, "IB%u:%u: " 6266 "Unknown mezzanine card type\n", 6267 + dd->unit, ppd->port); 6268 + cp->h1_val = IS_QMH(dd) ? H1_FORCE_QMH : H1_FORCE_QME; 6269 /* 6270 + * Choose center value as default tx serdes setting 6271 + * until changed through module parameter. 6272 */ 6273 + ppd->cpspec->no_eep = IS_QMH(dd) ? 6274 + TXDDS_TABLE_SZ + 2 : TXDDS_TABLE_SZ + 4; 6275 } else 6276 cp->h1_val = H1_FORCE_VAL; 6277 ··· 6299 6300 dd->rcvhdrentsize = QIB_RCVHDR_ENTSIZE; 6301 dd->rcvhdrsize = QIB_DFLT_RCVHDRSIZE; 6302 + dd->rhf_offset = dd->rcvhdrentsize - sizeof(u64) / sizeof(u32); 6303 6304 /* we always allocate at least 2048 bytes for eager buffers */ 6305 dd->rcvegrbufsize = max(mtu, 2048); ··· 6919 /* clear diagctrl register, in case diags were running and crashed */ 6920 qib_write_kreg(dd, kr_hwdiagctrl, 0); 6921 6922 goto bail; 6923 6924 bail_cleanup: ··· 7111 static const struct txdds_ent txdds_qdr[TXDDS_TABLE_SZ] = { 7112 /* amp, pre, main, post */ 7113 { 2, 2, 15, 6 }, /* Loopback */ 7114 + { 0, 1, 0, 7 }, /* 2 dB (also QMH7342) */ 7115 + { 0, 1, 0, 9 }, /* 3 dB (also QMH7342) */ 7116 { 0, 1, 0, 11 }, /* 4 dB */ 7117 { 0, 1, 0, 13 }, /* 5 dB */ 7118 { 0, 1, 0, 15 }, /* 6 dB */ ··· 7126 { 0, 2, 7, 15 }, /* 14 dB */ 7127 { 0, 2, 8, 15 }, /* 15 dB */ 7128 { 0, 2, 9, 15 }, /* 16 dB */ 7129 + }; 7130 + 7131 + /* 7132 + * extra entries for use with txselect, for indices >= TXDDS_TABLE_SZ. 7133 + * These are mostly used for mez cards going through connectors 7134 + * and backplane traces, but can be used to add other "unusual" 7135 + * table values as well. 7136 + */ 7137 + static const struct txdds_ent txdds_extra_sdr[TXDDS_EXTRA_SZ] = { 7138 + /* amp, pre, main, post */ 7139 + { 0, 0, 0, 1 }, /* QMH7342 backplane settings */ 7140 + { 0, 0, 0, 1 }, /* QMH7342 backplane settings */ 7141 + { 0, 0, 0, 2 }, /* QMH7342 backplane settings */ 7142 + { 0, 0, 0, 2 }, /* QMH7342 backplane settings */ 7143 + { 0, 0, 0, 11 }, /* QME7342 backplane settings */ 7144 + { 0, 0, 0, 11 }, /* QME7342 backplane settings */ 7145 + { 0, 0, 0, 11 }, /* QME7342 backplane settings */ 7146 + { 0, 0, 0, 11 }, /* QME7342 backplane settings */ 7147 + { 0, 0, 0, 11 }, /* QME7342 backplane settings */ 7148 + { 0, 0, 0, 11 }, /* QME7342 backplane settings */ 7149 + { 0, 0, 0, 11 }, /* QME7342 backplane settings */ 7150 + }; 7151 + 7152 + static const struct txdds_ent txdds_extra_ddr[TXDDS_EXTRA_SZ] = { 7153 + /* amp, pre, main, post */ 7154 + { 0, 0, 0, 7 }, /* QMH7342 backplane settings */ 7155 + { 0, 0, 0, 7 }, /* QMH7342 backplane settings */ 7156 + { 0, 0, 0, 8 }, /* QMH7342 backplane settings */ 7157 + { 0, 0, 0, 8 }, /* QMH7342 backplane settings */ 7158 + { 0, 0, 0, 13 }, /* QME7342 backplane settings */ 7159 + { 0, 0, 0, 13 }, /* QME7342 backplane settings */ 7160 + { 0, 0, 0, 13 }, /* QME7342 backplane settings */ 7161 + { 0, 0, 0, 13 }, /* QME7342 backplane settings */ 7162 + { 0, 0, 0, 13 }, /* QME7342 backplane settings */ 7163 + { 0, 0, 0, 13 }, /* QME7342 backplane settings */ 7164 + { 0, 0, 0, 13 }, /* QME7342 backplane settings */ 7165 + }; 7166 + 7167 + static const struct txdds_ent txdds_extra_qdr[TXDDS_EXTRA_SZ] = { 7168 + /* amp, pre, main, post */ 7169 + { 0, 1, 0, 4 }, /* QMH7342 backplane settings */ 7170 + { 0, 1, 0, 5 }, /* QMH7342 backplane settings */ 7171 + { 0, 1, 0, 6 }, /* QMH7342 backplane settings */ 7172 + { 0, 1, 0, 8 }, /* QMH7342 backplane settings */ 7173 + { 0, 1, 12, 10 }, /* QME7342 backplane setting */ 7174 + { 0, 1, 12, 11 }, /* QME7342 backplane setting */ 7175 + { 0, 1, 12, 12 }, /* QME7342 backplane setting */ 7176 + { 0, 1, 12, 14 }, /* QME7342 backplane setting */ 7177 + { 0, 1, 12, 6 }, /* QME7342 backplane setting */ 7178 + { 0, 1, 12, 7 }, /* QME7342 backplane setting */ 7179 + { 0, 1, 12, 8 }, /* QME7342 backplane setting */ 7180 }; 7181 7182 static const struct txdds_ent *get_atten_table(const struct txdds_ent *txdds, ··· 7145 } 7146 7147 /* 7148 + * if override is set, the module parameter txselect has a value 7149 * for this specific port, so use it, rather than our normal mechanism. 7150 */ 7151 static void find_best_ent(struct qib_pportdata *ppd, ··· 7184 *ddr_dds = get_atten_table(txdds_ddr, qd->atten[0]); 7185 *qdr_dds = get_atten_table(txdds_qdr, qd->atten[1]); 7186 return; 7187 + } else if (ppd->cpspec->no_eep < TXDDS_TABLE_SZ) { 7188 /* 7189 * If we have no (or incomplete) data from the cable 7190 + * EEPROM, or no QSFP, or override is set, use the 7191 + * module parameter value to index into the attentuation 7192 + * table. 7193 */ 7194 + idx = ppd->cpspec->no_eep; 7195 + *sdr_dds = &txdds_sdr[idx]; 7196 + *ddr_dds = &txdds_ddr[idx]; 7197 + *qdr_dds = &txdds_qdr[idx]; 7198 + } else if (ppd->cpspec->no_eep < (TXDDS_TABLE_SZ + TXDDS_EXTRA_SZ)) { 7199 + /* similar to above, but index into the "extra" table. */ 7200 + idx = ppd->cpspec->no_eep - TXDDS_TABLE_SZ; 7201 + *sdr_dds = &txdds_extra_sdr[idx]; 7202 + *ddr_dds = &txdds_extra_ddr[idx]; 7203 + *qdr_dds = &txdds_extra_qdr[idx]; 7204 + } else { 7205 + /* this shouldn't happen, it's range checked */ 7206 + *sdr_dds = txdds_sdr + qib_long_atten; 7207 + *ddr_dds = txdds_ddr + qib_long_atten; 7208 + *qdr_dds = txdds_qdr + qib_long_atten; 7209 } 7210 } 7211 ··· 7203 int idx; 7204 int single_ent = 0; 7205 7206 + find_best_ent(ppd, &sdr_dds, &ddr_dds, &qdr_dds, override); 7207 + 7208 + /* for mez cards or override, use the selected value for all entries */ 7209 + if (!(ppd->dd->flags & QIB_HAS_QSFP) || override) 7210 single_ent = 1; 7211 7212 /* Fill in the first entry with the best entry found. */ 7213 set_txdds(ppd, 0, sdr_dds); 7214 set_txdds(ppd, TXDDS_TABLE_SZ, ddr_dds); 7215 set_txdds(ppd, 2 * TXDDS_TABLE_SZ, qdr_dds); 7216 + if (ppd->lflags & (QIBL_LINKINIT | QIBL_LINKARMED | 7217 + QIBL_LINKACTIVE)) { 7218 + dds = (struct txdds_ent *)(ppd->link_speed_active == 7219 + QIB_IB_QDR ? qdr_dds : 7220 + (ppd->link_speed_active == 7221 + QIB_IB_DDR ? ddr_dds : sdr_dds)); 7222 + write_tx_serdes_param(ppd, dds); 7223 + } 7224 7225 /* Fill in the remaining entries with the default table values. */ 7226 for (idx = 1; idx < ARRAY_SIZE(txdds_sdr); ++idx) { ··· 7352 */ 7353 init_txdds_table(ppd, 0); 7354 7355 + /* ensure no tx overrides from earlier driver loads */ 7356 + qib_write_kreg_port(ppd, krp_tx_deemph_override, 7357 + SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7358 + reset_tx_deemphasis_override)); 7359 + 7360 /* Patch some SerDes defaults to "Better for IB" */ 7361 /* Timing Loop Bandwidth: cdr_timing[11:9] = 0 */ 7362 ibsd_wr_allchans(ppd, 2, 0, BMASK(11, 9)); ··· 7421 QDR_STATIC_ADAPT_DOWN_R1 : QDR_STATIC_ADAPT_DOWN); 7422 ppd->cpspec->qdr_dfe_on = 1; 7423 7424 + /* FLoop LOS gate: PPM filter enabled */ 7425 ibsd_wr_allchans(ppd, 38, 0 << 10, 1 << 10); 7426 7427 /* rx offset center enabled */ ··· 7486 SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, txc0_ena) | 7487 SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, txcp1_ena) | 7488 SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, txcn1_ena)); 7489 + 7490 + deemph |= SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7491 + tx_override_deemphasis_select); 7492 + deemph |= (txdds->amp & SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7493 + txampcntl_d2a)) << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7494 + txampcntl_d2a); 7495 + deemph |= (txdds->main & SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7496 + txc0_ena)) << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7497 + txc0_ena); 7498 + deemph |= (txdds->post & SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7499 + txcp1_ena)) << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7500 + txcp1_ena); 7501 + deemph |= (txdds->pre & SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7502 + txcn1_ena)) << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7503 txcn1_ena); 7504 qib_write_kreg_port(ppd, krp_tx_deemph_override, deemph); 7505 } 7506 7507 /* 7508 + * Set the parameters for mez cards on link bounce, so they are 7509 + * always exactly what was requested. Similar logic to init_txdds 7510 + * but does just the serdes. 7511 */ 7512 static void adj_tx_serdes(struct qib_pportdata *ppd) 7513 { 7514 + const struct txdds_ent *sdr_dds, *ddr_dds, *qdr_dds; 7515 + struct txdds_ent *dds; 7516 7517 + find_best_ent(ppd, &sdr_dds, &ddr_dds, &qdr_dds, 1); 7518 + dds = (struct txdds_ent *)(ppd->link_speed_active == QIB_IB_QDR ? 7519 + qdr_dds : (ppd->link_speed_active == QIB_IB_DDR ? 7520 + ddr_dds : sdr_dds)); 7521 + write_tx_serdes_param(ppd, dds); 7522 } 7523 7524 /* set QDR forced value for H1, if needed */ ··· 7565 clock_man(ppd, chan); 7566 set_man_mode_h1(ppd, chan, 0, 0); 7567 } 7568 } 7569 7570 #define SJA_EN SYM_MASK(SPC_JTAG_ACCESS_REG, SPC_JTAG_ACCESS_EN)
+6
drivers/infiniband/hw/qib/qib_init.c
··· 1237 */ 1238 switch (ent->device) { 1239 case PCI_DEVICE_ID_QLOGIC_IB_6120: 1240 dd = qib_init_iba6120_funcs(pdev, ent); 1241 break; 1242 1243 case PCI_DEVICE_ID_QLOGIC_IB_7220:
··· 1237 */ 1238 switch (ent->device) { 1239 case PCI_DEVICE_ID_QLOGIC_IB_6120: 1240 + #ifdef CONFIG_PCI_MSI 1241 dd = qib_init_iba6120_funcs(pdev, ent); 1242 + #else 1243 + qib_early_err(&pdev->dev, "QLogic PCIE device 0x%x cannot " 1244 + "work if CONFIG_PCI_MSI is not enabled\n", 1245 + ent->device); 1246 + #endif 1247 break; 1248 1249 case PCI_DEVICE_ID_QLOGIC_IB_7220: