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MIPS: asm: local: add barriers for Loongson
Somehow these LL/SC usages are not taken care of, breaking Loongson
builds. Add the SYNCs appropriately.
Signed-off-by: Wang Xuerui <git@xen0n.name>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: <stable@vger.kernel.org> # v5.5+
authored by
Wang Xuerui
and committed by
Paul Burton
3e86460e
c9444384
+4
+4
arch/mips/include/asm/local.h
+4
arch/mips/include/asm/local.h
···
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__asm__ __volatile__(
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" .set push \n"
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" .set arch=r4000 \n"
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+
__SYNC(full, loongson3_war) " \n"
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"1:" __LL "%1, %2 # local_add_return \n"
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" addu %0, %1, %3 \n"
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__SC "%0, %2 \n"
···
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__asm__ __volatile__(
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" .set push \n"
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" .set "MIPS_ISA_ARCH_LEVEL" \n"
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__SYNC(full, loongson3_war) " \n"
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"1:" __LL "%1, %2 # local_add_return \n"
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" addu %0, %1, %3 \n"
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__SC "%0, %2 \n"
···
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__asm__ __volatile__(
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" .set push \n"
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" .set arch=r4000 \n"
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__SYNC(full, loongson3_war) " \n"
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"1:" __LL "%1, %2 # local_sub_return \n"
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" subu %0, %1, %3 \n"
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__SC "%0, %2 \n"
···
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__asm__ __volatile__(
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" .set push \n"
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" .set "MIPS_ISA_ARCH_LEVEL" \n"
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__SYNC(full, loongson3_war) " \n"
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"1:" __LL "%1, %2 # local_sub_return \n"
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" subu %0, %1, %3 \n"
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__SC "%0, %2 \n"