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sparc: bpf: eliminate zero extension code-gen

Cc: David S. Miller <davem@davemloft.net>
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>

authored by

Jiong Wang and committed by
Alexei Starovoitov 3e2a33cf 591006b9

+27 -2
+27 -2
arch/sparc/net/bpf_jit_comp_64.c
··· 908 908 /* dst = src */ 909 909 case BPF_ALU | BPF_MOV | BPF_X: 910 910 emit_alu3_K(SRL, src, 0, dst, ctx); 911 + if (insn_is_zext(&insn[1])) 912 + return 1; 911 913 break; 912 914 case BPF_ALU64 | BPF_MOV | BPF_X: 913 915 emit_reg_move(src, dst, ctx); ··· 944 942 case BPF_ALU | BPF_DIV | BPF_X: 945 943 emit_write_y(G0, ctx); 946 944 emit_alu(DIV, src, dst, ctx); 945 + if (insn_is_zext(&insn[1])) 946 + return 1; 947 947 break; 948 948 case BPF_ALU64 | BPF_DIV | BPF_X: 949 949 emit_alu(UDIVX, src, dst, ctx); ··· 979 975 break; 980 976 case BPF_ALU | BPF_RSH | BPF_X: 981 977 emit_alu(SRL, src, dst, ctx); 978 + if (insn_is_zext(&insn[1])) 979 + return 1; 982 980 break; 983 981 case BPF_ALU64 | BPF_RSH | BPF_X: 984 982 emit_alu(SRLX, src, dst, ctx); ··· 1003 997 case 16: 1004 998 emit_alu_K(SLL, dst, 16, ctx); 1005 999 emit_alu_K(SRL, dst, 16, ctx); 1000 + if (insn_is_zext(&insn[1])) 1001 + return 1; 1006 1002 break; 1007 1003 case 32: 1008 - emit_alu_K(SRL, dst, 0, ctx); 1004 + if (!ctx->prog->aux->verifier_zext) 1005 + emit_alu_K(SRL, dst, 0, ctx); 1009 1006 break; 1010 1007 case 64: 1011 1008 /* nop */ ··· 1030 1021 emit_alu3_K(AND, dst, 0xff, dst, ctx); 1031 1022 emit_alu3_K(SLL, tmp, 8, tmp, ctx); 1032 1023 emit_alu(OR, tmp, dst, ctx); 1024 + if (insn_is_zext(&insn[1])) 1025 + return 1; 1033 1026 break; 1034 1027 1035 1028 case 32: ··· 1048 1037 emit_alu3_K(AND, dst, 0xff, dst, ctx); /* dst = dst & 0xff */ 1049 1038 emit_alu3_K(SLL, dst, 24, dst, ctx); /* dst = dst << 24 */ 1050 1039 emit_alu(OR, tmp, dst, ctx); /* dst = dst | tmp */ 1040 + if (insn_is_zext(&insn[1])) 1041 + return 1; 1051 1042 break; 1052 1043 1053 1044 case 64: ··· 1063 1050 /* dst = imm */ 1064 1051 case BPF_ALU | BPF_MOV | BPF_K: 1065 1052 emit_loadimm32(imm, dst, ctx); 1053 + if (insn_is_zext(&insn[1])) 1054 + return 1; 1066 1055 break; 1067 1056 case BPF_ALU64 | BPF_MOV | BPF_K: 1068 1057 emit_loadimm_sext(imm, dst, ctx); ··· 1147 1132 break; 1148 1133 case BPF_ALU | BPF_RSH | BPF_K: 1149 1134 emit_alu_K(SRL, dst, imm, ctx); 1135 + if (insn_is_zext(&insn[1])) 1136 + return 1; 1150 1137 break; 1151 1138 case BPF_ALU64 | BPF_RSH | BPF_K: 1152 1139 emit_alu_K(SRLX, dst, imm, ctx); ··· 1161 1144 break; 1162 1145 1163 1146 do_alu32_trunc: 1164 - if (BPF_CLASS(code) == BPF_ALU) 1147 + if (BPF_CLASS(code) == BPF_ALU && 1148 + !ctx->prog->aux->verifier_zext) 1165 1149 emit_alu_K(SRL, dst, 0, ctx); 1166 1150 break; 1167 1151 ··· 1283 1265 rs2 = RS2(tmp); 1284 1266 } 1285 1267 emit(opcode | RS1(src) | rs2 | RD(dst), ctx); 1268 + if (opcode != LD64 && insn_is_zext(&insn[1])) 1269 + return 1; 1286 1270 break; 1287 1271 } 1288 1272 /* ST: *(size *)(dst + off) = imm */ ··· 1450 1430 /* We are guaranteed to have aligned memory. */ 1451 1431 for (ptr = area; size >= sizeof(u32); size -= sizeof(u32)) 1452 1432 *ptr++ = 0x91d02005; /* ta 5 */ 1433 + } 1434 + 1435 + bool bpf_jit_needs_zext(void) 1436 + { 1437 + return true; 1453 1438 } 1454 1439 1455 1440 struct sparc64_jit_data {