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ARM: OMAP2+: Drop legacy platform data for omap4 l3
We can now probe interconnects with simple-pm-bus and genpd.
Let's drop the legacy data along with the ti,hwmods property and flip
over to using simple-pm-bus instead of simple-bus.
Signed-off-by: Tony Lindgren <tony@atomide.com>
+1
-203
+1
-2
arch/arm/boot/dts/omap4.dtsi
+1
-2
arch/arm/boot/dts/omap4.dtsi
···
107
107
* hierarchy.
108
108
*/
109
109
ocp {
110
-
compatible = "simple-bus";
110
+
compatible = "simple-pm-bus";
111
111
power-domains = <&prm_l4per>;
112
112
clocks = <&l3_1_clkctrl OMAP4_L3_MAIN_1_CLKCTRL 0>,
113
113
<&l3_2_clkctrl OMAP4_L3_MAIN_2_CLKCTRL 0>,
···
115
115
#address-cells = <1>;
116
116
#size-cells = <1>;
117
117
ranges;
118
-
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
119
118
120
119
l3-noc@44000000 {
121
120
compatible = "ti,omap4-l3-noc";
-201
arch/arm/mach-omap2/omap_hwmod_44xx_data.c
-201
arch/arm/mach-omap2/omap_hwmod_44xx_data.c
···
31
31
*/
32
32
33
33
/*
34
-
* 'l3' class
35
-
* instance(s): l3_instr, l3_main_1, l3_main_2, l3_main_3
36
-
*/
37
-
static struct omap_hwmod_class omap44xx_l3_hwmod_class = {
38
-
.name = "l3",
39
-
};
40
-
41
-
/* l3_instr */
42
-
static struct omap_hwmod omap44xx_l3_instr_hwmod = {
43
-
.name = "l3_instr",
44
-
.class = &omap44xx_l3_hwmod_class,
45
-
.clkdm_name = "l3_instr_clkdm",
46
-
.prcm = {
47
-
.omap4 = {
48
-
.clkctrl_offs = OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET,
49
-
.context_offs = OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET,
50
-
.modulemode = MODULEMODE_HWCTRL,
51
-
},
52
-
},
53
-
};
54
-
55
-
/* l3_main_1 */
56
-
static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
57
-
.name = "l3_main_1",
58
-
.class = &omap44xx_l3_hwmod_class,
59
-
.clkdm_name = "l3_1_clkdm",
60
-
.prcm = {
61
-
.omap4 = {
62
-
.clkctrl_offs = OMAP4_CM_L3_1_L3_1_CLKCTRL_OFFSET,
63
-
.context_offs = OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET,
64
-
},
65
-
},
66
-
};
67
-
68
-
/* l3_main_2 */
69
-
static struct omap_hwmod omap44xx_l3_main_2_hwmod = {
70
-
.name = "l3_main_2",
71
-
.class = &omap44xx_l3_hwmod_class,
72
-
.clkdm_name = "l3_2_clkdm",
73
-
.prcm = {
74
-
.omap4 = {
75
-
.clkctrl_offs = OMAP4_CM_L3_2_L3_2_CLKCTRL_OFFSET,
76
-
.context_offs = OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET,
77
-
},
78
-
},
79
-
};
80
-
81
-
/* l3_main_3 */
82
-
static struct omap_hwmod omap44xx_l3_main_3_hwmod = {
83
-
.name = "l3_main_3",
84
-
.class = &omap44xx_l3_hwmod_class,
85
-
.clkdm_name = "l3_instr_clkdm",
86
-
.prcm = {
87
-
.omap4 = {
88
-
.clkctrl_offs = OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET,
89
-
.context_offs = OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET,
90
-
.modulemode = MODULEMODE_HWCTRL,
91
-
},
92
-
},
93
-
};
94
-
95
-
/*
96
-
* 'ocp_wp_noc' class
97
-
* instance(s): ocp_wp_noc
98
-
*/
99
-
static struct omap_hwmod_class omap44xx_ocp_wp_noc_hwmod_class = {
100
-
.name = "ocp_wp_noc",
101
-
};
102
-
103
-
/* ocp_wp_noc */
104
-
static struct omap_hwmod omap44xx_ocp_wp_noc_hwmod = {
105
-
.name = "ocp_wp_noc",
106
-
.class = &omap44xx_ocp_wp_noc_hwmod_class,
107
-
.clkdm_name = "l3_instr_clkdm",
108
-
.prcm = {
109
-
.omap4 = {
110
-
.clkctrl_offs = OMAP4_CM_L3INSTR_OCP_WP1_CLKCTRL_OFFSET,
111
-
.context_offs = OMAP4_RM_L3INSTR_OCP_WP1_CONTEXT_OFFSET,
112
-
.modulemode = MODULEMODE_HWCTRL,
113
-
},
114
-
},
115
-
};
116
-
117
-
/*
118
34
* Modules omap_hwmod structures
119
35
*
120
36
* The following IPs are excluded for the moment because:
···
42
126
*/
43
127
44
128
/*
45
-
* 'ocmc_ram' class
46
-
* top-level core on-chip ram
47
-
*/
48
-
49
-
static struct omap_hwmod_class omap44xx_ocmc_ram_hwmod_class = {
50
-
.name = "ocmc_ram",
51
-
};
52
-
53
-
/* ocmc_ram */
54
-
static struct omap_hwmod omap44xx_ocmc_ram_hwmod = {
55
-
.name = "ocmc_ram",
56
-
.class = &omap44xx_ocmc_ram_hwmod_class,
57
-
.clkdm_name = "l3_2_clkdm",
58
-
.prcm = {
59
-
.omap4 = {
60
-
.clkctrl_offs = OMAP4_CM_L3_2_OCMC_RAM_CLKCTRL_OFFSET,
61
-
.context_offs = OMAP4_RM_L3_2_OCMC_RAM_CONTEXT_OFFSET,
62
-
},
63
-
},
64
-
};
65
-
66
-
/*
67
-
* 'sl2if' class
68
-
* shared level 2 memory interface
69
-
*/
70
-
71
-
static struct omap_hwmod_class omap44xx_sl2if_hwmod_class = {
72
-
.name = "sl2if",
73
-
};
74
-
75
-
/* sl2if */
76
-
static struct omap_hwmod omap44xx_sl2if_hwmod = {
77
-
.name = "sl2if",
78
-
.class = &omap44xx_sl2if_hwmod_class,
79
-
.clkdm_name = "ivahd_clkdm",
80
-
.prcm = {
81
-
.omap4 = {
82
-
.clkctrl_offs = OMAP4_CM_IVAHD_SL2_CLKCTRL_OFFSET,
83
-
.context_offs = OMAP4_RM_IVAHD_SL2_CONTEXT_OFFSET,
84
-
.modulemode = MODULEMODE_HWCTRL,
85
-
},
86
-
},
87
-
};
88
-
89
-
/*
90
129
* interfaces
91
130
*/
92
131
93
-
/* l3_main_3 -> l3_instr */
94
-
static struct omap_hwmod_ocp_if omap44xx_l3_main_3__l3_instr = {
95
-
.master = &omap44xx_l3_main_3_hwmod,
96
-
.slave = &omap44xx_l3_instr_hwmod,
97
-
.clk = "l3_div_ck",
98
-
.user = OCP_USER_MPU | OCP_USER_SDMA,
99
-
};
100
-
101
-
/* ocp_wp_noc -> l3_instr */
102
-
static struct omap_hwmod_ocp_if omap44xx_ocp_wp_noc__l3_instr = {
103
-
.master = &omap44xx_ocp_wp_noc_hwmod,
104
-
.slave = &omap44xx_l3_instr_hwmod,
105
-
.clk = "l3_div_ck",
106
-
.user = OCP_USER_MPU | OCP_USER_SDMA,
107
-
};
108
-
109
-
/* l3_main_2 -> l3_main_1 */
110
-
static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_1 = {
111
-
.master = &omap44xx_l3_main_2_hwmod,
112
-
.slave = &omap44xx_l3_main_1_hwmod,
113
-
.clk = "l3_div_ck",
114
-
.user = OCP_USER_MPU | OCP_USER_SDMA,
115
-
};
116
-
117
-
/* l3_main_1 -> l3_main_2 */
118
-
static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = {
119
-
.master = &omap44xx_l3_main_1_hwmod,
120
-
.slave = &omap44xx_l3_main_2_hwmod,
121
-
.clk = "l3_div_ck",
122
-
.user = OCP_USER_MPU,
123
-
};
124
-
125
-
/* l3_main_1 -> l3_main_3 */
126
-
static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = {
127
-
.master = &omap44xx_l3_main_1_hwmod,
128
-
.slave = &omap44xx_l3_main_3_hwmod,
129
-
.clk = "l3_div_ck",
130
-
.user = OCP_USER_MPU,
131
-
};
132
-
133
-
/* l3_main_2 -> l3_main_3 */
134
-
static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_3 = {
135
-
.master = &omap44xx_l3_main_2_hwmod,
136
-
.slave = &omap44xx_l3_main_3_hwmod,
137
-
.clk = "l3_div_ck",
138
-
.user = OCP_USER_MPU | OCP_USER_SDMA,
139
-
};
140
-
141
-
/* l3_main_2 -> ocmc_ram */
142
-
static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ocmc_ram = {
143
-
.master = &omap44xx_l3_main_2_hwmod,
144
-
.slave = &omap44xx_ocmc_ram_hwmod,
145
-
.clk = "l3_div_ck",
146
-
.user = OCP_USER_MPU | OCP_USER_SDMA,
147
-
};
148
-
149
-
/* l3_main_2 -> sl2if */
150
-
static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l3_main_2__sl2if = {
151
-
.master = &omap44xx_l3_main_2_hwmod,
152
-
.slave = &omap44xx_sl2if_hwmod,
153
-
.clk = "l3_div_ck",
154
-
.user = OCP_USER_MPU | OCP_USER_SDMA,
155
-
};
156
-
157
132
static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
158
-
&omap44xx_l3_main_3__l3_instr,
159
-
&omap44xx_ocp_wp_noc__l3_instr,
160
-
&omap44xx_l3_main_2__l3_main_1,
161
-
&omap44xx_l3_main_1__l3_main_2,
162
-
&omap44xx_l3_main_1__l3_main_3,
163
-
&omap44xx_l3_main_2__l3_main_3,
164
-
&omap44xx_l3_main_2__ocmc_ram,
165
-
/* &omap44xx_l3_main_2__sl2if, */
166
133
NULL,
167
134
};
168
135