staging: rtl8723au: hal: rtl8723a_hal_init: fixed 4 spelling errors.

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Fixed four spelling errors.

Signed-off-by: Jiading Gai <jiading.gai.github@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Jiading Gai and committed by

Greg Kroah-Hartman 10 years ago 3d7a8477 12e2a341

+4 -4

1 changed file

expand all

drivers

staging

rtl8723au

hal

rtl8723a_hal_init.c

+4 -4

drivers/staging/rtl8723au/hal/rtl8723a_hal_init.c

··· 1044 1044 u8 val; 1045 1045 1046 1046 val = rtl8723au_read8(padapter, REG_LEDCFG2); 1047 - /* Let 8051 take control antenna settting */ 1047 + /* Let 8051 take control antenna setting */ 1048 1048 val |= BIT(7); /* DPDT_SEL_EN, 0x4C[23] */ 1049 1049 rtl8723au_write8(padapter, REG_LEDCFG2, val); 1050 1050 } ··· 1054 1054 u8 val; 1055 1055 1056 1056 val = rtl8723au_read8(padapter, REG_LEDCFG2); 1057 - /* Let 8051 take control antenna settting */ 1057 + /* Let 8051 take control antenna setting */ 1058 1058 if (!(val & BIT(7))) { 1059 1059 val |= BIT(7); /* DPDT_SEL_EN, 0x4C[23] */ 1060 1060 rtl8723au_write8(padapter, REG_LEDCFG2, val); ··· 1066 1066 u8 val; 1067 1067 1068 1068 val = rtl8723au_read8(padapter, REG_LEDCFG2); 1069 - /* Let 8051 take control antenna settting */ 1069 + /* Let 8051 take control antenna setting */ 1070 1070 val &= ~BIT(7); /* DPDT_SEL_EN, clear 0x4C[23] */ 1071 1071 rtl8723au_write8(padapter, REG_LEDCFG2, val); 1072 1072 } ··· 1297 1297 /* If we want to SS mode, we can not reset 8051. */ 1298 1298 if ((val8 & BIT(1)) && padapter->bFWReady) { 1299 1299 /* IF fw in RAM code, do reset */ 1300 - /* 2010/08/25 MH Accordign to RD alfred's 1300 + /* 2010/08/25 MH According to RD alfred's 1301 1301 suggestion, we need to disable other */ 1302 1302 /* HRCV INT to influence 8051 reset. */ 1303 1303 rtl8723au_write8(padapter, REG_FWIMR, 0x20);