+10
-1
drivers/i2c/busses/i2c-stm32f7.c
+10
-1
drivers/i2c/busses/i2c-stm32f7.c
···
57
57
#define STM32F7_I2C_CR1_RXDMAEN BIT(15)
58
58
#define STM32F7_I2C_CR1_TXDMAEN BIT(14)
59
59
#define STM32F7_I2C_CR1_ANFOFF BIT(12)
60
+
#define STM32F7_I2C_CR1_DNF_MASK GENMASK(11, 8)
61
+
#define STM32F7_I2C_CR1_DNF(n) (((n) & 0xf) << 8)
60
62
#define STM32F7_I2C_CR1_ERRIE BIT(7)
61
63
#define STM32F7_I2C_CR1_TCIE BIT(6)
62
64
#define STM32F7_I2C_CR1_STOPIE BIT(5)
···
162
160
};
163
161
164
162
#define STM32F7_I2C_DNF_DEFAULT 0
165
-
#define STM32F7_I2C_DNF_MAX 16
163
+
#define STM32F7_I2C_DNF_MAX 15
166
164
167
165
#define STM32F7_I2C_ANALOG_FILTER_ENABLE 1
168
166
#define STM32F7_I2C_ANALOG_FILTER_DELAY_MIN 50 /* ns */
···
727
725
else
728
726
stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1,
729
727
STM32F7_I2C_CR1_ANFOFF);
728
+
729
+
/* Program the Digital Filter */
730
+
stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1,
731
+
STM32F7_I2C_CR1_DNF_MASK);
732
+
stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1,
733
+
STM32F7_I2C_CR1_DNF(i2c_dev->setup.dnf));
734
+
730
735
stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1,
731
736
STM32F7_I2C_CR1_PE);
732
737
}