tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

gpio-f7188x: fix base values conflicts with other gpio pins

switch pin base from static to automatic allocation to
avoid conflicts and align with other gpio chip drivers

Signed-off-by: xingtong.wu <xingtong.wu@siemens.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

authored by

xingtong.wu and committed by
Bartosz Golaszewski 3d15d17f adb5f156

+69 -69
+69 -69
drivers/gpio/gpio-f7188x.c
··· 163 163 static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset, 164 164 unsigned long config); 165 165 166 - #define F7188X_GPIO_BANK(_base, _ngpio, _regbase, _label) \ 166 + #define F7188X_GPIO_BANK(_ngpio, _regbase, _label) \ 167 167 { \ 168 168 .chip = { \ 169 169 .label = _label, \ ··· 174 174 .direction_output = f7188x_gpio_direction_out, \ 175 175 .set = f7188x_gpio_set, \ 176 176 .set_config = f7188x_gpio_set_config, \ 177 - .base = _base, \ 177 + .base = -1, \ 178 178 .ngpio = _ngpio, \ 179 179 .can_sleep = true, \ 180 180 }, \ ··· 191 191 #define f7188x_gpio_data_single(type) ((type) == nct6126d) 192 192 193 193 static struct f7188x_gpio_bank f71869_gpio_bank[] = { 194 - F7188X_GPIO_BANK(0, 6, 0xF0, DRVNAME "-0"), 195 - F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"), 196 - F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"), 197 - F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"), 198 - F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"), 199 - F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"), 200 - F7188X_GPIO_BANK(60, 6, 0x90, DRVNAME "-6"), 194 + F7188X_GPIO_BANK(6, 0xF0, DRVNAME "-0"), 195 + F7188X_GPIO_BANK(8, 0xE0, DRVNAME "-1"), 196 + F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"), 197 + F7188X_GPIO_BANK(8, 0xC0, DRVNAME "-3"), 198 + F7188X_GPIO_BANK(8, 0xB0, DRVNAME "-4"), 199 + F7188X_GPIO_BANK(5, 0xA0, DRVNAME "-5"), 200 + F7188X_GPIO_BANK(6, 0x90, DRVNAME "-6"), 201 201 }; 202 202 203 203 static struct f7188x_gpio_bank f71869a_gpio_bank[] = { 204 - F7188X_GPIO_BANK(0, 6, 0xF0, DRVNAME "-0"), 205 - F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"), 206 - F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"), 207 - F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"), 208 - F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"), 209 - F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"), 210 - F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"), 211 - F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"), 204 + F7188X_GPIO_BANK(6, 0xF0, DRVNAME "-0"), 205 + F7188X_GPIO_BANK(8, 0xE0, DRVNAME "-1"), 206 + F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"), 207 + F7188X_GPIO_BANK(8, 0xC0, DRVNAME "-3"), 208 + F7188X_GPIO_BANK(8, 0xB0, DRVNAME "-4"), 209 + F7188X_GPIO_BANK(5, 0xA0, DRVNAME "-5"), 210 + F7188X_GPIO_BANK(8, 0x90, DRVNAME "-6"), 211 + F7188X_GPIO_BANK(8, 0x80, DRVNAME "-7"), 212 212 }; 213 213 214 214 static struct f7188x_gpio_bank f71882_gpio_bank[] = { 215 - F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"), 216 - F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"), 217 - F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"), 218 - F7188X_GPIO_BANK(30, 4, 0xC0, DRVNAME "-3"), 219 - F7188X_GPIO_BANK(40, 4, 0xB0, DRVNAME "-4"), 215 + F7188X_GPIO_BANK(8, 0xF0, DRVNAME "-0"), 216 + F7188X_GPIO_BANK(8, 0xE0, DRVNAME "-1"), 217 + F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"), 218 + F7188X_GPIO_BANK(4, 0xC0, DRVNAME "-3"), 219 + F7188X_GPIO_BANK(4, 0xB0, DRVNAME "-4"), 220 220 }; 221 221 222 222 static struct f7188x_gpio_bank f71889a_gpio_bank[] = { 223 - F7188X_GPIO_BANK(0, 7, 0xF0, DRVNAME "-0"), 224 - F7188X_GPIO_BANK(10, 7, 0xE0, DRVNAME "-1"), 225 - F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"), 226 - F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"), 227 - F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"), 228 - F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"), 229 - F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"), 230 - F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"), 223 + F7188X_GPIO_BANK(7, 0xF0, DRVNAME "-0"), 224 + F7188X_GPIO_BANK(7, 0xE0, DRVNAME "-1"), 225 + F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"), 226 + F7188X_GPIO_BANK(8, 0xC0, DRVNAME "-3"), 227 + F7188X_GPIO_BANK(8, 0xB0, DRVNAME "-4"), 228 + F7188X_GPIO_BANK(5, 0xA0, DRVNAME "-5"), 229 + F7188X_GPIO_BANK(8, 0x90, DRVNAME "-6"), 230 + F7188X_GPIO_BANK(8, 0x80, DRVNAME "-7"), 231 231 }; 232 232 233 233 static struct f7188x_gpio_bank f71889_gpio_bank[] = { 234 - F7188X_GPIO_BANK(0, 7, 0xF0, DRVNAME "-0"), 235 - F7188X_GPIO_BANK(10, 7, 0xE0, DRVNAME "-1"), 236 - F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"), 237 - F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"), 238 - F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"), 239 - F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"), 240 - F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"), 241 - F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"), 234 + F7188X_GPIO_BANK(7, 0xF0, DRVNAME "-0"), 235 + F7188X_GPIO_BANK(7, 0xE0, DRVNAME "-1"), 236 + F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"), 237 + F7188X_GPIO_BANK(8, 0xC0, DRVNAME "-3"), 238 + F7188X_GPIO_BANK(8, 0xB0, DRVNAME "-4"), 239 + F7188X_GPIO_BANK(5, 0xA0, DRVNAME "-5"), 240 + F7188X_GPIO_BANK(8, 0x90, DRVNAME "-6"), 241 + F7188X_GPIO_BANK(8, 0x80, DRVNAME "-7"), 242 242 }; 243 243 244 244 static struct f7188x_gpio_bank f81866_gpio_bank[] = { 245 - F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"), 246 - F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"), 247 - F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"), 248 - F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"), 249 - F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"), 250 - F7188X_GPIO_BANK(50, 8, 0xA0, DRVNAME "-5"), 251 - F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"), 252 - F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"), 253 - F7188X_GPIO_BANK(80, 8, 0x88, DRVNAME "-8"), 245 + F7188X_GPIO_BANK(8, 0xF0, DRVNAME "-0"), 246 + F7188X_GPIO_BANK(8, 0xE0, DRVNAME "-1"), 247 + F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"), 248 + F7188X_GPIO_BANK(8, 0xC0, DRVNAME "-3"), 249 + F7188X_GPIO_BANK(8, 0xB0, DRVNAME "-4"), 250 + F7188X_GPIO_BANK(8, 0xA0, DRVNAME "-5"), 251 + F7188X_GPIO_BANK(8, 0x90, DRVNAME "-6"), 252 + F7188X_GPIO_BANK(8, 0x80, DRVNAME "-7"), 253 + F7188X_GPIO_BANK(8, 0x88, DRVNAME "-8"), 254 254 }; 255 255 256 256 257 257 static struct f7188x_gpio_bank f81804_gpio_bank[] = { 258 - F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"), 259 - F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"), 260 - F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"), 261 - F7188X_GPIO_BANK(50, 8, 0xA0, DRVNAME "-3"), 262 - F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-4"), 263 - F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-5"), 264 - F7188X_GPIO_BANK(90, 8, 0x98, DRVNAME "-6"), 258 + F7188X_GPIO_BANK(8, 0xF0, DRVNAME "-0"), 259 + F7188X_GPIO_BANK(8, 0xE0, DRVNAME "-1"), 260 + F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"), 261 + F7188X_GPIO_BANK(8, 0xA0, DRVNAME "-3"), 262 + F7188X_GPIO_BANK(8, 0x90, DRVNAME "-4"), 263 + F7188X_GPIO_BANK(8, 0x80, DRVNAME "-5"), 264 + F7188X_GPIO_BANK(8, 0x98, DRVNAME "-6"), 265 265 }; 266 266 267 267 static struct f7188x_gpio_bank f81865_gpio_bank[] = { 268 - F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"), 269 - F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"), 270 - F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"), 271 - F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"), 272 - F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"), 273 - F7188X_GPIO_BANK(50, 8, 0xA0, DRVNAME "-5"), 274 - F7188X_GPIO_BANK(60, 5, 0x90, DRVNAME "-6"), 268 + F7188X_GPIO_BANK(8, 0xF0, DRVNAME "-0"), 269 + F7188X_GPIO_BANK(8, 0xE0, DRVNAME "-1"), 270 + F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"), 271 + F7188X_GPIO_BANK(8, 0xC0, DRVNAME "-3"), 272 + F7188X_GPIO_BANK(8, 0xB0, DRVNAME "-4"), 273 + F7188X_GPIO_BANK(8, 0xA0, DRVNAME "-5"), 274 + F7188X_GPIO_BANK(5, 0x90, DRVNAME "-6"), 275 275 }; 276 276 277 277 static struct f7188x_gpio_bank nct6126d_gpio_bank[] = { 278 - F7188X_GPIO_BANK(0, 8, 0xE0, DRVNAME "-0"), 279 - F7188X_GPIO_BANK(10, 8, 0xE4, DRVNAME "-1"), 280 - F7188X_GPIO_BANK(20, 8, 0xE8, DRVNAME "-2"), 281 - F7188X_GPIO_BANK(30, 8, 0xEC, DRVNAME "-3"), 282 - F7188X_GPIO_BANK(40, 8, 0xF0, DRVNAME "-4"), 283 - F7188X_GPIO_BANK(50, 8, 0xF4, DRVNAME "-5"), 284 - F7188X_GPIO_BANK(60, 8, 0xF8, DRVNAME "-6"), 285 - F7188X_GPIO_BANK(70, 8, 0xFC, DRVNAME "-7"), 278 + F7188X_GPIO_BANK(8, 0xE0, DRVNAME "-0"), 279 + F7188X_GPIO_BANK(8, 0xE4, DRVNAME "-1"), 280 + F7188X_GPIO_BANK(8, 0xE8, DRVNAME "-2"), 281 + F7188X_GPIO_BANK(8, 0xEC, DRVNAME "-3"), 282 + F7188X_GPIO_BANK(8, 0xF0, DRVNAME "-4"), 283 + F7188X_GPIO_BANK(8, 0xF4, DRVNAME "-5"), 284 + F7188X_GPIO_BANK(8, 0xF8, DRVNAME "-6"), 285 + F7188X_GPIO_BANK(8, 0xFC, DRVNAME "-7"), 286 286 }; 287 287 288 288 static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)