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locking/Documentation: Clarify that ACQUIRE applies to loads, RELEASE applies to stores

For compound atomics performing both a load and a store operation, make
it clear that _acquire and _release variants refer only to the load and
store portions of compound atomic. For example, xchg_acquire is an xchg
operation where the load takes on ACQUIRE semantics.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: corbet@lwn.net
Cc: dave@stgolabs.net
Cc: dhowells@redhat.com
Cc: linux-doc@vger.kernel.org
Link: http://lkml.kernel.org/r/1461691328-5429-3-git-send-email-paulmck@linux.vnet.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>

authored by

Will Deacon and committed by
Ingo Molnar
3cfe2e8b 8d4840e8

+5
+5
Documentation/memory-barriers.txt
··· 498 498 This means that ACQUIRE acts as a minimal "acquire" operation and 499 499 RELEASE acts as a minimal "release" operation. 500 500 501 + A subset of the atomic operations described in atomic_ops.txt have ACQUIRE 502 + and RELEASE variants in addition to fully-ordered and relaxed (no barrier 503 + semantics) definitions. For compound atomics performing both a load and a 504 + store, ACQUIRE semantics apply only to the load and RELEASE semantics apply 505 + only to the store portion of the operation. 501 506 502 507 Memory barriers are only required where there's a possibility of interaction 503 508 between two CPUs or between a CPU and a device. If it can be guaranteed that