Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Add audio support for the Renesas RZ/G3S SoC

Merge series from Claudiu <claudiu.beznea@tuxon.dev>:

Series enables the audio support for the Renesas RZ/G3S
SoC along with runtime PM and suspend to RAM.

+139 -106
+1 -18
Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml
··· 19 19 - renesas,r9a07g043-ssi # RZ/G2UL and RZ/Five 20 20 - renesas,r9a07g044-ssi # RZ/G2{L,LC} 21 21 - renesas,r9a07g054-ssi # RZ/V2L 22 + - renesas,r9a08g045-ssi # RZ/G3S 22 23 - const: renesas,rz-ssi 23 24 24 25 reg: ··· 58 57 dmas: 59 58 minItems: 1 60 59 maxItems: 2 61 - description: 62 - The first cell represents a phandle to dmac. 63 - The second cell specifies the encoded MID/RID values of the SSI port 64 - connected to the DMA client and the slave channel configuration 65 - parameters. 66 - bits[0:9] - Specifies MID/RID value of a SSI channel as below 67 - MID/RID value of SSI rx0 = 0x256 68 - MID/RID value of SSI tx0 = 0x255 69 - MID/RID value of SSI rx1 = 0x25a 70 - MID/RID value of SSI tx1 = 0x259 71 - MID/RID value of SSI rt2 = 0x25f 72 - MID/RID value of SSI rx3 = 0x262 73 - MID/RID value of SSI tx3 = 0x261 74 - bit[10] - HIEN = 1, Detects a request in response to the rising edge 75 - of the signal 76 - bit[11] - LVL = 0, Detects based on the edge 77 - bits[12:14] - AM = 2, Bus cycle mode 78 - bit[15] - TM = 0, Single transfer mode 79 60 80 61 dma-names: 81 62 oneOf:
+138 -88
sound/soc/renesas/rz-ssi.c
··· 9 9 #include <linux/clk.h> 10 10 #include <linux/dmaengine.h> 11 11 #include <linux/io.h> 12 + #include <linux/iopoll.h> 12 13 #include <linux/module.h> 13 14 #include <linux/pm_runtime.h> 14 15 #include <linux/reset.h> ··· 72 71 #define PREALLOC_BUFFER (SZ_32K) 73 72 #define PREALLOC_BUFFER_MAX (SZ_32K) 74 73 75 - #define SSI_RATES SNDRV_PCM_RATE_8000_48000 /* 8k-44.1kHz */ 74 + #define SSI_RATES SNDRV_PCM_RATE_8000_48000 /* 8k-48kHz */ 76 75 #define SSI_FMTS SNDRV_PCM_FMTBIT_S16_LE 77 76 #define SSI_CHAN_MIN 2 78 77 #define SSI_CHAN_MAX 2 ··· 100 99 101 100 struct rz_ssi_priv { 102 101 void __iomem *base; 103 - struct platform_device *pdev; 104 102 struct reset_control *rstc; 105 103 struct device *dev; 106 104 struct clk *sfr_clk; ··· 163 163 writel(val, (priv->base + reg)); 164 164 } 165 165 166 - static inline struct snd_soc_dai * 167 - rz_ssi_get_dai(struct snd_pcm_substream *substream) 168 - { 169 - struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); 170 - 171 - return snd_soc_rtd_to_cpu(rtd, 0); 172 - } 173 - 174 - static inline bool rz_ssi_stream_is_play(struct rz_ssi_priv *ssi, 175 - struct snd_pcm_substream *substream) 166 + static inline bool rz_ssi_stream_is_play(struct snd_pcm_substream *substream) 176 167 { 177 168 return substream->stream == SNDRV_PCM_STREAM_PLAYBACK; 178 169 } ··· 235 244 static void rz_ssi_stream_quit(struct rz_ssi_priv *ssi, 236 245 struct rz_ssi_stream *strm) 237 246 { 238 - struct snd_soc_dai *dai = rz_ssi_get_dai(strm->substream); 247 + struct device *dev = ssi->dev; 239 248 240 249 rz_ssi_set_substream(strm, NULL); 241 250 242 251 if (strm->oerr_num > 0) 243 - dev_info(dai->dev, "overrun = %d\n", strm->oerr_num); 252 + dev_info(dev, "overrun = %d\n", strm->oerr_num); 244 253 245 254 if (strm->uerr_num > 0) 246 - dev_info(dai->dev, "underrun = %d\n", strm->uerr_num); 255 + dev_info(dev, "underrun = %d\n", strm->uerr_num); 247 256 } 248 257 249 258 static int rz_ssi_clk_setup(struct rz_ssi_priv *ssi, unsigned int rate, 250 259 unsigned int channels) 251 260 { 252 - static s8 ckdv[16] = { 1, 2, 4, 8, 16, 32, 64, 128, 253 - 6, 12, 24, 48, 96, -1, -1, -1 }; 261 + static u8 ckdv[] = { 1, 2, 4, 8, 16, 32, 64, 128, 6, 12, 24, 48, 96 }; 254 262 unsigned int channel_bits = 32; /* System Word Length */ 255 263 unsigned long bclk_rate = rate * channels * channel_bits; 256 264 unsigned int div; ··· 308 318 309 319 static void rz_ssi_set_idle(struct rz_ssi_priv *ssi) 310 320 { 311 - int timeout; 321 + u32 tmp; 322 + int ret; 312 323 313 324 /* Disable irqs */ 314 325 rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TUIEN | SSICR_TOIEN | ··· 322 331 SSISR_RUIRQ), 0); 323 332 324 333 /* Wait for idle */ 325 - timeout = 100; 326 - while (--timeout) { 327 - if (rz_ssi_reg_readl(ssi, SSISR) & SSISR_IIRQ) 328 - break; 329 - udelay(1); 330 - } 331 - 332 - if (!timeout) 333 - dev_info(ssi->dev, "timeout waiting for SSI idle\n"); 334 + ret = readl_poll_timeout_atomic(ssi->base + SSISR, tmp, (tmp & SSISR_IIRQ), 1, 100); 335 + if (ret) 336 + dev_warn_ratelimited(ssi->dev, "timeout waiting for SSI idle\n"); 334 337 335 338 /* Hold FIFOs in reset */ 336 339 rz_ssi_reg_mask_setl(ssi, SSIFCR, 0, SSIFCR_FIFO_RST); ··· 332 347 333 348 static int rz_ssi_start(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm) 334 349 { 335 - bool is_play = rz_ssi_stream_is_play(ssi, strm->substream); 350 + bool is_play = rz_ssi_stream_is_play(strm->substream); 336 351 bool is_full_duplex; 337 352 u32 ssicr, ssifcr; 338 353 ··· 388 403 return 0; 389 404 } 390 405 406 + static int rz_ssi_swreset(struct rz_ssi_priv *ssi) 407 + { 408 + u32 tmp; 409 + 410 + rz_ssi_reg_mask_setl(ssi, SSIFCR, 0, SSIFCR_SSIRST); 411 + rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_SSIRST, 0); 412 + return readl_poll_timeout_atomic(ssi->base + SSIFCR, tmp, !(tmp & SSIFCR_SSIRST), 1, 5); 413 + } 414 + 391 415 static int rz_ssi_stop(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm) 392 416 { 393 417 strm->running = 0; ··· 409 415 rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TEN | SSICR_REN, 0); 410 416 411 417 /* Cancel all remaining DMA transactions */ 412 - if (rz_ssi_is_dma_enabled(ssi)) 413 - dmaengine_terminate_async(strm->dma_ch); 418 + if (rz_ssi_is_dma_enabled(ssi)) { 419 + if (ssi->playback.dma_ch) 420 + dmaengine_terminate_async(ssi->playback.dma_ch); 421 + if (ssi->capture.dma_ch) 422 + dmaengine_terminate_async(ssi->capture.dma_ch); 423 + } 414 424 415 425 rz_ssi_set_idle(ssi); 416 426 ··· 678 680 */ 679 681 return 0; 680 682 681 - dir = rz_ssi_stream_is_play(ssi, substream) ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; 683 + dir = rz_ssi_stream_is_play(substream) ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; 682 684 683 685 /* Always transfer 1 period */ 684 686 amount = runtime->period_size; ··· 782 784 return -ENODEV; 783 785 } 784 786 787 + static int rz_ssi_trigger_resume(struct rz_ssi_priv *ssi) 788 + { 789 + int ret; 790 + 791 + if (rz_ssi_is_stream_running(&ssi->playback) || 792 + rz_ssi_is_stream_running(&ssi->capture)) 793 + return 0; 794 + 795 + ret = rz_ssi_swreset(ssi); 796 + if (ret) 797 + return ret; 798 + 799 + return rz_ssi_clk_setup(ssi, ssi->hw_params_cache.rate, 800 + ssi->hw_params_cache.channels); 801 + } 802 + 803 + static void rz_ssi_streams_suspend(struct rz_ssi_priv *ssi) 804 + { 805 + if (rz_ssi_is_stream_running(&ssi->playback) || 806 + rz_ssi_is_stream_running(&ssi->capture)) 807 + return; 808 + 809 + ssi->playback.dma_buffer_pos = 0; 810 + ssi->capture.dma_buffer_pos = 0; 811 + } 812 + 785 813 static int rz_ssi_dai_trigger(struct snd_pcm_substream *substream, int cmd, 786 814 struct snd_soc_dai *dai) 787 815 { ··· 816 792 int ret = 0, i, num_transfer = 1; 817 793 818 794 switch (cmd) { 819 - case SNDRV_PCM_TRIGGER_START: 820 - /* Soft Reset */ 821 - if (!rz_ssi_is_stream_running(&ssi->playback) && 822 - !rz_ssi_is_stream_running(&ssi->capture)) { 823 - rz_ssi_reg_mask_setl(ssi, SSIFCR, 0, SSIFCR_SSIRST); 824 - rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_SSIRST, 0); 825 - udelay(5); 826 - } 795 + case SNDRV_PCM_TRIGGER_RESUME: 796 + ret = rz_ssi_trigger_resume(ssi); 797 + if (ret) 798 + return ret; 827 799 828 - rz_ssi_stream_init(strm, substream); 800 + fallthrough; 801 + 802 + case SNDRV_PCM_TRIGGER_START: 803 + if (cmd == SNDRV_PCM_TRIGGER_START) 804 + rz_ssi_stream_init(strm, substream); 829 805 830 806 if (ssi->dma_rt) { 831 807 bool is_playback; 832 808 833 - is_playback = rz_ssi_stream_is_play(ssi, substream); 809 + is_playback = rz_ssi_stream_is_play(substream); 834 810 ret = rz_ssi_dma_slave_config(ssi, ssi->playback.dma_ch, 835 811 is_playback); 836 812 /* Fallback to pio */ ··· 853 829 854 830 ret = rz_ssi_start(ssi, strm); 855 831 break; 832 + 833 + case SNDRV_PCM_TRIGGER_SUSPEND: 834 + rz_ssi_stop(ssi, strm); 835 + rz_ssi_streams_suspend(ssi); 836 + break; 837 + 856 838 case SNDRV_PCM_TRIGGER_STOP: 857 839 rz_ssi_stop(ssi, strm); 858 840 rz_ssi_stream_quit(ssi, strm); ··· 955 925 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min; 956 926 unsigned int channels = params_channels(params); 957 927 unsigned int rate = params_rate(params); 928 + int ret; 958 929 959 930 if (sample_bits != 16) { 960 931 dev_err(ssi->dev, "Unsupported sample width: %d\n", ··· 982 951 rz_ssi_cache_hw_params(ssi, rate, channels, strm->sample_width, 983 952 sample_bits); 984 953 954 + ret = rz_ssi_swreset(ssi); 955 + if (ret) 956 + return ret; 957 + 985 958 return rz_ssi_clk_setup(ssi, rate, channels); 986 959 } 987 960 ··· 998 963 static const struct snd_pcm_hardware rz_ssi_pcm_hardware = { 999 964 .info = SNDRV_PCM_INFO_INTERLEAVED | 1000 965 SNDRV_PCM_INFO_MMAP | 1001 - SNDRV_PCM_INFO_MMAP_VALID, 966 + SNDRV_PCM_INFO_MMAP_VALID | 967 + SNDRV_PCM_INFO_RESUME, 1002 968 .buffer_bytes_max = PREALLOC_BUFFER, 1003 969 .period_bytes_min = 32, 1004 970 .period_bytes_max = 8192, ··· 1022 986 static snd_pcm_uframes_t rz_ssi_pcm_pointer(struct snd_soc_component *component, 1023 987 struct snd_pcm_substream *substream) 1024 988 { 1025 - struct snd_soc_dai *dai = rz_ssi_get_dai(substream); 989 + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); 990 + struct snd_soc_dai *dai = snd_soc_rtd_to_cpu(rtd, 0); 1026 991 struct rz_ssi_priv *ssi = snd_soc_dai_get_drvdata(dai); 1027 992 struct rz_ssi_stream *strm = rz_ssi_stream_get(ssi, substream); 1028 993 ··· 1068 1031 1069 1032 static int rz_ssi_probe(struct platform_device *pdev) 1070 1033 { 1034 + struct device *dev = &pdev->dev; 1071 1035 struct rz_ssi_priv *ssi; 1072 1036 struct clk *audio_clk; 1073 1037 struct resource *res; 1074 1038 int ret; 1075 1039 1076 - ssi = devm_kzalloc(&pdev->dev, sizeof(*ssi), GFP_KERNEL); 1040 + ssi = devm_kzalloc(dev, sizeof(*ssi), GFP_KERNEL); 1077 1041 if (!ssi) 1078 1042 return -ENOMEM; 1079 1043 1080 - ssi->pdev = pdev; 1081 - ssi->dev = &pdev->dev; 1044 + ssi->dev = dev; 1082 1045 ssi->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); 1083 1046 if (IS_ERR(ssi->base)) 1084 1047 return PTR_ERR(ssi->base); 1085 1048 1086 1049 ssi->phys = res->start; 1087 - ssi->clk = devm_clk_get(&pdev->dev, "ssi"); 1050 + ssi->clk = devm_clk_get(dev, "ssi"); 1088 1051 if (IS_ERR(ssi->clk)) 1089 1052 return PTR_ERR(ssi->clk); 1090 1053 1091 - ssi->sfr_clk = devm_clk_get(&pdev->dev, "ssi_sfr"); 1054 + ssi->sfr_clk = devm_clk_get(dev, "ssi_sfr"); 1092 1055 if (IS_ERR(ssi->sfr_clk)) 1093 1056 return PTR_ERR(ssi->sfr_clk); 1094 1057 1095 - audio_clk = devm_clk_get(&pdev->dev, "audio_clk1"); 1058 + audio_clk = devm_clk_get(dev, "audio_clk1"); 1096 1059 if (IS_ERR(audio_clk)) 1097 1060 return dev_err_probe(&pdev->dev, PTR_ERR(audio_clk), 1098 1061 "no audio clk1"); 1099 1062 1100 1063 ssi->audio_clk_1 = clk_get_rate(audio_clk); 1101 - audio_clk = devm_clk_get(&pdev->dev, "audio_clk2"); 1064 + audio_clk = devm_clk_get(dev, "audio_clk2"); 1102 1065 if (IS_ERR(audio_clk)) 1103 1066 return dev_err_probe(&pdev->dev, PTR_ERR(audio_clk), 1104 1067 "no audio clk2"); ··· 1111 1074 ssi->audio_mck = ssi->audio_clk_1 ? ssi->audio_clk_1 : ssi->audio_clk_2; 1112 1075 1113 1076 /* Detect DMA support */ 1114 - ret = rz_ssi_dma_request(ssi, &pdev->dev); 1077 + ret = rz_ssi_dma_request(ssi, dev); 1115 1078 if (ret < 0) { 1116 - dev_warn(&pdev->dev, "DMA not available, using PIO\n"); 1079 + dev_warn(dev, "DMA not available, using PIO\n"); 1117 1080 ssi->playback.transfer = rz_ssi_pio_send; 1118 1081 ssi->capture.transfer = rz_ssi_pio_recv; 1119 1082 } else { 1120 - dev_info(&pdev->dev, "DMA enabled"); 1083 + dev_info(dev, "DMA enabled"); 1121 1084 ssi->playback.transfer = rz_ssi_dma_transfer; 1122 1085 ssi->capture.transfer = rz_ssi_dma_transfer; 1123 1086 } ··· 1126 1089 ssi->capture.priv = ssi; 1127 1090 1128 1091 spin_lock_init(&ssi->lock); 1129 - dev_set_drvdata(&pdev->dev, ssi); 1092 + dev_set_drvdata(dev, ssi); 1130 1093 1131 1094 /* Error Interrupt */ 1132 1095 ssi->irq_int = platform_get_irq_byname(pdev, "int_req"); 1133 1096 if (ssi->irq_int < 0) { 1134 - rz_ssi_release_dma_channels(ssi); 1135 - return ssi->irq_int; 1097 + ret = ssi->irq_int; 1098 + goto err_release_dma_chs; 1136 1099 } 1137 1100 1138 - ret = devm_request_irq(&pdev->dev, ssi->irq_int, &rz_ssi_interrupt, 1139 - 0, dev_name(&pdev->dev), ssi); 1101 + ret = devm_request_irq(dev, ssi->irq_int, &rz_ssi_interrupt, 1102 + 0, dev_name(dev), ssi); 1140 1103 if (ret < 0) { 1141 - rz_ssi_release_dma_channels(ssi); 1142 - return dev_err_probe(&pdev->dev, ret, 1143 - "irq request error (int_req)\n"); 1104 + dev_err_probe(dev, ret, "irq request error (int_req)\n"); 1105 + goto err_release_dma_chs; 1144 1106 } 1145 1107 1146 1108 if (!rz_ssi_is_dma_enabled(ssi)) { ··· 1151 1115 if (ssi->irq_rt < 0) 1152 1116 return ssi->irq_rt; 1153 1117 1154 - ret = devm_request_irq(&pdev->dev, ssi->irq_rt, 1118 + ret = devm_request_irq(dev, ssi->irq_rt, 1155 1119 &rz_ssi_interrupt, 0, 1156 - dev_name(&pdev->dev), ssi); 1120 + dev_name(dev), ssi); 1157 1121 if (ret < 0) 1158 - return dev_err_probe(&pdev->dev, ret, 1122 + return dev_err_probe(dev, ret, 1159 1123 "irq request error (dma_rt)\n"); 1160 1124 } else { 1161 1125 if (ssi->irq_tx < 0) ··· 1164 1128 if (ssi->irq_rx < 0) 1165 1129 return ssi->irq_rx; 1166 1130 1167 - ret = devm_request_irq(&pdev->dev, ssi->irq_tx, 1131 + ret = devm_request_irq(dev, ssi->irq_tx, 1168 1132 &rz_ssi_interrupt, 0, 1169 - dev_name(&pdev->dev), ssi); 1133 + dev_name(dev), ssi); 1170 1134 if (ret < 0) 1171 - return dev_err_probe(&pdev->dev, ret, 1135 + return dev_err_probe(dev, ret, 1172 1136 "irq request error (dma_tx)\n"); 1173 1137 1174 - ret = devm_request_irq(&pdev->dev, ssi->irq_rx, 1138 + ret = devm_request_irq(dev, ssi->irq_rx, 1175 1139 &rz_ssi_interrupt, 0, 1176 - dev_name(&pdev->dev), ssi); 1140 + dev_name(dev), ssi); 1177 1141 if (ret < 0) 1178 - return dev_err_probe(&pdev->dev, ret, 1142 + return dev_err_probe(dev, ret, 1179 1143 "irq request error (dma_rx)\n"); 1180 1144 } 1181 1145 } 1182 1146 1183 - ssi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL); 1147 + ssi->rstc = devm_reset_control_get_exclusive(dev, NULL); 1184 1148 if (IS_ERR(ssi->rstc)) { 1185 1149 ret = PTR_ERR(ssi->rstc); 1186 - goto err_reset; 1150 + goto err_release_dma_chs; 1187 1151 } 1188 1152 1189 - reset_control_deassert(ssi->rstc); 1190 - pm_runtime_enable(&pdev->dev); 1191 - ret = pm_runtime_resume_and_get(&pdev->dev); 1153 + /* Default 0 for power saving. Can be overridden via sysfs. */ 1154 + pm_runtime_set_autosuspend_delay(dev, 0); 1155 + pm_runtime_use_autosuspend(dev); 1156 + ret = devm_pm_runtime_enable(dev); 1192 1157 if (ret < 0) { 1193 - dev_err(&pdev->dev, "pm_runtime_resume_and_get failed\n"); 1194 - goto err_pm; 1158 + dev_err(dev, "Failed to enable runtime PM!\n"); 1159 + goto err_release_dma_chs; 1195 1160 } 1196 1161 1197 - ret = devm_snd_soc_register_component(&pdev->dev, &rz_ssi_soc_component, 1162 + ret = devm_snd_soc_register_component(dev, &rz_ssi_soc_component, 1198 1163 rz_ssi_soc_dai, 1199 1164 ARRAY_SIZE(rz_ssi_soc_dai)); 1200 1165 if (ret < 0) { 1201 - dev_err(&pdev->dev, "failed to register snd component\n"); 1202 - goto err_snd_soc; 1166 + dev_err(dev, "failed to register snd component\n"); 1167 + goto err_release_dma_chs; 1203 1168 } 1204 1169 1205 1170 return 0; 1206 1171 1207 - err_snd_soc: 1208 - pm_runtime_put(ssi->dev); 1209 - err_pm: 1210 - pm_runtime_disable(ssi->dev); 1211 - reset_control_assert(ssi->rstc); 1212 - err_reset: 1172 + err_release_dma_chs: 1213 1173 rz_ssi_release_dma_channels(ssi); 1214 1174 1215 1175 return ret; ··· 1217 1185 1218 1186 rz_ssi_release_dma_channels(ssi); 1219 1187 1220 - pm_runtime_put(ssi->dev); 1221 - pm_runtime_disable(ssi->dev); 1222 1188 reset_control_assert(ssi->rstc); 1223 1189 } 1224 1190 ··· 1226 1196 }; 1227 1197 MODULE_DEVICE_TABLE(of, rz_ssi_of_match); 1228 1198 1199 + static int rz_ssi_runtime_suspend(struct device *dev) 1200 + { 1201 + struct rz_ssi_priv *ssi = dev_get_drvdata(dev); 1202 + 1203 + return reset_control_assert(ssi->rstc); 1204 + } 1205 + 1206 + static int rz_ssi_runtime_resume(struct device *dev) 1207 + { 1208 + struct rz_ssi_priv *ssi = dev_get_drvdata(dev); 1209 + 1210 + return reset_control_deassert(ssi->rstc); 1211 + } 1212 + 1213 + static const struct dev_pm_ops rz_ssi_pm_ops = { 1214 + RUNTIME_PM_OPS(rz_ssi_runtime_suspend, rz_ssi_runtime_resume, NULL) 1215 + SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume) 1216 + }; 1217 + 1229 1218 static struct platform_driver rz_ssi_driver = { 1230 1219 .driver = { 1231 1220 .name = "rz-ssi-pcm-audio", 1232 1221 .of_match_table = rz_ssi_of_match, 1222 + .pm = pm_ptr(&rz_ssi_pm_ops), 1233 1223 }, 1234 1224 .probe = rz_ssi_probe, 1235 1225 .remove = rz_ssi_remove,