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kernel os linux

iio: adc: npcm: Add NPCM8XX support

Adding ADC NPCM8XX support to NPCM ADC driver.
ADC NPCM8XX uses a different resolution and voltage reference.

As part of adding NPCM8XX support:
- Add NPCM8XX specific compatible string.
- Add data to handle architecture-specific ADC parameters.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/r/20220713132640.215916-3-tmaimon77@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

authored by

Tomer Maimon and committed by
Jonathan Cameron
3ccb2524 f0b4913a

+29 -7
+29 -7
drivers/iio/adc/npcm_adc.c
··· 11 11 #include <linux/mod_devicetable.h> 12 12 #include <linux/module.h> 13 13 #include <linux/platform_device.h> 14 + #include <linux/property.h> 14 15 #include <linux/regmap.h> 15 16 #include <linux/regulator/consumer.h> 16 17 #include <linux/spinlock.h> 17 18 #include <linux/uaccess.h> 18 19 #include <linux/reset.h> 20 + 21 + struct npcm_adc_info { 22 + u32 data_mask; 23 + u32 internal_vref; 24 + u32 res_bits; 25 + }; 19 26 20 27 struct npcm_adc { 21 28 bool int_status; ··· 42 35 * has finished. 43 36 */ 44 37 struct mutex lock; 38 + const struct npcm_adc_info *data; 45 39 }; 46 40 47 41 /* ADC registers */ ··· 61 53 #define NPCM_ADCCON_CH(x) ((x) << 24) 62 54 #define NPCM_ADCCON_DIV_SHIFT 1 63 55 #define NPCM_ADCCON_DIV_MASK GENMASK(8, 1) 64 - #define NPCM_ADC_DATA_MASK(x) ((x) & GENMASK(9, 0)) 65 56 66 57 #define NPCM_ADC_ENABLE (NPCM_ADCCON_ADC_EN | NPCM_ADCCON_ADC_INT_EN) 67 58 68 59 /* ADC General Definition */ 69 - #define NPCM_RESOLUTION_BITS 10 70 - #define NPCM_INT_VREF_MV 2000 60 + static const struct npcm_adc_info npxm7xx_adc_info = { 61 + .data_mask = GENMASK(9, 0), 62 + .internal_vref = 2048, 63 + .res_bits = 10, 64 + }; 65 + 66 + static const struct npcm_adc_info npxm8xx_adc_info = { 67 + .data_mask = GENMASK(11, 0), 68 + .internal_vref = 1229, 69 + .res_bits = 12, 70 + }; 71 71 72 72 #define NPCM_ADC_CHAN(ch) { \ 73 73 .type = IIO_VOLTAGE, \ ··· 146 130 if (ret < 0) 147 131 return ret; 148 132 149 - *val = NPCM_ADC_DATA_MASK(ioread32(info->regs + NPCM_ADCDATA)); 133 + *val = ioread32(info->regs + NPCM_ADCDATA); 134 + *val &= info->data->data_mask; 150 135 151 136 return 0; 152 137 } ··· 175 158 vref_uv = regulator_get_voltage(info->vref); 176 159 *val = vref_uv / 1000; 177 160 } else { 178 - *val = NPCM_INT_VREF_MV; 161 + *val = info->data->internal_vref; 179 162 } 180 - *val2 = NPCM_RESOLUTION_BITS; 163 + *val2 = info->data->res_bits; 181 164 return IIO_VAL_FRACTIONAL_LOG2; 182 165 case IIO_CHAN_INFO_SAMP_FREQ: 183 166 *val = info->adc_sample_hz; ··· 194 177 }; 195 178 196 179 static const struct of_device_id npcm_adc_match[] = { 197 - { .compatible = "nuvoton,npcm750-adc", }, 180 + { .compatible = "nuvoton,npcm750-adc", .data = &npxm7xx_adc_info}, 181 + { .compatible = "nuvoton,npcm845-adc", .data = &npxm8xx_adc_info}, 198 182 { /* sentinel */ } 199 183 }; 200 184 MODULE_DEVICE_TABLE(of, npcm_adc_match); ··· 214 196 if (!indio_dev) 215 197 return -ENOMEM; 216 198 info = iio_priv(indio_dev); 199 + 200 + info->data = device_get_match_data(dev); 201 + if (!info->data) 202 + return -EINVAL; 217 203 218 204 mutex_init(&info->lock); 219 205