Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

pinctrl: Use new GPIO_LINE_DIRECTION

Use newly added GPIO defines GPIO_LINE_DIRECTION_IN and
GPIO_LINE_DIRECTION_OUT instead of using hard-coded 1 and 0.

Main benefit is to make it easier to see which values mean IN and which
OUT. As a side effect this helps GPIO framework to change the direction
defines to something else if ever needed.

Please note that return value from get_direction call on
pinctrl-axp209 driver was changed. Previously pinctrl-axp209 might have
returned value 2 for direction INPUT.

Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Reported-by: kbuild test robot <lkp@intel.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Link: https://lore.kernel.org/r/20200214135712.GA14557@localhost.localdomain
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Matti Vaittinen and committed by
Linus Walleij
3c827873 8587b21c

+119 -41
+4 -1
drivers/pinctrl/bcm/pinctrl-bcm2835.c
··· 329 329 if (fsel > BCM2835_FSEL_GPIO_OUT) 330 330 return -EINVAL; 331 331 332 - return (fsel == BCM2835_FSEL_GPIO_IN); 332 + if (fsel == BCM2835_FSEL_GPIO_IN) 333 + return GPIO_LINE_DIRECTION_IN; 334 + 335 + return GPIO_LINE_DIRECTION_OUT; 333 336 } 334 337 335 338 static void bcm2835_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+4 -1
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
··· 363 363 unsigned int offset = IPROC_GPIO_REG(gpio, IPROC_GPIO_OUT_EN_OFFSET); 364 364 unsigned int shift = IPROC_GPIO_SHIFT(gpio); 365 365 366 - return !(readl(chip->base + offset) & BIT(shift)); 366 + if (readl(chip->base + offset) & BIT(shift)) 367 + return GPIO_LINE_DIRECTION_OUT; 368 + 369 + return GPIO_LINE_DIRECTION_IN; 367 370 } 368 371 369 372 static void iproc_gpio_set(struct gpio_chip *gc, unsigned gpio, int val)
+4 -1
drivers/pinctrl/mediatek/pinctrl-mtk-common.c
··· 804 804 pctl->devdata->spec_dir_set(&reg_addr, offset); 805 805 806 806 regmap_read(pctl->regmap1, reg_addr, &read_val); 807 - return !(read_val & bit); 807 + if (read_val & bit) 808 + return GPIO_LINE_DIRECTION_OUT; 809 + 810 + return GPIO_LINE_DIRECTION_IN; 808 811 } 809 812 810 813 static int mtk_gpio_get(struct gpio_chip *chip, unsigned offset)
+4 -1
drivers/pinctrl/mediatek/pinctrl-paris.c
··· 775 775 if (err) 776 776 return err; 777 777 778 - return !value; 778 + if (value) 779 + return GPIO_LINE_DIRECTION_OUT; 780 + 781 + return GPIO_LINE_DIRECTION_IN; 779 782 } 780 783 781 784 static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
+4 -1
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
··· 402 402 mask = BIT(offset); 403 403 regmap_read(info->regmap, reg, &val); 404 404 405 - return !(val & mask); 405 + if (val & mask) 406 + return GPIO_LINE_DIRECTION_OUT; 407 + 408 + return GPIO_LINE_DIRECTION_IN; 406 409 } 407 410 408 411 static int armada_37xx_gpio_direction_output(struct gpio_chip *chip,
+5 -2
drivers/pinctrl/nomadik/pinctrl-nomadik.c
··· 831 831 832 832 clk_enable(nmk_chip->clk); 833 833 834 - dir = !(readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset)); 834 + dir = readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset); 835 835 836 836 clk_disable(nmk_chip->clk); 837 837 838 - return dir; 838 + if (dir) 839 + return GPIO_LINE_DIRECTION_OUT; 840 + 841 + return GPIO_LINE_DIRECTION_IN; 839 842 } 840 843 841 844 static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
+4 -1
drivers/pinctrl/pinctrl-amd.c
··· 46 46 pin_reg = readl(gpio_dev->base + offset * 4); 47 47 raw_spin_unlock_irqrestore(&gpio_dev->lock, flags); 48 48 49 - return !(pin_reg & BIT(OUTPUT_ENABLE_OFF)); 49 + if (pin_reg & BIT(OUTPUT_ENABLE_OFF)) 50 + return GPIO_LINE_DIRECTION_OUT; 51 + 52 + return GPIO_LINE_DIRECTION_IN; 50 53 } 51 54 52 55 static int amd_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
+4 -1
drivers/pinctrl/pinctrl-at91.c
··· 1414 1414 u32 osr; 1415 1415 1416 1416 osr = readl_relaxed(pio + PIO_OSR); 1417 - return !(osr & mask); 1417 + if (osr & mask) 1418 + return GPIO_LINE_DIRECTION_OUT; 1419 + 1420 + return GPIO_LINE_DIRECTION_IN; 1418 1421 } 1419 1422 1420 1423 static int at91_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
+5 -2
drivers/pinctrl/pinctrl-axp209.c
··· 149 149 * going to change the value soon anyway. Default to output. 150 150 */ 151 151 if ((val & AXP20X_GPIO_FUNCTIONS) > 2) 152 - return 0; 152 + return GPIO_LINE_DIRECTION_OUT; 153 153 154 154 /* 155 155 * The GPIO directions are the three lowest values. 156 156 * 2 is input, 0 and 1 are output 157 157 */ 158 - return val & 2; 158 + if (val & 2) 159 + return GPIO_LINE_DIRECTION_IN; 160 + 161 + return GPIO_LINE_DIRECTION_OUT; 159 162 } 160 163 161 164 static int axp20x_gpio_output(struct gpio_chip *chip, unsigned int offset,
+10 -4
drivers/pinctrl/pinctrl-ingenic.c
··· 1916 1916 struct ingenic_pinctrl *jzpc = jzgc->jzpc; 1917 1917 unsigned int pin = gc->base + offset; 1918 1918 1919 - if (jzpc->info->version >= ID_JZ4760) 1920 - return ingenic_get_pin_config(jzpc, pin, JZ4760_GPIO_PAT1); 1919 + if (jzpc->info->version >= ID_JZ4760) { 1920 + if (ingenic_get_pin_config(jzpc, pin, JZ4760_GPIO_PAT1)) 1921 + return GPIO_LINE_DIRECTION_IN; 1922 + return GPIO_LINE_DIRECTION_OUT; 1923 + } 1921 1924 1922 1925 if (ingenic_get_pin_config(jzpc, pin, JZ4740_GPIO_SELECT)) 1923 - return true; 1926 + return GPIO_LINE_DIRECTION_IN; 1924 1927 1925 - return !ingenic_get_pin_config(jzpc, pin, JZ4740_GPIO_DIR); 1928 + if (ingenic_get_pin_config(jzpc, pin, JZ4740_GPIO_DIR)) 1929 + return GPIO_LINE_DIRECTION_OUT; 1930 + 1931 + return GPIO_LINE_DIRECTION_IN; 1926 1932 } 1927 1933 1928 1934 static const struct pinctrl_ops ingenic_pctlops = {
+4 -1
drivers/pinctrl/pinctrl-ocelot.c
··· 604 604 605 605 regmap_read(info->map, REG(OCELOT_GPIO_OE, info, offset), &val); 606 606 607 - return !(val & BIT(offset % 32)); 607 + if (val & BIT(offset % 32)) 608 + return GPIO_LINE_DIRECTION_OUT; 609 + 610 + return GPIO_LINE_DIRECTION_IN; 608 611 } 609 612 610 613 static int ocelot_gpio_direction_input(struct gpio_chip *chip,
+4 -1
drivers/pinctrl/pinctrl-oxnas.c
··· 756 756 struct oxnas_gpio_bank *bank = gpiochip_get_data(chip); 757 757 u32 mask = BIT(offset); 758 758 759 - return !(readl_relaxed(bank->reg_base + OUTPUT_EN) & mask); 759 + if (readl_relaxed(bank->reg_base + OUTPUT_EN) & mask) 760 + return GPIO_LINE_DIRECTION_OUT; 761 + 762 + return GPIO_LINE_DIRECTION_IN; 760 763 } 761 764 762 765 static int oxnas_gpio_direction_input(struct gpio_chip *chip,
+4 -1
drivers/pinctrl/pinctrl-pic32.c
··· 1990 1990 { 1991 1991 struct pic32_gpio_bank *bank = gpiochip_get_data(chip); 1992 1992 1993 - return !!(readl(bank->reg_base + TRIS_REG) & BIT(offset)); 1993 + if (readl(bank->reg_base + TRIS_REG) & BIT(offset)) 1994 + return GPIO_LINE_DIRECTION_IN; 1995 + 1996 + return GPIO_LINE_DIRECTION_OUT; 1994 1997 } 1995 1998 1996 1999 static void pic32_gpio_irq_ack(struct irq_data *data)
+4 -1
drivers/pinctrl/pinctrl-pistachio.c
··· 1166 1166 { 1167 1167 struct pistachio_gpio_bank *bank = gpiochip_get_data(chip); 1168 1168 1169 - return !(gpio_readl(bank, GPIO_OUTPUT_EN) & BIT(offset)); 1169 + if (gpio_readl(bank, GPIO_OUTPUT_EN) & BIT(offset)) 1170 + return GPIO_LINE_DIRECTION_OUT; 1171 + 1172 + return GPIO_LINE_DIRECTION_IN; 1170 1173 } 1171 1174 1172 1175 static int pistachio_gpio_get(struct gpio_chip *chip, unsigned offset)
+5 -2
drivers/pinctrl/pinctrl-rk805.c
··· 184 184 185 185 /* default output*/ 186 186 if (!pci->pin_cfg[offset].dir_msk) 187 - return 0; 187 + return GPIO_LINE_DIRECTION_OUT; 188 188 189 189 ret = regmap_read(pci->rk808->regmap, 190 190 pci->pin_cfg[offset].reg, ··· 194 194 return ret; 195 195 } 196 196 197 - return !(val & pci->pin_cfg[offset].dir_msk); 197 + if (val & pci->pin_cfg[offset].dir_msk) 198 + return GPIO_LINE_DIRECTION_OUT; 199 + 200 + return GPIO_LINE_DIRECTION_IN; 198 201 } 199 202 200 203 static const struct gpio_chip rk805_gpio_chip = {
+4 -1
drivers/pinctrl/pinctrl-rockchip.c
··· 2549 2549 data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR); 2550 2550 clk_disable(bank->clk); 2551 2551 2552 - return !(data & BIT(offset)); 2552 + if (data & BIT(offset)) 2553 + return GPIO_LINE_DIRECTION_OUT; 2554 + 2555 + return GPIO_LINE_DIRECTION_IN; 2553 2556 } 2554 2557 2555 2558 /*
+4 -1
drivers/pinctrl/pinctrl-rza1.c
··· 777 777 { 778 778 struct rza1_port *port = gpiochip_get_data(chip); 779 779 780 - return !!rza1_get_bit(port, RZA1_PM_REG, gpio); 780 + if (rza1_get_bit(port, RZA1_PM_REG, gpio)) 781 + return GPIO_LINE_DIRECTION_IN; 782 + 783 + return GPIO_LINE_DIRECTION_OUT; 781 784 } 782 785 783 786 static int rza1_gpio_direction_input(struct gpio_chip *chip,
+3 -3
drivers/pinctrl/pinctrl-rza2.c
··· 135 135 reg16 = (reg16 >> (pin * 2)) & RZA2_PDR_MASK; 136 136 137 137 if (reg16 == RZA2_PDR_OUTPUT) 138 - return 0; 138 + return GPIO_LINE_DIRECTION_OUT; 139 139 140 140 if (reg16 == RZA2_PDR_INPUT) 141 - return 1; 141 + return GPIO_LINE_DIRECTION_IN; 142 142 143 143 /* 144 144 * This GPIO controller has a default Hi-Z state that is not input or ··· 146 146 */ 147 147 rza2_pin_to_gpio(priv->base, offset, 1); 148 148 149 - return 1; 149 + return GPIO_LINE_DIRECTION_IN; 150 150 } 151 151 152 152 static int rza2_chip_direction_input(struct gpio_chip *chip,
+11 -3
drivers/pinctrl/pinctrl-st.c
··· 746 746 function = st_pctl_get_pin_function(&pc, offset); 747 747 if (function) { 748 748 st_pinconf_get_direction(&pc, offset, &config); 749 - return !ST_PINCONF_UNPACK_OE(config); 749 + if (ST_PINCONF_UNPACK_OE(config)) 750 + return GPIO_LINE_DIRECTION_OUT; 751 + 752 + return GPIO_LINE_DIRECTION_IN; 750 753 } 751 754 752 755 /* ··· 761 758 direction |= ((value >> offset) & 0x1) << i; 762 759 } 763 760 764 - return (direction == ST_GPIO_DIRECTION_IN); 761 + if (direction == ST_GPIO_DIRECTION_IN) 762 + return GPIO_LINE_DIRECTION_IN; 763 + 764 + return GPIO_LINE_DIRECTION_OUT; 765 765 } 766 766 767 767 /* Pinctrl Groups */ ··· 1002 996 unsigned int function; 1003 997 int offset = st_gpio_pin(pin_id); 1004 998 char f[16]; 999 + int oe; 1005 1000 1006 1001 mutex_unlock(&pctldev->mutex); 1007 1002 pc = st_get_pio_control(pctldev, pin_id); ··· 1015 1008 else 1016 1009 snprintf(f, 5, "GPIO"); 1017 1010 1011 + oe = st_gpio_get_direction(&pc_to_bank(pc)->gpio_chip, offset); 1018 1012 seq_printf(s, "[OE:%d,PU:%ld,OD:%ld]\t%s\n" 1019 1013 "\t\t[retime:%ld,invclk:%ld,clknotdat:%ld," 1020 1014 "de:%ld,rt-clk:%ld,rt-delay:%ld]", 1021 - !st_gpio_get_direction(&pc_to_bank(pc)->gpio_chip, offset), 1015 + (oe == GPIO_LINE_DIRECTION_OUT), 1022 1016 ST_PINCONF_UNPACK_PU(config), 1023 1017 ST_PINCONF_UNPACK_OD(config), 1024 1018 f,
+14 -3
drivers/pinctrl/pinctrl-stmfx.c
··· 134 134 ret = regmap_read(pctl->stmfx->map, reg, &val); 135 135 /* 136 136 * On stmfx, gpio pins direction is (0)input, (1)output. 137 - * .get_direction returns 0=out, 1=in 138 137 */ 138 + if (ret) 139 + return ret; 139 140 140 - return ret ? ret : !(val & mask); 141 + if (val & mask) 142 + return GPIO_LINE_DIRECTION_OUT; 143 + 144 + return GPIO_LINE_DIRECTION_IN; 141 145 } 142 146 143 147 static int stmfx_gpio_direction_input(struct gpio_chip *gc, unsigned int offset) ··· 227 223 dir = stmfx_gpio_get_direction(&pctl->gpio_chip, pin); 228 224 if (dir < 0) 229 225 return dir; 226 + 227 + /* 228 + * Currently the gpiolib IN is 1 and OUT is 0 but let's not count 229 + * on it just to be on the safe side also in the future :) 230 + */ 231 + dir = (dir == GPIO_LINE_DIRECTION_IN) ? 1 : 0; 232 + 230 233 type = stmfx_pinconf_get_type(pctl, pin); 231 234 if (type < 0) 232 235 return type; ··· 371 360 if (val < 0) 372 361 return; 373 362 374 - if (!dir) { 363 + if (dir == GPIO_LINE_DIRECTION_OUT) { 375 364 seq_printf(s, "output %s ", val ? "high" : "low"); 376 365 if (type) 377 366 seq_printf(s, "open drain %s internal pull-up ",
+6 -3
drivers/pinctrl/pinctrl-sx150x.c
··· 391 391 int ret; 392 392 393 393 if (sx150x_pin_is_oscio(pctl, offset)) 394 - return false; 394 + return GPIO_LINE_DIRECTION_OUT; 395 395 396 396 ret = regmap_read(pctl->regmap, pctl->data->reg_dir, &value); 397 397 if (ret < 0) 398 398 return ret; 399 399 400 - return !!(value & BIT(offset)); 400 + if (value & BIT(offset)) 401 + return GPIO_LINE_DIRECTION_IN; 402 + 403 + return GPIO_LINE_DIRECTION_OUT; 401 404 } 402 405 403 406 static int sx150x_gpio_get(struct gpio_chip *chip, unsigned int offset) ··· 690 687 if (ret < 0) 691 688 return ret; 692 689 693 - if (ret) 690 + if (ret == GPIO_LINE_DIRECTION_IN) 694 691 return -EINVAL; 695 692 696 693 ret = sx150x_gpio_get(&pctl->gpio, pin);
+2 -2
drivers/pinctrl/qcom/pinctrl-msm.c
··· 489 489 490 490 val = msm_readl_ctl(pctrl, g); 491 491 492 - /* 0 = output, 1 = input */ 493 - return val & BIT(g->oe_bit) ? 0 : 1; 492 + return val & BIT(g->oe_bit) ? GPIO_LINE_DIRECTION_OUT : 493 + GPIO_LINE_DIRECTION_IN; 494 494 } 495 495 496 496 static int msm_gpio_get(struct gpio_chip *chip, unsigned offset)
+2 -2
drivers/pinctrl/stm32/pinctrl-stm32.c
··· 283 283 284 284 stm32_pmx_get_mode(bank, pin, &mode, &alt); 285 285 if ((alt == 0) && (mode == 0)) 286 - ret = 1; 286 + ret = GPIO_LINE_DIRECTION_IN; 287 287 else if ((alt == 0) && (mode == 1)) 288 - ret = 0; 288 + ret = GPIO_LINE_DIRECTION_OUT; 289 289 else 290 290 ret = -EINVAL; 291 291
+4 -2
drivers/pinctrl/vt8500/pinctrl-wmt.c
··· 486 486 u32 val; 487 487 488 488 val = readl_relaxed(data->base + reg_dir); 489 - /* Return 0 == output, 1 == input */ 490 - return !(val & BIT(bit)); 489 + if (val & BIT(bit)) 490 + return GPIO_LINE_DIRECTION_OUT; 491 + 492 + return GPIO_LINE_DIRECTION_IN; 491 493 } 492 494 493 495 static int wmt_gpio_get_value(struct gpio_chip *chip, unsigned offset)