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MIPS: Netlogic: mach-netlogic include files
Add war.h and irq.h with XLR/XLS definitions.
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2331/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
authored by
Jayachandran C
and committed by
Ralf Baechle
3c595a51
a7117c6b
+87
+47
arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h
+47
arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h
···
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2011 Netlogic Microsystems
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* Copyright (C) 2003 Ralf Baechle
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*/
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#ifndef __ASM_MACH_NETLOGIC_CPU_FEATURE_OVERRIDES_H
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#define __ASM_MACH_NETLOGIC_CPU_FEATURE_OVERRIDES_H
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#define cpu_has_4kex 1
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#define cpu_has_4k_cache 1
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#define cpu_has_watch 1
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#define cpu_has_mips16 0
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#define cpu_has_counter 1
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#define cpu_has_divec 1
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#define cpu_has_vce 0
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#define cpu_has_cache_cdex_p 0
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#define cpu_has_cache_cdex_s 0
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#define cpu_has_prefetch 1
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#define cpu_has_mcheck 1
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#define cpu_has_ejtag 1
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#define cpu_has_llsc 1
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#define cpu_has_vtag_icache 0
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#define cpu_has_dc_aliases 0
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#define cpu_has_ic_fills_f_dc 0
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#define cpu_has_dsp 0
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#define cpu_has_mipsmt 0
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#define cpu_has_userlocal 0
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#define cpu_icache_snoops_remote_store 0
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#define cpu_has_nofpuex 0
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#define cpu_has_64bits 1
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#define cpu_has_mips32r1 1
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#define cpu_has_mips32r2 0
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#define cpu_has_mips64r1 1
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#define cpu_has_mips64r2 0
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#define cpu_has_inclusive_pcaches 0
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#define cpu_dcache_line_size() 32
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#define cpu_icache_line_size() 32
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#endif /* __ASM_MACH_NETLOGIC_CPU_FEATURE_OVERRIDES_H */
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arch/mips/include/asm/mach-netlogic/irq.h
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arch/mips/include/asm/mach-netlogic/irq.h
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2011 Netlogic Microsystems.
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*/
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#ifndef __ASM_NETLOGIC_IRQ_H
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#define __ASM_NETLOGIC_IRQ_H
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#define NR_IRQS 64
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#define MIPS_CPU_IRQ_BASE 0
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#endif /* __ASM_NETLOGIC_IRQ_H */
+26
arch/mips/include/asm/mach-netlogic/war.h
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arch/mips/include/asm/mach-netlogic/war.h
···
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2011 Netlogic Microsystems.
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* Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
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*/
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#ifndef __ASM_MIPS_MACH_NLM_WAR_H
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#define __ASM_MIPS_MACH_NLM_WAR_H
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#define R4600_V1_INDEX_ICACHEOP_WAR 0
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#define R4600_V1_HIT_CACHEOP_WAR 0
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#define R4600_V2_HIT_CACHEOP_WAR 0
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#define R5432_CP0_INTERRUPT_WAR 0
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#define BCM1250_M3_WAR 0
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#define SIBYTE_1956_WAR 0
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#define MIPS4K_ICACHE_REFILL_WAR 0
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#define MIPS_CACHE_SYNC_WAR 0
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#define TX49XX_ICACHE_INDEX_INV_WAR 0
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#define RM9000_CDEX_SMP_WAR 0
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#define ICACHE_REFILLS_WORKAROUND_WAR 0
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#define R10000_LLSC_WAR 0
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#define MIPS34K_MISSED_ITLB_WAR 0
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#endif /* __ASM_MIPS_MACH_NLM_WAR_H */