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Merge tag 'mailbox-v4.15' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:
"Change to POLL api and fixes for FlexRM and OMAP driver.

Summary:

- Core: Prefer ACK method over POLL, if both supported

- Test: use flag instead of special character

- FlexRM: Usual driver internal minor churn

- Omap: fix error path"

* tag 'mailbox-v4.15' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
mailbox/omap: unregister mbox class
mailbox: mailbox-test: don't rely on rx_buffer content to signal data ready
mailbox: reset txdone_method TXDONE_BY_POLL if client knows_txdone
mailbox: Build Broadcom FlexRM driver as loadable module for iProc SOCs
mailbox: bcm-flexrm-mailbox: Use common GPL comment header
mailbox: bcm-flexrm-mailbox: add depends on ARCH_BCM_IPROC
mailbox: bcm-flexrm-mailbox: Print ring number in errors and warnings
mailbox: bcm-flexrm-mailbox: Fix FlexRM ring flush sequence

+66 -28
+2 -1
drivers/mailbox/Kconfig
··· 163 163 config BCM_FLEXRM_MBOX 164 164 tristate "Broadcom FlexRM Mailbox" 165 165 depends on ARM64 166 + depends on ARCH_BCM_IPROC || COMPILE_TEST 166 167 depends on HAS_DMA 167 168 select GENERIC_MSI_IRQ_DOMAIN 168 - default ARCH_BCM_IPROC 169 + default m if ARCH_BCM_IPROC 169 170 help 170 171 Mailbox implementation of the Broadcom FlexRM ring manager, 171 172 which provides access to various offload engines on Broadcom
+49 -17
drivers/mailbox/bcm-flexrm-mailbox.c
··· 1 - /* Broadcom FlexRM Mailbox Driver 2 - * 1 + /* 3 2 * Copyright (C) 2017 Broadcom 4 3 * 5 - * This program is free software; you can redistribute it and/or modify 6 - * it under the terms of the GNU General Public License version 2 as 7 - * published by the Free Software Foundation. 4 + * This program is free software; you can redistribute it and/or 5 + * modify it under the terms of the GNU General Public License as 6 + * published by the Free Software Foundation version 2. 7 + * 8 + * This program is distributed "as is" WITHOUT ANY WARRANTY of any 9 + * kind, whether express or implied; without even the implied warranty 10 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 + * GNU General Public License for more details. 12 + */ 13 + 14 + /* 15 + * Broadcom FlexRM Mailbox Driver 8 16 * 9 17 * Each Broadcom FlexSparx4 offload engine is implemented as an 10 18 * extension to Broadcom FlexRM ring manager. The FlexRM ring ··· 1124 1116 err = flexrm_cmpl_desc_to_error(desc); 1125 1117 if (err < 0) { 1126 1118 dev_warn(ring->mbox->dev, 1127 - "got completion desc=0x%lx with error %d", 1128 - (unsigned long)desc, err); 1119 + "ring%d got completion desc=0x%lx with error %d\n", 1120 + ring->num, (unsigned long)desc, err); 1129 1121 } 1130 1122 1131 1123 /* Determine request id from completion descriptor */ ··· 1135 1127 msg = ring->requests[reqid]; 1136 1128 if (!msg) { 1137 1129 dev_warn(ring->mbox->dev, 1138 - "null msg pointer for completion desc=0x%lx", 1139 - (unsigned long)desc); 1130 + "ring%d null msg pointer for completion desc=0x%lx\n", 1131 + ring->num, (unsigned long)desc); 1140 1132 continue; 1141 1133 } 1142 1134 ··· 1246 1238 ring->bd_base = dma_pool_alloc(ring->mbox->bd_pool, 1247 1239 GFP_KERNEL, &ring->bd_dma_base); 1248 1240 if (!ring->bd_base) { 1249 - dev_err(ring->mbox->dev, "can't allocate BD memory\n"); 1241 + dev_err(ring->mbox->dev, 1242 + "can't allocate BD memory for ring%d\n", 1243 + ring->num); 1250 1244 ret = -ENOMEM; 1251 1245 goto fail; 1252 1246 } ··· 1271 1261 ring->cmpl_base = dma_pool_alloc(ring->mbox->cmpl_pool, 1272 1262 GFP_KERNEL, &ring->cmpl_dma_base); 1273 1263 if (!ring->cmpl_base) { 1274 - dev_err(ring->mbox->dev, "can't allocate completion memory\n"); 1264 + dev_err(ring->mbox->dev, 1265 + "can't allocate completion memory for ring%d\n", 1266 + ring->num); 1275 1267 ret = -ENOMEM; 1276 1268 goto fail_free_bd_memory; 1277 1269 } ··· 1281 1269 1282 1270 /* Request IRQ */ 1283 1271 if (ring->irq == UINT_MAX) { 1284 - dev_err(ring->mbox->dev, "ring IRQ not available\n"); 1272 + dev_err(ring->mbox->dev, 1273 + "ring%d IRQ not available\n", ring->num); 1285 1274 ret = -ENODEV; 1286 1275 goto fail_free_cmpl_memory; 1287 1276 } ··· 1291 1278 flexrm_irq_thread, 1292 1279 0, dev_name(ring->mbox->dev), ring); 1293 1280 if (ret) { 1294 - dev_err(ring->mbox->dev, "failed to request ring IRQ\n"); 1281 + dev_err(ring->mbox->dev, 1282 + "failed to request ring%d IRQ\n", ring->num); 1295 1283 goto fail_free_cmpl_memory; 1296 1284 } 1297 1285 ring->irq_requested = true; ··· 1305 1291 &ring->irq_aff_hint); 1306 1292 ret = irq_set_affinity_hint(ring->irq, &ring->irq_aff_hint); 1307 1293 if (ret) { 1308 - dev_err(ring->mbox->dev, "failed to set IRQ affinity hint\n"); 1294 + dev_err(ring->mbox->dev, 1295 + "failed to set IRQ affinity hint for ring%d\n", 1296 + ring->num); 1309 1297 goto fail_free_irq; 1310 1298 } 1311 1299 ··· 1381 1365 /* Disable/inactivate ring */ 1382 1366 writel_relaxed(0x0, ring->regs + RING_CONTROL); 1383 1367 1384 - /* Flush ring with timeout of 1s */ 1385 - timeout = 1000; 1368 + /* Set ring flush state */ 1369 + timeout = 1000; /* timeout of 1s */ 1386 1370 writel_relaxed(BIT(CONTROL_FLUSH_SHIFT), 1387 1371 ring->regs + RING_CONTROL); 1388 1372 do { ··· 1390 1374 FLUSH_DONE_MASK) 1391 1375 break; 1392 1376 mdelay(1); 1393 - } while (timeout--); 1377 + } while (--timeout); 1378 + if (!timeout) 1379 + dev_err(ring->mbox->dev, 1380 + "setting ring%d flush state timedout\n", ring->num); 1381 + 1382 + /* Clear ring flush state */ 1383 + timeout = 1000; /* timeout of 1s */ 1384 + writel_relaxed(0x0, ring + RING_CONTROL); 1385 + do { 1386 + if (!(readl_relaxed(ring + RING_FLUSH_DONE) & 1387 + FLUSH_DONE_MASK)) 1388 + break; 1389 + mdelay(1); 1390 + } while (--timeout); 1391 + if (!timeout) 1392 + dev_err(ring->mbox->dev, 1393 + "clearing ring%d flush state timedout\n", ring->num); 1394 1394 1395 1395 /* Abort all in-flight requests */ 1396 1396 for (reqid = 0; reqid < RING_MAX_REQ_COUNT; reqid++) {
+6 -5
drivers/mailbox/mailbox-test.c
··· 30 30 #define MBOX_HEXDUMP_MAX_LEN (MBOX_HEXDUMP_LINE_LEN * \ 31 31 (MBOX_MAX_MSG_LEN / MBOX_BYTES_PER_LINE)) 32 32 33 + static bool mbox_data_ready; 33 34 static struct dentry *root_debugfs_dir; 34 35 35 36 struct mbox_test_device { ··· 153 152 154 153 static bool mbox_test_message_data_ready(struct mbox_test_device *tdev) 155 154 { 156 - unsigned char data; 155 + bool data_ready; 157 156 unsigned long flags; 158 157 159 158 spin_lock_irqsave(&tdev->lock, flags); 160 - data = tdev->rx_buffer[0]; 159 + data_ready = mbox_data_ready; 161 160 spin_unlock_irqrestore(&tdev->lock, flags); 162 161 163 - if (data != '\0') 164 - return true; 165 - return false; 162 + return data_ready; 166 163 } 167 164 168 165 static ssize_t mbox_test_message_read(struct file *filp, char __user *userbuf, ··· 222 223 *(touser + l) = '\0'; 223 224 224 225 memset(tdev->rx_buffer, 0, MBOX_MAX_MSG_LEN); 226 + mbox_data_ready = false; 225 227 226 228 spin_unlock_irqrestore(&tdev->lock, flags); 227 229 ··· 292 292 message, MBOX_MAX_MSG_LEN); 293 293 memcpy(tdev->rx_buffer, message, MBOX_MAX_MSG_LEN); 294 294 } 295 + mbox_data_ready = true; 295 296 spin_unlock_irqrestore(&tdev->lock, flags); 296 297 297 298 wake_up_interruptible(&tdev->waitq);
+2 -2
drivers/mailbox/mailbox.c
··· 351 351 init_completion(&chan->tx_complete); 352 352 353 353 if (chan->txdone_method == TXDONE_BY_POLL && cl->knows_txdone) 354 - chan->txdone_method |= TXDONE_BY_ACK; 354 + chan->txdone_method = TXDONE_BY_ACK; 355 355 356 356 spin_unlock_irqrestore(&chan->lock, flags); 357 357 ··· 418 418 spin_lock_irqsave(&chan->lock, flags); 419 419 chan->cl = NULL; 420 420 chan->active_req = NULL; 421 - if (chan->txdone_method == (TXDONE_BY_POLL | TXDONE_BY_ACK)) 421 + if (chan->txdone_method == TXDONE_BY_ACK) 422 422 chan->txdone_method = TXDONE_BY_POLL; 423 423 424 424 module_put(chan->mbox->dev->driver->owner);
+5 -1
drivers/mailbox/omap-mailbox.c
··· 906 906 mbox_kfifo_size = max_t(unsigned int, mbox_kfifo_size, 907 907 sizeof(mbox_msg_t)); 908 908 909 - return platform_driver_register(&omap_mbox_driver); 909 + err = platform_driver_register(&omap_mbox_driver); 910 + if (err) 911 + class_unregister(&omap_mbox_class); 912 + 913 + return err; 910 914 } 911 915 subsys_initcall(omap_mbox_init); 912 916
+2 -2
drivers/mailbox/pcc.c
··· 265 265 init_completion(&chan->tx_complete); 266 266 267 267 if (chan->txdone_method == TXDONE_BY_POLL && cl->knows_txdone) 268 - chan->txdone_method |= TXDONE_BY_ACK; 268 + chan->txdone_method = TXDONE_BY_ACK; 269 269 270 270 spin_unlock_irqrestore(&chan->lock, flags); 271 271 ··· 311 311 spin_lock_irqsave(&chan->lock, flags); 312 312 chan->cl = NULL; 313 313 chan->active_req = NULL; 314 - if (chan->txdone_method == (TXDONE_BY_POLL | TXDONE_BY_ACK)) 314 + if (chan->txdone_method == TXDONE_BY_ACK) 315 315 chan->txdone_method = TXDONE_BY_POLL; 316 316 317 317 spin_unlock_irqrestore(&chan->lock, flags);