Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

KVM: MIPS/VZ: Emulate hit CACHE ops for Octeon III

Octeon III doesn't implement the optional GuestCtl0.CG bit to allow
guest mode to execute virtual address based CACHE instructions, so
implement emulation of a few important ones specifically for Octeon III
in response to a GPSI exception.

Currently the main reason to perform these operations is for icache
synchronisation, so they are implemented as a simple icache flush with
local_flush_icache_range().

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: David Daney <david.daney@cavium.com>
Cc: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org

+11
+11
arch/mips/kvm/vz.c
··· 1105 1105 case Index_Writeback_Inv_D: 1106 1106 flush_dcache_line_indexed(va); 1107 1107 return EMULATE_DONE; 1108 + case Hit_Invalidate_I: 1109 + case Hit_Invalidate_D: 1110 + case Hit_Writeback_Inv_D: 1111 + if (boot_cpu_type() == CPU_CAVIUM_OCTEON3) { 1112 + /* We can just flush entire icache */ 1113 + local_flush_icache_range(0, 0); 1114 + return EMULATE_DONE; 1115 + } 1116 + 1117 + /* So far, other platforms support guest hit cache ops */ 1118 + break; 1108 1119 default: 1109 1120 break; 1110 1121 };