tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
lkdtm/powerpc: Add SLB multihit test
To check machine check handling, add support to inject slb
multihit errors.
Co-developed-by: Mahesh Salgaonkar <mahesh@linux.ibm.com>
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.ibm.com>
Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com>
[mpe: Use CONFIG_PPC_BOOK3S_64 to fix compile errors reported by lkp@intel.com]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20201130083057.135610-1-ganeshgr@linux.ibm.com
authored by
Ganesh Goudar
and committed by
Michael Ellerman
3ba150fb
6c58b1b4
+156
-28
+27
-1
arch/powerpc/include/asm/book3s/64/mmu-hash.h
+27
-1
arch/powerpc/include/asm/book3s/64/mmu-hash.h
···
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unsigned htab_shift_for_mem_size(unsigned long mem_size);
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-
#endif /* __ASSEMBLY__ */
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enum slb_index {
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LINEAR_INDEX = 0, /* Kernel linear map (0xc000000000000000) */
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KSTACK_INDEX = 1, /* Kernel stack map */
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};
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#define slb_esid_mask(ssize) \
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(((ssize) == MMU_SEGSIZE_256M) ? ESID_MASK : ESID_MASK_1T)
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static inline unsigned long mk_esid_data(unsigned long ea, int ssize,
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enum slb_index index)
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{
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return (ea & slb_esid_mask(ssize)) | SLB_ESID_V | index;
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}
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static inline unsigned long __mk_vsid_data(unsigned long vsid, int ssize,
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unsigned long flags)
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{
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return (vsid << slb_vsid_shift(ssize)) | flags |
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((unsigned long)ssize << SLB_VSID_SSIZE_SHIFT);
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}
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static inline unsigned long mk_vsid_data(unsigned long ea, int ssize,
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unsigned long flags)
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{
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return __mk_vsid_data(get_kernel_vsid(ea, ssize), ssize, flags);
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}
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_POWERPC_BOOK3S_64_MMU_HASH_H_ */
+1
arch/powerpc/mm/book3s64/hash_utils.c
+1
arch/powerpc/mm/book3s64/hash_utils.c
-27
arch/powerpc/mm/book3s64/slb.c
-27
arch/powerpc/mm/book3s64/slb.c
···
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#include "internal.h"
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enum slb_index {
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LINEAR_INDEX = 0, /* Kernel linear map (0xc000000000000000) */
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KSTACK_INDEX = 1, /* Kernel stack map */
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};
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static long slb_allocate_user(struct mm_struct *mm, unsigned long ea);
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#define slb_esid_mask(ssize) \
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(((ssize) == MMU_SEGSIZE_256M)? ESID_MASK: ESID_MASK_1T)
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static inline unsigned long mk_esid_data(unsigned long ea, int ssize,
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enum slb_index index)
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{
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return (ea & slb_esid_mask(ssize)) | SLB_ESID_V | index;
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}
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static inline unsigned long __mk_vsid_data(unsigned long vsid, int ssize,
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unsigned long flags)
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{
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return (vsid << slb_vsid_shift(ssize)) | flags |
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((unsigned long) ssize << SLB_VSID_SSIZE_SHIFT);
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}
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static inline unsigned long mk_vsid_data(unsigned long ea, int ssize,
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unsigned long flags)
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{
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return __mk_vsid_data(get_kernel_vsid(ea, ssize), ssize, flags);
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}
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bool stress_slb_enabled __initdata;
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+1
drivers/misc/lkdtm/Makefile
+1
drivers/misc/lkdtm/Makefile
+3
drivers/misc/lkdtm/core.c
+3
drivers/misc/lkdtm/core.c
+3
drivers/misc/lkdtm/lkdtm.h
+3
drivers/misc/lkdtm/lkdtm.h
+120
drivers/misc/lkdtm/powerpc.c
+120
drivers/misc/lkdtm/powerpc.c
···
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// SPDX-License-Identifier: GPL-2.0
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#include "lkdtm.h"
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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#include <asm/mmu.h>
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/* Inserts new slb entries */
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static void insert_slb_entry(unsigned long p, int ssize, int page_size)
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{
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unsigned long flags;
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flags = SLB_VSID_KERNEL | mmu_psize_defs[page_size].sllp;
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preempt_disable();
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asm volatile("slbmte %0,%1" :
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: "r" (mk_vsid_data(p, ssize, flags)),
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"r" (mk_esid_data(p, ssize, SLB_NUM_BOLTED))
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: "memory");
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asm volatile("slbmte %0,%1" :
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: "r" (mk_vsid_data(p, ssize, flags)),
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"r" (mk_esid_data(p, ssize, SLB_NUM_BOLTED + 1))
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: "memory");
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preempt_enable();
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}
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/* Inject slb multihit on vmalloc-ed address i.e 0xD00... */
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static int inject_vmalloc_slb_multihit(void)
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{
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char *p;
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p = vmalloc(PAGE_SIZE);
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if (!p)
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return -ENOMEM;
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insert_slb_entry((unsigned long)p, MMU_SEGSIZE_1T, mmu_vmalloc_psize);
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/*
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* This triggers exception, If handled correctly we must recover
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* from this error.
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*/
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p[0] = '!';
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vfree(p);
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return 0;
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}
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/* Inject slb multihit on kmalloc-ed address i.e 0xC00... */
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static int inject_kmalloc_slb_multihit(void)
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{
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char *p;
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p = kmalloc(2048, GFP_KERNEL);
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if (!p)
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return -ENOMEM;
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insert_slb_entry((unsigned long)p, MMU_SEGSIZE_1T, mmu_linear_psize);
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/*
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* This triggers exception, If handled correctly we must recover
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* from this error.
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*/
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p[0] = '!';
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kfree(p);
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return 0;
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}
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/*
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* Few initial SLB entries are bolted. Add a test to inject
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* multihit in bolted entry 0.
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*/
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static void insert_dup_slb_entry_0(void)
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{
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unsigned long test_address = PAGE_OFFSET, *test_ptr;
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unsigned long esid, vsid;
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unsigned long i = 0;
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test_ptr = (unsigned long *)test_address;
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preempt_disable();
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asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i));
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asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i));
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/* for i !=0 we would need to mask out the old entry number */
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asm volatile("slbmte %0,%1" :
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: "r" (vsid),
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"r" (esid | SLB_NUM_BOLTED)
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: "memory");
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asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i));
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asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i));
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/* for i !=0 we would need to mask out the old entry number */
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asm volatile("slbmte %0,%1" :
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: "r" (vsid),
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"r" (esid | (SLB_NUM_BOLTED + 1))
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: "memory");
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pr_info("%s accessing test address 0x%lx: 0x%lx\n",
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__func__, test_address, *test_ptr);
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preempt_enable();
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}
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void lkdtm_PPC_SLB_MULTIHIT(void)
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{
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if (!radix_enabled()) {
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pr_info("Injecting SLB multihit errors\n");
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/*
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* These need not be separate tests, And they do pretty
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* much same thing. In any case we must recover from the
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* errors introduced by these functions, machine would not
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* survive these tests in case of failure to handle.
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*/
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inject_vmalloc_slb_multihit();
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inject_kmalloc_slb_multihit();
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insert_dup_slb_entry_0();
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pr_info("Recovered from SLB multihit errors\n");
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} else {
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pr_err("XFAIL: This test is for ppc64 and with hash mode MMU only\n");
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}
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}