Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'for-next' of git://git.o-hand.com/linux-mfd

* 'for-next' of git://git.o-hand.com/linux-mfd:
mfd: further unbork the ucb1400 ac97_bus dependencies
mfd: ucb1400 needs GPIO
mfd: ucb1400 sound driver uses/depends on AC97_BUS:
mfd: Don't use NO_IRQ in WM8350
mfd: update TMIO drivers to use the clock API
mfd: twl4030-core irq simplification
mfd: add base support for Dialog DA9030/DA9034 PMICs
mfd: TWL4030 core driver
mfd: support tmiofb cell on tc6393xb
mfd: add OHCI cell to tc6393xb
mfd: Fix htc-egpio compile warning
mfd: do tcb6393xb state restore on resume only if requested
mfd: provide and use setup hook for tc6393xb
mfd: update sm501 debugging/low information messages
mfd: reduce stack usage in mfd-core.c

+2687 -98
-2
arch/arm/mach-pxa/include/mach/tosa.h
··· 59 59 * TC6393XB GPIOs 60 60 */ 61 61 #define TOSA_TC6393XB_GPIO_BASE (NR_BUILTIN_GPIO + 2 * 12) 62 - #define TOSA_TC6393XB_GPIO(i) (TOSA_TC6393XB_GPIO_BASE + (i)) 63 - #define TOSA_TC6393XB_GPIO_BIT(gpio) (1 << (gpio - TOSA_TC6393XB_GPIO_BASE)) 64 62 65 63 #define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0) 66 64 #define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1)
+31 -6
arch/arm/mach-pxa/tosa.c
··· 706 706 .badblock_pattern = &tosa_tc6393xb_nand_bbt, 707 707 }; 708 708 709 - static struct tc6393xb_platform_data tosa_tc6393xb_setup = { 709 + static int tosa_tc6393xb_setup(struct platform_device *dev) 710 + { 711 + int rc; 712 + 713 + rc = gpio_request(TOSA_GPIO_CARD_VCC_ON, "CARD_VCC_ON"); 714 + if (rc) 715 + goto err_req; 716 + 717 + rc = gpio_direction_output(TOSA_GPIO_CARD_VCC_ON, 1); 718 + if (rc) 719 + goto err_dir; 720 + 721 + return rc; 722 + 723 + err_dir: 724 + gpio_free(TOSA_GPIO_CARD_VCC_ON); 725 + err_req: 726 + return rc; 727 + } 728 + 729 + static void tosa_tc6393xb_teardown(struct platform_device *dev) 730 + { 731 + gpio_free(TOSA_GPIO_CARD_VCC_ON); 732 + } 733 + 734 + static struct tc6393xb_platform_data tosa_tc6393xb_data = { 710 735 .scr_pll2cr = 0x0cc1, 711 736 .scr_gper = 0x3300, 712 - .scr_gpo_dsr = 713 - TOSA_TC6393XB_GPIO_BIT(TOSA_GPIO_CARD_VCC_ON), 714 - .scr_gpo_doecr = 715 - TOSA_TC6393XB_GPIO_BIT(TOSA_GPIO_CARD_VCC_ON), 716 737 717 738 .irq_base = IRQ_BOARD_START, 718 739 .gpio_base = TOSA_TC6393XB_GPIO_BASE, 740 + .setup = tosa_tc6393xb_setup, 741 + .teardown = tosa_tc6393xb_teardown, 719 742 720 743 .enable = tosa_tc6393xb_enable, 721 744 .disable = tosa_tc6393xb_disable, ··· 746 723 .resume = tosa_tc6393xb_resume, 747 724 748 725 .nand_data = &tosa_tc6393xb_nand_config, 726 + 727 + .resume_restore = 1, 749 728 }; 750 729 751 730 ··· 755 730 .name = "tc6393xb", 756 731 .id = -1, 757 732 .dev = { 758 - .platform_data = &tosa_tc6393xb_setup, 733 + .platform_data = &tosa_tc6393xb_data, 759 734 }, 760 735 .num_resources = ARRAY_SIZE(tc6393xb_resources), 761 736 .resource = tc6393xb_resources,
+1 -1
drivers/input/touchscreen/Kconfig
··· 219 219 220 220 config TOUCHSCREEN_UCB1400 221 221 tristate "Philips UCB1400 touchscreen" 222 - select AC97_BUS 222 + depends on AC97_BUS 223 223 depends on UCB1400_CORE 224 224 help 225 225 This enables support for the Philips UCB1400 touchscreen interface.
+16
drivers/mfd/Kconfig
··· 52 52 53 53 config UCB1400_CORE 54 54 tristate "Philips UCB1400 Core driver" 55 + depends on AC97_BUS 56 + depends on GPIOLIB 55 57 help 56 58 This enables support for the Philips UCB1400 core functions. 57 59 The UCB1400 is an AC97 audio codec. 58 60 59 61 To compile this driver as a module, choose M here: the 60 62 module will be called ucb1400_core. 63 + 64 + config TWL4030_CORE 65 + bool "Texas Instruments TWL4030/TPS659x0 Support" 66 + depends on I2C=y && GENERIC_HARDIRQS && (ARCH_OMAP2 || ARCH_OMAP3) 67 + help 68 + Say yes here if you have TWL4030 family chip on your board. 69 + This core driver provides register access and IRQ handling 70 + facilities, and registers devices for the various functions 71 + so that function-specific drivers can bind to them. 72 + 73 + These multi-function chips are found on many OMAP2 and OMAP3 74 + boards, providing power management, RTC, GPIO, keypad, a 75 + high speed USB OTG transceiver, an audio codec (on most 76 + versions) and many other features. 61 77 62 78 config MFD_TMIO 63 79 bool
+2
drivers/mfd/Makefile
··· 17 17 obj-$(CONFIG_MFD_WM8350) += wm8350.o 18 18 obj-$(CONFIG_MFD_WM8350_I2C) += wm8350-i2c.o 19 19 20 + obj-$(CONFIG_TWL4030_CORE) += twl4030-core.o 21 + 20 22 obj-$(CONFIG_MFD_CORE) += mfd-core.o 21 23 22 24 obj-$(CONFIG_MCP) += mcp-core.o
+563
drivers/mfd/da903x.c
··· 1 + /* 2 + * Base driver for Dialog Semiconductor DA9030/DA9034 3 + * 4 + * Copyright (C) 2008 Compulab, Ltd. 5 + * Mike Rapoport <mike@compulab.co.il> 6 + * 7 + * Copyright (C) 2006-2008 Marvell International Ltd. 8 + * Eric Miao <eric.miao@marvell.com> 9 + * 10 + * This program is free software; you can redistribute it and/or modify 11 + * it under the terms of the GNU General Public License version 2 as 12 + * published by the Free Software Foundation. 13 + */ 14 + 15 + #include <linux/kernel.h> 16 + #include <linux/module.h> 17 + #include <linux/interrupt.h> 18 + #include <linux/platform_device.h> 19 + #include <linux/i2c.h> 20 + #include <linux/mfd/da903x.h> 21 + 22 + #define DA9030_CHIP_ID 0x00 23 + #define DA9030_EVENT_A 0x01 24 + #define DA9030_EVENT_B 0x02 25 + #define DA9030_EVENT_C 0x03 26 + #define DA9030_STATUS 0x04 27 + #define DA9030_IRQ_MASK_A 0x05 28 + #define DA9030_IRQ_MASK_B 0x06 29 + #define DA9030_IRQ_MASK_C 0x07 30 + #define DA9030_SYS_CTRL_A 0x08 31 + #define DA9030_SYS_CTRL_B 0x09 32 + #define DA9030_FAULT_LOG 0x0a 33 + 34 + #define DA9034_CHIP_ID 0x00 35 + #define DA9034_EVENT_A 0x01 36 + #define DA9034_EVENT_B 0x02 37 + #define DA9034_EVENT_C 0x03 38 + #define DA9034_EVENT_D 0x04 39 + #define DA9034_STATUS_A 0x05 40 + #define DA9034_STATUS_B 0x06 41 + #define DA9034_IRQ_MASK_A 0x07 42 + #define DA9034_IRQ_MASK_B 0x08 43 + #define DA9034_IRQ_MASK_C 0x09 44 + #define DA9034_IRQ_MASK_D 0x0a 45 + #define DA9034_SYS_CTRL_A 0x0b 46 + #define DA9034_SYS_CTRL_B 0x0c 47 + #define DA9034_FAULT_LOG 0x0d 48 + 49 + struct da903x_chip; 50 + 51 + struct da903x_chip_ops { 52 + int (*init_chip)(struct da903x_chip *); 53 + int (*unmask_events)(struct da903x_chip *, unsigned int events); 54 + int (*mask_events)(struct da903x_chip *, unsigned int events); 55 + int (*read_events)(struct da903x_chip *, unsigned int *events); 56 + int (*read_status)(struct da903x_chip *, unsigned int *status); 57 + }; 58 + 59 + struct da903x_chip { 60 + struct i2c_client *client; 61 + struct device *dev; 62 + struct da903x_chip_ops *ops; 63 + 64 + int type; 65 + uint32_t events_mask; 66 + 67 + struct mutex lock; 68 + struct work_struct irq_work; 69 + 70 + struct blocking_notifier_head notifier_list; 71 + }; 72 + 73 + static inline int __da903x_read(struct i2c_client *client, 74 + int reg, uint8_t *val) 75 + { 76 + int ret; 77 + 78 + ret = i2c_smbus_read_byte_data(client, reg); 79 + if (ret < 0) { 80 + dev_err(&client->dev, "failed reading at 0x%02x\n", reg); 81 + return ret; 82 + } 83 + 84 + *val = (uint8_t)ret; 85 + return 0; 86 + } 87 + 88 + static inline int __da903x_reads(struct i2c_client *client, int reg, 89 + int len, uint8_t *val) 90 + { 91 + int ret; 92 + 93 + ret = i2c_smbus_read_i2c_block_data(client, reg, len, val); 94 + if (ret < 0) { 95 + dev_err(&client->dev, "failed reading from 0x%02x\n", reg); 96 + return ret; 97 + } 98 + return 0; 99 + } 100 + 101 + static inline int __da903x_write(struct i2c_client *client, 102 + int reg, uint8_t val) 103 + { 104 + int ret; 105 + 106 + ret = i2c_smbus_write_byte_data(client, reg, val); 107 + if (ret < 0) { 108 + dev_err(&client->dev, "failed writing 0x%02x to 0x%02x\n", 109 + val, reg); 110 + return ret; 111 + } 112 + return 0; 113 + } 114 + 115 + static inline int __da903x_writes(struct i2c_client *client, int reg, 116 + int len, uint8_t *val) 117 + { 118 + int ret; 119 + 120 + ret = i2c_smbus_write_i2c_block_data(client, reg, len, val); 121 + if (ret < 0) { 122 + dev_err(&client->dev, "failed writings to 0x%02x\n", reg); 123 + return ret; 124 + } 125 + return 0; 126 + } 127 + 128 + int da903x_register_notifier(struct device *dev, struct notifier_block *nb, 129 + unsigned int events) 130 + { 131 + struct da903x_chip *chip = dev_get_drvdata(dev); 132 + 133 + chip->ops->unmask_events(chip, events); 134 + return blocking_notifier_chain_register(&chip->notifier_list, nb); 135 + } 136 + EXPORT_SYMBOL_GPL(da903x_register_notifier); 137 + 138 + int da903x_unregister_notifier(struct device *dev, struct notifier_block *nb, 139 + unsigned int events) 140 + { 141 + struct da903x_chip *chip = dev_get_drvdata(dev); 142 + 143 + chip->ops->mask_events(chip, events); 144 + return blocking_notifier_chain_unregister(&chip->notifier_list, nb); 145 + } 146 + EXPORT_SYMBOL_GPL(da903x_unregister_notifier); 147 + 148 + int da903x_write(struct device *dev, int reg, uint8_t val) 149 + { 150 + return __da903x_write(to_i2c_client(dev), reg, val); 151 + } 152 + EXPORT_SYMBOL_GPL(da903x_write); 153 + 154 + int da903x_read(struct device *dev, int reg, uint8_t *val) 155 + { 156 + return __da903x_read(to_i2c_client(dev), reg, val); 157 + } 158 + EXPORT_SYMBOL_GPL(da903x_read); 159 + 160 + int da903x_set_bits(struct device *dev, int reg, uint8_t bit_mask) 161 + { 162 + struct da903x_chip *chip = dev_get_drvdata(dev); 163 + uint8_t reg_val; 164 + int ret = 0; 165 + 166 + mutex_lock(&chip->lock); 167 + 168 + ret = __da903x_read(chip->client, reg, &reg_val); 169 + if (ret) 170 + goto out; 171 + 172 + if ((reg_val & bit_mask) == 0) { 173 + reg_val |= bit_mask; 174 + ret = __da903x_write(chip->client, reg, reg_val); 175 + } 176 + out: 177 + mutex_unlock(&chip->lock); 178 + return ret; 179 + } 180 + EXPORT_SYMBOL_GPL(da903x_set_bits); 181 + 182 + int da903x_clr_bits(struct device *dev, int reg, uint8_t bit_mask) 183 + { 184 + struct da903x_chip *chip = dev_get_drvdata(dev); 185 + uint8_t reg_val; 186 + int ret = 0; 187 + 188 + mutex_lock(&chip->lock); 189 + 190 + ret = __da903x_read(chip->client, reg, &reg_val); 191 + if (ret) 192 + goto out; 193 + 194 + if (reg_val & bit_mask) { 195 + reg_val &= ~bit_mask; 196 + ret = __da903x_write(chip->client, reg, reg_val); 197 + } 198 + out: 199 + mutex_unlock(&chip->lock); 200 + return ret; 201 + } 202 + EXPORT_SYMBOL_GPL(da903x_clr_bits); 203 + 204 + int da903x_update(struct device *dev, int reg, uint8_t val, uint8_t mask) 205 + { 206 + struct da903x_chip *chip = dev_get_drvdata(dev); 207 + uint8_t reg_val; 208 + int ret = 0; 209 + 210 + mutex_lock(&chip->lock); 211 + 212 + ret = __da903x_read(chip->client, reg, &reg_val); 213 + if (ret) 214 + goto out; 215 + 216 + if ((reg_val & mask) != val) { 217 + reg_val = (reg_val & ~mask) | val; 218 + ret = __da903x_write(chip->client, reg, reg_val); 219 + } 220 + out: 221 + mutex_unlock(&chip->lock); 222 + return ret; 223 + } 224 + EXPORT_SYMBOL_GPL(da903x_update); 225 + 226 + int da903x_query_status(struct device *dev, unsigned int sbits) 227 + { 228 + struct da903x_chip *chip = dev_get_drvdata(dev); 229 + unsigned int status = 0; 230 + 231 + chip->ops->read_status(chip, &status); 232 + return ((status & sbits) == sbits); 233 + } 234 + EXPORT_SYMBOL(da903x_query_status); 235 + 236 + static int __devinit da9030_init_chip(struct da903x_chip *chip) 237 + { 238 + uint8_t chip_id; 239 + int err; 240 + 241 + err = __da903x_read(chip->client, DA9030_CHIP_ID, &chip_id); 242 + if (err) 243 + return err; 244 + 245 + err = __da903x_write(chip->client, DA9030_SYS_CTRL_A, 0xE8); 246 + if (err) 247 + return err; 248 + 249 + dev_info(chip->dev, "DA9030 (CHIP ID: 0x%02x) detected\n", chip_id); 250 + return 0; 251 + } 252 + 253 + static int da9030_unmask_events(struct da903x_chip *chip, unsigned int events) 254 + { 255 + uint8_t v[3]; 256 + 257 + chip->events_mask &= ~events; 258 + 259 + v[0] = (chip->events_mask & 0xff); 260 + v[1] = (chip->events_mask >> 8) & 0xff; 261 + v[2] = (chip->events_mask >> 16) & 0xff; 262 + 263 + return __da903x_writes(chip->client, DA9030_IRQ_MASK_A, 3, v); 264 + } 265 + 266 + static int da9030_mask_events(struct da903x_chip *chip, unsigned int events) 267 + { 268 + uint8_t v[3]; 269 + 270 + chip->events_mask &= ~events; 271 + 272 + v[0] = (chip->events_mask & 0xff); 273 + v[1] = (chip->events_mask >> 8) & 0xff; 274 + v[2] = (chip->events_mask >> 16) & 0xff; 275 + 276 + return __da903x_writes(chip->client, DA9030_IRQ_MASK_A, 3, v); 277 + } 278 + 279 + static int da9030_read_events(struct da903x_chip *chip, unsigned int *events) 280 + { 281 + uint8_t v[3] = {0, 0, 0}; 282 + int ret; 283 + 284 + ret = __da903x_reads(chip->client, DA9030_EVENT_A, 3, v); 285 + if (ret < 0) 286 + return ret; 287 + 288 + *events = (v[2] << 16) | (v[1] << 8) | v[0]; 289 + return 0; 290 + } 291 + 292 + static int da9030_read_status(struct da903x_chip *chip, unsigned int *status) 293 + { 294 + return __da903x_read(chip->client, DA9030_STATUS, (uint8_t *)status); 295 + } 296 + 297 + static int da9034_init_chip(struct da903x_chip *chip) 298 + { 299 + uint8_t chip_id; 300 + int err; 301 + 302 + err = __da903x_read(chip->client, DA9034_CHIP_ID, &chip_id); 303 + if (err) 304 + return err; 305 + 306 + err = __da903x_write(chip->client, DA9034_SYS_CTRL_A, 0xE8); 307 + if (err) 308 + return err; 309 + 310 + /* avoid SRAM power off during sleep*/ 311 + __da903x_write(chip->client, 0x10, 0x07); 312 + __da903x_write(chip->client, 0x11, 0xff); 313 + __da903x_write(chip->client, 0x12, 0xff); 314 + 315 + /* Enable the ONKEY power down functionality */ 316 + __da903x_write(chip->client, DA9034_SYS_CTRL_B, 0x20); 317 + __da903x_write(chip->client, DA9034_SYS_CTRL_A, 0x60); 318 + 319 + /* workaround to make LEDs work */ 320 + __da903x_write(chip->client, 0x90, 0x01); 321 + __da903x_write(chip->client, 0xB0, 0x08); 322 + 323 + /* make ADTV1 and SDTV1 effective */ 324 + __da903x_write(chip->client, 0x20, 0x00); 325 + 326 + dev_info(chip->dev, "DA9034 (CHIP ID: 0x%02x) detected\n", chip_id); 327 + return 0; 328 + } 329 + 330 + static int da9034_unmask_events(struct da903x_chip *chip, unsigned int events) 331 + { 332 + uint8_t v[4]; 333 + 334 + chip->events_mask &= ~events; 335 + 336 + v[0] = (chip->events_mask & 0xff); 337 + v[1] = (chip->events_mask >> 8) & 0xff; 338 + v[2] = (chip->events_mask >> 16) & 0xff; 339 + v[3] = (chip->events_mask >> 24) & 0xff; 340 + 341 + return __da903x_writes(chip->client, DA9034_IRQ_MASK_A, 4, v); 342 + } 343 + 344 + static int da9034_mask_events(struct da903x_chip *chip, unsigned int events) 345 + { 346 + uint8_t v[4]; 347 + 348 + chip->events_mask |= events; 349 + 350 + v[0] = (chip->events_mask & 0xff); 351 + v[1] = (chip->events_mask >> 8) & 0xff; 352 + v[2] = (chip->events_mask >> 16) & 0xff; 353 + v[3] = (chip->events_mask >> 24) & 0xff; 354 + 355 + return __da903x_writes(chip->client, DA9034_IRQ_MASK_A, 4, v); 356 + } 357 + 358 + static int da9034_read_events(struct da903x_chip *chip, unsigned int *events) 359 + { 360 + uint8_t v[4] = {0, 0, 0, 0}; 361 + int ret; 362 + 363 + ret = __da903x_reads(chip->client, DA9034_EVENT_A, 4, v); 364 + if (ret < 0) 365 + return ret; 366 + 367 + *events = (v[3] << 24) | (v[2] << 16) | (v[1] << 8) | v[0]; 368 + return 0; 369 + } 370 + 371 + static int da9034_read_status(struct da903x_chip *chip, unsigned int *status) 372 + { 373 + uint8_t v[2] = {0, 0}; 374 + int ret = 0; 375 + 376 + ret = __da903x_reads(chip->client, DA9034_STATUS_A, 2, v); 377 + if (ret) 378 + return ret; 379 + 380 + *status = (v[1] << 8) | v[0]; 381 + return 0; 382 + } 383 + 384 + static void da903x_irq_work(struct work_struct *work) 385 + { 386 + struct da903x_chip *chip = 387 + container_of(work, struct da903x_chip, irq_work); 388 + unsigned int events = 0; 389 + 390 + while (1) { 391 + if (chip->ops->read_events(chip, &events)) 392 + break; 393 + 394 + events &= ~chip->events_mask; 395 + if (events == 0) 396 + break; 397 + 398 + blocking_notifier_call_chain( 399 + &chip->notifier_list, events, NULL); 400 + } 401 + enable_irq(chip->client->irq); 402 + } 403 + 404 + static int da903x_irq_handler(int irq, void *data) 405 + { 406 + struct da903x_chip *chip = data; 407 + 408 + disable_irq_nosync(irq); 409 + (void)schedule_work(&chip->irq_work); 410 + 411 + return IRQ_HANDLED; 412 + } 413 + 414 + static struct da903x_chip_ops da903x_ops[] = { 415 + [0] = { 416 + .init_chip = da9030_init_chip, 417 + .unmask_events = da9030_unmask_events, 418 + .mask_events = da9030_mask_events, 419 + .read_events = da9030_read_events, 420 + .read_status = da9030_read_status, 421 + }, 422 + [1] = { 423 + .init_chip = da9034_init_chip, 424 + .unmask_events = da9034_unmask_events, 425 + .mask_events = da9034_mask_events, 426 + .read_events = da9034_read_events, 427 + .read_status = da9034_read_status, 428 + } 429 + }; 430 + 431 + static const struct i2c_device_id da903x_id_table[] = { 432 + { "da9030", 0 }, 433 + { "da9034", 1 }, 434 + { }, 435 + }; 436 + MODULE_DEVICE_TABLE(i2c, da903x_id_table); 437 + 438 + static int __devexit __remove_subdev(struct device *dev, void *unused) 439 + { 440 + platform_device_unregister(to_platform_device(dev)); 441 + return 0; 442 + } 443 + 444 + static int __devexit da903x_remove_subdevs(struct da903x_chip *chip) 445 + { 446 + return device_for_each_child(chip->dev, NULL, __remove_subdev); 447 + } 448 + 449 + static int __devinit da903x_add_subdevs(struct da903x_chip *chip, 450 + struct da903x_platform_data *pdata) 451 + { 452 + struct da903x_subdev_info *subdev; 453 + struct platform_device *pdev; 454 + int i, ret = 0; 455 + 456 + for (i = 0; i < pdata->num_subdevs; i++) { 457 + subdev = &pdata->subdevs[i]; 458 + 459 + pdev = platform_device_alloc(subdev->name, subdev->id); 460 + 461 + pdev->dev.parent = chip->dev; 462 + pdev->dev.platform_data = subdev->platform_data; 463 + 464 + ret = platform_device_add(pdev); 465 + if (ret) 466 + goto failed; 467 + } 468 + return 0; 469 + 470 + failed: 471 + da903x_remove_subdevs(chip); 472 + return ret; 473 + } 474 + 475 + static int __devinit da903x_probe(struct i2c_client *client, 476 + const struct i2c_device_id *id) 477 + { 478 + struct da903x_platform_data *pdata = client->dev.platform_data; 479 + struct da903x_chip *chip; 480 + unsigned int tmp; 481 + int ret; 482 + 483 + chip = kzalloc(sizeof(struct da903x_chip), GFP_KERNEL); 484 + if (chip == NULL) 485 + return -ENOMEM; 486 + 487 + chip->client = client; 488 + chip->dev = &client->dev; 489 + chip->ops = &da903x_ops[id->driver_data]; 490 + 491 + mutex_init(&chip->lock); 492 + INIT_WORK(&chip->irq_work, da903x_irq_work); 493 + BLOCKING_INIT_NOTIFIER_HEAD(&chip->notifier_list); 494 + 495 + i2c_set_clientdata(client, chip); 496 + 497 + ret = chip->ops->init_chip(chip); 498 + if (ret) 499 + goto out_free_chip; 500 + 501 + /* mask and clear all IRQs */ 502 + chip->events_mask = 0xffffffff; 503 + chip->ops->mask_events(chip, chip->events_mask); 504 + chip->ops->read_events(chip, &tmp); 505 + 506 + ret = request_irq(client->irq, da903x_irq_handler, 507 + IRQF_DISABLED | IRQF_TRIGGER_FALLING, 508 + "da903x", chip); 509 + if (ret) { 510 + dev_err(&client->dev, "failed to request irq %d\n", 511 + client->irq); 512 + goto out_free_chip; 513 + } 514 + 515 + ret = da903x_add_subdevs(chip, pdata); 516 + if (ret) 517 + goto out_free_irq; 518 + 519 + return 0; 520 + 521 + out_free_irq: 522 + free_irq(client->irq, chip); 523 + out_free_chip: 524 + i2c_set_clientdata(client, NULL); 525 + kfree(chip); 526 + return ret; 527 + } 528 + 529 + static int __devexit da903x_remove(struct i2c_client *client) 530 + { 531 + struct da903x_chip *chip = i2c_get_clientdata(client); 532 + 533 + da903x_remove_subdevs(chip); 534 + kfree(chip); 535 + return 0; 536 + } 537 + 538 + static struct i2c_driver da903x_driver = { 539 + .driver = { 540 + .name = "da903x", 541 + .owner = THIS_MODULE, 542 + }, 543 + .probe = da903x_probe, 544 + .remove = __devexit_p(da903x_remove), 545 + .id_table = da903x_id_table, 546 + }; 547 + 548 + static int __init da903x_init(void) 549 + { 550 + return i2c_add_driver(&da903x_driver); 551 + } 552 + module_init(da903x_init); 553 + 554 + static void __exit da903x_exit(void) 555 + { 556 + i2c_del_driver(&da903x_driver); 557 + } 558 + module_exit(da903x_exit); 559 + 560 + MODULE_DESCRIPTION("PMIC Driver for Dialog Semiconductor DA9034"); 561 + MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>" 562 + "Mike Rapoport <mike@compulab.co.il>"); 563 + MODULE_LICENSE("GPL");
+1 -1
drivers/mfd/htc-egpio.c
··· 289 289 ei->base_addr = ioremap_nocache(res->start, res->end - res->start); 290 290 if (!ei->base_addr) 291 291 goto fail; 292 - pr_debug("EGPIO phys=%08x virt=%p\n", res->start, ei->base_addr); 292 + pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr); 293 293 294 294 if ((pdata->bus_width != 16) && (pdata->bus_width != 32)) 295 295 goto fail;
+11 -4
drivers/mfd/mfd-core.c
··· 20 20 struct resource *mem_base, 21 21 int irq_base) 22 22 { 23 - struct resource res[cell->num_resources]; 23 + struct resource *res; 24 24 struct platform_device *pdev; 25 25 int ret = -ENOMEM; 26 26 int r; ··· 29 29 if (!pdev) 30 30 goto fail_alloc; 31 31 32 + res = kzalloc(sizeof(*res) * cell->num_resources, GFP_KERNEL); 33 + if (!res) 34 + goto fail_device; 35 + 32 36 pdev->dev.parent = parent; 33 37 34 38 ret = platform_device_add_data(pdev, 35 39 cell->platform_data, cell->data_size); 36 40 if (ret) 37 - goto fail_device; 41 + goto fail_res; 38 42 39 - memset(res, 0, sizeof(res)); 40 43 for (r = 0; r < cell->num_resources; r++) { 41 44 res[r].name = cell->resources[r].name; 42 45 res[r].flags = cell->resources[r].flags; ··· 67 64 68 65 ret = platform_device_add(pdev); 69 66 if (ret) 70 - goto fail_device; 67 + goto fail_res; 68 + 69 + kfree(res); 71 70 72 71 return 0; 73 72 74 73 /* platform_device_del(pdev); */ 74 + fail_res: 75 + kfree(res); 75 76 fail_device: 76 77 platform_device_put(pdev); 77 78 fail_alloc:
+3 -3
drivers/mfd/sm501.c
··· 623 623 624 624 sm501_sync_regs(sm); 625 625 626 - dev_info(sm->dev, "gate %08lx, clock %08lx, mode %08lx\n", 627 - gate, clock, mode); 626 + dev_dbg(sm->dev, "gate %08lx, clock %08lx, mode %08lx\n", 627 + gate, clock, mode); 628 628 629 629 sm501_mdelay(sm, 16); 630 630 mutex_unlock(&sm->clock_lock); ··· 742 742 int ret; 743 743 744 744 for (ptr = 0; ptr < pdev->num_resources; ptr++) { 745 - printk("%s[%d] flags %08lx: %08llx..%08llx\n", 745 + printk(KERN_DEBUG "%s[%d] flags %08lx: %08llx..%08llx\n", 746 746 pdev->name, ptr, 747 747 pdev->resource[ptr].flags, 748 748 (unsigned long long)pdev->resource[ptr].start,
+32 -8
drivers/mfd/t7l66xb.c
··· 24 24 25 25 #include <linux/kernel.h> 26 26 #include <linux/module.h> 27 + #include <linux/err.h> 27 28 #include <linux/io.h> 28 29 #include <linux/irq.h> 30 + #include <linux/clk.h> 29 31 #include <linux/platform_device.h> 30 32 #include <linux/mfd/core.h> 31 33 #include <linux/mfd/tmio.h> ··· 58 56 spinlock_t lock; 59 57 60 58 struct resource rscr; 59 + struct clk *clk48m; 60 + struct clk *clk32k; 61 61 int irq; 62 62 int irq_base; 63 63 }; ··· 69 65 static int t7l66xb_mmc_enable(struct platform_device *mmc) 70 66 { 71 67 struct platform_device *dev = to_platform_device(mmc->dev.parent); 72 - struct t7l66xb_platform_data *pdata = dev->dev.platform_data; 73 68 struct t7l66xb *t7l66xb = platform_get_drvdata(dev); 74 69 unsigned long flags; 75 70 u8 dev_ctl; 76 71 77 - if (pdata->enable_clk32k) 78 - pdata->enable_clk32k(dev); 72 + clk_enable(t7l66xb->clk32k); 79 73 80 74 spin_lock_irqsave(&t7l66xb->lock, flags); 81 75 ··· 89 87 static int t7l66xb_mmc_disable(struct platform_device *mmc) 90 88 { 91 89 struct platform_device *dev = to_platform_device(mmc->dev.parent); 92 - struct t7l66xb_platform_data *pdata = dev->dev.platform_data; 93 90 struct t7l66xb *t7l66xb = platform_get_drvdata(dev); 94 91 unsigned long flags; 95 92 u8 dev_ctl; ··· 101 100 102 101 spin_unlock_irqrestore(&t7l66xb->lock, flags); 103 102 104 - if (pdata->disable_clk32k) 105 - pdata->disable_clk32k(dev); 103 + clk_disable(t7l66xb->clk32k); 106 104 107 105 return 0; 108 106 } ··· 258 258 #ifdef CONFIG_PM 259 259 static int t7l66xb_suspend(struct platform_device *dev, pm_message_t state) 260 260 { 261 + struct t7l66xb *t7l66xb = platform_get_drvdata(dev); 261 262 struct t7l66xb_platform_data *pdata = dev->dev.platform_data; 262 263 263 264 if (pdata && pdata->suspend) 264 265 pdata->suspend(dev); 266 + clk_disable(t7l66xb->clk48m); 265 267 266 268 return 0; 267 269 } 268 270 269 271 static int t7l66xb_resume(struct platform_device *dev) 270 272 { 273 + struct t7l66xb *t7l66xb = platform_get_drvdata(dev); 271 274 struct t7l66xb_platform_data *pdata = dev->dev.platform_data; 272 275 276 + clk_enable(t7l66xb->clk48m); 273 277 if (pdata && pdata->resume) 274 278 pdata->resume(dev); 275 279 ··· 313 309 314 310 t7l66xb->irq_base = pdata->irq_base; 315 311 312 + t7l66xb->clk32k = clk_get(&dev->dev, "CLK_CK32K"); 313 + if (IS_ERR(t7l66xb->clk32k)) { 314 + ret = PTR_ERR(t7l66xb->clk32k); 315 + goto err_clk32k_get; 316 + } 317 + 318 + t7l66xb->clk48m = clk_get(&dev->dev, "CLK_CK48M"); 319 + if (IS_ERR(t7l66xb->clk48m)) { 320 + ret = PTR_ERR(t7l66xb->clk48m); 321 + clk_put(t7l66xb->clk32k); 322 + goto err_clk48m_get; 323 + } 324 + 316 325 rscr = &t7l66xb->rscr; 317 326 rscr->name = "t7l66xb-core"; 318 327 rscr->start = iomem->start; ··· 341 324 ret = -ENOMEM; 342 325 goto err_ioremap; 343 326 } 327 + 328 + clk_enable(t7l66xb->clk48m); 344 329 345 330 if (pdata && pdata->enable) 346 331 pdata->enable(dev); ··· 378 359 iounmap(t7l66xb->scr); 379 360 err_ioremap: 380 361 release_resource(&t7l66xb->rscr); 381 - err_noirq: 382 362 err_request_scr: 383 363 kfree(t7l66xb); 364 + clk_put(t7l66xb->clk48m); 365 + err_clk48m_get: 366 + clk_put(t7l66xb->clk32k); 367 + err_clk32k_get: 368 + err_noirq: 384 369 return ret; 385 370 } 386 371 ··· 395 372 int ret; 396 373 397 374 ret = pdata->disable(dev); 398 - 375 + clk_disable(t7l66xb->clk48m); 376 + clk_put(t7l66xb->clk48m); 399 377 t7l66xb_detach_irq(dev); 400 378 iounmap(t7l66xb->scr); 401 379 release_resource(&t7l66xb->rscr);
+29 -18
drivers/mfd/tc6387xb.c
··· 12 12 13 13 #include <linux/module.h> 14 14 #include <linux/platform_device.h> 15 + #include <linux/clk.h> 15 16 #include <linux/err.h> 16 17 #include <linux/mfd/core.h> 17 18 #include <linux/mfd/tmio.h> ··· 25 24 #ifdef CONFIG_PM 26 25 static int tc6387xb_suspend(struct platform_device *dev, pm_message_t state) 27 26 { 28 - struct tc6387xb_platform_data *pdata = platform_get_drvdata(dev); 27 + struct clk *clk32k = platform_get_drvdata(dev); 28 + struct tc6387xb_platform_data *pdata = dev->dev.platform_data; 29 29 30 30 if (pdata && pdata->suspend) 31 31 pdata->suspend(dev); 32 + clk_disable(clk32k); 32 33 33 34 return 0; 34 35 } 35 36 36 37 static int tc6387xb_resume(struct platform_device *dev) 37 38 { 38 - struct tc6387xb_platform_data *pdata = platform_get_drvdata(dev); 39 + struct clk *clk32k = platform_get_drvdata(dev); 40 + struct tc6387xb_platform_data *pdata = dev->dev.platform_data; 39 41 42 + clk_enable(clk32k); 40 43 if (pdata && pdata->resume) 41 44 pdata->resume(dev); 42 45 ··· 56 51 static int tc6387xb_mmc_enable(struct platform_device *mmc) 57 52 { 58 53 struct platform_device *dev = to_platform_device(mmc->dev.parent); 59 - struct tc6387xb_platform_data *tc6387xb = dev->dev.platform_data; 54 + struct clk *clk32k = platform_get_drvdata(dev); 60 55 61 - if (tc6387xb->enable_clk32k) 62 - tc6387xb->enable_clk32k(dev); 56 + clk_enable(clk32k); 63 57 64 58 return 0; 65 59 } ··· 66 62 static int tc6387xb_mmc_disable(struct platform_device *mmc) 67 63 { 68 64 struct platform_device *dev = to_platform_device(mmc->dev.parent); 69 - struct tc6387xb_platform_data *tc6387xb = dev->dev.platform_data; 65 + struct clk *clk32k = platform_get_drvdata(dev); 70 66 71 - if (tc6387xb->disable_clk32k) 72 - tc6387xb->disable_clk32k(dev); 67 + clk_disable(clk32k); 73 68 74 69 return 0; 75 70 } ··· 105 102 106 103 static int tc6387xb_probe(struct platform_device *dev) 107 104 { 108 - struct tc6387xb_platform_data *data = platform_get_drvdata(dev); 105 + struct tc6387xb_platform_data *pdata = dev->dev.platform_data; 109 106 struct resource *iomem; 107 + struct clk *clk32k; 110 108 int irq, ret; 111 109 112 110 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0); 113 111 if (!iomem) { 114 - ret = -EINVAL; 115 - goto err_resource; 112 + return -EINVAL; 116 113 } 117 114 118 115 ret = platform_get_irq(dev, 0); ··· 121 118 else 122 119 goto err_resource; 123 120 124 - if (data && data->enable) 125 - data->enable(dev); 121 + clk32k = clk_get(&dev->dev, "CLK_CK32K"); 122 + if (IS_ERR(clk32k)) { 123 + ret = PTR_ERR(clk32k); 124 + goto err_resource; 125 + } 126 + platform_set_drvdata(dev, clk32k); 127 + 128 + if (pdata && pdata->enable) 129 + pdata->enable(dev); 126 130 127 131 printk(KERN_INFO "Toshiba tc6387xb initialised\n"); 128 132 ··· 144 134 if (!ret) 145 135 return 0; 146 136 137 + clk_put(clk32k); 147 138 err_resource: 148 139 return ret; 149 140 } 150 141 151 142 static int tc6387xb_remove(struct platform_device *dev) 152 143 { 153 - struct tc6387xb_platform_data *data = platform_get_drvdata(dev); 144 + struct clk *clk32k = platform_get_drvdata(dev); 154 145 155 - if (data && data->disable) 156 - data->disable(dev); 157 - 158 - /* FIXME - free the resources! */ 146 + mfd_remove_devices(&dev->dev); 147 + clk_disable(clk32k); 148 + clk_put(clk32k); 149 + platform_set_drvdata(dev, NULL); 159 150 160 151 return 0; 161 152 }
+249 -47
drivers/mfd/tc6393xb.c
··· 113 113 enum { 114 114 TC6393XB_CELL_NAND, 115 115 TC6393XB_CELL_MMC, 116 + TC6393XB_CELL_OHCI, 117 + TC6393XB_CELL_FB, 116 118 }; 117 119 118 120 /*--------------------------------------------------------------------------*/ ··· 172 170 }, 173 171 }; 174 172 173 + const static struct resource tc6393xb_ohci_resources[] = { 174 + { 175 + .start = 0x3000, 176 + .end = 0x31ff, 177 + .flags = IORESOURCE_MEM, 178 + }, 179 + { 180 + .start = 0x0300, 181 + .end = 0x03ff, 182 + .flags = IORESOURCE_MEM, 183 + }, 184 + { 185 + .start = 0x010000, 186 + .end = 0x017fff, 187 + .flags = IORESOURCE_MEM, 188 + }, 189 + { 190 + .start = 0x018000, 191 + .end = 0x01ffff, 192 + .flags = IORESOURCE_MEM, 193 + }, 194 + { 195 + .start = IRQ_TC6393_OHCI, 196 + .end = IRQ_TC6393_OHCI, 197 + .flags = IORESOURCE_IRQ, 198 + }, 199 + }; 200 + 201 + static struct resource __devinitdata tc6393xb_fb_resources[] = { 202 + { 203 + .start = 0x5000, 204 + .end = 0x51ff, 205 + .flags = IORESOURCE_MEM, 206 + }, 207 + { 208 + .start = 0x0500, 209 + .end = 0x05ff, 210 + .flags = IORESOURCE_MEM, 211 + }, 212 + { 213 + .start = 0x100000, 214 + .end = 0x1fffff, 215 + .flags = IORESOURCE_MEM, 216 + }, 217 + { 218 + .start = IRQ_TC6393_FB, 219 + .end = IRQ_TC6393_FB, 220 + .flags = IORESOURCE_IRQ, 221 + }, 222 + }; 223 + 224 + static int tc6393xb_ohci_enable(struct platform_device *dev) 225 + { 226 + struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent); 227 + unsigned long flags; 228 + u16 ccr; 229 + u8 fer; 230 + 231 + spin_lock_irqsave(&tc6393xb->lock, flags); 232 + 233 + ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); 234 + ccr |= SCR_CCR_USBCK; 235 + tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); 236 + 237 + fer = tmio_ioread8(tc6393xb->scr + SCR_FER); 238 + fer |= SCR_FER_USBEN; 239 + tmio_iowrite8(fer, tc6393xb->scr + SCR_FER); 240 + 241 + spin_unlock_irqrestore(&tc6393xb->lock, flags); 242 + 243 + return 0; 244 + } 245 + 246 + static int tc6393xb_ohci_disable(struct platform_device *dev) 247 + { 248 + struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent); 249 + unsigned long flags; 250 + u16 ccr; 251 + u8 fer; 252 + 253 + spin_lock_irqsave(&tc6393xb->lock, flags); 254 + 255 + fer = tmio_ioread8(tc6393xb->scr + SCR_FER); 256 + fer &= ~SCR_FER_USBEN; 257 + tmio_iowrite8(fer, tc6393xb->scr + SCR_FER); 258 + 259 + ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); 260 + ccr &= ~SCR_CCR_USBCK; 261 + tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); 262 + 263 + spin_unlock_irqrestore(&tc6393xb->lock, flags); 264 + 265 + return 0; 266 + } 267 + 268 + static int tc6393xb_fb_enable(struct platform_device *dev) 269 + { 270 + struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent); 271 + unsigned long flags; 272 + u16 ccr; 273 + 274 + spin_lock_irqsave(&tc6393xb->lock, flags); 275 + 276 + ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); 277 + ccr &= ~SCR_CCR_MCLK_MASK; 278 + ccr |= SCR_CCR_MCLK_48; 279 + tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); 280 + 281 + spin_unlock_irqrestore(&tc6393xb->lock, flags); 282 + 283 + return 0; 284 + } 285 + 286 + static int tc6393xb_fb_disable(struct platform_device *dev) 287 + { 288 + struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent); 289 + unsigned long flags; 290 + u16 ccr; 291 + 292 + spin_lock_irqsave(&tc6393xb->lock, flags); 293 + 294 + ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); 295 + ccr &= ~SCR_CCR_MCLK_MASK; 296 + ccr |= SCR_CCR_MCLK_OFF; 297 + tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); 298 + 299 + spin_unlock_irqrestore(&tc6393xb->lock, flags); 300 + 301 + return 0; 302 + } 303 + 304 + int tc6393xb_lcd_set_power(struct platform_device *fb, bool on) 305 + { 306 + struct platform_device *dev = to_platform_device(fb->dev.parent); 307 + struct tc6393xb *tc6393xb = platform_get_drvdata(dev); 308 + u8 fer; 309 + unsigned long flags; 310 + 311 + spin_lock_irqsave(&tc6393xb->lock, flags); 312 + 313 + fer = ioread8(tc6393xb->scr + SCR_FER); 314 + if (on) 315 + fer |= SCR_FER_SLCDEN; 316 + else 317 + fer &= ~SCR_FER_SLCDEN; 318 + iowrite8(fer, tc6393xb->scr + SCR_FER); 319 + 320 + spin_unlock_irqrestore(&tc6393xb->lock, flags); 321 + 322 + return 0; 323 + } 324 + EXPORT_SYMBOL(tc6393xb_lcd_set_power); 325 + 326 + int tc6393xb_lcd_mode(struct platform_device *fb, 327 + const struct fb_videomode *mode) { 328 + struct platform_device *dev = to_platform_device(fb->dev.parent); 329 + struct tc6393xb *tc6393xb = platform_get_drvdata(dev); 330 + unsigned long flags; 331 + 332 + spin_lock_irqsave(&tc6393xb->lock, flags); 333 + 334 + iowrite16(mode->pixclock, tc6393xb->scr + SCR_PLL1CR + 0); 335 + iowrite16(mode->pixclock >> 16, tc6393xb->scr + SCR_PLL1CR + 2); 336 + 337 + spin_unlock_irqrestore(&tc6393xb->lock, flags); 338 + 339 + return 0; 340 + } 341 + EXPORT_SYMBOL(tc6393xb_lcd_mode); 342 + 175 343 static struct mfd_cell __devinitdata tc6393xb_cells[] = { 176 344 [TC6393XB_CELL_NAND] = { 177 345 .name = "tmio-nand", ··· 353 181 .name = "tmio-mmc", 354 182 .num_resources = ARRAY_SIZE(tc6393xb_mmc_resources), 355 183 .resources = tc6393xb_mmc_resources, 184 + }, 185 + [TC6393XB_CELL_OHCI] = { 186 + .name = "tmio-ohci", 187 + .num_resources = ARRAY_SIZE(tc6393xb_ohci_resources), 188 + .resources = tc6393xb_ohci_resources, 189 + .enable = tc6393xb_ohci_enable, 190 + .suspend = tc6393xb_ohci_disable, 191 + .resume = tc6393xb_ohci_enable, 192 + .disable = tc6393xb_ohci_disable, 193 + }, 194 + [TC6393XB_CELL_FB] = { 195 + .name = "tmio-fb", 196 + .num_resources = ARRAY_SIZE(tc6393xb_fb_resources), 197 + .resources = tc6393xb_fb_resources, 198 + .enable = tc6393xb_fb_enable, 199 + .suspend = tc6393xb_fb_disable, 200 + .resume = tc6393xb_fb_enable, 201 + .disable = tc6393xb_fb_disable, 356 202 }, 357 203 }; 358 204 ··· 559 369 560 370 /*--------------------------------------------------------------------------*/ 561 371 562 - static int tc6393xb_hw_init(struct platform_device *dev) 563 - { 564 - struct tc6393xb_platform_data *tcpd = dev->dev.platform_data; 565 - struct tc6393xb *tc6393xb = platform_get_drvdata(dev); 566 - int i; 567 - 568 - iowrite8(tc6393xb->suspend_state.fer, tc6393xb->scr + SCR_FER); 569 - iowrite16(tcpd->scr_pll2cr, tc6393xb->scr + SCR_PLL2CR); 570 - iowrite16(tc6393xb->suspend_state.ccr, tc6393xb->scr + SCR_CCR); 571 - iowrite16(SCR_MCR_RDY_OPENDRAIN | SCR_MCR_RDY_UNK | SCR_MCR_RDY_EN | 572 - SCR_MCR_INT_OPENDRAIN | SCR_MCR_INT_UNK | SCR_MCR_INT_EN | 573 - BIT(15), tc6393xb->scr + SCR_MCR); 574 - iowrite16(tcpd->scr_gper, tc6393xb->scr + SCR_GPER); 575 - iowrite8(0, tc6393xb->scr + SCR_IRR); 576 - iowrite8(0xbf, tc6393xb->scr + SCR_IMR); 577 - 578 - for (i = 0; i < 3; i++) { 579 - iowrite8(tc6393xb->suspend_state.gpo_dsr[i], 580 - tc6393xb->scr + SCR_GPO_DSR(i)); 581 - iowrite8(tc6393xb->suspend_state.gpo_doecr[i], 582 - tc6393xb->scr + SCR_GPO_DOECR(i)); 583 - iowrite8(tc6393xb->suspend_state.gpi_bcr[i], 584 - tc6393xb->scr + SCR_GPI_BCR(i)); 585 - } 586 - 587 - return 0; 588 - } 589 - 590 372 static int __devinit tc6393xb_probe(struct platform_device *dev) 591 373 { 592 374 struct tc6393xb_platform_data *tcpd = dev->dev.platform_data; 593 375 struct tc6393xb *tc6393xb; 594 376 struct resource *iomem, *rscr; 595 377 int ret, temp; 596 - int i; 597 378 598 379 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0); 599 380 if (!iomem) ··· 619 458 if (ret) 620 459 goto err_enable; 621 460 622 - tc6393xb->suspend_state.fer = 0; 623 - 624 - for (i = 0; i < 3; i++) { 625 - tc6393xb->suspend_state.gpo_dsr[i] = 626 - (tcpd->scr_gpo_dsr >> (8 * i)) & 0xff; 627 - tc6393xb->suspend_state.gpo_doecr[i] = 628 - (tcpd->scr_gpo_doecr >> (8 * i)) & 0xff; 629 - } 630 - 631 - tc6393xb->suspend_state.ccr = SCR_CCR_UNK1 | 632 - SCR_CCR_HCLK_48; 633 - 634 - ret = tc6393xb_hw_init(dev); 635 - if (ret) 636 - goto err_hw_init; 461 + iowrite8(0, tc6393xb->scr + SCR_FER); 462 + iowrite16(tcpd->scr_pll2cr, tc6393xb->scr + SCR_PLL2CR); 463 + iowrite16(SCR_CCR_UNK1 | SCR_CCR_HCLK_48, 464 + tc6393xb->scr + SCR_CCR); 465 + iowrite16(SCR_MCR_RDY_OPENDRAIN | SCR_MCR_RDY_UNK | SCR_MCR_RDY_EN | 466 + SCR_MCR_INT_OPENDRAIN | SCR_MCR_INT_UNK | SCR_MCR_INT_EN | 467 + BIT(15), tc6393xb->scr + SCR_MCR); 468 + iowrite16(tcpd->scr_gper, tc6393xb->scr + SCR_GPER); 469 + iowrite8(0, tc6393xb->scr + SCR_IRR); 470 + iowrite8(0xbf, tc6393xb->scr + SCR_IMR); 637 471 638 472 printk(KERN_INFO "Toshiba tc6393xb revision %d at 0x%08lx, irq %d\n", 639 473 tmio_ioread8(tc6393xb->scr + SCR_REVID), ··· 644 488 645 489 tc6393xb_attach_irq(dev); 646 490 491 + if (tcpd->setup) { 492 + ret = tcpd->setup(dev); 493 + if (ret) 494 + goto err_setup; 495 + } 496 + 647 497 tc6393xb_cells[TC6393XB_CELL_NAND].driver_data = tcpd->nand_data; 648 498 tc6393xb_cells[TC6393XB_CELL_NAND].platform_data = 649 499 &tc6393xb_cells[TC6393XB_CELL_NAND]; 650 500 tc6393xb_cells[TC6393XB_CELL_NAND].data_size = 651 501 sizeof(tc6393xb_cells[TC6393XB_CELL_NAND]); 502 + 652 503 tc6393xb_cells[TC6393XB_CELL_MMC].platform_data = 653 504 &tc6393xb_cells[TC6393XB_CELL_MMC]; 654 505 tc6393xb_cells[TC6393XB_CELL_MMC].data_size = 655 506 sizeof(tc6393xb_cells[TC6393XB_CELL_MMC]); 656 507 508 + tc6393xb_cells[TC6393XB_CELL_OHCI].platform_data = 509 + &tc6393xb_cells[TC6393XB_CELL_OHCI]; 510 + tc6393xb_cells[TC6393XB_CELL_OHCI].data_size = 511 + sizeof(tc6393xb_cells[TC6393XB_CELL_OHCI]); 512 + 513 + tc6393xb_cells[TC6393XB_CELL_FB].driver_data = tcpd->fb_data; 514 + tc6393xb_cells[TC6393XB_CELL_FB].platform_data = 515 + &tc6393xb_cells[TC6393XB_CELL_FB]; 516 + tc6393xb_cells[TC6393XB_CELL_FB].data_size = 517 + sizeof(tc6393xb_cells[TC6393XB_CELL_FB]); 657 518 658 519 ret = mfd_add_devices(&dev->dev, dev->id, 659 520 tc6393xb_cells, ARRAY_SIZE(tc6393xb_cells), ··· 679 506 if (!ret) 680 507 return 0; 681 508 509 + if (tcpd->teardown) 510 + tcpd->teardown(dev); 511 + 512 + err_setup: 682 513 tc6393xb_detach_irq(dev); 683 514 684 515 err_gpio_add: 685 516 if (tc6393xb->gpio.base != -1) 686 517 temp = gpiochip_remove(&tc6393xb->gpio); 687 - err_hw_init: 688 518 tcpd->disable(dev); 689 519 err_clk_enable: 690 520 clk_disable(tc6393xb->clk); ··· 711 535 int ret; 712 536 713 537 mfd_remove_devices(&dev->dev); 538 + 539 + if (tcpd->teardown) 540 + tcpd->teardown(dev); 541 + 714 542 tc6393xb_detach_irq(dev); 715 543 716 544 if (tc6393xb->gpio.base != -1) { ··· 765 585 struct tc6393xb_platform_data *tcpd = dev->dev.platform_data; 766 586 struct tc6393xb *tc6393xb = platform_get_drvdata(dev); 767 587 int ret; 588 + int i; 768 589 769 590 clk_enable(tc6393xb->clk); 770 591 771 592 ret = tcpd->resume(dev); 772 - 773 593 if (ret) 774 594 return ret; 775 595 776 - return tc6393xb_hw_init(dev); 596 + if (!tcpd->resume_restore) 597 + return 0; 598 + 599 + iowrite8(tc6393xb->suspend_state.fer, tc6393xb->scr + SCR_FER); 600 + iowrite16(tcpd->scr_pll2cr, tc6393xb->scr + SCR_PLL2CR); 601 + iowrite16(tc6393xb->suspend_state.ccr, tc6393xb->scr + SCR_CCR); 602 + iowrite16(SCR_MCR_RDY_OPENDRAIN | SCR_MCR_RDY_UNK | SCR_MCR_RDY_EN | 603 + SCR_MCR_INT_OPENDRAIN | SCR_MCR_INT_UNK | SCR_MCR_INT_EN | 604 + BIT(15), tc6393xb->scr + SCR_MCR); 605 + iowrite16(tcpd->scr_gper, tc6393xb->scr + SCR_GPER); 606 + iowrite8(0, tc6393xb->scr + SCR_IRR); 607 + iowrite8(0xbf, tc6393xb->scr + SCR_IMR); 608 + 609 + for (i = 0; i < 3; i++) { 610 + iowrite8(tc6393xb->suspend_state.gpo_dsr[i], 611 + tc6393xb->scr + SCR_GPO_DSR(i)); 612 + iowrite8(tc6393xb->suspend_state.gpo_doecr[i], 613 + tc6393xb->scr + SCR_GPO_DOECR(i)); 614 + iowrite8(tc6393xb->suspend_state.gpi_bcr[i], 615 + tc6393xb->scr + SCR_GPI_BCR(i)); 616 + } 617 + 618 + return 0; 777 619 } 778 620 #else 779 621 #define tc6393xb_suspend NULL
+1193
drivers/mfd/twl4030-core.c
··· 1 + /* 2 + * twl4030_core.c - driver for TWL4030/TPS659x0 PM and audio CODEC devices 3 + * 4 + * Copyright (C) 2005-2006 Texas Instruments, Inc. 5 + * 6 + * Modifications to defer interrupt handling to a kernel thread: 7 + * Copyright (C) 2006 MontaVista Software, Inc. 8 + * 9 + * Based on tlv320aic23.c: 10 + * Copyright (c) by Kai Svahn <kai.svahn@nokia.com> 11 + * 12 + * Code cleanup and modifications to IRQ handler. 13 + * by syed khasim <x0khasim@ti.com> 14 + * 15 + * This program is free software; you can redistribute it and/or modify 16 + * it under the terms of the GNU General Public License as published by 17 + * the Free Software Foundation; either version 2 of the License, or 18 + * (at your option) any later version. 19 + * 20 + * This program is distributed in the hope that it will be useful, 21 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 + * GNU General Public License for more details. 24 + * 25 + * You should have received a copy of the GNU General Public License 26 + * along with this program; if not, write to the Free Software 27 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 28 + */ 29 + 30 + #include <linux/kernel_stat.h> 31 + #include <linux/init.h> 32 + #include <linux/mutex.h> 33 + #include <linux/interrupt.h> 34 + #include <linux/irq.h> 35 + #include <linux/random.h> 36 + #include <linux/kthread.h> 37 + #include <linux/platform_device.h> 38 + #include <linux/clk.h> 39 + 40 + #include <linux/i2c.h> 41 + #include <linux/i2c/twl4030.h> 42 + 43 + 44 + /* 45 + * The TWL4030 "Triton 2" is one of a family of a multi-function "Power 46 + * Management and System Companion Device" chips originally designed for 47 + * use in OMAP2 and OMAP 3 based systems. Its control interfaces use I2C, 48 + * often at around 3 Mbit/sec, including for interrupt handling. 49 + * 50 + * This driver core provides genirq support for the interrupts emitted, 51 + * by the various modules, and exports register access primitives. 52 + * 53 + * FIXME this driver currently requires use of the first interrupt line 54 + * (and associated registers). 55 + */ 56 + 57 + #define DRIVER_NAME "twl4030" 58 + 59 + #if defined(CONFIG_TWL4030_BCI_BATTERY) || \ 60 + defined(CONFIG_TWL4030_BCI_BATTERY_MODULE) 61 + #define twl_has_bci() true 62 + #else 63 + #define twl_has_bci() false 64 + #endif 65 + 66 + #if defined(CONFIG_KEYBOARD_TWL4030) || defined(CONFIG_KEYBOARD_TWL4030_MODULE) 67 + #define twl_has_keypad() true 68 + #else 69 + #define twl_has_keypad() false 70 + #endif 71 + 72 + #if defined(CONFIG_GPIO_TWL4030) || defined(CONFIG_GPIO_TWL4030_MODULE) 73 + #define twl_has_gpio() true 74 + #else 75 + #define twl_has_gpio() false 76 + #endif 77 + 78 + #if defined(CONFIG_TWL4030_MADC) || defined(CONFIG_TWL4030_MADC_MODULE) 79 + #define twl_has_madc() true 80 + #else 81 + #define twl_has_madc() false 82 + #endif 83 + 84 + #if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE) 85 + #define twl_has_rtc() true 86 + #else 87 + #define twl_has_rtc() false 88 + #endif 89 + 90 + #if defined(CONFIG_TWL4030_USB) || defined(CONFIG_TWL4030_USB_MODULE) 91 + #define twl_has_usb() true 92 + #else 93 + #define twl_has_usb() false 94 + #endif 95 + 96 + static inline void activate_irq(int irq) 97 + { 98 + #ifdef CONFIG_ARM 99 + /* ARM requires an extra step to clear IRQ_NOREQUEST, which it 100 + * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE. 101 + */ 102 + set_irq_flags(irq, IRQF_VALID); 103 + #else 104 + /* same effect on other architectures */ 105 + set_irq_noprobe(irq); 106 + #endif 107 + } 108 + 109 + /* Primary Interrupt Handler on TWL4030 Registers */ 110 + 111 + /* Register Definitions */ 112 + 113 + #define REG_PIH_ISR_P1 (0x1) 114 + #define REG_PIH_ISR_P2 (0x2) 115 + #define REG_PIH_SIR (0x3) 116 + 117 + /* Triton Core internal information (BEGIN) */ 118 + 119 + /* Last - for index max*/ 120 + #define TWL4030_MODULE_LAST TWL4030_MODULE_SECURED_REG 121 + 122 + #define TWL4030_NUM_SLAVES 4 123 + 124 + 125 + /* Base Address defns for twl4030_map[] */ 126 + 127 + /* subchip/slave 0 - USB ID */ 128 + #define TWL4030_BASEADD_USB 0x0000 129 + 130 + /* subchip/slave 1 - AUD ID */ 131 + #define TWL4030_BASEADD_AUDIO_VOICE 0x0000 132 + #define TWL4030_BASEADD_GPIO 0x0098 133 + #define TWL4030_BASEADD_INTBR 0x0085 134 + #define TWL4030_BASEADD_PIH 0x0080 135 + #define TWL4030_BASEADD_TEST 0x004C 136 + 137 + /* subchip/slave 2 - AUX ID */ 138 + #define TWL4030_BASEADD_INTERRUPTS 0x00B9 139 + #define TWL4030_BASEADD_LED 0x00EE 140 + #define TWL4030_BASEADD_MADC 0x0000 141 + #define TWL4030_BASEADD_MAIN_CHARGE 0x0074 142 + #define TWL4030_BASEADD_PRECHARGE 0x00AA 143 + #define TWL4030_BASEADD_PWM0 0x00F8 144 + #define TWL4030_BASEADD_PWM1 0x00FB 145 + #define TWL4030_BASEADD_PWMA 0x00EF 146 + #define TWL4030_BASEADD_PWMB 0x00F1 147 + #define TWL4030_BASEADD_KEYPAD 0x00D2 148 + 149 + /* subchip/slave 3 - POWER ID */ 150 + #define TWL4030_BASEADD_BACKUP 0x0014 151 + #define TWL4030_BASEADD_INT 0x002E 152 + #define TWL4030_BASEADD_PM_MASTER 0x0036 153 + #define TWL4030_BASEADD_PM_RECEIVER 0x005B 154 + #define TWL4030_BASEADD_RTC 0x001C 155 + #define TWL4030_BASEADD_SECURED_REG 0x0000 156 + 157 + /* Triton Core internal information (END) */ 158 + 159 + 160 + /* Few power values */ 161 + #define R_CFG_BOOT 0x05 162 + #define R_PROTECT_KEY 0x0E 163 + 164 + /* access control values for R_PROTECT_KEY */ 165 + #define KEY_UNLOCK1 0xce 166 + #define KEY_UNLOCK2 0xec 167 + #define KEY_LOCK 0x00 168 + 169 + /* some fields in R_CFG_BOOT */ 170 + #define HFCLK_FREQ_19p2_MHZ (1 << 0) 171 + #define HFCLK_FREQ_26_MHZ (2 << 0) 172 + #define HFCLK_FREQ_38p4_MHZ (3 << 0) 173 + #define HIGH_PERF_SQ (1 << 3) 174 + 175 + 176 + /*----------------------------------------------------------------------*/ 177 + 178 + /** 179 + * struct twl4030_mod_iregs - TWL module IMR/ISR regs to mask/clear at init 180 + * @mod_no: TWL4030 module number (e.g., TWL4030_MODULE_GPIO) 181 + * @sih_ctrl: address of module SIH_CTRL register 182 + * @reg_cnt: number of IMR/ISR regs 183 + * @imrs: pointer to array of TWL module interrupt mask register indices 184 + * @isrs: pointer to array of TWL module interrupt status register indices 185 + * 186 + * Ties together TWL4030 modules and lists of IMR/ISR registers to mask/clear 187 + * during twl_init_irq(). 188 + */ 189 + struct twl4030_mod_iregs { 190 + const u8 mod_no; 191 + const u8 sih_ctrl; 192 + const u8 reg_cnt; 193 + const u8 *imrs; 194 + const u8 *isrs; 195 + }; 196 + 197 + /* TWL4030 INT module interrupt mask registers */ 198 + static const u8 __initconst twl4030_int_imr_regs[] = { 199 + TWL4030_INT_PWR_IMR1, 200 + TWL4030_INT_PWR_IMR2, 201 + }; 202 + 203 + /* TWL4030 INT module interrupt status registers */ 204 + static const u8 __initconst twl4030_int_isr_regs[] = { 205 + TWL4030_INT_PWR_ISR1, 206 + TWL4030_INT_PWR_ISR2, 207 + }; 208 + 209 + /* TWL4030 INTERRUPTS module interrupt mask registers */ 210 + static const u8 __initconst twl4030_interrupts_imr_regs[] = { 211 + TWL4030_INTERRUPTS_BCIIMR1A, 212 + TWL4030_INTERRUPTS_BCIIMR1B, 213 + TWL4030_INTERRUPTS_BCIIMR2A, 214 + TWL4030_INTERRUPTS_BCIIMR2B, 215 + }; 216 + 217 + /* TWL4030 INTERRUPTS module interrupt status registers */ 218 + static const u8 __initconst twl4030_interrupts_isr_regs[] = { 219 + TWL4030_INTERRUPTS_BCIISR1A, 220 + TWL4030_INTERRUPTS_BCIISR1B, 221 + TWL4030_INTERRUPTS_BCIISR2A, 222 + TWL4030_INTERRUPTS_BCIISR2B, 223 + }; 224 + 225 + /* TWL4030 MADC module interrupt mask registers */ 226 + static const u8 __initconst twl4030_madc_imr_regs[] = { 227 + TWL4030_MADC_IMR1, 228 + TWL4030_MADC_IMR2, 229 + }; 230 + 231 + /* TWL4030 MADC module interrupt status registers */ 232 + static const u8 __initconst twl4030_madc_isr_regs[] = { 233 + TWL4030_MADC_ISR1, 234 + TWL4030_MADC_ISR2, 235 + }; 236 + 237 + /* TWL4030 keypad module interrupt mask registers */ 238 + static const u8 __initconst twl4030_keypad_imr_regs[] = { 239 + TWL4030_KEYPAD_KEYP_IMR1, 240 + TWL4030_KEYPAD_KEYP_IMR2, 241 + }; 242 + 243 + /* TWL4030 keypad module interrupt status registers */ 244 + static const u8 __initconst twl4030_keypad_isr_regs[] = { 245 + TWL4030_KEYPAD_KEYP_ISR1, 246 + TWL4030_KEYPAD_KEYP_ISR2, 247 + }; 248 + 249 + /* TWL4030 GPIO module interrupt mask registers */ 250 + static const u8 __initconst twl4030_gpio_imr_regs[] = { 251 + REG_GPIO_IMR1A, 252 + REG_GPIO_IMR1B, 253 + REG_GPIO_IMR2A, 254 + REG_GPIO_IMR2B, 255 + REG_GPIO_IMR3A, 256 + REG_GPIO_IMR3B, 257 + }; 258 + 259 + /* TWL4030 GPIO module interrupt status registers */ 260 + static const u8 __initconst twl4030_gpio_isr_regs[] = { 261 + REG_GPIO_ISR1A, 262 + REG_GPIO_ISR1B, 263 + REG_GPIO_ISR2A, 264 + REG_GPIO_ISR2B, 265 + REG_GPIO_ISR3A, 266 + REG_GPIO_ISR3B, 267 + }; 268 + 269 + /* TWL4030 modules that have IMR/ISR registers that must be masked/cleared */ 270 + static const struct twl4030_mod_iregs __initconst twl4030_mod_regs[] = { 271 + { 272 + .mod_no = TWL4030_MODULE_INT, 273 + .sih_ctrl = TWL4030_INT_PWR_SIH_CTRL, 274 + .reg_cnt = ARRAY_SIZE(twl4030_int_imr_regs), 275 + .imrs = twl4030_int_imr_regs, 276 + .isrs = twl4030_int_isr_regs, 277 + }, 278 + { 279 + .mod_no = TWL4030_MODULE_INTERRUPTS, 280 + .sih_ctrl = TWL4030_INTERRUPTS_BCISIHCTRL, 281 + .reg_cnt = ARRAY_SIZE(twl4030_interrupts_imr_regs), 282 + .imrs = twl4030_interrupts_imr_regs, 283 + .isrs = twl4030_interrupts_isr_regs, 284 + }, 285 + { 286 + .mod_no = TWL4030_MODULE_MADC, 287 + .sih_ctrl = TWL4030_MADC_SIH_CTRL, 288 + .reg_cnt = ARRAY_SIZE(twl4030_madc_imr_regs), 289 + .imrs = twl4030_madc_imr_regs, 290 + .isrs = twl4030_madc_isr_regs, 291 + }, 292 + { 293 + .mod_no = TWL4030_MODULE_KEYPAD, 294 + .sih_ctrl = TWL4030_KEYPAD_KEYP_SIH_CTRL, 295 + .reg_cnt = ARRAY_SIZE(twl4030_keypad_imr_regs), 296 + .imrs = twl4030_keypad_imr_regs, 297 + .isrs = twl4030_keypad_isr_regs, 298 + }, 299 + { 300 + .mod_no = TWL4030_MODULE_GPIO, 301 + .sih_ctrl = REG_GPIO_SIH_CTRL, 302 + .reg_cnt = ARRAY_SIZE(twl4030_gpio_imr_regs), 303 + .imrs = twl4030_gpio_imr_regs, 304 + .isrs = twl4030_gpio_isr_regs, 305 + }, 306 + }; 307 + 308 + /*----------------------------------------------------------------*/ 309 + 310 + /* is driver active, bound to a chip? */ 311 + static bool inuse; 312 + 313 + /* Structure for each TWL4030 Slave */ 314 + struct twl4030_client { 315 + struct i2c_client *client; 316 + u8 address; 317 + 318 + /* max numb of i2c_msg required is for read =2 */ 319 + struct i2c_msg xfer_msg[2]; 320 + 321 + /* To lock access to xfer_msg */ 322 + struct mutex xfer_lock; 323 + }; 324 + 325 + static struct twl4030_client twl4030_modules[TWL4030_NUM_SLAVES]; 326 + 327 + 328 + /* mapping the module id to slave id and base address */ 329 + struct twl4030mapping { 330 + unsigned char sid; /* Slave ID */ 331 + unsigned char base; /* base address */ 332 + }; 333 + 334 + static struct twl4030mapping twl4030_map[TWL4030_MODULE_LAST + 1] = { 335 + /* 336 + * NOTE: don't change this table without updating the 337 + * <linux/i2c/twl4030.h> defines for TWL4030_MODULE_* 338 + * so they continue to match the order in this table. 339 + */ 340 + 341 + { 0, TWL4030_BASEADD_USB }, 342 + 343 + { 1, TWL4030_BASEADD_AUDIO_VOICE }, 344 + { 1, TWL4030_BASEADD_GPIO }, 345 + { 1, TWL4030_BASEADD_INTBR }, 346 + { 1, TWL4030_BASEADD_PIH }, 347 + { 1, TWL4030_BASEADD_TEST }, 348 + 349 + { 2, TWL4030_BASEADD_KEYPAD }, 350 + { 2, TWL4030_BASEADD_MADC }, 351 + { 2, TWL4030_BASEADD_INTERRUPTS }, 352 + { 2, TWL4030_BASEADD_LED }, 353 + { 2, TWL4030_BASEADD_MAIN_CHARGE }, 354 + { 2, TWL4030_BASEADD_PRECHARGE }, 355 + { 2, TWL4030_BASEADD_PWM0 }, 356 + { 2, TWL4030_BASEADD_PWM1 }, 357 + { 2, TWL4030_BASEADD_PWMA }, 358 + { 2, TWL4030_BASEADD_PWMB }, 359 + 360 + { 3, TWL4030_BASEADD_BACKUP }, 361 + { 3, TWL4030_BASEADD_INT }, 362 + { 3, TWL4030_BASEADD_PM_MASTER }, 363 + { 3, TWL4030_BASEADD_PM_RECEIVER }, 364 + { 3, TWL4030_BASEADD_RTC }, 365 + { 3, TWL4030_BASEADD_SECURED_REG }, 366 + }; 367 + 368 + /*----------------------------------------------------------------------*/ 369 + 370 + /* 371 + * TWL4030 doesn't have PIH mask, hence dummy function for mask 372 + * and unmask of the (eight) interrupts reported at that level ... 373 + * masking is only available from SIH (secondary) modules. 374 + */ 375 + 376 + static void twl4030_i2c_ackirq(unsigned int irq) 377 + { 378 + } 379 + 380 + static void twl4030_i2c_disableint(unsigned int irq) 381 + { 382 + } 383 + 384 + static void twl4030_i2c_enableint(unsigned int irq) 385 + { 386 + } 387 + 388 + static struct irq_chip twl4030_irq_chip = { 389 + .name = "twl4030", 390 + .ack = twl4030_i2c_ackirq, 391 + .mask = twl4030_i2c_disableint, 392 + .unmask = twl4030_i2c_enableint, 393 + }; 394 + 395 + /*----------------------------------------------------------------------*/ 396 + 397 + /* Exported Functions */ 398 + 399 + /** 400 + * twl4030_i2c_write - Writes a n bit register in TWL4030 401 + * @mod_no: module number 402 + * @value: an array of num_bytes+1 containing data to write 403 + * @reg: register address (just offset will do) 404 + * @num_bytes: number of bytes to transfer 405 + * 406 + * IMPORTANT: for 'value' parameter: Allocate value num_bytes+1 and 407 + * valid data starts at Offset 1. 408 + * 409 + * Returns the result of operation - 0 is success 410 + */ 411 + int twl4030_i2c_write(u8 mod_no, u8 *value, u8 reg, u8 num_bytes) 412 + { 413 + int ret; 414 + int sid; 415 + struct twl4030_client *twl; 416 + struct i2c_msg *msg; 417 + 418 + if (unlikely(mod_no > TWL4030_MODULE_LAST)) { 419 + pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); 420 + return -EPERM; 421 + } 422 + sid = twl4030_map[mod_no].sid; 423 + twl = &twl4030_modules[sid]; 424 + 425 + if (unlikely(!inuse)) { 426 + pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid); 427 + return -EPERM; 428 + } 429 + mutex_lock(&twl->xfer_lock); 430 + /* 431 + * [MSG1]: fill the register address data 432 + * fill the data Tx buffer 433 + */ 434 + msg = &twl->xfer_msg[0]; 435 + msg->addr = twl->address; 436 + msg->len = num_bytes + 1; 437 + msg->flags = 0; 438 + msg->buf = value; 439 + /* over write the first byte of buffer with the register address */ 440 + *value = twl4030_map[mod_no].base + reg; 441 + ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 1); 442 + mutex_unlock(&twl->xfer_lock); 443 + 444 + /* i2cTransfer returns num messages.translate it pls.. */ 445 + if (ret >= 0) 446 + ret = 0; 447 + return ret; 448 + } 449 + EXPORT_SYMBOL(twl4030_i2c_write); 450 + 451 + /** 452 + * twl4030_i2c_read - Reads a n bit register in TWL4030 453 + * @mod_no: module number 454 + * @value: an array of num_bytes containing data to be read 455 + * @reg: register address (just offset will do) 456 + * @num_bytes: number of bytes to transfer 457 + * 458 + * Returns result of operation - num_bytes is success else failure. 459 + */ 460 + int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, u8 num_bytes) 461 + { 462 + int ret; 463 + u8 val; 464 + int sid; 465 + struct twl4030_client *twl; 466 + struct i2c_msg *msg; 467 + 468 + if (unlikely(mod_no > TWL4030_MODULE_LAST)) { 469 + pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); 470 + return -EPERM; 471 + } 472 + sid = twl4030_map[mod_no].sid; 473 + twl = &twl4030_modules[sid]; 474 + 475 + if (unlikely(!inuse)) { 476 + pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid); 477 + return -EPERM; 478 + } 479 + mutex_lock(&twl->xfer_lock); 480 + /* [MSG1] fill the register address data */ 481 + msg = &twl->xfer_msg[0]; 482 + msg->addr = twl->address; 483 + msg->len = 1; 484 + msg->flags = 0; /* Read the register value */ 485 + val = twl4030_map[mod_no].base + reg; 486 + msg->buf = &val; 487 + /* [MSG2] fill the data rx buffer */ 488 + msg = &twl->xfer_msg[1]; 489 + msg->addr = twl->address; 490 + msg->flags = I2C_M_RD; /* Read the register value */ 491 + msg->len = num_bytes; /* only n bytes */ 492 + msg->buf = value; 493 + ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 2); 494 + mutex_unlock(&twl->xfer_lock); 495 + 496 + /* i2cTransfer returns num messages.translate it pls.. */ 497 + if (ret >= 0) 498 + ret = 0; 499 + return ret; 500 + } 501 + EXPORT_SYMBOL(twl4030_i2c_read); 502 + 503 + /** 504 + * twl4030_i2c_write_u8 - Writes a 8 bit register in TWL4030 505 + * @mod_no: module number 506 + * @value: the value to be written 8 bit 507 + * @reg: register address (just offset will do) 508 + * 509 + * Returns result of operation - 0 is success 510 + */ 511 + int twl4030_i2c_write_u8(u8 mod_no, u8 value, u8 reg) 512 + { 513 + 514 + /* 2 bytes offset 1 contains the data offset 0 is used by i2c_write */ 515 + u8 temp_buffer[2] = { 0 }; 516 + /* offset 1 contains the data */ 517 + temp_buffer[1] = value; 518 + return twl4030_i2c_write(mod_no, temp_buffer, reg, 1); 519 + } 520 + EXPORT_SYMBOL(twl4030_i2c_write_u8); 521 + 522 + /** 523 + * twl4030_i2c_read_u8 - Reads a 8 bit register from TWL4030 524 + * @mod_no: module number 525 + * @value: the value read 8 bit 526 + * @reg: register address (just offset will do) 527 + * 528 + * Returns result of operation - 0 is success 529 + */ 530 + int twl4030_i2c_read_u8(u8 mod_no, u8 *value, u8 reg) 531 + { 532 + return twl4030_i2c_read(mod_no, value, reg, 1); 533 + } 534 + EXPORT_SYMBOL(twl4030_i2c_read_u8); 535 + 536 + /*----------------------------------------------------------------------*/ 537 + 538 + static unsigned twl4030_irq_base; 539 + 540 + static struct completion irq_event; 541 + 542 + /* 543 + * This thread processes interrupts reported by the Primary Interrupt Handler. 544 + */ 545 + static int twl4030_irq_thread(void *data) 546 + { 547 + long irq = (long)data; 548 + irq_desc_t *desc = irq_desc + irq; 549 + static unsigned i2c_errors; 550 + const static unsigned max_i2c_errors = 100; 551 + 552 + current->flags |= PF_NOFREEZE; 553 + 554 + while (!kthread_should_stop()) { 555 + int ret; 556 + int module_irq; 557 + u8 pih_isr; 558 + 559 + /* Wait for IRQ, then read PIH irq status (also blocking) */ 560 + wait_for_completion_interruptible(&irq_event); 561 + 562 + ret = twl4030_i2c_read_u8(TWL4030_MODULE_PIH, &pih_isr, 563 + REG_PIH_ISR_P1); 564 + if (ret) { 565 + pr_warning("%s: I2C error %d reading PIH ISR\n", 566 + DRIVER_NAME, ret); 567 + if (++i2c_errors >= max_i2c_errors) { 568 + printk(KERN_ERR "Maximum I2C error count" 569 + " exceeded. Terminating %s.\n", 570 + __func__); 571 + break; 572 + } 573 + complete(&irq_event); 574 + continue; 575 + } 576 + 577 + /* these handlers deal with the relevant SIH irq status */ 578 + local_irq_disable(); 579 + for (module_irq = twl4030_irq_base; 580 + pih_isr; 581 + pih_isr >>= 1, module_irq++) { 582 + if (pih_isr & 0x1) { 583 + irq_desc_t *d = irq_desc + module_irq; 584 + 585 + d->handle_irq(module_irq, d); 586 + } 587 + } 588 + local_irq_enable(); 589 + 590 + desc->chip->unmask(irq); 591 + } 592 + 593 + return 0; 594 + } 595 + 596 + /* 597 + * do_twl4030_irq() is the desc->handle method for the twl4030 interrupt. 598 + * This is a chained interrupt, so there is no desc->action method for it. 599 + * Now we need to query the interrupt controller in the twl4030 to determine 600 + * which module is generating the interrupt request. However, we can't do i2c 601 + * transactions in interrupt context, so we must defer that work to a kernel 602 + * thread. All we do here is acknowledge and mask the interrupt and wakeup 603 + * the kernel thread. 604 + */ 605 + static void do_twl4030_irq(unsigned int irq, irq_desc_t *desc) 606 + { 607 + const unsigned int cpu = smp_processor_id(); 608 + 609 + /* 610 + * Earlier this was desc->triggered = 1; 611 + */ 612 + desc->status |= IRQ_LEVEL; 613 + 614 + /* 615 + * Acknowledge, clear _AND_ disable the interrupt. 616 + */ 617 + desc->chip->ack(irq); 618 + 619 + if (!desc->depth) { 620 + kstat_cpu(cpu).irqs[irq]++; 621 + 622 + complete(&irq_event); 623 + } 624 + } 625 + 626 + static struct task_struct * __init start_twl4030_irq_thread(long irq) 627 + { 628 + struct task_struct *thread; 629 + 630 + init_completion(&irq_event); 631 + thread = kthread_run(twl4030_irq_thread, (void *)irq, "twl4030-irq"); 632 + if (!thread) 633 + pr_err("%s: could not create twl4030 irq %ld thread!\n", 634 + DRIVER_NAME, irq); 635 + 636 + return thread; 637 + } 638 + 639 + /*----------------------------------------------------------------------*/ 640 + 641 + static int add_children(struct twl4030_platform_data *pdata) 642 + { 643 + struct platform_device *pdev = NULL; 644 + struct twl4030_client *twl = NULL; 645 + int status = 0; 646 + 647 + if (twl_has_bci() && pdata->bci) { 648 + twl = &twl4030_modules[3]; 649 + 650 + pdev = platform_device_alloc("twl4030_bci", -1); 651 + if (!pdev) { 652 + pr_debug("%s: can't alloc bci dev\n", DRIVER_NAME); 653 + status = -ENOMEM; 654 + goto err; 655 + } 656 + 657 + if (status == 0) { 658 + pdev->dev.parent = &twl->client->dev; 659 + status = platform_device_add_data(pdev, pdata->bci, 660 + sizeof(*pdata->bci)); 661 + if (status < 0) { 662 + dev_dbg(&twl->client->dev, 663 + "can't add bci data, %d\n", 664 + status); 665 + goto err; 666 + } 667 + } 668 + 669 + if (status == 0) { 670 + struct resource r = { 671 + .start = TWL4030_PWRIRQ_CHG_PRES, 672 + .flags = IORESOURCE_IRQ, 673 + }; 674 + 675 + status = platform_device_add_resources(pdev, &r, 1); 676 + } 677 + 678 + if (status == 0) 679 + status = platform_device_add(pdev); 680 + 681 + if (status < 0) { 682 + platform_device_put(pdev); 683 + dev_dbg(&twl->client->dev, 684 + "can't create bci dev, %d\n", 685 + status); 686 + goto err; 687 + } 688 + } 689 + 690 + if (twl_has_gpio() && pdata->gpio) { 691 + twl = &twl4030_modules[1]; 692 + 693 + pdev = platform_device_alloc("twl4030_gpio", -1); 694 + if (!pdev) { 695 + pr_debug("%s: can't alloc gpio dev\n", DRIVER_NAME); 696 + status = -ENOMEM; 697 + goto err; 698 + } 699 + 700 + /* more driver model init */ 701 + if (status == 0) { 702 + pdev->dev.parent = &twl->client->dev; 703 + /* device_init_wakeup(&pdev->dev, 1); */ 704 + 705 + status = platform_device_add_data(pdev, pdata->gpio, 706 + sizeof(*pdata->gpio)); 707 + if (status < 0) { 708 + dev_dbg(&twl->client->dev, 709 + "can't add gpio data, %d\n", 710 + status); 711 + goto err; 712 + } 713 + } 714 + 715 + /* GPIO module IRQ */ 716 + if (status == 0) { 717 + struct resource r = { 718 + .start = pdata->irq_base + 0, 719 + .flags = IORESOURCE_IRQ, 720 + }; 721 + 722 + status = platform_device_add_resources(pdev, &r, 1); 723 + } 724 + 725 + if (status == 0) 726 + status = platform_device_add(pdev); 727 + 728 + if (status < 0) { 729 + platform_device_put(pdev); 730 + dev_dbg(&twl->client->dev, 731 + "can't create gpio dev, %d\n", 732 + status); 733 + goto err; 734 + } 735 + } 736 + 737 + if (twl_has_keypad() && pdata->keypad) { 738 + pdev = platform_device_alloc("twl4030_keypad", -1); 739 + if (pdev) { 740 + twl = &twl4030_modules[2]; 741 + pdev->dev.parent = &twl->client->dev; 742 + device_init_wakeup(&pdev->dev, 1); 743 + status = platform_device_add_data(pdev, pdata->keypad, 744 + sizeof(*pdata->keypad)); 745 + if (status < 0) { 746 + dev_dbg(&twl->client->dev, 747 + "can't add keypad data, %d\n", 748 + status); 749 + platform_device_put(pdev); 750 + goto err; 751 + } 752 + status = platform_device_add(pdev); 753 + if (status < 0) { 754 + platform_device_put(pdev); 755 + dev_dbg(&twl->client->dev, 756 + "can't create keypad dev, %d\n", 757 + status); 758 + goto err; 759 + } 760 + } else { 761 + pr_debug("%s: can't alloc keypad dev\n", DRIVER_NAME); 762 + status = -ENOMEM; 763 + goto err; 764 + } 765 + } 766 + 767 + if (twl_has_madc() && pdata->madc) { 768 + pdev = platform_device_alloc("twl4030_madc", -1); 769 + if (pdev) { 770 + twl = &twl4030_modules[2]; 771 + pdev->dev.parent = &twl->client->dev; 772 + device_init_wakeup(&pdev->dev, 1); 773 + status = platform_device_add_data(pdev, pdata->madc, 774 + sizeof(*pdata->madc)); 775 + if (status < 0) { 776 + platform_device_put(pdev); 777 + dev_dbg(&twl->client->dev, 778 + "can't add madc data, %d\n", 779 + status); 780 + goto err; 781 + } 782 + status = platform_device_add(pdev); 783 + if (status < 0) { 784 + platform_device_put(pdev); 785 + dev_dbg(&twl->client->dev, 786 + "can't create madc dev, %d\n", 787 + status); 788 + goto err; 789 + } 790 + } else { 791 + pr_debug("%s: can't alloc madc dev\n", DRIVER_NAME); 792 + status = -ENOMEM; 793 + goto err; 794 + } 795 + } 796 + 797 + if (twl_has_rtc()) { 798 + twl = &twl4030_modules[3]; 799 + 800 + pdev = platform_device_alloc("twl4030_rtc", -1); 801 + if (!pdev) { 802 + pr_debug("%s: can't alloc rtc dev\n", DRIVER_NAME); 803 + status = -ENOMEM; 804 + } else { 805 + pdev->dev.parent = &twl->client->dev; 806 + device_init_wakeup(&pdev->dev, 1); 807 + } 808 + 809 + /* 810 + * REVISIT platform_data here currently might use of 811 + * "msecure" line ... but for now we just expect board 812 + * setup to tell the chip "we are secure" at all times. 813 + * Eventually, Linux might become more aware of such 814 + * HW security concerns, and "least privilege". 815 + */ 816 + 817 + /* RTC module IRQ */ 818 + if (status == 0) { 819 + struct resource r = { 820 + /* REVISIT don't hard-wire this stuff */ 821 + .start = TWL4030_PWRIRQ_RTC, 822 + .flags = IORESOURCE_IRQ, 823 + }; 824 + 825 + status = platform_device_add_resources(pdev, &r, 1); 826 + } 827 + 828 + if (status == 0) 829 + status = platform_device_add(pdev); 830 + 831 + if (status < 0) { 832 + platform_device_put(pdev); 833 + dev_dbg(&twl->client->dev, 834 + "can't create rtc dev, %d\n", 835 + status); 836 + goto err; 837 + } 838 + } 839 + 840 + if (twl_has_usb() && pdata->usb) { 841 + twl = &twl4030_modules[0]; 842 + 843 + pdev = platform_device_alloc("twl4030_usb", -1); 844 + if (!pdev) { 845 + pr_debug("%s: can't alloc usb dev\n", DRIVER_NAME); 846 + status = -ENOMEM; 847 + goto err; 848 + } 849 + 850 + if (status == 0) { 851 + pdev->dev.parent = &twl->client->dev; 852 + device_init_wakeup(&pdev->dev, 1); 853 + status = platform_device_add_data(pdev, pdata->usb, 854 + sizeof(*pdata->usb)); 855 + if (status < 0) { 856 + platform_device_put(pdev); 857 + dev_dbg(&twl->client->dev, 858 + "can't add usb data, %d\n", 859 + status); 860 + goto err; 861 + } 862 + } 863 + 864 + if (status == 0) { 865 + struct resource r = { 866 + .start = TWL4030_PWRIRQ_USB_PRES, 867 + .flags = IORESOURCE_IRQ, 868 + }; 869 + 870 + status = platform_device_add_resources(pdev, &r, 1); 871 + } 872 + 873 + if (status == 0) 874 + status = platform_device_add(pdev); 875 + 876 + if (status < 0) { 877 + platform_device_put(pdev); 878 + dev_dbg(&twl->client->dev, 879 + "can't create usb dev, %d\n", 880 + status); 881 + } 882 + } 883 + 884 + err: 885 + if (status) 886 + pr_err("failed to add twl4030's children (status %d)\n", status); 887 + return status; 888 + } 889 + 890 + /*----------------------------------------------------------------------*/ 891 + 892 + /* 893 + * These three functions initialize the on-chip clock framework, 894 + * letting it generate the right frequencies for USB, MADC, and 895 + * other purposes. 896 + */ 897 + static inline int __init protect_pm_master(void) 898 + { 899 + int e = 0; 900 + 901 + e = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, KEY_LOCK, 902 + R_PROTECT_KEY); 903 + return e; 904 + } 905 + 906 + static inline int __init unprotect_pm_master(void) 907 + { 908 + int e = 0; 909 + 910 + e |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, KEY_UNLOCK1, 911 + R_PROTECT_KEY); 912 + e |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, KEY_UNLOCK2, 913 + R_PROTECT_KEY); 914 + return e; 915 + } 916 + 917 + static void __init clocks_init(void) 918 + { 919 + int e = 0; 920 + struct clk *osc; 921 + u32 rate; 922 + u8 ctrl = HFCLK_FREQ_26_MHZ; 923 + 924 + #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 925 + if (cpu_is_omap2430()) 926 + osc = clk_get(NULL, "osc_ck"); 927 + else 928 + osc = clk_get(NULL, "osc_sys_ck"); 929 + #else 930 + /* REVISIT for non-OMAP systems, pass the clock rate from 931 + * board init code, using platform_data. 932 + */ 933 + osc = ERR_PTR(-EIO); 934 + #endif 935 + if (IS_ERR(osc)) { 936 + printk(KERN_WARNING "Skipping twl4030 internal clock init and " 937 + "using bootloader value (unknown osc rate)\n"); 938 + return; 939 + } 940 + 941 + rate = clk_get_rate(osc); 942 + clk_put(osc); 943 + 944 + switch (rate) { 945 + case 19200000: 946 + ctrl = HFCLK_FREQ_19p2_MHZ; 947 + break; 948 + case 26000000: 949 + ctrl = HFCLK_FREQ_26_MHZ; 950 + break; 951 + case 38400000: 952 + ctrl = HFCLK_FREQ_38p4_MHZ; 953 + break; 954 + } 955 + 956 + ctrl |= HIGH_PERF_SQ; 957 + e |= unprotect_pm_master(); 958 + /* effect->MADC+USB ck en */ 959 + e |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, ctrl, R_CFG_BOOT); 960 + e |= protect_pm_master(); 961 + 962 + if (e < 0) 963 + pr_err("%s: clock init err [%d]\n", DRIVER_NAME, e); 964 + } 965 + 966 + /*----------------------------------------------------------------------*/ 967 + 968 + /** 969 + * twl4030_i2c_clear_isr - clear TWL4030 SIH ISR regs via read + write 970 + * @mod_no: TWL4030 module number 971 + * @reg: register index to clear 972 + * @cor: value of the <module>_SIH_CTRL.COR bit (1 or 0) 973 + * 974 + * Either reads (cor == 1) or writes (cor == 0) to a TWL4030 interrupt 975 + * status register to ensure that any prior interrupts are cleared. 976 + * Returns the status from the I2C read operation. 977 + */ 978 + static int __init twl4030_i2c_clear_isr(u8 mod_no, u8 reg, u8 cor) 979 + { 980 + u8 tmp; 981 + 982 + return (cor) ? twl4030_i2c_read_u8(mod_no, &tmp, reg) : 983 + twl4030_i2c_write_u8(mod_no, 0xff, reg); 984 + } 985 + 986 + /** 987 + * twl4030_read_cor_bit - are TWL module ISRs cleared by reads or writes? 988 + * @mod_no: TWL4030 module number 989 + * @reg: register index to clear 990 + * 991 + * Returns 1 if the TWL4030 SIH interrupt status registers (ISRs) for 992 + * the specified TWL module are cleared by reads, or 0 if cleared by 993 + * writes. 994 + */ 995 + static int twl4030_read_cor_bit(u8 mod_no, u8 reg) 996 + { 997 + u8 tmp = 0; 998 + 999 + WARN_ON(twl4030_i2c_read_u8(mod_no, &tmp, reg) < 0); 1000 + 1001 + tmp &= TWL4030_SIH_CTRL_COR_MASK; 1002 + tmp >>= __ffs(TWL4030_SIH_CTRL_COR_MASK); 1003 + 1004 + return tmp; 1005 + } 1006 + 1007 + /** 1008 + * twl4030_mask_clear_intrs - mask and clear all TWL4030 interrupts 1009 + * @t: pointer to twl4030_mod_iregs array 1010 + * @t_sz: ARRAY_SIZE(t) (starting at 1) 1011 + * 1012 + * Mask all TWL4030 interrupt mask registers (IMRs) and clear all 1013 + * interrupt status registers (ISRs). No return value, but will WARN if 1014 + * any I2C operations fail. 1015 + */ 1016 + static void __init twl4030_mask_clear_intrs(const struct twl4030_mod_iregs *t, 1017 + const u8 t_sz) 1018 + { 1019 + int i, j; 1020 + 1021 + /* 1022 + * N.B. - further efficiency is possible here. Eight I2C 1023 + * operations on BCI and GPIO modules are avoidable if I2C 1024 + * burst read/write transactions were implemented. Would 1025 + * probably save about 1ms of boot time and a small amount of 1026 + * power. 1027 + */ 1028 + for (i = 0; i < t_sz; i++) { 1029 + const struct twl4030_mod_iregs tmr = t[i]; 1030 + int cor; 1031 + 1032 + /* Are ISRs cleared by reads or writes? */ 1033 + cor = twl4030_read_cor_bit(tmr.mod_no, tmr.sih_ctrl); 1034 + 1035 + for (j = 0; j < tmr.reg_cnt; j++) { 1036 + 1037 + /* Mask interrupts at the TWL4030 */ 1038 + WARN_ON(twl4030_i2c_write_u8(tmr.mod_no, 0xff, 1039 + tmr.imrs[j]) < 0); 1040 + 1041 + /* Clear TWL4030 ISRs */ 1042 + WARN_ON(twl4030_i2c_clear_isr(tmr.mod_no, 1043 + tmr.isrs[j], cor) < 0); 1044 + } 1045 + } 1046 + } 1047 + 1048 + 1049 + static void twl_init_irq(int irq_num, unsigned irq_base, unsigned irq_end) 1050 + { 1051 + int i; 1052 + 1053 + /* 1054 + * Mask and clear all TWL4030 interrupts since initially we do 1055 + * not have any TWL4030 module interrupt handlers present 1056 + */ 1057 + twl4030_mask_clear_intrs(twl4030_mod_regs, 1058 + ARRAY_SIZE(twl4030_mod_regs)); 1059 + 1060 + twl4030_irq_base = irq_base; 1061 + 1062 + /* install an irq handler for each of the PIH modules */ 1063 + for (i = irq_base; i < irq_end; i++) { 1064 + set_irq_chip_and_handler(i, &twl4030_irq_chip, 1065 + handle_simple_irq); 1066 + activate_irq(i); 1067 + } 1068 + 1069 + /* install an irq handler to demultiplex the TWL4030 interrupt */ 1070 + set_irq_data(irq_num, start_twl4030_irq_thread(irq_num)); 1071 + set_irq_chained_handler(irq_num, do_twl4030_irq); 1072 + } 1073 + 1074 + /*----------------------------------------------------------------------*/ 1075 + 1076 + static int twl4030_remove(struct i2c_client *client) 1077 + { 1078 + unsigned i; 1079 + 1080 + /* FIXME undo twl_init_irq() */ 1081 + if (twl4030_irq_base) { 1082 + dev_err(&client->dev, "can't yet clean up IRQs?\n"); 1083 + return -ENOSYS; 1084 + } 1085 + 1086 + for (i = 0; i < TWL4030_NUM_SLAVES; i++) { 1087 + struct twl4030_client *twl = &twl4030_modules[i]; 1088 + 1089 + if (twl->client && twl->client != client) 1090 + i2c_unregister_device(twl->client); 1091 + twl4030_modules[i].client = NULL; 1092 + } 1093 + inuse = false; 1094 + return 0; 1095 + } 1096 + 1097 + /* NOTE: this driver only handles a single twl4030/tps659x0 chip */ 1098 + static int 1099 + twl4030_probe(struct i2c_client *client, const struct i2c_device_id *id) 1100 + { 1101 + int status; 1102 + unsigned i; 1103 + struct twl4030_platform_data *pdata = client->dev.platform_data; 1104 + 1105 + if (!pdata) { 1106 + dev_dbg(&client->dev, "no platform data?\n"); 1107 + return -EINVAL; 1108 + } 1109 + 1110 + if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) { 1111 + dev_dbg(&client->dev, "can't talk I2C?\n"); 1112 + return -EIO; 1113 + } 1114 + 1115 + if (inuse || twl4030_irq_base) { 1116 + dev_dbg(&client->dev, "driver is already in use\n"); 1117 + return -EBUSY; 1118 + } 1119 + 1120 + for (i = 0; i < TWL4030_NUM_SLAVES; i++) { 1121 + struct twl4030_client *twl = &twl4030_modules[i]; 1122 + 1123 + twl->address = client->addr + i; 1124 + if (i == 0) 1125 + twl->client = client; 1126 + else { 1127 + twl->client = i2c_new_dummy(client->adapter, 1128 + twl->address); 1129 + if (!twl->client) { 1130 + dev_err(&twl->client->dev, 1131 + "can't attach client %d\n", i); 1132 + status = -ENOMEM; 1133 + goto fail; 1134 + } 1135 + strlcpy(twl->client->name, id->name, 1136 + sizeof(twl->client->name)); 1137 + } 1138 + mutex_init(&twl->xfer_lock); 1139 + } 1140 + inuse = true; 1141 + 1142 + /* setup clock framework */ 1143 + clocks_init(); 1144 + 1145 + /* Maybe init the T2 Interrupt subsystem */ 1146 + if (client->irq 1147 + && pdata->irq_base 1148 + && pdata->irq_end > pdata->irq_base) { 1149 + twl_init_irq(client->irq, pdata->irq_base, pdata->irq_end); 1150 + dev_info(&client->dev, "IRQ %d chains IRQs %d..%d\n", 1151 + client->irq, pdata->irq_base, pdata->irq_end - 1); 1152 + } 1153 + 1154 + status = add_children(pdata); 1155 + fail: 1156 + if (status < 0) 1157 + twl4030_remove(client); 1158 + return status; 1159 + } 1160 + 1161 + static const struct i2c_device_id twl4030_ids[] = { 1162 + { "twl4030", 0 }, /* "Triton 2" */ 1163 + { "tps65950", 0 }, /* catalog version of twl4030 */ 1164 + { "tps65930", 0 }, /* fewer LDOs and DACs; no charger */ 1165 + { "tps65920", 0 }, /* fewer LDOs; no codec or charger */ 1166 + { "twl5030", 0 }, /* T2 updated */ 1167 + { /* end of list */ }, 1168 + }; 1169 + MODULE_DEVICE_TABLE(i2c, twl4030_ids); 1170 + 1171 + /* One Client Driver , 4 Clients */ 1172 + static struct i2c_driver twl4030_driver = { 1173 + .driver.name = DRIVER_NAME, 1174 + .id_table = twl4030_ids, 1175 + .probe = twl4030_probe, 1176 + .remove = twl4030_remove, 1177 + }; 1178 + 1179 + static int __init twl4030_init(void) 1180 + { 1181 + return i2c_add_driver(&twl4030_driver); 1182 + } 1183 + subsys_initcall(twl4030_init); 1184 + 1185 + static void __exit twl4030_exit(void) 1186 + { 1187 + i2c_del_driver(&twl4030_driver); 1188 + } 1189 + module_exit(twl4030_exit); 1190 + 1191 + MODULE_AUTHOR("Texas Instruments, Inc."); 1192 + MODULE_DESCRIPTION("I2C Core interface for TWL4030"); 1193 + MODULE_LICENSE("GPL");
+1 -1
drivers/mfd/wm8350-core.c
··· 1217 1217 1218 1218 mutex_init(&wm8350->irq_mutex); 1219 1219 INIT_WORK(&wm8350->irq_work, wm8350_irq_worker); 1220 - if (irq != NO_IRQ) { 1220 + if (irq) { 1221 1221 ret = request_irq(irq, wm8350_irq, 0, 1222 1222 "wm8350", wm8350); 1223 1223 if (ret != 0) {
+339
include/linux/i2c/twl4030.h
··· 1 + /* 2 + * twl4030.h - header for TWL4030 PM and audio CODEC device 3 + * 4 + * Copyright (C) 2005-2006 Texas Instruments, Inc. 5 + * 6 + * Based on tlv320aic23.c: 7 + * Copyright (c) by Kai Svahn <kai.svahn@nokia.com> 8 + * 9 + * This program is free software; you can redistribute it and/or modify 10 + * it under the terms of the GNU General Public License as published by 11 + * the Free Software Foundation; either version 2 of the License, or 12 + * (at your option) any later version. 13 + * 14 + * This program is distributed in the hope that it will be useful, 15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 + * GNU General Public License for more details. 18 + * 19 + * You should have received a copy of the GNU General Public License 20 + * along with this program; if not, write to the Free Software 21 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 + * 23 + */ 24 + 25 + #ifndef __TWL4030_H_ 26 + #define __TWL4030_H_ 27 + 28 + /* 29 + * Using the twl4030 core we address registers using a pair 30 + * { module id, relative register offset } 31 + * which that core then maps to the relevant 32 + * { i2c slave, absolute register address } 33 + * 34 + * The module IDs are meaningful only to the twl4030 core code, 35 + * which uses them as array indices to look up the first register 36 + * address each module uses within a given i2c slave. 37 + */ 38 + 39 + /* Slave 0 (i2c address 0x48) */ 40 + #define TWL4030_MODULE_USB 0x00 41 + 42 + /* Slave 1 (i2c address 0x49) */ 43 + #define TWL4030_MODULE_AUDIO_VOICE 0x01 44 + #define TWL4030_MODULE_GPIO 0x02 45 + #define TWL4030_MODULE_INTBR 0x03 46 + #define TWL4030_MODULE_PIH 0x04 47 + #define TWL4030_MODULE_TEST 0x05 48 + 49 + /* Slave 2 (i2c address 0x4a) */ 50 + #define TWL4030_MODULE_KEYPAD 0x06 51 + #define TWL4030_MODULE_MADC 0x07 52 + #define TWL4030_MODULE_INTERRUPTS 0x08 53 + #define TWL4030_MODULE_LED 0x09 54 + #define TWL4030_MODULE_MAIN_CHARGE 0x0A 55 + #define TWL4030_MODULE_PRECHARGE 0x0B 56 + #define TWL4030_MODULE_PWM0 0x0C 57 + #define TWL4030_MODULE_PWM1 0x0D 58 + #define TWL4030_MODULE_PWMA 0x0E 59 + #define TWL4030_MODULE_PWMB 0x0F 60 + 61 + /* Slave 3 (i2c address 0x4b) */ 62 + #define TWL4030_MODULE_BACKUP 0x10 63 + #define TWL4030_MODULE_INT 0x11 64 + #define TWL4030_MODULE_PM_MASTER 0x12 65 + #define TWL4030_MODULE_PM_RECEIVER 0x13 66 + #define TWL4030_MODULE_RTC 0x14 67 + #define TWL4030_MODULE_SECURED_REG 0x15 68 + 69 + /* 70 + * Read and write single 8-bit registers 71 + */ 72 + int twl4030_i2c_write_u8(u8 mod_no, u8 val, u8 reg); 73 + int twl4030_i2c_read_u8(u8 mod_no, u8 *val, u8 reg); 74 + 75 + /* 76 + * Read and write several 8-bit registers at once. 77 + * 78 + * IMPORTANT: For twl4030_i2c_write(), allocate num_bytes + 1 79 + * for the value, and populate your data starting at offset 1. 80 + */ 81 + int twl4030_i2c_write(u8 mod_no, u8 *value, u8 reg, u8 num_bytes); 82 + int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, u8 num_bytes); 83 + 84 + /*----------------------------------------------------------------------*/ 85 + 86 + /* 87 + * NOTE: at up to 1024 registers, this is a big chip. 88 + * 89 + * Avoid putting register declarations in this file, instead of into 90 + * a driver-private file, unless some of the registers in a block 91 + * need to be shared with other drivers. One example is blocks that 92 + * have Secondary IRQ Handler (SIH) registers. 93 + */ 94 + 95 + #define TWL4030_SIH_CTRL_EXCLEN_MASK BIT(0) 96 + #define TWL4030_SIH_CTRL_PENDDIS_MASK BIT(1) 97 + #define TWL4030_SIH_CTRL_COR_MASK BIT(2) 98 + 99 + /*----------------------------------------------------------------------*/ 100 + 101 + /* 102 + * GPIO Block Register offsets (use TWL4030_MODULE_GPIO) 103 + */ 104 + 105 + #define REG_GPIODATAIN1 0x0 106 + #define REG_GPIODATAIN2 0x1 107 + #define REG_GPIODATAIN3 0x2 108 + #define REG_GPIODATADIR1 0x3 109 + #define REG_GPIODATADIR2 0x4 110 + #define REG_GPIODATADIR3 0x5 111 + #define REG_GPIODATAOUT1 0x6 112 + #define REG_GPIODATAOUT2 0x7 113 + #define REG_GPIODATAOUT3 0x8 114 + #define REG_CLEARGPIODATAOUT1 0x9 115 + #define REG_CLEARGPIODATAOUT2 0xA 116 + #define REG_CLEARGPIODATAOUT3 0xB 117 + #define REG_SETGPIODATAOUT1 0xC 118 + #define REG_SETGPIODATAOUT2 0xD 119 + #define REG_SETGPIODATAOUT3 0xE 120 + #define REG_GPIO_DEBEN1 0xF 121 + #define REG_GPIO_DEBEN2 0x10 122 + #define REG_GPIO_DEBEN3 0x11 123 + #define REG_GPIO_CTRL 0x12 124 + #define REG_GPIOPUPDCTR1 0x13 125 + #define REG_GPIOPUPDCTR2 0x14 126 + #define REG_GPIOPUPDCTR3 0x15 127 + #define REG_GPIOPUPDCTR4 0x16 128 + #define REG_GPIOPUPDCTR5 0x17 129 + #define REG_GPIO_ISR1A 0x19 130 + #define REG_GPIO_ISR2A 0x1A 131 + #define REG_GPIO_ISR3A 0x1B 132 + #define REG_GPIO_IMR1A 0x1C 133 + #define REG_GPIO_IMR2A 0x1D 134 + #define REG_GPIO_IMR3A 0x1E 135 + #define REG_GPIO_ISR1B 0x1F 136 + #define REG_GPIO_ISR2B 0x20 137 + #define REG_GPIO_ISR3B 0x21 138 + #define REG_GPIO_IMR1B 0x22 139 + #define REG_GPIO_IMR2B 0x23 140 + #define REG_GPIO_IMR3B 0x24 141 + #define REG_GPIO_EDR1 0x28 142 + #define REG_GPIO_EDR2 0x29 143 + #define REG_GPIO_EDR3 0x2A 144 + #define REG_GPIO_EDR4 0x2B 145 + #define REG_GPIO_EDR5 0x2C 146 + #define REG_GPIO_SIH_CTRL 0x2D 147 + 148 + /* Up to 18 signals are available as GPIOs, when their 149 + * pins are not assigned to another use (such as ULPI/USB). 150 + */ 151 + #define TWL4030_GPIO_MAX 18 152 + 153 + /*----------------------------------------------------------------------*/ 154 + 155 + /* 156 + * Keypad register offsets (use TWL4030_MODULE_KEYPAD) 157 + * ... SIH/interrupt only 158 + */ 159 + 160 + #define TWL4030_KEYPAD_KEYP_ISR1 0x11 161 + #define TWL4030_KEYPAD_KEYP_IMR1 0x12 162 + #define TWL4030_KEYPAD_KEYP_ISR2 0x13 163 + #define TWL4030_KEYPAD_KEYP_IMR2 0x14 164 + #define TWL4030_KEYPAD_KEYP_SIR 0x15 /* test register */ 165 + #define TWL4030_KEYPAD_KEYP_EDR 0x16 166 + #define TWL4030_KEYPAD_KEYP_SIH_CTRL 0x17 167 + 168 + /*----------------------------------------------------------------------*/ 169 + 170 + /* 171 + * Multichannel ADC register offsets (use TWL4030_MODULE_MADC) 172 + * ... SIH/interrupt only 173 + */ 174 + 175 + #define TWL4030_MADC_ISR1 0x61 176 + #define TWL4030_MADC_IMR1 0x62 177 + #define TWL4030_MADC_ISR2 0x63 178 + #define TWL4030_MADC_IMR2 0x64 179 + #define TWL4030_MADC_SIR 0x65 /* test register */ 180 + #define TWL4030_MADC_EDR 0x66 181 + #define TWL4030_MADC_SIH_CTRL 0x67 182 + 183 + /*----------------------------------------------------------------------*/ 184 + 185 + /* 186 + * Battery charger register offsets (use TWL4030_MODULE_INTERRUPTS) 187 + */ 188 + 189 + #define TWL4030_INTERRUPTS_BCIISR1A 0x0 190 + #define TWL4030_INTERRUPTS_BCIISR2A 0x1 191 + #define TWL4030_INTERRUPTS_BCIIMR1A 0x2 192 + #define TWL4030_INTERRUPTS_BCIIMR2A 0x3 193 + #define TWL4030_INTERRUPTS_BCIISR1B 0x4 194 + #define TWL4030_INTERRUPTS_BCIISR2B 0x5 195 + #define TWL4030_INTERRUPTS_BCIIMR1B 0x6 196 + #define TWL4030_INTERRUPTS_BCIIMR2B 0x7 197 + #define TWL4030_INTERRUPTS_BCISIR1 0x8 /* test register */ 198 + #define TWL4030_INTERRUPTS_BCISIR2 0x9 /* test register */ 199 + #define TWL4030_INTERRUPTS_BCIEDR1 0xa 200 + #define TWL4030_INTERRUPTS_BCIEDR2 0xb 201 + #define TWL4030_INTERRUPTS_BCIEDR3 0xc 202 + #define TWL4030_INTERRUPTS_BCISIHCTRL 0xd 203 + 204 + /*----------------------------------------------------------------------*/ 205 + 206 + /* 207 + * Power Interrupt block register offsets (use TWL4030_MODULE_INT) 208 + */ 209 + 210 + #define TWL4030_INT_PWR_ISR1 0x0 211 + #define TWL4030_INT_PWR_IMR1 0x1 212 + #define TWL4030_INT_PWR_ISR2 0x2 213 + #define TWL4030_INT_PWR_IMR2 0x3 214 + #define TWL4030_INT_PWR_SIR 0x4 /* test register */ 215 + #define TWL4030_INT_PWR_EDR1 0x5 216 + #define TWL4030_INT_PWR_EDR2 0x6 217 + #define TWL4030_INT_PWR_SIH_CTRL 0x7 218 + 219 + /*----------------------------------------------------------------------*/ 220 + 221 + struct twl4030_bci_platform_data { 222 + int *battery_tmp_tbl; 223 + unsigned int tblsize; 224 + }; 225 + 226 + /* TWL4030_GPIO_MAX (18) GPIOs, with interrupts */ 227 + struct twl4030_gpio_platform_data { 228 + int gpio_base; 229 + unsigned irq_base, irq_end; 230 + 231 + /* For gpio-N, bit (1 << N) in "pullups" is set if that pullup 232 + * should be enabled. Else, if that bit is set in "pulldowns", 233 + * that pulldown is enabled. Don't waste power by letting any 234 + * digital inputs float... 235 + */ 236 + u32 pullups; 237 + u32 pulldowns; 238 + 239 + int (*setup)(struct device *dev, 240 + unsigned gpio, unsigned ngpio); 241 + int (*teardown)(struct device *dev, 242 + unsigned gpio, unsigned ngpio); 243 + }; 244 + 245 + struct twl4030_madc_platform_data { 246 + int irq_line; 247 + }; 248 + 249 + struct twl4030_keypad_data { 250 + int rows; 251 + int cols; 252 + int *keymap; 253 + int irq; 254 + unsigned int keymapsize; 255 + unsigned int rep:1; 256 + }; 257 + 258 + enum twl4030_usb_mode { 259 + T2_USB_MODE_ULPI = 1, 260 + T2_USB_MODE_CEA2011_3PIN = 2, 261 + }; 262 + 263 + struct twl4030_usb_data { 264 + enum twl4030_usb_mode usb_mode; 265 + }; 266 + 267 + struct twl4030_platform_data { 268 + unsigned irq_base, irq_end; 269 + struct twl4030_bci_platform_data *bci; 270 + struct twl4030_gpio_platform_data *gpio; 271 + struct twl4030_madc_platform_data *madc; 272 + struct twl4030_keypad_data *keypad; 273 + struct twl4030_usb_data *usb; 274 + 275 + /* REVISIT more to come ... _nothing_ should be hard-wired */ 276 + }; 277 + 278 + /*----------------------------------------------------------------------*/ 279 + 280 + /* 281 + * FIXME completely stop using TWL4030_IRQ_BASE ... instead, pass the 282 + * IRQ data to subsidiary devices using platform device resources. 283 + */ 284 + 285 + /* IRQ information-need base */ 286 + #include <mach/irqs.h> 287 + /* TWL4030 interrupts */ 288 + 289 + /* #define TWL4030_MODIRQ_GPIO (TWL4030_IRQ_BASE + 0) */ 290 + #define TWL4030_MODIRQ_KEYPAD (TWL4030_IRQ_BASE + 1) 291 + #define TWL4030_MODIRQ_BCI (TWL4030_IRQ_BASE + 2) 292 + #define TWL4030_MODIRQ_MADC (TWL4030_IRQ_BASE + 3) 293 + /* #define TWL4030_MODIRQ_USB (TWL4030_IRQ_BASE + 4) */ 294 + #define TWL4030_MODIRQ_PWR (TWL4030_IRQ_BASE + 5) 295 + 296 + #define TWL4030_PWRIRQ_PWRBTN (TWL4030_PWR_IRQ_BASE + 0) 297 + #define TWL4030_PWRIRQ_CHG_PRES (TWL4030_PWR_IRQ_BASE + 1) 298 + #define TWL4030_PWRIRQ_USB_PRES (TWL4030_PWR_IRQ_BASE + 2) 299 + #define TWL4030_PWRIRQ_RTC (TWL4030_PWR_IRQ_BASE + 3) 300 + #define TWL4030_PWRIRQ_HOT_DIE (TWL4030_PWR_IRQ_BASE + 4) 301 + #define TWL4030_PWRIRQ_PWROK_TIMEOUT (TWL4030_PWR_IRQ_BASE + 5) 302 + #define TWL4030_PWRIRQ_MBCHG (TWL4030_PWR_IRQ_BASE + 6) 303 + #define TWL4030_PWRIRQ_SC_DETECT (TWL4030_PWR_IRQ_BASE + 7) 304 + 305 + /* Rest are unsued currently*/ 306 + 307 + /* Offsets to Power Registers */ 308 + #define TWL4030_VDAC_DEV_GRP 0x3B 309 + #define TWL4030_VDAC_DEDICATED 0x3E 310 + #define TWL4030_VAUX1_DEV_GRP 0x17 311 + #define TWL4030_VAUX1_DEDICATED 0x1A 312 + #define TWL4030_VAUX2_DEV_GRP 0x1B 313 + #define TWL4030_VAUX2_DEDICATED 0x1E 314 + #define TWL4030_VAUX3_DEV_GRP 0x1F 315 + #define TWL4030_VAUX3_DEDICATED 0x22 316 + 317 + /* TWL4030 GPIO interrupt definitions */ 318 + 319 + #define TWL4030_GPIO_IRQ_NO(n) (TWL4030_GPIO_IRQ_BASE + (n)) 320 + #define TWL4030_GPIO_IS_ENABLE 1 321 + 322 + /* 323 + * Exported TWL4030 GPIO APIs 324 + * 325 + * WARNING -- use standard GPIO and IRQ calls instead; these will vanish. 326 + */ 327 + int twl4030_get_gpio_datain(int gpio); 328 + int twl4030_request_gpio(int gpio); 329 + int twl4030_set_gpio_debounce(int gpio, int enable); 330 + int twl4030_free_gpio(int gpio); 331 + 332 + #if defined(CONFIG_TWL4030_BCI_BATTERY) || \ 333 + defined(CONFIG_TWL4030_BCI_BATTERY_MODULE) 334 + extern int twl4030charger_usb_en(int enable); 335 + #else 336 + static inline int twl4030charger_usb_en(int enable) { return 0; } 337 + #endif 338 + 339 + #endif /* End of __TWL4030_H */
+201
include/linux/mfd/da903x.h
··· 1 + #ifndef __LINUX_PMIC_DA903X_H 2 + #define __LINUX_PMIC_DA903X_H 3 + 4 + /* Unified sub device IDs for DA9030/DA9034 */ 5 + enum { 6 + DA9030_ID_LED_1, 7 + DA9030_ID_LED_2, 8 + DA9030_ID_LED_3, 9 + DA9030_ID_LED_4, 10 + DA9030_ID_LED_PC, 11 + DA9030_ID_VIBRA, 12 + DA9030_ID_WLED, 13 + DA9030_ID_BUCK1, 14 + DA9030_ID_BUCK2, 15 + DA9030_ID_LDO1, 16 + DA9030_ID_LDO2, 17 + DA9030_ID_LDO3, 18 + DA9030_ID_LDO4, 19 + DA9030_ID_LDO5, 20 + DA9030_ID_LDO6, 21 + DA9030_ID_LDO7, 22 + DA9030_ID_LDO8, 23 + DA9030_ID_LDO9, 24 + DA9030_ID_LDO10, 25 + DA9030_ID_LDO11, 26 + DA9030_ID_LDO12, 27 + DA9030_ID_LDO13, 28 + DA9030_ID_LDO14, 29 + DA9030_ID_LDO15, 30 + DA9030_ID_LDO16, 31 + DA9030_ID_LDO17, 32 + DA9030_ID_LDO18, 33 + DA9030_ID_LDO19, 34 + DA9030_ID_LDO_INT, /* LDO Internal */ 35 + 36 + DA9034_ID_LED_1, 37 + DA9034_ID_LED_2, 38 + DA9034_ID_VIBRA, 39 + DA9034_ID_WLED, 40 + DA9034_ID_TOUCH, 41 + 42 + DA9034_ID_BUCK1, 43 + DA9034_ID_BUCK2, 44 + DA9034_ID_LDO1, 45 + DA9034_ID_LDO2, 46 + DA9034_ID_LDO3, 47 + DA9034_ID_LDO4, 48 + DA9034_ID_LDO5, 49 + DA9034_ID_LDO6, 50 + DA9034_ID_LDO7, 51 + DA9034_ID_LDO8, 52 + DA9034_ID_LDO9, 53 + DA9034_ID_LDO10, 54 + DA9034_ID_LDO11, 55 + DA9034_ID_LDO12, 56 + DA9034_ID_LDO13, 57 + DA9034_ID_LDO14, 58 + DA9034_ID_LDO15, 59 + }; 60 + 61 + /* 62 + * DA9030/DA9034 LEDs sub-devices uses generic "struct led_info" 63 + * as the platform_data 64 + */ 65 + 66 + /* DA9030 flags for "struct led_info" 67 + */ 68 + #define DA9030_LED_RATE_ON (0 << 5) 69 + #define DA9030_LED_RATE_052S (1 << 5) 70 + #define DA9030_LED_DUTY_1_16 (0 << 3) 71 + #define DA9030_LED_DUTY_1_8 (1 << 3) 72 + #define DA9030_LED_DUTY_1_4 (2 << 3) 73 + #define DA9030_LED_DUTY_1_2 (3 << 3) 74 + 75 + #define DA9030_VIBRA_MODE_1P3V (0 << 1) 76 + #define DA9030_VIBRA_MODE_2P7V (1 << 1) 77 + #define DA9030_VIBRA_FREQ_1HZ (0 << 2) 78 + #define DA9030_VIBRA_FREQ_2HZ (1 << 2) 79 + #define DA9030_VIBRA_FREQ_4HZ (2 << 2) 80 + #define DA9030_VIBRA_FREQ_8HZ (3 << 2) 81 + #define DA9030_VIBRA_DUTY_ON (0 << 4) 82 + #define DA9030_VIBRA_DUTY_75P (1 << 4) 83 + #define DA9030_VIBRA_DUTY_50P (2 << 4) 84 + #define DA9030_VIBRA_DUTY_25P (3 << 4) 85 + 86 + /* DA9034 flags for "struct led_info" */ 87 + #define DA9034_LED_RAMP (1 << 7) 88 + 89 + /* DA9034 touch screen platform data */ 90 + struct da9034_touch_pdata { 91 + int interval_ms; /* sampling interval while pen down */ 92 + int x_inverted; 93 + int y_inverted; 94 + }; 95 + 96 + struct da903x_subdev_info { 97 + int id; 98 + const char *name; 99 + void *platform_data; 100 + }; 101 + 102 + struct da903x_platform_data { 103 + int num_subdevs; 104 + struct da903x_subdev_info *subdevs; 105 + }; 106 + 107 + /* bit definitions for DA9030 events */ 108 + #define DA9030_EVENT_ONKEY (1 << 0) 109 + #define DA9030_EVENT_PWREN (1 << 1) 110 + #define DA9030_EVENT_EXTON (1 << 2) 111 + #define DA9030_EVENT_CHDET (1 << 3) 112 + #define DA9030_EVENT_TBAT (1 << 4) 113 + #define DA9030_EVENT_VBATMON (1 << 5) 114 + #define DA9030_EVENT_VBATMON_TXON (1 << 6) 115 + #define DA9030_EVENT_CHIOVER (1 << 7) 116 + #define DA9030_EVENT_TCTO (1 << 8) 117 + #define DA9030_EVENT_CCTO (1 << 9) 118 + #define DA9030_EVENT_ADC_READY (1 << 10) 119 + #define DA9030_EVENT_VBUS_4P4 (1 << 11) 120 + #define DA9030_EVENT_VBUS_4P0 (1 << 12) 121 + #define DA9030_EVENT_SESS_VALID (1 << 13) 122 + #define DA9030_EVENT_SRP_DETECT (1 << 14) 123 + #define DA9030_EVENT_WATCHDOG (1 << 15) 124 + #define DA9030_EVENT_LDO15 (1 << 16) 125 + #define DA9030_EVENT_LDO16 (1 << 17) 126 + #define DA9030_EVENT_LDO17 (1 << 18) 127 + #define DA9030_EVENT_LDO18 (1 << 19) 128 + #define DA9030_EVENT_LDO19 (1 << 20) 129 + #define DA9030_EVENT_BUCK2 (1 << 21) 130 + 131 + /* bit definitions for DA9034 events */ 132 + #define DA9034_EVENT_ONKEY (1 << 0) 133 + #define DA9034_EVENT_EXTON (1 << 2) 134 + #define DA9034_EVENT_CHDET (1 << 3) 135 + #define DA9034_EVENT_TBAT (1 << 4) 136 + #define DA9034_EVENT_VBATMON (1 << 5) 137 + #define DA9034_EVENT_REV_IOVER (1 << 6) 138 + #define DA9034_EVENT_CH_IOVER (1 << 7) 139 + #define DA9034_EVENT_CH_TCTO (1 << 8) 140 + #define DA9034_EVENT_CH_CCTO (1 << 9) 141 + #define DA9034_EVENT_USB_DEV (1 << 10) 142 + #define DA9034_EVENT_OTGCP_IOVER (1 << 11) 143 + #define DA9034_EVENT_VBUS_4P55 (1 << 12) 144 + #define DA9034_EVENT_VBUS_3P8 (1 << 13) 145 + #define DA9034_EVENT_SESS_1P8 (1 << 14) 146 + #define DA9034_EVENT_SRP_READY (1 << 15) 147 + #define DA9034_EVENT_ADC_MAN (1 << 16) 148 + #define DA9034_EVENT_ADC_AUTO4 (1 << 17) 149 + #define DA9034_EVENT_ADC_AUTO5 (1 << 18) 150 + #define DA9034_EVENT_ADC_AUTO6 (1 << 19) 151 + #define DA9034_EVENT_PEN_DOWN (1 << 20) 152 + #define DA9034_EVENT_TSI_READY (1 << 21) 153 + #define DA9034_EVENT_UART_TX (1 << 22) 154 + #define DA9034_EVENT_UART_RX (1 << 23) 155 + #define DA9034_EVENT_HEADSET (1 << 25) 156 + #define DA9034_EVENT_HOOKSWITCH (1 << 26) 157 + #define DA9034_EVENT_WATCHDOG (1 << 27) 158 + 159 + extern int da903x_register_notifier(struct device *dev, 160 + struct notifier_block *nb, unsigned int events); 161 + extern int da903x_unregister_notifier(struct device *dev, 162 + struct notifier_block *nb, unsigned int events); 163 + 164 + /* Status Query Interface */ 165 + #define DA9030_STATUS_ONKEY (1 << 0) 166 + #define DA9030_STATUS_PWREN1 (1 << 1) 167 + #define DA9030_STATUS_EXTON (1 << 2) 168 + #define DA9030_STATUS_CHDET (1 << 3) 169 + #define DA9030_STATUS_TBAT (1 << 4) 170 + #define DA9030_STATUS_VBATMON (1 << 5) 171 + #define DA9030_STATUS_VBATMON_TXON (1 << 6) 172 + #define DA9030_STATUS_MCLKDET (1 << 7) 173 + 174 + #define DA9034_STATUS_ONKEY (1 << 0) 175 + #define DA9034_STATUS_EXTON (1 << 2) 176 + #define DA9034_STATUS_CHDET (1 << 3) 177 + #define DA9034_STATUS_TBAT (1 << 4) 178 + #define DA9034_STATUS_VBATMON (1 << 5) 179 + #define DA9034_STATUS_PEN_DOWN (1 << 6) 180 + #define DA9034_STATUS_MCLKDET (1 << 7) 181 + #define DA9034_STATUS_USB_DEV (1 << 8) 182 + #define DA9034_STATUS_HEADSET (1 << 9) 183 + #define DA9034_STATUS_HOOKSWITCH (1 << 10) 184 + #define DA9034_STATUS_REMCON (1 << 11) 185 + #define DA9034_STATUS_VBUS_VALID_4P55 (1 << 12) 186 + #define DA9034_STATUS_VBUS_VALID_3P8 (1 << 13) 187 + #define DA9034_STATUS_SESS_VALID_1P8 (1 << 14) 188 + #define DA9034_STATUS_SRP_READY (1 << 15) 189 + 190 + extern int da903x_query_status(struct device *dev, unsigned int status); 191 + 192 + 193 + /* NOTE: the two functions below are not intended for use outside 194 + * of the DA9034 sub-device drivers 195 + */ 196 + extern int da903x_write(struct device *dev, int reg, uint8_t val); 197 + extern int da903x_read(struct device *dev, int reg, uint8_t *val); 198 + extern int da903x_update(struct device *dev, int reg, uint8_t val, uint8_t mask); 199 + extern int da903x_set_bits(struct device *dev, int reg, uint8_t bit_mask); 200 + extern int da903x_clr_bits(struct device *dev, int reg, uint8_t bit_mask); 201 + #endif /* __LINUX_PMIC_DA903X_H */
-2
include/linux/mfd/t7l66xb.h
··· 15 15 #include <linux/mfd/tmio.h> 16 16 17 17 struct t7l66xb_platform_data { 18 - int (*enable_clk32k)(struct platform_device *dev); 19 - void (*disable_clk32k)(struct platform_device *dev); 20 18 int (*enable)(struct platform_device *dev); 21 19 int (*disable)(struct platform_device *dev); 22 20 int (*suspend)(struct platform_device *dev);
-3
include/linux/mfd/tc6387xb.h
··· 11 11 #define MFD_TC6387XB_H 12 12 13 13 struct tc6387xb_platform_data { 14 - int (*enable_clk32k)(struct platform_device *dev); 15 - void (*disable_clk32k)(struct platform_device *dev); 16 - 17 14 int (*enable)(struct platform_device *dev); 18 15 int (*disable)(struct platform_device *dev); 19 16 int (*suspend)(struct platform_device *dev);
+15 -2
include/linux/mfd/tc6393xb.h
··· 17 17 #ifndef MFD_TC6393XB_H 18 18 #define MFD_TC6393XB_H 19 19 20 + #include <linux/fb.h> 21 + 20 22 /* Also one should provide the CK3P6MI clock */ 21 23 struct tc6393xb_platform_data { 22 24 u16 scr_pll2cr; /* PLL2 Control */ 23 25 u16 scr_gper; /* GP Enable */ 24 - u32 scr_gpo_doecr; /* GPO Data OE Control */ 25 - u32 scr_gpo_dsr; /* GPO Data Set */ 26 26 27 27 int (*enable)(struct platform_device *dev); 28 28 int (*disable)(struct platform_device *dev); ··· 31 31 32 32 int irq_base; /* base for subdevice irqs */ 33 33 int gpio_base; 34 + int (*setup)(struct platform_device *dev); 35 + void (*teardown)(struct platform_device *dev); 34 36 35 37 struct tmio_nand_data *nand_data; 38 + struct tmio_fb_data *fb_data; 39 + 40 + unsigned resume_restore : 1; /* make special actions 41 + to preserve the state 42 + on suspend/resume */ 36 43 }; 44 + 45 + extern int tc6393xb_lcd_mode(struct platform_device *fb, 46 + const struct fb_videomode *mode); 47 + extern int tc6393xb_lcd_set_power(struct platform_device *fb, bool on); 37 48 38 49 /* 39 50 * Relative to irq_base 40 51 */ 41 52 #define IRQ_TC6393_NAND 0 42 53 #define IRQ_TC6393_MMC 1 54 + #define IRQ_TC6393_OHCI 2 55 + #define IRQ_TC6393_FB 4 43 56 44 57 #define TC6393XB_NR_IRQS 8 45 58