Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

phy: qcom-qmp-ufs: rework regs layout arrays

Use symbolic names for the values inside reg layout arrays. New register
names are added following the PCS register layout that is used by the
particular PHY.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221110192248.873973-8-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Dmitry Baryshkov and committed by
Vinod Koul
3b4bf465 cbd06cde

+17 -9
+5
drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v2.h
··· 6 6 #ifndef QCOM_PHY_QMP_PCS_UFS_V2_H_ 7 7 #define QCOM_PHY_QMP_PCS_UFS_V2_H_ 8 8 9 + #define QPHY_V2_PCS_UFS_PHY_START 0x000 10 + #define QPHY_V2_PCS_UFS_POWER_DOWN_CONTROL 0x004 11 + 9 12 #define QPHY_V2_PCS_UFS_TX_LARGE_AMP_DRV_LVL 0x034 10 13 #define QPHY_V2_PCS_UFS_TX_LARGE_AMP_POST_EMP_LVL 0x038 11 14 #define QPHY_V2_PCS_UFS_TX_SMALL_AMP_DRV_LVL 0x03c ··· 19 16 #define QPHY_V2_PCS_UFS_RX_MIN_HIBERN8_TIME 0x140 20 17 #define QPHY_V2_PCS_UFS_RX_SIGDET_CTRL2 0x148 21 18 #define QPHY_V2_PCS_UFS_RX_PWM_GEAR_BAND 0x154 19 + 20 + #define QPHY_V2_PCS_UFS_READY_STATUS 0x168 22 21 23 22 #endif
+3
drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v3.h
··· 6 6 #ifndef QCOM_PHY_QMP_PCS_UFS_V3_H_ 7 7 #define QCOM_PHY_QMP_PCS_UFS_V3_H_ 8 8 9 + #define QPHY_V3_PCS_UFS_PHY_START 0x000 10 + #define QPHY_V3_PCS_UFS_POWER_DOWN_CONTROL 0x004 9 11 #define QPHY_V3_PCS_UFS_TX_LARGE_AMP_DRV_LVL 0x02c 10 12 #define QPHY_V3_PCS_UFS_TX_SMALL_AMP_DRV_LVL 0x034 11 13 #define QPHY_V3_PCS_UFS_RX_SYM_RESYNC_CTRL 0x134 12 14 #define QPHY_V3_PCS_UFS_RX_MIN_HIBERN8_TIME 0x138 13 15 #define QPHY_V3_PCS_UFS_RX_SIGDET_CTRL1 0x13c 14 16 #define QPHY_V3_PCS_UFS_RX_SIGDET_CTRL2 0x140 17 + #define QPHY_V3_PCS_UFS_READY_STATUS 0x160 15 18 #define QPHY_V3_PCS_UFS_TX_MID_TERM_CTRL1 0x1bc 16 19 #define QPHY_V3_PCS_UFS_MULTI_LANE_CTRL1 0x1c4 17 20
+9 -9
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
··· 70 70 }; 71 71 72 72 static const unsigned int msm8996_ufsphy_regs_layout[QPHY_LAYOUT_SIZE] = { 73 - [QPHY_START_CTRL] = 0x00, 74 - [QPHY_PCS_READY_STATUS] = 0x168, 75 - [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, 73 + [QPHY_START_CTRL] = QPHY_V2_PCS_UFS_PHY_START, 74 + [QPHY_PCS_READY_STATUS] = QPHY_V2_PCS_UFS_READY_STATUS, 75 + [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V2_PCS_UFS_POWER_DOWN_CONTROL, 76 76 }; 77 77 78 78 static const unsigned int sdm845_ufsphy_regs_layout[QPHY_LAYOUT_SIZE] = { 79 - [QPHY_START_CTRL] = 0x00, 80 - [QPHY_PCS_READY_STATUS] = 0x160, 81 - [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, 79 + [QPHY_START_CTRL] = QPHY_V3_PCS_UFS_PHY_START, 80 + [QPHY_PCS_READY_STATUS] = QPHY_V3_PCS_UFS_READY_STATUS, 81 + [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V3_PCS_UFS_POWER_DOWN_CONTROL, 82 82 }; 83 83 84 84 static const unsigned int sm6115_ufsphy_regs_layout[QPHY_LAYOUT_SIZE] = { 85 - [QPHY_START_CTRL] = 0x00, 86 - [QPHY_PCS_READY_STATUS] = 0x168, 87 - [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, 85 + [QPHY_START_CTRL] = QPHY_V2_PCS_UFS_PHY_START, 86 + [QPHY_PCS_READY_STATUS] = QPHY_V2_PCS_UFS_READY_STATUS, 87 + [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V2_PCS_UFS_POWER_DOWN_CONTROL, 88 88 }; 89 89 90 90 static const unsigned int sm8150_ufsphy_regs_layout[QPHY_LAYOUT_SIZE] = {