Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

staging: fbtft: Use standard MIPI DCS command defines for hx8340bn

This patch makes use of the standard MIPI Display Command Set to remove
some of the magic constants found in source code.

Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Priit Laes and committed by
Greg Kroah-Hartman
3b2bf2bc 44017631

+15 -10
+15 -10
drivers/staging/fbtft/fb_hx8340bn.c
··· 25 25 #include <linux/vmalloc.h> 26 26 #include <linux/spi/spi.h> 27 27 #include <linux/delay.h> 28 + #include <video/mipi_display.h> 28 29 29 30 #include "fbtft.h" 30 31 ··· 90 89 This command is used to define the format of RGB picture data, 91 90 which is to be transfer via the system and RGB interface. */ 92 91 /* RGB interface: 16 Bit/Pixel */ 93 - write_reg(par, 0x3A, 0x05); 92 + write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT); 94 93 95 94 /* Display on (29h) 96 95 This command is used to recover from DISPLAY OFF mode. 97 96 Output from the Frame Memory is enabled. */ 98 - write_reg(par, 0x29); 97 + write_reg(par, MIPI_DCS_SET_DISPLAY_ON); 99 98 mdelay(10); 100 99 101 100 return 0; ··· 103 102 104 103 static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) 105 104 { 106 - write_reg(par, FBTFT_CASET, 0x00, xs, 0x00, xe); 107 - write_reg(par, FBTFT_RASET, 0x00, ys, 0x00, ye); 108 - write_reg(par, FBTFT_RAMWR); 105 + write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS, 0x00, xs, 0x00, xe); 106 + write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS, 0x00, ys, 0x00, ye); 107 + write_reg(par, MIPI_DCS_WRITE_MEMORY_START); 109 108 } 110 109 111 110 static int set_var(struct fbtft_par *par) ··· 117 116 #define MV BIT(5) 118 117 switch (par->info->var.rotate) { 119 118 case 0: 120 - write_reg(par, 0x36, par->bgr << 3); 119 + write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, par->bgr << 3); 121 120 break; 122 121 case 270: 123 - write_reg(par, 0x36, MX | MV | (par->bgr << 3)); 122 + write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 123 + MX | MV | (par->bgr << 3)); 124 124 break; 125 125 case 180: 126 - write_reg(par, 0x36, MX | MY | (par->bgr << 3)); 126 + write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 127 + MX | MY | (par->bgr << 3)); 127 128 break; 128 129 case 90: 129 - write_reg(par, 0x36, MY | MV | (par->bgr << 3)); 130 + write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 131 + MY | MV | (par->bgr << 3)); 130 132 break; 131 133 } 132 134 ··· 158 154 for (j = 0; j < par->gamma.num_values; j++) 159 155 CURVE(i, j) &= mask[i * par->gamma.num_values + j]; 160 156 161 - write_reg(par, 0x26, 1 << CURVE(1, 14)); /* Gamma Set (26h) */ 157 + /* Gamma Set (26h) */ 158 + write_reg(par, MIPI_DCS_SET_GAMMA_CURVE, 1 << CURVE(1, 14)); 162 159 163 160 if (CURVE(1, 14)) 164 161 return 0; /* only GC0 can be customized */