tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

V4L/DVB (3407): added some code for VBI processing and cleanup debug dump

- Renamed some registers and improved register debug message
- Some cleanups at register dump
- Added code to set VBI processor (VDP)
- VBI code still incomplete

Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>

authored by

Mauro Carvalho Chehab and committed by
Mauro Carvalho Chehab 3ad96835 439090d7

+238 -373
+207 -286
drivers/media/video/tvp5150.c
··· 29 29 module_param(debug, int, 0); 30 30 MODULE_PARM_DESC(debug, "Debug level (0-1)"); 31 31 32 + #define tvp5150_err(fmt, arg...) do { \ 33 + printk(KERN_ERR "%s %d-%04x: " fmt, c->driver->driver.name, \ 34 + i2c_adapter_id(c->adapter), c->addr , ## arg); } while (0) 32 35 #define tvp5150_info(fmt, arg...) do { \ 33 36 printk(KERN_INFO "%s %d-%04x: " fmt, c->driver->driver.name, \ 34 37 i2c_adapter_id(c->adapter), c->addr , ## arg); } while (0) ··· 87 84 struct tvp5150 { 88 85 struct i2c_client *client; 89 86 90 - int norm; 87 + v4l2_std_id norm; /* Current set standard */ 91 88 int input; 92 89 int enable; 93 90 int bright; ··· 128 125 tvp5150_dbg(0, "i2c i/o error: rc == %d (should be 2)\n", rc); 129 126 } 130 127 128 + static void dump_reg_range(struct i2c_client *c, char *s, u8 init, const u8 end,int max_line) 129 + { 130 + int i=0; 131 + 132 + while (init!=(u8)(end+1)) { 133 + if ((i%max_line) == 0) { 134 + if (i>0) 135 + printk("\n"); 136 + printk("tvp5150: %s reg 0x%02x = ",s,init); 137 + } 138 + printk("%02x ",tvp5150_read(c, init)); 139 + 140 + init++; 141 + i++; 142 + } 143 + printk("\n"); 144 + } 145 + 131 146 static void dump_reg(struct i2c_client *c) 132 147 { 133 148 printk("tvp5150: Video input source selection #1 = 0x%02x\n", 134 - tvp5150_read(c, TVP5150_VD_IN_SRC_SEL_1)); 149 + tvp5150_read(c, TVP5150_VD_IN_SRC_SEL_1)); 135 150 printk("tvp5150: Analog channel controls = 0x%02x\n", 136 - tvp5150_read(c, TVP5150_ANAL_CHL_CTL)); 151 + tvp5150_read(c, TVP5150_ANAL_CHL_CTL)); 137 152 printk("tvp5150: Operation mode controls = 0x%02x\n", 138 - tvp5150_read(c, TVP5150_OP_MODE_CTL)); 153 + tvp5150_read(c, TVP5150_OP_MODE_CTL)); 139 154 printk("tvp5150: Miscellaneous controls = 0x%02x\n", 140 - tvp5150_read(c, TVP5150_MISC_CTL)); 141 - printk("tvp5150: Autoswitch mask: TVP5150A / TVP5150AM = 0x%02x\n", 142 - tvp5150_read(c, TVP5150_AUTOSW_MSK)); 155 + tvp5150_read(c, TVP5150_MISC_CTL)); 156 + printk("tvp5150: Autoswitch mask= 0x%02x\n", 157 + tvp5150_read(c, TVP5150_AUTOSW_MSK)); 143 158 printk("tvp5150: Color killer threshold control = 0x%02x\n", 144 - tvp5150_read(c, TVP5150_COLOR_KIL_THSH_CTL)); 145 - printk("tvp5150: Luminance processing control #1 = 0x%02x\n", 146 - tvp5150_read(c, TVP5150_LUMA_PROC_CTL_1)); 147 - printk("tvp5150: Luminance processing control #2 = 0x%02x\n", 148 - tvp5150_read(c, TVP5150_LUMA_PROC_CTL_2)); 159 + tvp5150_read(c, TVP5150_COLOR_KIL_THSH_CTL)); 160 + printk("tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n", 161 + tvp5150_read(c, TVP5150_LUMA_PROC_CTL_1), 162 + tvp5150_read(c, TVP5150_LUMA_PROC_CTL_2), 163 + tvp5150_read(c, TVP5150_LUMA_PROC_CTL_3)); 149 164 printk("tvp5150: Brightness control = 0x%02x\n", 150 - tvp5150_read(c, TVP5150_BRIGHT_CTL)); 165 + tvp5150_read(c, TVP5150_BRIGHT_CTL)); 151 166 printk("tvp5150: Color saturation control = 0x%02x\n", 152 - tvp5150_read(c, TVP5150_SATURATION_CTL)); 167 + tvp5150_read(c, TVP5150_SATURATION_CTL)); 153 168 printk("tvp5150: Hue control = 0x%02x\n", 154 - tvp5150_read(c, TVP5150_HUE_CTL)); 169 + tvp5150_read(c, TVP5150_HUE_CTL)); 155 170 printk("tvp5150: Contrast control = 0x%02x\n", 156 - tvp5150_read(c, TVP5150_CONTRAST_CTL)); 171 + tvp5150_read(c, TVP5150_CONTRAST_CTL)); 157 172 printk("tvp5150: Outputs and data rates select = 0x%02x\n", 158 - tvp5150_read(c, TVP5150_DATA_RATE_SEL)); 159 - printk("tvp5150: Luminance processing control #3 = 0x%02x\n", 160 - tvp5150_read(c, TVP5150_LUMA_PROC_CTL_3)); 173 + tvp5150_read(c, TVP5150_DATA_RATE_SEL)); 161 174 printk("tvp5150: Configuration shared pins = 0x%02x\n", 162 - tvp5150_read(c, TVP5150_CONF_SHARED_PIN)); 163 - printk("tvp5150: Active video cropping start MSB = 0x%02x\n", 164 - tvp5150_read(c, TVP5150_ACT_VD_CROP_ST_MSB)); 165 - printk("tvp5150: Active video cropping start LSB = 0x%02x\n", 166 - tvp5150_read(c, TVP5150_ACT_VD_CROP_ST_LSB)); 167 - printk("tvp5150: Active video cropping stop MSB = 0x%02x\n", 168 - tvp5150_read(c, TVP5150_ACT_VD_CROP_STP_MSB)); 169 - printk("tvp5150: Active video cropping stop LSB = 0x%02x\n", 170 - tvp5150_read(c, TVP5150_ACT_VD_CROP_STP_LSB)); 175 + tvp5150_read(c, TVP5150_CONF_SHARED_PIN)); 176 + printk("tvp5150: Active video cropping start = 0x%02x%02x\n", 177 + tvp5150_read(c, TVP5150_ACT_VD_CROP_ST_MSB), 178 + tvp5150_read(c, TVP5150_ACT_VD_CROP_ST_LSB)); 179 + printk("tvp5150: Active video cropping stop = 0x%02x%02x\n", 180 + tvp5150_read(c, TVP5150_ACT_VD_CROP_STP_MSB), 181 + tvp5150_read(c, TVP5150_ACT_VD_CROP_STP_LSB)); 171 182 printk("tvp5150: Genlock/RTC = 0x%02x\n", 172 - tvp5150_read(c, TVP5150_GENLOCK)); 183 + tvp5150_read(c, TVP5150_GENLOCK)); 173 184 printk("tvp5150: Horizontal sync start = 0x%02x\n", 174 - tvp5150_read(c, TVP5150_HORIZ_SYNC_START)); 185 + tvp5150_read(c, TVP5150_HORIZ_SYNC_START)); 175 186 printk("tvp5150: Vertical blanking start = 0x%02x\n", 176 - tvp5150_read(c, TVP5150_VERT_BLANKING_START)); 187 + tvp5150_read(c, TVP5150_VERT_BLANKING_START)); 177 188 printk("tvp5150: Vertical blanking stop = 0x%02x\n", 178 - tvp5150_read(c, TVP5150_VERT_BLANKING_STOP)); 179 - printk("tvp5150: Chrominance processing control #1 = 0x%02x\n", 180 - tvp5150_read(c, TVP5150_CHROMA_PROC_CTL_1)); 181 - printk("tvp5150: Chrominance processing control #2 = 0x%02x\n", 182 - tvp5150_read(c, TVP5150_CHROMA_PROC_CTL_2)); 189 + tvp5150_read(c, TVP5150_VERT_BLANKING_STOP)); 190 + printk("tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n", 191 + tvp5150_read(c, TVP5150_CHROMA_PROC_CTL_1), 192 + tvp5150_read(c, TVP5150_CHROMA_PROC_CTL_2)); 183 193 printk("tvp5150: Interrupt reset register B = 0x%02x\n", 184 - tvp5150_read(c, TVP5150_INT_RESET_REG_B)); 194 + tvp5150_read(c, TVP5150_INT_RESET_REG_B)); 185 195 printk("tvp5150: Interrupt enable register B = 0x%02x\n", 186 - tvp5150_read(c, TVP5150_INT_ENABLE_REG_B)); 196 + tvp5150_read(c, TVP5150_INT_ENABLE_REG_B)); 187 197 printk("tvp5150: Interrupt configuration register B = 0x%02x\n", 188 - tvp5150_read(c, TVP5150_INTT_CONFIG_REG_B)); 198 + tvp5150_read(c, TVP5150_INTT_CONFIG_REG_B)); 189 199 printk("tvp5150: Video standard = 0x%02x\n", 190 - tvp5150_read(c, TVP5150_VIDEO_STD)); 191 - printk("tvp5150: Cb gain factor = 0x%02x\n", 192 - tvp5150_read(c, TVP5150_CB_GAIN_FACT)); 193 - printk("tvp5150: Cr gain factor = 0x%02x\n", 194 - tvp5150_read(c, TVP5150_CR_GAIN_FACTOR)); 200 + tvp5150_read(c, TVP5150_VIDEO_STD)); 201 + printk("tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n", 202 + tvp5150_read(c, TVP5150_CB_GAIN_FACT), 203 + tvp5150_read(c, TVP5150_CR_GAIN_FACTOR)); 195 204 printk("tvp5150: Macrovision on counter = 0x%02x\n", 196 - tvp5150_read(c, TVP5150_MACROVISION_ON_CTR)); 205 + tvp5150_read(c, TVP5150_MACROVISION_ON_CTR)); 197 206 printk("tvp5150: Macrovision off counter = 0x%02x\n", 198 - tvp5150_read(c, TVP5150_MACROVISION_OFF_CTR)); 199 - printk("tvp5150: revision select (TVP5150AM1 only) = 0x%02x\n", 200 - tvp5150_read(c, TVP5150_REV_SELECT)); 201 - printk("tvp5150: MSB of device ID = 0x%02x\n", 202 - tvp5150_read(c, TVP5150_MSB_DEV_ID)); 203 - printk("tvp5150: LSB of device ID = 0x%02x\n", 204 - tvp5150_read(c, TVP5150_LSB_DEV_ID)); 205 - printk("tvp5150: ROM major version = 0x%02x\n", 206 - tvp5150_read(c, TVP5150_ROM_MAJOR_VER)); 207 - printk("tvp5150: ROM minor version = 0x%02x\n", 208 - tvp5150_read(c, TVP5150_ROM_MINOR_VER)); 209 - printk("tvp5150: Vertical line count MSB = 0x%02x\n", 210 - tvp5150_read(c, TVP5150_VERT_LN_COUNT_MSB)); 211 - printk("tvp5150: Vertical line count LSB = 0x%02x\n", 212 - tvp5150_read(c, TVP5150_VERT_LN_COUNT_LSB)); 207 + tvp5150_read(c, TVP5150_MACROVISION_OFF_CTR)); 208 + printk("tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n", 209 + (tvp5150_read(c, TVP5150_REV_SELECT)&1)?3:4); 210 + printk("tvp5150: Device ID = %02x%02x\n", 211 + tvp5150_read(c, TVP5150_MSB_DEV_ID), 212 + tvp5150_read(c, TVP5150_LSB_DEV_ID)); 213 + printk("tvp5150: ROM version = (hex) %02x.%02x\n", 214 + tvp5150_read(c, TVP5150_ROM_MAJOR_VER), 215 + tvp5150_read(c, TVP5150_ROM_MINOR_VER)); 216 + printk("tvp5150: Vertical line count = 0x%02x%02x\n", 217 + tvp5150_read(c, TVP5150_VERT_LN_COUNT_MSB), 218 + tvp5150_read(c, TVP5150_VERT_LN_COUNT_LSB)); 213 219 printk("tvp5150: Interrupt status register B = 0x%02x\n", 214 - tvp5150_read(c, TVP5150_INT_STATUS_REG_B)); 220 + tvp5150_read(c, TVP5150_INT_STATUS_REG_B)); 215 221 printk("tvp5150: Interrupt active register B = 0x%02x\n", 216 - tvp5150_read(c, TVP5150_INT_ACTIVE_REG_B)); 217 - printk("tvp5150: Status register #1 = 0x%02x\n", 218 - tvp5150_read(c, TVP5150_STATUS_REG_1)); 219 - printk("tvp5150: Status register #2 = 0x%02x\n", 220 - tvp5150_read(c, TVP5150_STATUS_REG_2)); 221 - printk("tvp5150: Status register #3 = 0x%02x\n", 222 - tvp5150_read(c, TVP5150_STATUS_REG_3)); 223 - printk("tvp5150: Status register #4 = 0x%02x\n", 224 - tvp5150_read(c, TVP5150_STATUS_REG_4)); 225 - printk("tvp5150: Status register #5 = 0x%02x\n", 226 - tvp5150_read(c, TVP5150_STATUS_REG_5)); 227 - printk("tvp5150: Closed caption data registers = 0x%02x\n", 228 - tvp5150_read(c, TVP5150_CC_DATA_REG1)); 229 - printk("tvp5150: Closed caption data registers = 0x%02x\n", 230 - tvp5150_read(c, TVP5150_CC_DATA_REG2)); 231 - printk("tvp5150: Closed caption data registers = 0x%02x\n", 232 - tvp5150_read(c, TVP5150_CC_DATA_REG3)); 233 - printk("tvp5150: Closed caption data registers = 0x%02x\n", 234 - tvp5150_read(c, TVP5150_CC_DATA_REG4)); 235 - printk("tvp5150: WSS data registers = 0x%02x\n", 236 - tvp5150_read(c, TVP5150_WSS_DATA_REG1)); 237 - printk("tvp5150: WSS data registers = 0x%02x\n", 238 - tvp5150_read(c, TVP5150_WSS_DATA_REG2)); 239 - printk("tvp5150: WSS data registers = 0x%02x\n", 240 - tvp5150_read(c, TVP5150_WSS_DATA_REG3)); 241 - printk("tvp5150: WSS data registers = 0x%02x\n", 242 - tvp5150_read(c, TVP5150_WSS_DATA_REG4)); 243 - printk("tvp5150: WSS data registers = 0x%02x\n", 244 - tvp5150_read(c, TVP5150_WSS_DATA_REG5)); 245 - printk("tvp5150: WSS data registers = 0x%02x\n", 246 - tvp5150_read(c, TVP5150_WSS_DATA_REG6)); 247 - printk("tvp5150: VPS data registers = 0x%02x\n", 248 - tvp5150_read(c, TVP5150_VPS_DATA_REG1)); 249 - printk("tvp5150: VPS data registers = 0x%02x\n", 250 - tvp5150_read(c, TVP5150_VPS_DATA_REG2)); 251 - printk("tvp5150: VPS data registers = 0x%02x\n", 252 - tvp5150_read(c, TVP5150_VPS_DATA_REG3)); 253 - printk("tvp5150: VPS data registers = 0x%02x\n", 254 - tvp5150_read(c, TVP5150_VPS_DATA_REG4)); 255 - printk("tvp5150: VPS data registers = 0x%02x\n", 256 - tvp5150_read(c, TVP5150_VPS_DATA_REG5)); 257 - printk("tvp5150: VPS data registers = 0x%02x\n", 258 - tvp5150_read(c, TVP5150_VPS_DATA_REG6)); 259 - printk("tvp5150: VPS data registers = 0x%02x\n", 260 - tvp5150_read(c, TVP5150_VPS_DATA_REG7)); 261 - printk("tvp5150: VPS data registers = 0x%02x\n", 262 - tvp5150_read(c, TVP5150_VPS_DATA_REG8)); 263 - printk("tvp5150: VPS data registers = 0x%02x\n", 264 - tvp5150_read(c, TVP5150_VPS_DATA_REG9)); 265 - printk("tvp5150: VPS data registers = 0x%02x\n", 266 - tvp5150_read(c, TVP5150_VPS_DATA_REG10)); 267 - printk("tvp5150: VPS data registers = 0x%02x\n", 268 - tvp5150_read(c, TVP5150_VPS_DATA_REG11)); 269 - printk("tvp5150: VPS data registers = 0x%02x\n", 270 - tvp5150_read(c, TVP5150_VPS_DATA_REG12)); 271 - printk("tvp5150: VPS data registers = 0x%02x\n", 272 - tvp5150_read(c, TVP5150_VPS_DATA_REG13)); 273 - printk("tvp5150: VITC data registers = 0x%02x\n", 274 - tvp5150_read(c, TVP5150_VITC_DATA_REG1)); 275 - printk("tvp5150: VITC data registers = 0x%02x\n", 276 - tvp5150_read(c, TVP5150_VITC_DATA_REG2)); 277 - printk("tvp5150: VITC data registers = 0x%02x\n", 278 - tvp5150_read(c, TVP5150_VITC_DATA_REG3)); 279 - printk("tvp5150: VITC data registers = 0x%02x\n", 280 - tvp5150_read(c, TVP5150_VITC_DATA_REG4)); 281 - printk("tvp5150: VITC data registers = 0x%02x\n", 282 - tvp5150_read(c, TVP5150_VITC_DATA_REG5)); 283 - printk("tvp5150: VITC data registers = 0x%02x\n", 284 - tvp5150_read(c, TVP5150_VITC_DATA_REG6)); 285 - printk("tvp5150: VITC data registers = 0x%02x\n", 286 - tvp5150_read(c, TVP5150_VITC_DATA_REG7)); 287 - printk("tvp5150: VITC data registers = 0x%02x\n", 288 - tvp5150_read(c, TVP5150_VITC_DATA_REG8)); 289 - printk("tvp5150: VITC data registers = 0x%02x\n", 290 - tvp5150_read(c, TVP5150_VITC_DATA_REG9)); 291 - printk("tvp5150: VBI FIFO read data = 0x%02x\n", 292 - tvp5150_read(c, TVP5150_VBI_FIFO_READ_DATA)); 293 - printk("tvp5150: Teletext filter 1 = 0x%02x\n", 294 - tvp5150_read(c, TVP5150_TELETEXT_FIL_1_1)); 295 - printk("tvp5150: Teletext filter 1 = 0x%02x\n", 296 - tvp5150_read(c, TVP5150_TELETEXT_FIL_1_2)); 297 - printk("tvp5150: Teletext filter 1 = 0x%02x\n", 298 - tvp5150_read(c, TVP5150_TELETEXT_FIL_1_3)); 299 - printk("tvp5150: Teletext filter 1 = 0x%02x\n", 300 - tvp5150_read(c, TVP5150_TELETEXT_FIL_1_4)); 301 - printk("tvp5150: Teletext filter 1 = 0x%02x\n", 302 - tvp5150_read(c, TVP5150_TELETEXT_FIL_1_5)); 303 - printk("tvp5150: Teletext filter 2 = 0x%02x\n", 304 - tvp5150_read(c, TVP5150_TELETEXT_FIL_2_1)); 305 - printk("tvp5150: Teletext filter 2 = 0x%02x\n", 306 - tvp5150_read(c, TVP5150_TELETEXT_FIL_2_2)); 307 - printk("tvp5150: Teletext filter 2 = 0x%02x\n", 308 - tvp5150_read(c, TVP5150_TELETEXT_FIL_2_3)); 309 - printk("tvp5150: Teletext filter 2 = 0x%02x\n", 310 - tvp5150_read(c, TVP5150_TELETEXT_FIL_2_4)); 311 - printk("tvp5150: Teletext filter 2 = 0x%02x\n", 312 - tvp5150_read(c, TVP5150_TELETEXT_FIL_2_5)); 222 + tvp5150_read(c, TVP5150_INT_ACTIVE_REG_B)); 223 + printk("tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n", 224 + tvp5150_read(c, TVP5150_STATUS_REG_1), 225 + tvp5150_read(c, TVP5150_STATUS_REG_2), 226 + tvp5150_read(c, TVP5150_STATUS_REG_3), 227 + tvp5150_read(c, TVP5150_STATUS_REG_4), 228 + tvp5150_read(c, TVP5150_STATUS_REG_5)); 229 + 230 + dump_reg_range(c,"Teletext filter 1", TVP5150_TELETEXT_FIL1_INI, 231 + TVP5150_TELETEXT_FIL1_END,8); 232 + dump_reg_range(c,"Teletext filter 2", TVP5150_TELETEXT_FIL2_INI, 233 + TVP5150_TELETEXT_FIL2_END,8); 234 + 313 235 printk("tvp5150: Teletext filter enable = 0x%02x\n", 314 - tvp5150_read(c, TVP5150_TELETEXT_FIL_ENA)); 236 + tvp5150_read(c, TVP5150_TELETEXT_FIL_ENA)); 315 237 printk("tvp5150: Interrupt status register A = 0x%02x\n", 316 - tvp5150_read(c, TVP5150_INT_STATUS_REG_A)); 238 + tvp5150_read(c, TVP5150_INT_STATUS_REG_A)); 317 239 printk("tvp5150: Interrupt enable register A = 0x%02x\n", 318 - tvp5150_read(c, TVP5150_INT_ENABLE_REG_A)); 240 + tvp5150_read(c, TVP5150_INT_ENABLE_REG_A)); 319 241 printk("tvp5150: Interrupt configuration = 0x%02x\n", 320 - tvp5150_read(c, TVP5150_INT_CONF)); 321 - printk("tvp5150: VDP configuration RAM data = 0x%02x\n", 322 - tvp5150_read(c, TVP5150_VDP_CONF_RAM_DATA)); 323 - printk("tvp5150: Configuration RAM address low byte = 0x%02x\n", 324 - tvp5150_read(c, TVP5150_CONF_RAM_ADDR_LOW)); 325 - printk("tvp5150: Configuration RAM address high byte = 0x%02x\n", 326 - tvp5150_read(c, TVP5150_CONF_RAM_ADDR_HIGH)); 242 + tvp5150_read(c, TVP5150_INT_CONF)); 327 243 printk("tvp5150: VDP status register = 0x%02x\n", 328 - tvp5150_read(c, TVP5150_VDP_STATUS_REG)); 244 + tvp5150_read(c, TVP5150_VDP_STATUS_REG)); 329 245 printk("tvp5150: FIFO word count = 0x%02x\n", 330 - tvp5150_read(c, TVP5150_FIFO_WORD_COUNT)); 246 + tvp5150_read(c, TVP5150_FIFO_WORD_COUNT)); 331 247 printk("tvp5150: FIFO interrupt threshold = 0x%02x\n", 332 - tvp5150_read(c, TVP5150_FIFO_INT_THRESHOLD)); 248 + tvp5150_read(c, TVP5150_FIFO_INT_THRESHOLD)); 333 249 printk("tvp5150: FIFO reset = 0x%02x\n", 334 - tvp5150_read(c, TVP5150_FIFO_RESET)); 250 + tvp5150_read(c, TVP5150_FIFO_RESET)); 335 251 printk("tvp5150: Line number interrupt = 0x%02x\n", 336 - tvp5150_read(c, TVP5150_LINE_NUMBER_INT)); 337 - printk("tvp5150: Pixel alignment register low byte = 0x%02x\n", 338 - tvp5150_read(c, TVP5150_PIX_ALIGN_REG_LOW)); 339 - printk("tvp5150: Pixel alignment register high byte = 0x%02x\n", 340 - tvp5150_read(c, TVP5150_PIX_ALIGN_REG_HIGH)); 252 + tvp5150_read(c, TVP5150_LINE_NUMBER_INT)); 253 + printk("tvp5150: Pixel alignment register = 0x%02x%02x\n", 254 + tvp5150_read(c, TVP5150_PIX_ALIGN_REG_HIGH), 255 + tvp5150_read(c, TVP5150_PIX_ALIGN_REG_LOW)); 341 256 printk("tvp5150: FIFO output control = 0x%02x\n", 342 - tvp5150_read(c, TVP5150_FIFO_OUT_CTRL)); 343 - printk("tvp5150: Full field enable 1 = 0x%02x\n", 344 - tvp5150_read(c, TVP5150_FULL_FIELD_ENA_1)); 345 - printk("tvp5150: Full field enable 2 = 0x%02x\n", 346 - tvp5150_read(c, TVP5150_FULL_FIELD_ENA_2)); 347 - printk("tvp5150: Line mode registers = 0x%02x\n", 348 - tvp5150_read(c, TVP5150_LINE_MODE_REG_1)); 349 - printk("tvp5150: Line mode registers = 0x%02x\n", 350 - tvp5150_read(c, TVP5150_LINE_MODE_REG_2)); 351 - printk("tvp5150: Line mode registers = 0x%02x\n", 352 - tvp5150_read(c, TVP5150_LINE_MODE_REG_3)); 353 - printk("tvp5150: Line mode registers = 0x%02x\n", 354 - tvp5150_read(c, TVP5150_LINE_MODE_REG_4)); 355 - printk("tvp5150: Line mode registers = 0x%02x\n", 356 - tvp5150_read(c, TVP5150_LINE_MODE_REG_5)); 357 - printk("tvp5150: Line mode registers = 0x%02x\n", 358 - tvp5150_read(c, TVP5150_LINE_MODE_REG_6)); 359 - printk("tvp5150: Line mode registers = 0x%02x\n", 360 - tvp5150_read(c, TVP5150_LINE_MODE_REG_7)); 361 - printk("tvp5150: Line mode registers = 0x%02x\n", 362 - tvp5150_read(c, TVP5150_LINE_MODE_REG_8)); 363 - printk("tvp5150: Line mode registers = 0x%02x\n", 364 - tvp5150_read(c, TVP5150_LINE_MODE_REG_9)); 365 - printk("tvp5150: Line mode registers = 0x%02x\n", 366 - tvp5150_read(c, TVP5150_LINE_MODE_REG_10)); 367 - printk("tvp5150: Line mode registers = 0x%02x\n", 368 - tvp5150_read(c, TVP5150_LINE_MODE_REG_11)); 369 - printk("tvp5150: Line mode registers = 0x%02x\n", 370 - tvp5150_read(c, TVP5150_LINE_MODE_REG_12)); 371 - printk("tvp5150: Line mode registers = 0x%02x\n", 372 - tvp5150_read(c, TVP5150_LINE_MODE_REG_13)); 373 - printk("tvp5150: Line mode registers = 0x%02x\n", 374 - tvp5150_read(c, TVP5150_LINE_MODE_REG_14)); 375 - printk("tvp5150: Line mode registers = 0x%02x\n", 376 - tvp5150_read(c, TVP5150_LINE_MODE_REG_15)); 377 - printk("tvp5150: Line mode registers = 0x%02x\n", 378 - tvp5150_read(c, TVP5150_LINE_MODE_REG_16)); 379 - printk("tvp5150: Line mode registers = 0x%02x\n", 380 - tvp5150_read(c, TVP5150_LINE_MODE_REG_17)); 381 - printk("tvp5150: Line mode registers = 0x%02x\n", 382 - tvp5150_read(c, TVP5150_LINE_MODE_REG_18)); 383 - printk("tvp5150: Line mode registers = 0x%02x\n", 384 - tvp5150_read(c, TVP5150_LINE_MODE_REG_19)); 385 - printk("tvp5150: Line mode registers = 0x%02x\n", 386 - tvp5150_read(c, TVP5150_LINE_MODE_REG_20)); 387 - printk("tvp5150: Line mode registers = 0x%02x\n", 388 - tvp5150_read(c, TVP5150_LINE_MODE_REG_21)); 389 - printk("tvp5150: Line mode registers = 0x%02x\n", 390 - tvp5150_read(c, TVP5150_LINE_MODE_REG_22)); 391 - printk("tvp5150: Line mode registers = 0x%02x\n", 392 - tvp5150_read(c, TVP5150_LINE_MODE_REG_23)); 393 - printk("tvp5150: Line mode registers = 0x%02x\n", 394 - tvp5150_read(c, TVP5150_LINE_MODE_REG_24)); 395 - printk("tvp5150: Line mode registers = 0x%02x\n", 396 - tvp5150_read(c, TVP5150_LINE_MODE_REG_25)); 397 - printk("tvp5150: Line mode registers = 0x%02x\n", 398 - tvp5150_read(c, TVP5150_LINE_MODE_REG_27)); 399 - printk("tvp5150: Line mode registers = 0x%02x\n", 400 - tvp5150_read(c, TVP5150_LINE_MODE_REG_28)); 401 - printk("tvp5150: Line mode registers = 0x%02x\n", 402 - tvp5150_read(c, TVP5150_LINE_MODE_REG_29)); 403 - printk("tvp5150: Line mode registers = 0x%02x\n", 404 - tvp5150_read(c, TVP5150_LINE_MODE_REG_30)); 405 - printk("tvp5150: Line mode registers = 0x%02x\n", 406 - tvp5150_read(c, TVP5150_LINE_MODE_REG_31)); 407 - printk("tvp5150: Line mode registers = 0x%02x\n", 408 - tvp5150_read(c, TVP5150_LINE_MODE_REG_32)); 409 - printk("tvp5150: Line mode registers = 0x%02x\n", 410 - tvp5150_read(c, TVP5150_LINE_MODE_REG_33)); 411 - printk("tvp5150: Line mode registers = 0x%02x\n", 412 - tvp5150_read(c, TVP5150_LINE_MODE_REG_34)); 413 - printk("tvp5150: Line mode registers = 0x%02x\n", 414 - tvp5150_read(c, TVP5150_LINE_MODE_REG_35)); 415 - printk("tvp5150: Line mode registers = 0x%02x\n", 416 - tvp5150_read(c, TVP5150_LINE_MODE_REG_36)); 417 - printk("tvp5150: Line mode registers = 0x%02x\n", 418 - tvp5150_read(c, TVP5150_LINE_MODE_REG_37)); 419 - printk("tvp5150: Line mode registers = 0x%02x\n", 420 - tvp5150_read(c, TVP5150_LINE_MODE_REG_38)); 421 - printk("tvp5150: Line mode registers = 0x%02x\n", 422 - tvp5150_read(c, TVP5150_LINE_MODE_REG_39)); 423 - printk("tvp5150: Line mode registers = 0x%02x\n", 424 - tvp5150_read(c, TVP5150_LINE_MODE_REG_40)); 425 - printk("tvp5150: Line mode registers = 0x%02x\n", 426 - tvp5150_read(c, TVP5150_LINE_MODE_REG_41)); 427 - printk("tvp5150: Line mode registers = 0x%02x\n", 428 - tvp5150_read(c, TVP5150_LINE_MODE_REG_42)); 429 - printk("tvp5150: Line mode registers = 0x%02x\n", 430 - tvp5150_read(c, TVP5150_LINE_MODE_REG_43)); 431 - printk("tvp5150: Line mode registers = 0x%02x\n", 432 - tvp5150_read(c, TVP5150_LINE_MODE_REG_44)); 257 + tvp5150_read(c, TVP5150_FIFO_OUT_CTRL)); 258 + printk("tvp5150: Full field enable = 0x%02x\n", 259 + tvp5150_read(c, TVP5150_FULL_FIELD_ENA)); 433 260 printk("tvp5150: Full field mode register = 0x%02x\n", 434 - tvp5150_read(c, TVP5150_FULL_FIELD_MODE_REG)); 261 + tvp5150_read(c, TVP5150_FULL_FIELD_MODE_REG)); 262 + 263 + dump_reg_range(c,"CC data", TVP5150_CC_DATA_INI, 264 + TVP5150_CC_DATA_END,8); 265 + 266 + dump_reg_range(c,"WSS data", TVP5150_WSS_DATA_INI, 267 + TVP5150_WSS_DATA_END,8); 268 + 269 + dump_reg_range(c,"VPS data", TVP5150_VPS_DATA_INI, 270 + TVP5150_VPS_DATA_END,8); 271 + 272 + dump_reg_range(c,"VITC data", TVP5150_VITC_DATA_INI, 273 + TVP5150_VITC_DATA_END,10); 274 + 275 + dump_reg_range(c,"Line mode", TVP5150_LINE_MODE_INI, 276 + TVP5150_LINE_MODE_END,8); 435 277 } 436 278 437 279 /**************************************************************************** ··· 441 593 TVP5150_FIFO_OUT_CTRL,0x01 442 594 }, 443 595 { /* 0xcf */ 444 - TVP5150_FULL_FIELD_ENA_1,0x00 596 + TVP5150_FULL_FIELD_ENA,0x00 445 597 }, 446 598 { /* 0xd0 */ 447 - TVP5150_FULL_FIELD_ENA_2,0x00 599 + TVP5150_LINE_MODE_INI,0x00 448 600 }, 449 601 { /* 0xfc */ 450 602 TVP5150_FULL_FIELD_MODE_REG,0x7f ··· 482 634 unsigned char values[26]; 483 635 }; 484 636 637 + /* tvp5150_vbi_types should follow the same order as vbi_ram_default 638 + * value 0 means rom position 0x10, value 1 means rom position 0x30 639 + * and so on. There are 16 possible locations from 0 to 15. 640 + */ 641 + enum tvp5150_vbi_types { /* Video line number Description */ 642 + VBI_WST_SECAM, /* 6-23 (field 1,2) Teletext, SECAM */ 643 + VBI_WST_PAL_B, /* 6-22 (field 1,2) Teletext, PAL, System B */ 644 + VBI_WST_PAL_C, /* 6-22 (field 1,2) Teletext, PAL, System C */ 645 + VBI_WST_NTSC_B, /* 10-21 (field 1,2) Teletext, NTSC, System B */ 646 + VBI_NABTS_NTSC_C, /* 10-21 (field 1,2) Teletext, NTSC, System C */ 647 + VBI_NABTS_NTSC_D, /* 10-21 (field 1,2) Teletext, NTSC, System D */ 648 + VBI_CC_PAL_SECAM, /* 22 (field 1,2) Closed Caption PAL/SECAM */ 649 + VBI_CC_NTSC, /* 21 (field 1,2) Closed Caption NTSC */ 650 + VBI_WSS_PAL_SECAM, /* 23 (field 1,2) Wide Screen Signal PAL/SECAM */ 651 + VBI_WSS_NTSC, /* 20 (field 1,2) Wide Screen Signal NTSC */ 652 + VBI_VITC_PAL_SECAM, /* 6-22 Vertical Interval Timecode PAL/SECAM */ 653 + VBI_VITC_NTSC, /* 10-20 Vertical Interval Timecode NTSC */ 654 + VBI_VPS_PAL, /* 16 Video Program System PAL */ 655 + VBI_EPG_GEMSTAR, /* EPG/Gemstar Electronic program guide */ 656 + VBI_RESERVED, /* not in use on vbi_ram_default table */ 657 + VBI_FULL_FIELD /* Active video/Full Field */ 658 + }; 659 + 485 660 static struct i2c_vbi_ram_value vbi_ram_default[] = 486 661 { 487 - {0x010, /* WST SECAM 6 */ 662 + {0x010, /* WST SECAM */ 488 663 { 0xaa, 0xaa, 0xff, 0xff , 0xe7, 0x2e, 0x20, 0x26, 0xe6, 0xb4, 0x0e, 0x0, 0x0, 0x0, 0x10, 0x0 } 489 664 }, 490 - {0x030, /* WST PAL B 6 */ 665 + {0x030, /* WST PAL B */ 491 666 { 0xaa, 0xaa, 0xff, 0xff , 0x27, 0x2e, 0x20, 0x2b, 0xa6, 0x72, 0x10, 0x0, 0x0, 0x0, 0x10, 0x0 } 492 667 }, 493 - {0x050, /* WST PAL C 6 */ 668 + {0x050, /* WST PAL C */ 494 669 { 0xaa, 0xaa, 0xff, 0xff , 0xe7, 0x2e, 0x20, 0x22, 0xa6, 0x98, 0x0d, 0x0, 0x0, 0x0, 0x10, 0x0 } 495 670 }, 496 - {0x070, /* WST NTSC 6 */ 671 + {0x070, /* WST NTSC B */ 497 672 { 0xaa, 0xaa, 0xff, 0xff , 0x27, 0x2e, 0x20, 0x23, 0x69, 0x93, 0x0d, 0x0, 0x0, 0x0, 0x10, 0x0 } 498 673 }, 499 - {0x090, /* NABTS, NTSC 6 */ 674 + {0x090, /* NABTS, NTSC */ 500 675 { 0xaa, 0xaa, 0xff, 0xff , 0xe7, 0x2e, 0x20, 0x22, 0x69, 0x93, 0x0d, 0x0, 0x0, 0x0, 0x15, 0x0 } 501 676 }, 502 - {0x0b0, /* NABTS, NTSC-J 6 */ 677 + {0x0b0, /* NABTS, NTSC-J */ 503 678 { 0xaa, 0xaa, 0xff, 0xff , 0xa7, 0x2e, 0x20, 0x23, 0x69, 0x93, 0x0d, 0x0, 0x0, 0x0, 0x10, 0x0 } 504 679 }, 505 - {0x0d0, /* CC, PAL/SECAM 6 */ 680 + {0x0d0, /* CC, PAL/SECAM */ 506 681 { 0xaa, 0x2a, 0xff, 0x3f , 0x04, 0x51, 0x6e, 0x02, 0xa6, 0x7b, 0x09, 0x0, 0x0, 0x0, 0x27, 0x0 } 507 682 }, 508 - {0x0f0, /* CC, NTSC 6 */ 683 + {0x0f0, /* CC, NTSC */ 509 684 { 0xaa, 0x2a, 0xff, 0x3f , 0x04, 0x51, 0x6e, 0x02, 0x69, 0x8c, 0x09, 0x0, 0x0, 0x0, 0x27, 0x0 } 510 685 }, 511 - {0x110, /* WSS, PAL/SECAM 6 */ 686 + {0x110, /* WSS, PAL/SECAM */ 512 687 { 0x5b, 0x55, 0xc5, 0xff , 0x0, 0x71, 0x6e, 0x42, 0xa6, 0xcd, 0x0f, 0x0, 0x0, 0x0, 0x3a, 0x0 } 513 688 }, 514 689 {0x130, /* WSS, NTSC C */ 515 690 { 0x38, 0x00, 0x3f, 0x00 , 0x0, 0x71, 0x6e, 0x43, 0x69, 0x7c, 0x08, 0x0, 0x0, 0x0, 0x39, 0x0 } 516 691 }, 517 - {0x150, /* VITC, PAL/SECAM 6 */ 692 + {0x150, /* VITC, PAL/SECAM */ 518 693 { 0x0, 0x0, 0x0, 0x0 , 0x0, 0x8f, 0x6d, 0x49, 0xa6, 0x85, 0x08, 0x0, 0x0, 0x0, 0x4c, 0x0 } 519 694 }, 520 - {0x170, /* VITC, NTSC 6 */ 695 + {0x170, /* VITC, NTSC */ 521 696 { 0x0, 0x0, 0x0, 0x0 , 0x0, 0x8f, 0x6d, 0x49, 0x69, 0x94, 0x08, 0x0, 0x0, 0x0, 0x4c, 0x0 } 522 697 }, 523 - { (u16)-1 } 698 + {0x190, /* VPS, PAL */ 699 + { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d, 0xa6, 0xda, 0x0b, 0x0, 0x0, 0x0, 0x60, 0x0 } 700 + }, 701 + {0x1b0, /* Gemstar Custom 1 */ 702 + { 0xcc, 0xcc, 0xff, 0xff, 0x05, 0x51, 0x6e, 0x05, 0x69, 0x19, 0x13, 0x0, 0x0, 0x0, 0x60, 0x0 } 703 + }, 524 704 }; 525 705 526 706 static int tvp5150_write_inittab(struct i2c_client *c, ··· 567 691 unsigned int i; 568 692 569 693 /* Disable Full Field */ 570 - tvp5150_write(c, TVP5150_FULL_FIELD_ENA_1, 0); 694 + tvp5150_write(c, TVP5150_FULL_FIELD_ENA, 0); 571 695 572 696 /* Before programming, Line mode should be at 0xff */ 573 - for (i=TVP5150_FULL_FIELD_ENA_2; i<=TVP5150_LINE_MODE_REG_44; i++) 697 + for (i=TVP5150_LINE_MODE_INI; i<=TVP5150_LINE_MODE_END; i++) 574 698 tvp5150_write(c, i, 0xff); 575 699 576 700 /* Load Ram Table */ ··· 583 707 584 708 regs++; 585 709 } 710 + return 0; 711 + } 712 + 713 + /* Set vbi processing 714 + * type - one of tvp5150_vbi_types 715 + * line - line to gather data 716 + * fields: bit 0 field1, bit 1, field2 717 + * flags (default=0xf0) is a bitmask, were set means: 718 + * bit 7: enable filtering null bytes on CC 719 + * bit 6: send data also to FIFO 720 + * bit 5: don't allow data with errors on FIFO 721 + * bit 4: enable ECC when possible 722 + * pix_align = pix alignment: 723 + * LSB = field1 724 + * MSB = field2 725 + */ 726 + static int tvp5150_set_vbi(struct i2c_client *c, enum tvp5150_vbi_types type, 727 + u8 flags, int line, const int fields) 728 + { 729 + struct tvp5150 *decoder = i2c_get_clientdata(c); 730 + v4l2_std_id std=decoder->norm; 731 + u8 reg; 732 + 733 + if (std == V4L2_STD_ALL) { 734 + tvp5150_err("VBI can't be configured without knowing number of lines\n"); 735 + return -EINVAL; 736 + } else if (std && V4L2_STD_625_50) { 737 + /* Don't follow NTSC Line number convension */ 738 + line += 3; 739 + } 740 + 741 + if (line<6||line>27) 742 + return -EINVAL; 743 + 744 + type=type | (flags & 0xf0); 745 + reg=((line-6)<<1)+TVP5150_LINE_MODE_INI; 746 + 747 + if (fields&1) { 748 + tvp5150_write(c, reg, type); 749 + } 750 + 751 + if (fields&2) { 752 + tvp5150_write(c, reg+1, type); 753 + } 754 + 586 755 return 0; 587 756 } 588 757 ··· 1007 1086 1008 1087 rv = i2c_attach_client(c); 1009 1088 1010 - core->norm = V4L2_STD_ALL; 1089 + core->norm = V4L2_STD_ALL; /* Default is autodetect */ 1011 1090 core->input = 2; 1012 1091 core->enable = 1; 1013 1092 core->bright = 32768;
+31 -87
drivers/media/video/tvp5150_reg.h
··· 64 64 #define TVP5150_STATUS_REG_4 0x8b /* Status register #4 */ 65 65 #define TVP5150_STATUS_REG_5 0x8c /* Status register #5 */ 66 66 /* Reserved 8Dh-8Fh */ 67 - #define TVP5150_CC_DATA_REG1 0x90 /* Closed caption data registers */ 68 - #define TVP5150_CC_DATA_REG2 0x91 /* Closed caption data registers */ 69 - #define TVP5150_CC_DATA_REG3 0x92 /* Closed caption data registers */ 70 - #define TVP5150_CC_DATA_REG4 0x93 /* Closed caption data registers */ 71 - #define TVP5150_WSS_DATA_REG1 0X94 /* WSS data registers */ 72 - #define TVP5150_WSS_DATA_REG2 0X95 /* WSS data registers */ 73 - #define TVP5150_WSS_DATA_REG3 0X96 /* WSS data registers */ 74 - #define TVP5150_WSS_DATA_REG4 0X97 /* WSS data registers */ 75 - #define TVP5150_WSS_DATA_REG5 0X98 /* WSS data registers */ 76 - #define TVP5150_WSS_DATA_REG6 0X99 /* WSS data registers */ 77 - #define TVP5150_VPS_DATA_REG1 0x9a /* VPS data registers */ 78 - #define TVP5150_VPS_DATA_REG2 0x9b /* VPS data registers */ 79 - #define TVP5150_VPS_DATA_REG3 0x9c /* VPS data registers */ 80 - #define TVP5150_VPS_DATA_REG4 0x9d /* VPS data registers */ 81 - #define TVP5150_VPS_DATA_REG5 0x9e /* VPS data registers */ 82 - #define TVP5150_VPS_DATA_REG6 0x9f /* VPS data registers */ 83 - #define TVP5150_VPS_DATA_REG7 0xa0 /* VPS data registers */ 84 - #define TVP5150_VPS_DATA_REG8 0xa1 /* VPS data registers */ 85 - #define TVP5150_VPS_DATA_REG9 0xa2 /* VPS data registers */ 86 - #define TVP5150_VPS_DATA_REG10 0xa3 /* VPS data registers */ 87 - #define TVP5150_VPS_DATA_REG11 0xa4 /* VPS data registers */ 88 - #define TVP5150_VPS_DATA_REG12 0xa5 /* VPS data registers */ 89 - #define TVP5150_VPS_DATA_REG13 0xa6 /* VPS data registers */ 90 - #define TVP5150_VITC_DATA_REG1 0xa7 /* VITC data registers */ 91 - #define TVP5150_VITC_DATA_REG2 0xa8 /* VITC data registers */ 92 - #define TVP5150_VITC_DATA_REG3 0xa9 /* VITC data registers */ 93 - #define TVP5150_VITC_DATA_REG4 0xaa /* VITC data registers */ 94 - #define TVP5150_VITC_DATA_REG5 0xab /* VITC data registers */ 95 - #define TVP5150_VITC_DATA_REG6 0xac /* VITC data registers */ 96 - #define TVP5150_VITC_DATA_REG7 0xad /* VITC data registers */ 97 - #define TVP5150_VITC_DATA_REG8 0xae /* VITC data registers */ 98 - #define TVP5150_VITC_DATA_REG9 0xaf /* VITC data registers */ 67 + /* Closed caption data registers */ 68 + #define TVP5150_CC_DATA_INI 0x90 69 + #define TVP5150_CC_DATA_END 0x93 70 + 71 + /* WSS data registers */ 72 + #define TVP5150_WSS_DATA_INI 0x94 73 + #define TVP5150_WSS_DATA_END 0x99 74 + 75 + /* VPS data registers */ 76 + #define TVP5150_VPS_DATA_INI 0x9a 77 + #define TVP5150_VPS_DATA_END 0xa6 78 + 79 + /* VITC data registers */ 80 + #define TVP5150_VITC_DATA_INI 0xa7 81 + #define TVP5150_VITC_DATA_END 0xaf 82 + 99 83 #define TVP5150_VBI_FIFO_READ_DATA 0xb0 /* VBI FIFO read data */ 100 - #define TVP5150_TELETEXT_FIL_1_1 0xb1 /* Teletext filter 1 */ 101 - #define TVP5150_TELETEXT_FIL_1_2 0xb2 /* Teletext filter 1 */ 102 - #define TVP5150_TELETEXT_FIL_1_3 0xb3 /* Teletext filter 1 */ 103 - #define TVP5150_TELETEXT_FIL_1_4 0xb4 /* Teletext filter 1 */ 104 - #define TVP5150_TELETEXT_FIL_1_5 0xb5 /* Teletext filter 1 */ 105 - #define TVP5150_TELETEXT_FIL_2_1 0xb6 /* Teletext filter 2 */ 106 - #define TVP5150_TELETEXT_FIL_2_2 0xb7 /* Teletext filter 2 */ 107 - #define TVP5150_TELETEXT_FIL_2_3 0xb8 /* Teletext filter 2 */ 108 - #define TVP5150_TELETEXT_FIL_2_4 0xb9 /* Teletext filter 2 */ 109 - #define TVP5150_TELETEXT_FIL_2_5 0xba /* Teletext filter 2 */ 84 + 85 + /* Teletext filter 1 */ 86 + #define TVP5150_TELETEXT_FIL1_INI 0xb1 87 + #define TVP5150_TELETEXT_FIL1_END 0xb5 88 + 89 + /* Teletext filter 2 */ 90 + #define TVP5150_TELETEXT_FIL2_INI 0xb6 91 + #define TVP5150_TELETEXT_FIL2_END 0xba 92 + 110 93 #define TVP5150_TELETEXT_FIL_ENA 0xbb /* Teletext filter enable */ 111 94 /* Reserved BCh-BFh */ 112 95 #define TVP5150_INT_STATUS_REG_A 0xc0 /* Interrupt status register A */ ··· 107 124 #define TVP5150_PIX_ALIGN_REG_HIGH 0xcc /* Pixel alignment register high byte */ 108 125 #define TVP5150_FIFO_OUT_CTRL 0xcd /* FIFO output control */ 109 126 /* Reserved CEh */ 110 - #define TVP5150_FULL_FIELD_ENA_1 0xcf /* Full field enable 1 */ 111 - #define TVP5150_FULL_FIELD_ENA_2 0xd0 /* Full field enable 2 */ 112 - #define TVP5150_LINE_MODE_REG_1 0xd1 /* Line mode registers */ 113 - #define TVP5150_LINE_MODE_REG_2 0xd2 /* Line mode registers */ 114 - #define TVP5150_LINE_MODE_REG_3 0xd3 /* Line mode registers */ 115 - #define TVP5150_LINE_MODE_REG_4 0xd4 /* Line mode registers */ 116 - #define TVP5150_LINE_MODE_REG_5 0xd5 /* Line mode registers */ 117 - #define TVP5150_LINE_MODE_REG_6 0xd6 /* Line mode registers */ 118 - #define TVP5150_LINE_MODE_REG_7 0xd7 /* Line mode registers */ 119 - #define TVP5150_LINE_MODE_REG_8 0xd8 /* Line mode registers */ 120 - #define TVP5150_LINE_MODE_REG_9 0xd9 /* Line mode registers */ 121 - #define TVP5150_LINE_MODE_REG_10 0xda /* Line mode registers */ 122 - #define TVP5150_LINE_MODE_REG_11 0xdb /* Line mode registers */ 123 - #define TVP5150_LINE_MODE_REG_12 0xdc /* Line mode registers */ 124 - #define TVP5150_LINE_MODE_REG_13 0xdd /* Line mode registers */ 125 - #define TVP5150_LINE_MODE_REG_14 0xde /* Line mode registers */ 126 - #define TVP5150_LINE_MODE_REG_15 0xdf /* Line mode registers */ 127 - #define TVP5150_LINE_MODE_REG_16 0xe0 /* Line mode registers */ 128 - #define TVP5150_LINE_MODE_REG_17 0xe1 /* Line mode registers */ 129 - #define TVP5150_LINE_MODE_REG_18 0xe2 /* Line mode registers */ 130 - #define TVP5150_LINE_MODE_REG_19 0xe3 /* Line mode registers */ 131 - #define TVP5150_LINE_MODE_REG_20 0xe4 /* Line mode registers */ 132 - #define TVP5150_LINE_MODE_REG_21 0xe5 /* Line mode registers */ 133 - #define TVP5150_LINE_MODE_REG_22 0xe6 /* Line mode registers */ 134 - #define TVP5150_LINE_MODE_REG_23 0xe7 /* Line mode registers */ 135 - #define TVP5150_LINE_MODE_REG_24 0xe8 /* Line mode registers */ 136 - #define TVP5150_LINE_MODE_REG_25 0xe9 /* Line mode registers */ 137 - #define TVP5150_LINE_MODE_REG_27 0xea /* Line mode registers */ 138 - #define TVP5150_LINE_MODE_REG_28 0xeb /* Line mode registers */ 139 - #define TVP5150_LINE_MODE_REG_29 0xec /* Line mode registers */ 140 - #define TVP5150_LINE_MODE_REG_30 0xed /* Line mode registers */ 141 - #define TVP5150_LINE_MODE_REG_31 0xee /* Line mode registers */ 142 - #define TVP5150_LINE_MODE_REG_32 0xef /* Line mode registers */ 143 - #define TVP5150_LINE_MODE_REG_33 0xf0 /* Line mode registers */ 144 - #define TVP5150_LINE_MODE_REG_34 0xf1 /* Line mode registers */ 145 - #define TVP5150_LINE_MODE_REG_35 0xf2 /* Line mode registers */ 146 - #define TVP5150_LINE_MODE_REG_36 0xf3 /* Line mode registers */ 147 - #define TVP5150_LINE_MODE_REG_37 0xf4 /* Line mode registers */ 148 - #define TVP5150_LINE_MODE_REG_38 0xf5 /* Line mode registers */ 149 - #define TVP5150_LINE_MODE_REG_39 0xf6 /* Line mode registers */ 150 - #define TVP5150_LINE_MODE_REG_40 0xf7 /* Line mode registers */ 151 - #define TVP5150_LINE_MODE_REG_41 0xf8 /* Line mode registers */ 152 - #define TVP5150_LINE_MODE_REG_42 0xf9 /* Line mode registers */ 153 - #define TVP5150_LINE_MODE_REG_43 0xfa /* Line mode registers */ 154 - #define TVP5150_LINE_MODE_REG_44 0xfb /* Line mode registers */ 127 + #define TVP5150_FULL_FIELD_ENA 0xcf /* Full field enable 1 */ 128 + 129 + /* Line mode registers */ 130 + #define TVP5150_LINE_MODE_INI 0xd0 131 + #define TVP5150_LINE_MODE_END 0xfb 132 + 155 133 #define TVP5150_FULL_FIELD_MODE_REG 0xfc /* Full field mode register */ 156 134 /* Reserved FDh-FFh */