Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fix from Stephen Boyd:
"One fix for the composite clk that broke when we changed this clk type
to use the determine_rate instead of round_rate clk op by default.
This caused lots of problems on Rockchip SoCs because they heavily use
the composite clk code to model the clk tree"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: composite: Also consider .determine_rate for rate + mux composites

Changed files
+5 -5
drivers
+5 -5
drivers/clk/clk-composite.c
··· 58 58 long rate; 59 59 int i; 60 60 61 - if (rate_hw && rate_ops && rate_ops->determine_rate) { 62 - __clk_hw_set_clk(rate_hw, hw); 63 - return rate_ops->determine_rate(rate_hw, req); 64 - } else if (rate_hw && rate_ops && rate_ops->round_rate && 65 - mux_hw && mux_ops && mux_ops->set_parent) { 61 + if (rate_hw && rate_ops && rate_ops->round_rate && 62 + mux_hw && mux_ops && mux_ops->set_parent) { 66 63 req->best_parent_hw = NULL; 67 64 68 65 if (clk_hw_get_flags(hw) & CLK_SET_RATE_NO_REPARENT) { ··· 104 107 105 108 req->rate = best_rate; 106 109 return 0; 110 + } else if (rate_hw && rate_ops && rate_ops->determine_rate) { 111 + __clk_hw_set_clk(rate_hw, hw); 112 + return rate_ops->determine_rate(rate_hw, req); 107 113 } else if (mux_hw && mux_ops && mux_ops->determine_rate) { 108 114 __clk_hw_set_clk(mux_hw, hw); 109 115 return mux_ops->determine_rate(mux_hw, req);