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clk: lochnagar: Add initial binding documentation

Lochnagar is an evaluation and development board for Cirrus
Logic Smart CODEC and Amp devices. It allows the connection of
most Cirrus Logic devices on mini-cards, as well as allowing
connection of various application processor systems to provide a
full evaluation platform. This driver supports the board
controller chip on the Lochnagar board.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

authored by

Charles Keepax and committed by
Stephen Boyd
3a02cd68 9e98c678

+93
+93
Documentation/devicetree/bindings/clock/cirrus,lochnagar.txt
··· 1 + Cirrus Logic Lochnagar Audio Development Board 2 + 3 + Lochnagar is an evaluation and development board for Cirrus Logic 4 + Smart CODEC and Amp devices. It allows the connection of most Cirrus 5 + Logic devices on mini-cards, as well as allowing connection of 6 + various application processor systems to provide a full evaluation 7 + platform. Audio system topology, clocking and power can all be 8 + controlled through the Lochnagar, allowing the device under test 9 + to be used in a variety of possible use cases. 10 + 11 + This binding document describes the binding for the clock portion of 12 + the driver. 13 + 14 + Also see these documents for generic binding information: 15 + [1] Clock : ../clock/clock-bindings.txt 16 + 17 + And these for relevant defines: 18 + [2] include/dt-bindings/clock/lochnagar.h 19 + 20 + This binding must be part of the Lochnagar MFD binding: 21 + [3] ../mfd/cirrus,lochnagar.txt 22 + 23 + Required properties: 24 + 25 + - compatible : One of the following strings: 26 + "cirrus,lochnagar1-clk" 27 + "cirrus,lochnagar2-clk" 28 + 29 + - #clock-cells : Must be 1. The first cell indicates the clock 30 + number, see [2] for available clocks and [1]. 31 + 32 + Optional properties: 33 + 34 + - clocks : Must contain an entry for each clock in clock-names. 35 + - clock-names : May contain entries for each of the following 36 + clocks: 37 + - ln-cdc-clkout : Output clock from CODEC card. 38 + - ln-dsp-clkout : Output clock from DSP card. 39 + - ln-gf-mclk1,ln-gf-mclk2,ln-gf-mclk3,ln-gf-mclk4 : Optional 40 + input audio clocks from host system. 41 + - ln-psia1-mclk, ln-psia2-mclk : Optional input audio clocks from 42 + external connector. 43 + - ln-spdif-clkout : Optional input audio clock from SPDIF. 44 + - ln-adat-mclk : Optional input audio clock from ADAT. 45 + - ln-pmic-32k : On board fixed clock. 46 + - ln-clk-12m : On board fixed clock. 47 + - ln-clk-11m : On board fixed clock. 48 + - ln-clk-24m : On board fixed clock. 49 + - ln-clk-22m : On board fixed clock. 50 + - ln-clk-8m : On board fixed clock. 51 + - ln-usb-clk-24m : On board fixed clock. 52 + - ln-usb-clk-12m : On board fixed clock. 53 + 54 + - assigned-clocks : A list of Lochnagar clocks to be reparented, see 55 + [2] for available clocks. 56 + - assigned-clock-parents : Parents to be assigned to the clocks 57 + listed in "assigned-clocks". 58 + 59 + Optional nodes: 60 + 61 + - fixed-clock nodes may be registered for the following on board clocks: 62 + - ln-pmic-32k : 32768 Hz 63 + - ln-clk-12m : 12288000 Hz 64 + - ln-clk-11m : 11298600 Hz 65 + - ln-clk-24m : 24576000 Hz 66 + - ln-clk-22m : 22579200 Hz 67 + - ln-clk-8m : 8192000 Hz 68 + - ln-usb-clk-24m : 24576000 Hz 69 + - ln-usb-clk-12m : 12288000 Hz 70 + 71 + Example: 72 + 73 + lochnagar { 74 + lochnagar-clk { 75 + compatible = "cirrus,lochnagar2-clk"; 76 + 77 + #clock-cells = <1>; 78 + 79 + clocks = <&clk-audio>, <&clk_pmic>; 80 + clock-names = "ln-gf-mclk2", "ln-pmic-32k"; 81 + 82 + assigned-clocks = <&lochnagar-clk LOCHNAGAR_CDC_MCLK1>, 83 + <&lochnagar-clk LOCHNAGAR_CDC_MCLK2>; 84 + assigned-clock-parents = <&clk-audio>, 85 + <&clk-pmic>; 86 + }; 87 + 88 + clk-pmic: clk-pmic { 89 + compatible = "fixed-clock"; 90 + clock-cells = <0>; 91 + clock-frequency = <32768>; 92 + }; 93 + };