MIPS: Octeon: Run IPI code with interrupts disabled.

In mm/slab.c the function do_ccupdate_local requires that interrupts be
disabled. If they are not, we panic with CONFIG_DEBUG_SLAB.

So we disable interrupts while processing IPIs. Also these are not shared
irqs, so get rid of the IRQF_SHARED flag.

Signed-off-by: David Daney <[e-mail]>
Signed-off-by: Ralf Baechle <[e-mail]>

arch/mips/cavium-octeon/smp.c

···
 void octeon_prepare_cpus(unsigned int max_cpus)
 {
 	cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffffffff);
-	if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_SHARED,
+	if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_DISABLED,
 			"mailbox0", mailbox_interrupt)) {
 		panic("Cannot request_irq(OCTEON_IRQ_MBOX0)\n");
 	}
-	if (request_irq(OCTEON_IRQ_MBOX1, mailbox_interrupt, IRQF_SHARED,
+	if (request_irq(OCTEON_IRQ_MBOX1, mailbox_interrupt, IRQF_DISABLED,
 			"mailbox1", mailbox_interrupt)) {
 		panic("Cannot request_irq(OCTEON_IRQ_MBOX1)\n");
 	}