tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/radeon: add cik tile mode array query

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Alex Deucher 39aee490 0672e27b

+14 -8
+4
drivers/gpu/drm/radeon/cik.c
··· 1059 1059 gb_tile_moden = 0; 1060 1060 break; 1061 1061 } 1062 + rdev->config.cik.tile_mode_array[reg_offset] = gb_tile_moden; 1062 1063 WREG32(GB_TILE_MODE0 + (reg_offset * 4), gb_tile_moden); 1063 1064 } 1064 1065 for (reg_offset = 0; reg_offset < num_secondary_tile_mode_states; reg_offset++) { ··· 1278 1277 gb_tile_moden = 0; 1279 1278 break; 1280 1279 } 1280 + rdev->config.cik.tile_mode_array[reg_offset] = gb_tile_moden; 1281 1281 WREG32(GB_TILE_MODE0 + (reg_offset * 4), gb_tile_moden); 1282 1282 } 1283 1283 } else if (num_rbs < 4) { ··· 1404 1402 gb_tile_moden = 0; 1405 1403 break; 1406 1404 } 1405 + rdev->config.cik.tile_mode_array[reg_offset] = gb_tile_moden; 1407 1406 WREG32(GB_TILE_MODE0 + (reg_offset * 4), gb_tile_moden); 1408 1407 } 1409 1408 } ··· 1622 1619 gb_tile_moden = 0; 1623 1620 break; 1624 1621 } 1622 + rdev->config.cik.tile_mode_array[reg_offset] = gb_tile_moden; 1625 1623 WREG32(GB_TILE_MODE0 + (reg_offset * 4), gb_tile_moden); 1626 1624 } 1627 1625 for (reg_offset = 0; reg_offset < num_secondary_tile_mode_states; reg_offset++) {
+1
drivers/gpu/drm/radeon/radeon.h
··· 1587 1587 unsigned multi_gpu_tile_size; 1588 1588 1589 1589 unsigned tile_config; 1590 + uint32_t tile_mode_array[32]; 1590 1591 }; 1591 1592 1592 1593 union radeon_asic_config {
+2 -1
drivers/gpu/drm/radeon/radeon_drv.c
··· 74 74 * 2.31.0 - Add fastfb support for rs690 75 75 * 2.32.0 - new info request for rings working 76 76 * 2.33.0 - Add SI tiling mode array query 77 + * 2.34.0 - Add CIK tiling mode array query 77 78 */ 78 79 #define KMS_DRIVER_MAJOR 2 79 - #define KMS_DRIVER_MINOR 33 80 + #define KMS_DRIVER_MINOR 34 80 81 #define KMS_DRIVER_PATCHLEVEL 0 81 82 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 82 83 int radeon_driver_unload_kms(struct drm_device *dev);
+7 -7
drivers/gpu/drm/radeon/radeon_kms.c
··· 423 423 break; 424 424 case RADEON_INFO_SI_TILE_MODE_ARRAY: 425 425 if (rdev->family >= CHIP_BONAIRE) { 426 - DRM_DEBUG_KMS("tile mode array is not implemented yet\n"); 426 + value = rdev->config.cik.tile_mode_array; 427 + value_size = sizeof(uint32_t)*32; 428 + } else if (rdev->family >= CHIP_TAHITI) { 429 + value = rdev->config.si.tile_mode_array; 430 + value_size = sizeof(uint32_t)*32; 431 + } else { 432 + DRM_DEBUG_KMS("tile mode array is si+ only!\n"); 427 433 return -EINVAL; 428 434 } 429 - if (rdev->family < CHIP_TAHITI) { 430 - DRM_DEBUG_KMS("tile mode array is si only!\n"); 431 - return -EINVAL; 432 - } 433 - value = rdev->config.si.tile_mode_array; 434 - value_size = sizeof(uint32_t)*32; 435 435 break; 436 436 default: 437 437 DRM_DEBUG_KMS("Invalid request %d\n", info->request);